MorphGI / Mbed OS LoCoMoTE_MidLevel_7-0

Mid level control code

Dependencies:   ros_lib_kinetic

LLComms.cpp@9:cd3607ba5643, 2018-08-07 (annotated)

Committer:
WD40andTape
Date:
Tue Aug 07 14:15:37 2018 +0000
Revision:
9:cd3607ba5643
Parent:
8:d6657767a182
Child:
10:1b6daba32452
Moved more code into the sub-classes.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
WD40andTape 8:d6657767a182 1 // LLComms.cpp
WD40andTape 8:d6657767a182 2
WD40andTape 8:d6657767a182 3 #include "LLComms.h"
WD40andTape 8:d6657767a182 4
WD40andTape 8:d6657767a182 5 LLComms::LLComms(int spi_frequency) :
WD40andTape 8:d6657767a182 6 pinGate6(PE_11),
WD40andTape 8:d6657767a182 7 spi(PC_12, PC_11, PC_10),
WD40andTape 8:d6657767a182 8 pinCheck(PE_5),
WD40andTape 8:d6657767a182 9 // These interrupt pins have to be declared AFTER SPI declaration. No Clue Why.
WD40andTape 8:d6657767a182 10 pinGate0(PF_11),
WD40andTape 8:d6657767a182 11 pinGate1(PG_14),
WD40andTape 8:d6657767a182 12 pinGate2(PF_15),
WD40andTape 8:d6657767a182 13 pinGate3(PF_12),
WD40andTape 8:d6657767a182 14 pinGate4(PF_3),
WD40andTape 8:d6657767a182 15 pinGate5(PF_13),
WD40andTape 8:d6657767a182 16 //pinGate6(PE_11), // See above nonsense
WD40andTape 8:d6657767a182 17 pinGate7(PE_13),
WD40andTape 8:d6657767a182 18 pinReset(PD_2)
WD40andTape 8:d6657767a182 19 { // Constructor
WD40andTape 8:d6657767a182 20 _spi_frequency = spi_frequency;
WD40andTape 8:d6657767a182 21
WD40andTape 8:d6657767a182 22 PinName LLPins[8] = {PD_15, PE_10, PD_14, PD_11, PE_7, PD_12, PF_10, PD_13};
WD40andTape 8:d6657767a182 23 PinName ADCPins[8] = {PG_12, PG_9, PE_1, PG_0, PD_0, PD_1, PF_0, PF_1};
WD40andTape 8:d6657767a182 24 for (short int i = 0; i < 8; i++) {
WD40andTape 8:d6657767a182 25 cs_LL[i] = new DigitalOut(LLPins[i]);
WD40andTape 8:d6657767a182 26 cs_ADC[i] = new DigitalOut(ADCPins[i]);
WD40andTape 8:d6657767a182 27 }
WD40andTape 8:d6657767a182 28 }
WD40andTape 8:d6657767a182 29
WD40andTape 9:cd3607ba5643 30 void LLComms::reset(void) {
WD40andTape 9:cd3607ba5643 31 // Initialise relevant variables
WD40andTape 9:cd3607ba5643 32 for(int i = 0; i<_n_channels; i++) {
WD40andTape 9:cd3607ba5643 33 // All chip selects in off state
WD40andTape 9:cd3607ba5643 34 *cs_LL[i] = 1;
WD40andTape 9:cd3607ba5643 35 *cs_ADC[i] = 1;
WD40andTape 9:cd3607ba5643 36 }
WD40andTape 9:cd3607ba5643 37 pinReset = 1; // Initialise reset pin to not reset the controllers.
WD40andTape 9:cd3607ba5643 38 wait(0.25);
WD40andTape 9:cd3607ba5643 39 pinReset=0; // Reset controllers to be safe
WD40andTape 9:cd3607ba5643 40 wait(0.25);
WD40andTape 9:cd3607ba5643 41 pinReset = 1; // Ready to go
WD40andTape 9:cd3607ba5643 42 }
WD40andTape 9:cd3607ba5643 43
WD40andTape 8:d6657767a182 44 double LLComms::ReadADCPosition_mtrs(int channel) {
WD40andTape 8:d6657767a182 45 unsigned int outputA;
WD40andTape 8:d6657767a182 46 unsigned int outputB;
WD40andTape 8:d6657767a182 47 int output;
WD40andTape 8:d6657767a182 48 double dblOutput;
WD40andTape 8:d6657767a182 49
WD40andTape 8:d6657767a182 50 spi.format(8,0);
WD40andTape 8:d6657767a182 51 spi.frequency(1000000);
WD40andTape 8:d6657767a182 52
WD40andTape 8:d6657767a182 53 *cs_ADC[channel] = 0;
WD40andTape 8:d6657767a182 54 spi.write(PREAMBLE);
WD40andTape 8:d6657767a182 55 outputA = spi.write(CHAN_3);
WD40andTape 8:d6657767a182 56 outputB = spi.write(0xFF);
WD40andTape 8:d6657767a182 57 *cs_ADC[channel] = 1;
WD40andTape 8:d6657767a182 58
WD40andTape 8:d6657767a182 59 outputA = outputA & DATA_MASK;
WD40andTape 8:d6657767a182 60 outputA = outputA<<8;
WD40andTape 8:d6657767a182 61 output = (outputA | outputB);
WD40andTape 8:d6657767a182 62 output = 4095- output;
WD40andTape 8:d6657767a182 63 dblOutput = (double) (output);
WD40andTape 8:d6657767a182 64 dblOutput = dblOutput*0.0229 - 21.582;
WD40andTape 8:d6657767a182 65 return dblOutput;
WD40andTape 8:d6657767a182 66 }
WD40andTape 8:d6657767a182 67
WD40andTape 8:d6657767a182 68 double LLComms::ReadADCPressure_bar(int channel) {
WD40andTape 8:d6657767a182 69 unsigned int outputA;
WD40andTape 8:d6657767a182 70 unsigned int outputB;
WD40andTape 8:d6657767a182 71 int output;
WD40andTape 8:d6657767a182 72 double dblOutput;
WD40andTape 8:d6657767a182 73
WD40andTape 8:d6657767a182 74 spi.format(8,0);
WD40andTape 8:d6657767a182 75 spi.frequency(1000000);
WD40andTape 8:d6657767a182 76
WD40andTape 8:d6657767a182 77 *cs_ADC[channel] = 0;
WD40andTape 8:d6657767a182 78 spi.write(PREAMBLE);
WD40andTape 8:d6657767a182 79 outputA = spi.write(CHAN_1);
WD40andTape 8:d6657767a182 80 outputB = spi.write(0xFF);
WD40andTape 8:d6657767a182 81 *cs_ADC[channel] = 1;
WD40andTape 8:d6657767a182 82
WD40andTape 8:d6657767a182 83 outputA = outputA & DATA_MASK;
WD40andTape 8:d6657767a182 84 outputA = outputA<<8;
WD40andTape 8:d6657767a182 85 output = (outputA | outputB);
WD40andTape 8:d6657767a182 86
WD40andTape 8:d6657767a182 87 dblOutput = (double)(output);
WD40andTape 8:d6657767a182 88 dblOutput = dblOutput-502.0;
WD40andTape 8:d6657767a182 89 dblOutput = dblOutput/4095.0*8.0;
WD40andTape 8:d6657767a182 90 return dblOutput;
WD40andTape 9:cd3607ba5643 91 }
WD40andTape 9:cd3607ba5643 92
WD40andTape 9:cd3607ba5643 93 // Common fall handler functions
WD40andTape 9:cd3607ba5643 94 /*void LLComms::dcommon_fall_handler(int channel) {
WD40andTape 9:cd3607ba5643 95 pinCheck = 0;
WD40andTape 9:cd3607ba5643 96 //queue.cancel(ThreadID[channel]); // Cancel relevant queued event
WD40andTape 9:cd3607ba5643 97 }
WD40andTape 9:cd3607ba5643 98 void LLComms::dfall0(void) { dcommon_fall_handler(0); }
WD40andTape 9:cd3607ba5643 99 void LLComms::dSendReceiveData(int channel, int _intDemandPos_Tx[], bool (*_isDataReady)[8]) {
WD40andTape 9:cd3607ba5643 100 printf("%i\n\r",channel);
WD40andTape 9:cd3607ba5643 101 }*/