Patched version of nrf51822 FOTA compatible driver, with GPTIO disabled, as it clashed with the mbed definitions...

Fork of nRF51822 by Nordic Semiconductor

Committer:
finneyj
Date:
Thu May 21 09:35:07 2015 +0000
Revision:
177:dad139e1e3c4
Parent:
103:138bdc859cc9
Disabled GPTIOE as it conflicts with mbed definitions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rgrover1 103:138bdc859cc9 1 /* Copyright (c) 2013, Nordic Semiconductor ASA
rgrover1 103:138bdc859cc9 2 * All rights reserved.
rgrover1 103:138bdc859cc9 3 *
rgrover1 103:138bdc859cc9 4 * Redistribution and use in source and binary forms, with or without
rgrover1 103:138bdc859cc9 5 * modification, are permitted provided that the following conditions are met:
rgrover1 103:138bdc859cc9 6 *
rgrover1 103:138bdc859cc9 7 * * Redistributions of source code must retain the above copyright notice, this
rgrover1 103:138bdc859cc9 8 * list of conditions and the following disclaimer.
rgrover1 103:138bdc859cc9 9 *
rgrover1 103:138bdc859cc9 10 * * Redistributions in binary form must reproduce the above copyright notice,
rgrover1 103:138bdc859cc9 11 * this list of conditions and the following disclaimer in the documentation
rgrover1 103:138bdc859cc9 12 * and/or other materials provided with the distribution.
rgrover1 103:138bdc859cc9 13 *
rgrover1 103:138bdc859cc9 14 * * Neither the name of Nordic Semiconductor ASA nor the names of its
rgrover1 103:138bdc859cc9 15 * contributors may be used to endorse or promote products derived from
rgrover1 103:138bdc859cc9 16 * this software without specific prior written permission.
rgrover1 103:138bdc859cc9 17 *
rgrover1 103:138bdc859cc9 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
rgrover1 103:138bdc859cc9 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
rgrover1 103:138bdc859cc9 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
rgrover1 103:138bdc859cc9 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
rgrover1 103:138bdc859cc9 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
rgrover1 103:138bdc859cc9 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
rgrover1 103:138bdc859cc9 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
rgrover1 103:138bdc859cc9 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
rgrover1 103:138bdc859cc9 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
rgrover1 103:138bdc859cc9 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
rgrover1 103:138bdc859cc9 28 *
rgrover1 103:138bdc859cc9 29 */
rgrover1 103:138bdc859cc9 30 #ifndef NRF51_DEPRECATED_H
rgrover1 103:138bdc859cc9 31 #define NRF51_DEPRECATED_H
rgrover1 103:138bdc859cc9 32
rgrover1 103:138bdc859cc9 33 /*lint ++flb "Enter library region */
rgrover1 103:138bdc859cc9 34
rgrover1 103:138bdc859cc9 35 /* This file is given to prevent your SW from not compiling with the updates made to nrf51.h and
rgrover1 103:138bdc859cc9 36 * nrf51_bitfields.h. The macros defined in this file were available previously. Do not use these
rgrover1 103:138bdc859cc9 37 * macros on purpose. Use the ones defined in nrf51.h and nrf51_bitfields.h instead.
rgrover1 103:138bdc859cc9 38 */
rgrover1 103:138bdc859cc9 39
rgrover1 103:138bdc859cc9 40 /* NVMC */
rgrover1 103:138bdc859cc9 41 /* The register ERASEPROTECTEDPAGE is called ERASEPCR0 in the documentation. */
rgrover1 103:138bdc859cc9 42 #define ERASEPCR0 ERASEPROTECTEDPAGE
rgrover1 103:138bdc859cc9 43 /* The register ERASEPAGE is also called ERASEPCR1 in the documentation. */
rgrover1 103:138bdc859cc9 44 #define ERASEPCR1 ERASEPAGE
rgrover1 103:138bdc859cc9 45
rgrover1 103:138bdc859cc9 46 /* LPCOMP */
rgrover1 103:138bdc859cc9 47 /* The interrupt ISR was renamed. Adding old name to the macros. */
rgrover1 103:138bdc859cc9 48 #define LPCOMP_COMP_IRQHandler LPCOMP_IRQHandler
rgrover1 103:138bdc859cc9 49
rgrover1 103:138bdc859cc9 50
rgrover1 103:138bdc859cc9 51 /* MPU */
rgrover1 103:138bdc859cc9 52 /* The field MPU.PERR0.LPCOMP_COMP was renamed. Added into deprecated in case somebody was using the macros defined for it. */
rgrover1 103:138bdc859cc9 53 #define MPU_PERR0_LPCOMP_COMP_Pos MPU_PERR0_LPCOMP_Pos
rgrover1 103:138bdc859cc9 54 #define MPU_PERR0_LPCOMP_COMP_Msk MPU_PERR0_LPCOMP_Msk
rgrover1 103:138bdc859cc9 55 #define MPU_PERR0_LPCOMP_COMP_InRegion1 MPU_PERR0_LPCOMP_InRegion1
rgrover1 103:138bdc859cc9 56 #define MPU_PERR0_LPCOMP_COMP_InRegion0 MPU_PERR0_LPCOMP_InRegion0
rgrover1 103:138bdc859cc9 57
rgrover1 103:138bdc859cc9 58
rgrover1 103:138bdc859cc9 59 /* POWER */
rgrover1 103:138bdc859cc9 60 /* The field POWER.RAMON.OFFRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
rgrover1 103:138bdc859cc9 61 #define POWER_RAMON_OFFRAM3_Pos (19UL)
rgrover1 103:138bdc859cc9 62 #define POWER_RAMON_OFFRAM3_Msk (0x1UL << POWER_RAMON_OFFRAM3_Pos)
rgrover1 103:138bdc859cc9 63 #define POWER_RAMON_OFFRAM3_RAM3Off (0UL)
rgrover1 103:138bdc859cc9 64 #define POWER_RAMON_OFFRAM3_RAM3On (1UL)
rgrover1 103:138bdc859cc9 65 /* The field POWER.RAMON.OFFRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
rgrover1 103:138bdc859cc9 66 #define POWER_RAMON_OFFRAM2_Pos (18UL)
rgrover1 103:138bdc859cc9 67 #define POWER_RAMON_OFFRAM2_Msk (0x1UL << POWER_RAMON_OFFRAM2_Pos)
rgrover1 103:138bdc859cc9 68 #define POWER_RAMON_OFFRAM2_RAM2Off (0UL)
rgrover1 103:138bdc859cc9 69 #define POWER_RAMON_OFFRAM2_RAM2On (1UL)
rgrover1 103:138bdc859cc9 70 /* The field POWER.RAMON.ONRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
rgrover1 103:138bdc859cc9 71 #define POWER_RAMON_ONRAM3_Pos (3UL)
rgrover1 103:138bdc859cc9 72 #define POWER_RAMON_ONRAM3_Msk (0x1UL << POWER_RAMON_ONRAM3_Pos)
rgrover1 103:138bdc859cc9 73 #define POWER_RAMON_ONRAM3_RAM3Off (0UL)
rgrover1 103:138bdc859cc9 74 #define POWER_RAMON_ONRAM3_RAM3On (1UL)
rgrover1 103:138bdc859cc9 75 /* The field POWER.RAMON.ONRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
rgrover1 103:138bdc859cc9 76 #define POWER_RAMON_ONRAM2_Pos (2UL)
rgrover1 103:138bdc859cc9 77 #define POWER_RAMON_ONRAM2_Msk (0x1UL << POWER_RAMON_ONRAM2_Pos)
rgrover1 103:138bdc859cc9 78 #define POWER_RAMON_ONRAM2_RAM2Off (0UL)
rgrover1 103:138bdc859cc9 79 #define POWER_RAMON_ONRAM2_RAM2On (1UL)
rgrover1 103:138bdc859cc9 80
rgrover1 103:138bdc859cc9 81
rgrover1 103:138bdc859cc9 82 /* RADIO */
rgrover1 103:138bdc859cc9 83 /* The enumerated value RADIO.TXPOWER.TXPOWER.Neg40dBm was renamed. Added into deprecated with the new macro name. */
rgrover1 103:138bdc859cc9 84 #define RADIO_TXPOWER_TXPOWER_Neg40dBm RADIO_TXPOWER_TXPOWER_Neg30dBm
rgrover1 103:138bdc859cc9 85 /* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
rgrover1 103:138bdc859cc9 86 #define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos
rgrover1 103:138bdc859cc9 87 #define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk
rgrover1 103:138bdc859cc9 88 #define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include
rgrover1 103:138bdc859cc9 89 #define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip
rgrover1 103:138bdc859cc9 90 /* The name of the field PLLLOCK was corrected. Old macros added for compatibility. */
rgrover1 103:138bdc859cc9 91 #define RADIO_TEST_PLL_LOCK_Pos RADIO_TEST_PLLLOCK_Pos
rgrover1 103:138bdc859cc9 92 #define RADIO_TEST_PLL_LOCK_Msk RADIO_TEST_PLLLOCK_Msk
rgrover1 103:138bdc859cc9 93 #define RADIO_TEST_PLL_LOCK_Disabled RADIO_TEST_PLLLOCK_Disabled
rgrover1 103:138bdc859cc9 94 #define RADIO_TEST_PLL_LOCK_Enabled RADIO_TEST_PLLLOCK_Enabled
rgrover1 103:138bdc859cc9 95 /* The name of the field CONSTCARRIER was corrected. Old macros added for compatibility. */
rgrover1 103:138bdc859cc9 96 #define RADIO_TEST_CONST_CARRIER_Pos RADIO_TEST_CONSTCARRIER_Pos
rgrover1 103:138bdc859cc9 97 #define RADIO_TEST_CONST_CARRIER_Msk RADIO_TEST_CONSTCARRIER_Msk
rgrover1 103:138bdc859cc9 98 #define RADIO_TEST_CONST_CARRIER_Disabled RADIO_TEST_CONSTCARRIER_Disabled
rgrover1 103:138bdc859cc9 99 #define RADIO_TEST_CONST_CARRIER_Enabled RADIO_TEST_CONSTCARRIER_Enabled
rgrover1 103:138bdc859cc9 100
rgrover1 103:138bdc859cc9 101
rgrover1 103:138bdc859cc9 102 /* FICR */
rgrover1 103:138bdc859cc9 103 /* The registers FICR.SIZERAMBLOCK0, FICR.SIZERAMBLOCK1, FICR.SIZERAMBLOCK2 and FICR.SIZERAMBLOCK3 were renamed into an array. */
rgrover1 103:138bdc859cc9 104 #define SIZERAMBLOCK0 SIZERAMBLOCKS
rgrover1 103:138bdc859cc9 105 #define SIZERAMBLOCK1 SIZERAMBLOCKS
rgrover1 103:138bdc859cc9 106 #define SIZERAMBLOCK2 SIZERAMBLOCK[2] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */
rgrover1 103:138bdc859cc9 107 #define SIZERAMBLOCK3 SIZERAMBLOCK[3] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */
rgrover1 103:138bdc859cc9 108 /* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
rgrover1 103:138bdc859cc9 109 #define DEVICEID0 DEVICEID[0]
rgrover1 103:138bdc859cc9 110 #define DEVICEID1 DEVICEID[1]
rgrover1 103:138bdc859cc9 111 /* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
rgrover1 103:138bdc859cc9 112 #define ER0 ER[0]
rgrover1 103:138bdc859cc9 113 #define ER1 ER[1]
rgrover1 103:138bdc859cc9 114 #define ER2 ER[2]
rgrover1 103:138bdc859cc9 115 #define ER3 ER[3]
rgrover1 103:138bdc859cc9 116 /* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
rgrover1 103:138bdc859cc9 117 #define IR0 IR[0]
rgrover1 103:138bdc859cc9 118 #define IR1 IR[1]
rgrover1 103:138bdc859cc9 119 #define IR2 IR[2]
rgrover1 103:138bdc859cc9 120 #define IR3 IR[3]
rgrover1 103:138bdc859cc9 121 /* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
rgrover1 103:138bdc859cc9 122 #define DEVICEADDR0 DEVICEADDR[0]
rgrover1 103:138bdc859cc9 123 #define DEVICEADDR1 DEVICEADDR[1]
rgrover1 103:138bdc859cc9 124
rgrover1 103:138bdc859cc9 125
rgrover1 103:138bdc859cc9 126 /* PPI */
rgrover1 103:138bdc859cc9 127 /* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
rgrover1 103:138bdc859cc9 128 #define TASKS_CHG0EN TASKS_CHG[0].EN
rgrover1 103:138bdc859cc9 129 #define TASKS_CHG0DIS TASKS_CHG[0].DIS
rgrover1 103:138bdc859cc9 130 #define TASKS_CHG1EN TASKS_CHG[1].EN
rgrover1 103:138bdc859cc9 131 #define TASKS_CHG1DIS TASKS_CHG[1].DIS
rgrover1 103:138bdc859cc9 132 #define TASKS_CHG2EN TASKS_CHG[2].EN
rgrover1 103:138bdc859cc9 133 #define TASKS_CHG2DIS TASKS_CHG[2].DIS
rgrover1 103:138bdc859cc9 134 #define TASKS_CHG3EN TASKS_CHG[3].EN
rgrover1 103:138bdc859cc9 135 #define TASKS_CHG3DIS TASKS_CHG[3].DIS
rgrover1 103:138bdc859cc9 136 /* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
rgrover1 103:138bdc859cc9 137 #define CH0_EEP CH[0].EEP
rgrover1 103:138bdc859cc9 138 #define CH0_TEP CH[0].TEP
rgrover1 103:138bdc859cc9 139 #define CH1_EEP CH[1].EEP
rgrover1 103:138bdc859cc9 140 #define CH1_TEP CH[1].TEP
rgrover1 103:138bdc859cc9 141 #define CH2_EEP CH[2].EEP
rgrover1 103:138bdc859cc9 142 #define CH2_TEP CH[2].TEP
rgrover1 103:138bdc859cc9 143 #define CH3_EEP CH[3].EEP
rgrover1 103:138bdc859cc9 144 #define CH3_TEP CH[3].TEP
rgrover1 103:138bdc859cc9 145 #define CH4_EEP CH[4].EEP
rgrover1 103:138bdc859cc9 146 #define CH4_TEP CH[4].TEP
rgrover1 103:138bdc859cc9 147 #define CH5_EEP CH[5].EEP
rgrover1 103:138bdc859cc9 148 #define CH5_TEP CH[5].TEP
rgrover1 103:138bdc859cc9 149 #define CH6_EEP CH[6].EEP
rgrover1 103:138bdc859cc9 150 #define CH6_TEP CH[6].TEP
rgrover1 103:138bdc859cc9 151 #define CH7_EEP CH[7].EEP
rgrover1 103:138bdc859cc9 152 #define CH7_TEP CH[7].TEP
rgrover1 103:138bdc859cc9 153 #define CH8_EEP CH[8].EEP
rgrover1 103:138bdc859cc9 154 #define CH8_TEP CH[8].TEP
rgrover1 103:138bdc859cc9 155 #define CH9_EEP CH[9].EEP
rgrover1 103:138bdc859cc9 156 #define CH9_TEP CH[9].TEP
rgrover1 103:138bdc859cc9 157 #define CH10_EEP CH[10].EEP
rgrover1 103:138bdc859cc9 158 #define CH10_TEP CH[10].TEP
rgrover1 103:138bdc859cc9 159 #define CH11_EEP CH[11].EEP
rgrover1 103:138bdc859cc9 160 #define CH11_TEP CH[11].TEP
rgrover1 103:138bdc859cc9 161 #define CH12_EEP CH[12].EEP
rgrover1 103:138bdc859cc9 162 #define CH12_TEP CH[12].TEP
rgrover1 103:138bdc859cc9 163 #define CH13_EEP CH[13].EEP
rgrover1 103:138bdc859cc9 164 #define CH13_TEP CH[13].TEP
rgrover1 103:138bdc859cc9 165 #define CH14_EEP CH[14].EEP
rgrover1 103:138bdc859cc9 166 #define CH14_TEP CH[14].TEP
rgrover1 103:138bdc859cc9 167 #define CH15_EEP CH[15].EEP
rgrover1 103:138bdc859cc9 168 #define CH15_TEP CH[15].TEP
rgrover1 103:138bdc859cc9 169 /* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
rgrover1 103:138bdc859cc9 170 #define CHG0 CHG[0]
rgrover1 103:138bdc859cc9 171 #define CHG1 CHG[1]
rgrover1 103:138bdc859cc9 172 #define CHG2 CHG[2]
rgrover1 103:138bdc859cc9 173 #define CHG3 CHG[3]
rgrover1 103:138bdc859cc9 174 /* All bitfield macros for the CHGx registers therefore changed name. */
rgrover1 103:138bdc859cc9 175 #define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos
rgrover1 103:138bdc859cc9 176 #define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk
rgrover1 103:138bdc859cc9 177 #define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded
rgrover1 103:138bdc859cc9 178 #define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included
rgrover1 103:138bdc859cc9 179 #define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos
rgrover1 103:138bdc859cc9 180 #define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk
rgrover1 103:138bdc859cc9 181 #define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded
rgrover1 103:138bdc859cc9 182 #define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included
rgrover1 103:138bdc859cc9 183 #define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos
rgrover1 103:138bdc859cc9 184 #define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk
rgrover1 103:138bdc859cc9 185 #define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded
rgrover1 103:138bdc859cc9 186 #define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included
rgrover1 103:138bdc859cc9 187 #define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos
rgrover1 103:138bdc859cc9 188 #define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk
rgrover1 103:138bdc859cc9 189 #define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded
rgrover1 103:138bdc859cc9 190 #define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included
rgrover1 103:138bdc859cc9 191 #define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos
rgrover1 103:138bdc859cc9 192 #define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk
rgrover1 103:138bdc859cc9 193 #define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded
rgrover1 103:138bdc859cc9 194 #define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included
rgrover1 103:138bdc859cc9 195 #define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos
rgrover1 103:138bdc859cc9 196 #define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk
rgrover1 103:138bdc859cc9 197 #define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded
rgrover1 103:138bdc859cc9 198 #define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included
rgrover1 103:138bdc859cc9 199 #define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos
rgrover1 103:138bdc859cc9 200 #define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk
rgrover1 103:138bdc859cc9 201 #define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded
rgrover1 103:138bdc859cc9 202 #define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included
rgrover1 103:138bdc859cc9 203 #define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos
rgrover1 103:138bdc859cc9 204 #define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk
rgrover1 103:138bdc859cc9 205 #define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded
rgrover1 103:138bdc859cc9 206 #define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included
rgrover1 103:138bdc859cc9 207 #define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos
rgrover1 103:138bdc859cc9 208 #define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk
rgrover1 103:138bdc859cc9 209 #define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded
rgrover1 103:138bdc859cc9 210 #define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included
rgrover1 103:138bdc859cc9 211 #define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos
rgrover1 103:138bdc859cc9 212 #define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk
rgrover1 103:138bdc859cc9 213 #define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded
rgrover1 103:138bdc859cc9 214 #define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included
rgrover1 103:138bdc859cc9 215 #define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos
rgrover1 103:138bdc859cc9 216 #define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk
rgrover1 103:138bdc859cc9 217 #define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded
rgrover1 103:138bdc859cc9 218 #define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included
rgrover1 103:138bdc859cc9 219 #define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos
rgrover1 103:138bdc859cc9 220 #define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk
rgrover1 103:138bdc859cc9 221 #define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded
rgrover1 103:138bdc859cc9 222 #define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included
rgrover1 103:138bdc859cc9 223 #define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos
rgrover1 103:138bdc859cc9 224 #define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk
rgrover1 103:138bdc859cc9 225 #define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded
rgrover1 103:138bdc859cc9 226 #define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included
rgrover1 103:138bdc859cc9 227 #define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos
rgrover1 103:138bdc859cc9 228 #define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk
rgrover1 103:138bdc859cc9 229 #define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded
rgrover1 103:138bdc859cc9 230 #define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included
rgrover1 103:138bdc859cc9 231 #define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos
rgrover1 103:138bdc859cc9 232 #define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk
rgrover1 103:138bdc859cc9 233 #define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded
rgrover1 103:138bdc859cc9 234 #define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included
rgrover1 103:138bdc859cc9 235 #define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos
rgrover1 103:138bdc859cc9 236 #define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk
rgrover1 103:138bdc859cc9 237 #define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded
rgrover1 103:138bdc859cc9 238 #define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included
rgrover1 103:138bdc859cc9 239 #define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos
rgrover1 103:138bdc859cc9 240 #define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk
rgrover1 103:138bdc859cc9 241 #define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded
rgrover1 103:138bdc859cc9 242 #define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included
rgrover1 103:138bdc859cc9 243 #define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos
rgrover1 103:138bdc859cc9 244 #define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk
rgrover1 103:138bdc859cc9 245 #define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded
rgrover1 103:138bdc859cc9 246 #define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included
rgrover1 103:138bdc859cc9 247 #define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos
rgrover1 103:138bdc859cc9 248 #define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk
rgrover1 103:138bdc859cc9 249 #define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded
rgrover1 103:138bdc859cc9 250 #define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included
rgrover1 103:138bdc859cc9 251 #define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos
rgrover1 103:138bdc859cc9 252 #define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk
rgrover1 103:138bdc859cc9 253 #define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded
rgrover1 103:138bdc859cc9 254 #define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included
rgrover1 103:138bdc859cc9 255 #define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos
rgrover1 103:138bdc859cc9 256 #define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk
rgrover1 103:138bdc859cc9 257 #define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded
rgrover1 103:138bdc859cc9 258 #define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included
rgrover1 103:138bdc859cc9 259 #define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos
rgrover1 103:138bdc859cc9 260 #define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk
rgrover1 103:138bdc859cc9 261 #define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded
rgrover1 103:138bdc859cc9 262 #define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included
rgrover1 103:138bdc859cc9 263 #define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos
rgrover1 103:138bdc859cc9 264 #define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk
rgrover1 103:138bdc859cc9 265 #define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded
rgrover1 103:138bdc859cc9 266 #define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included
rgrover1 103:138bdc859cc9 267 #define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos
rgrover1 103:138bdc859cc9 268 #define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk
rgrover1 103:138bdc859cc9 269 #define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded
rgrover1 103:138bdc859cc9 270 #define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included
rgrover1 103:138bdc859cc9 271 #define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos
rgrover1 103:138bdc859cc9 272 #define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk
rgrover1 103:138bdc859cc9 273 #define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded
rgrover1 103:138bdc859cc9 274 #define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included
rgrover1 103:138bdc859cc9 275 #define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos
rgrover1 103:138bdc859cc9 276 #define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk
rgrover1 103:138bdc859cc9 277 #define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded
rgrover1 103:138bdc859cc9 278 #define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included
rgrover1 103:138bdc859cc9 279 #define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos
rgrover1 103:138bdc859cc9 280 #define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk
rgrover1 103:138bdc859cc9 281 #define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded
rgrover1 103:138bdc859cc9 282 #define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included
rgrover1 103:138bdc859cc9 283 #define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos
rgrover1 103:138bdc859cc9 284 #define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk
rgrover1 103:138bdc859cc9 285 #define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded
rgrover1 103:138bdc859cc9 286 #define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included
rgrover1 103:138bdc859cc9 287 #define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos
rgrover1 103:138bdc859cc9 288 #define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk
rgrover1 103:138bdc859cc9 289 #define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded
rgrover1 103:138bdc859cc9 290 #define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included
rgrover1 103:138bdc859cc9 291 #define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos
rgrover1 103:138bdc859cc9 292 #define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk
rgrover1 103:138bdc859cc9 293 #define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded
rgrover1 103:138bdc859cc9 294 #define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included
rgrover1 103:138bdc859cc9 295 #define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos
rgrover1 103:138bdc859cc9 296 #define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk
rgrover1 103:138bdc859cc9 297 #define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded
rgrover1 103:138bdc859cc9 298 #define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included
rgrover1 103:138bdc859cc9 299 #define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos
rgrover1 103:138bdc859cc9 300 #define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk
rgrover1 103:138bdc859cc9 301 #define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded
rgrover1 103:138bdc859cc9 302 #define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included
rgrover1 103:138bdc859cc9 303 #define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos
rgrover1 103:138bdc859cc9 304 #define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk
rgrover1 103:138bdc859cc9 305 #define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded
rgrover1 103:138bdc859cc9 306 #define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included
rgrover1 103:138bdc859cc9 307 #define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos
rgrover1 103:138bdc859cc9 308 #define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk
rgrover1 103:138bdc859cc9 309 #define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded
rgrover1 103:138bdc859cc9 310 #define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included
rgrover1 103:138bdc859cc9 311 #define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos
rgrover1 103:138bdc859cc9 312 #define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk
rgrover1 103:138bdc859cc9 313 #define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded
rgrover1 103:138bdc859cc9 314 #define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included
rgrover1 103:138bdc859cc9 315 #define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos
rgrover1 103:138bdc859cc9 316 #define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk
rgrover1 103:138bdc859cc9 317 #define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded
rgrover1 103:138bdc859cc9 318 #define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included
rgrover1 103:138bdc859cc9 319 #define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos
rgrover1 103:138bdc859cc9 320 #define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk
rgrover1 103:138bdc859cc9 321 #define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded
rgrover1 103:138bdc859cc9 322 #define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included
rgrover1 103:138bdc859cc9 323 #define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos
rgrover1 103:138bdc859cc9 324 #define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk
rgrover1 103:138bdc859cc9 325 #define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded
rgrover1 103:138bdc859cc9 326 #define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included
rgrover1 103:138bdc859cc9 327 #define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos
rgrover1 103:138bdc859cc9 328 #define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk
rgrover1 103:138bdc859cc9 329 #define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded
rgrover1 103:138bdc859cc9 330 #define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included
rgrover1 103:138bdc859cc9 331 #define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos
rgrover1 103:138bdc859cc9 332 #define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk
rgrover1 103:138bdc859cc9 333 #define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded
rgrover1 103:138bdc859cc9 334 #define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included
rgrover1 103:138bdc859cc9 335 #define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos
rgrover1 103:138bdc859cc9 336 #define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk
rgrover1 103:138bdc859cc9 337 #define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded
rgrover1 103:138bdc859cc9 338 #define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included
rgrover1 103:138bdc859cc9 339 #define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos
rgrover1 103:138bdc859cc9 340 #define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk
rgrover1 103:138bdc859cc9 341 #define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded
rgrover1 103:138bdc859cc9 342 #define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included
rgrover1 103:138bdc859cc9 343 #define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos
rgrover1 103:138bdc859cc9 344 #define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk
rgrover1 103:138bdc859cc9 345 #define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded
rgrover1 103:138bdc859cc9 346 #define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included
rgrover1 103:138bdc859cc9 347 #define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos
rgrover1 103:138bdc859cc9 348 #define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk
rgrover1 103:138bdc859cc9 349 #define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded
rgrover1 103:138bdc859cc9 350 #define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included
rgrover1 103:138bdc859cc9 351 #define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos
rgrover1 103:138bdc859cc9 352 #define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk
rgrover1 103:138bdc859cc9 353 #define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded
rgrover1 103:138bdc859cc9 354 #define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included
rgrover1 103:138bdc859cc9 355 #define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos
rgrover1 103:138bdc859cc9 356 #define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk
rgrover1 103:138bdc859cc9 357 #define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded
rgrover1 103:138bdc859cc9 358 #define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included
rgrover1 103:138bdc859cc9 359 #define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos
rgrover1 103:138bdc859cc9 360 #define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk
rgrover1 103:138bdc859cc9 361 #define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded
rgrover1 103:138bdc859cc9 362 #define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included
rgrover1 103:138bdc859cc9 363 #define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos
rgrover1 103:138bdc859cc9 364 #define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk
rgrover1 103:138bdc859cc9 365 #define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded
rgrover1 103:138bdc859cc9 366 #define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included
rgrover1 103:138bdc859cc9 367 #define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos
rgrover1 103:138bdc859cc9 368 #define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk
rgrover1 103:138bdc859cc9 369 #define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded
rgrover1 103:138bdc859cc9 370 #define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included
rgrover1 103:138bdc859cc9 371 #define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos
rgrover1 103:138bdc859cc9 372 #define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk
rgrover1 103:138bdc859cc9 373 #define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded
rgrover1 103:138bdc859cc9 374 #define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included
rgrover1 103:138bdc859cc9 375 #define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos
rgrover1 103:138bdc859cc9 376 #define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk
rgrover1 103:138bdc859cc9 377 #define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded
rgrover1 103:138bdc859cc9 378 #define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included
rgrover1 103:138bdc859cc9 379 #define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos
rgrover1 103:138bdc859cc9 380 #define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk
rgrover1 103:138bdc859cc9 381 #define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded
rgrover1 103:138bdc859cc9 382 #define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included
rgrover1 103:138bdc859cc9 383 #define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos
rgrover1 103:138bdc859cc9 384 #define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk
rgrover1 103:138bdc859cc9 385 #define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded
rgrover1 103:138bdc859cc9 386 #define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included
rgrover1 103:138bdc859cc9 387 #define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos
rgrover1 103:138bdc859cc9 388 #define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk
rgrover1 103:138bdc859cc9 389 #define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded
rgrover1 103:138bdc859cc9 390 #define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included
rgrover1 103:138bdc859cc9 391 #define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos
rgrover1 103:138bdc859cc9 392 #define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk
rgrover1 103:138bdc859cc9 393 #define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded
rgrover1 103:138bdc859cc9 394 #define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included
rgrover1 103:138bdc859cc9 395 #define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos
rgrover1 103:138bdc859cc9 396 #define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk
rgrover1 103:138bdc859cc9 397 #define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded
rgrover1 103:138bdc859cc9 398 #define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included
rgrover1 103:138bdc859cc9 399 #define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos
rgrover1 103:138bdc859cc9 400 #define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk
rgrover1 103:138bdc859cc9 401 #define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded
rgrover1 103:138bdc859cc9 402 #define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included
rgrover1 103:138bdc859cc9 403 #define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos
rgrover1 103:138bdc859cc9 404 #define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk
rgrover1 103:138bdc859cc9 405 #define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded
rgrover1 103:138bdc859cc9 406 #define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included
rgrover1 103:138bdc859cc9 407 #define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos
rgrover1 103:138bdc859cc9 408 #define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk
rgrover1 103:138bdc859cc9 409 #define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded
rgrover1 103:138bdc859cc9 410 #define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included
rgrover1 103:138bdc859cc9 411 #define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos
rgrover1 103:138bdc859cc9 412 #define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk
rgrover1 103:138bdc859cc9 413 #define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded
rgrover1 103:138bdc859cc9 414 #define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included
rgrover1 103:138bdc859cc9 415 #define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos
rgrover1 103:138bdc859cc9 416 #define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk
rgrover1 103:138bdc859cc9 417 #define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded
rgrover1 103:138bdc859cc9 418 #define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included
rgrover1 103:138bdc859cc9 419 #define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos
rgrover1 103:138bdc859cc9 420 #define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk
rgrover1 103:138bdc859cc9 421 #define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded
rgrover1 103:138bdc859cc9 422 #define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included
rgrover1 103:138bdc859cc9 423 #define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos
rgrover1 103:138bdc859cc9 424 #define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk
rgrover1 103:138bdc859cc9 425 #define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded
rgrover1 103:138bdc859cc9 426 #define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included
rgrover1 103:138bdc859cc9 427 #define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos
rgrover1 103:138bdc859cc9 428 #define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk
rgrover1 103:138bdc859cc9 429 #define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded
rgrover1 103:138bdc859cc9 430 #define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included
rgrover1 103:138bdc859cc9 431
rgrover1 103:138bdc859cc9 432
rgrover1 103:138bdc859cc9 433
rgrover1 103:138bdc859cc9 434 /*lint --flb "Leave library region" */
rgrover1 103:138bdc859cc9 435
rgrover1 103:138bdc859cc9 436 #endif /* NRF51_DEPRECATED_H */
rgrover1 103:138bdc859cc9 437