Metropolia Embedded Project Beibes / Mbed 2 deprecated Simple_Touch_Sens

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Dependencies:   mbed

Fork of Simple_Touch_Sens by Veikko Kero

USBDevice/USBHAL_LPC17.cpp@1:7ed7d128d225, 2014-01-30 (annotated)

Committer:
Vekotin
Date:
Thu Jan 30 06:13:55 2014 +0000
Revision:
1:7ed7d128d225
egw

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Vekotin 1:7ed7d128d225 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
Vekotin 1:7ed7d128d225 2 *
Vekotin 1:7ed7d128d225 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
Vekotin 1:7ed7d128d225 4 * and associated documentation files (the "Software"), to deal in the Software without
Vekotin 1:7ed7d128d225 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
Vekotin 1:7ed7d128d225 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
Vekotin 1:7ed7d128d225 7 * Software is furnished to do so, subject to the following conditions:
Vekotin 1:7ed7d128d225 8 *
Vekotin 1:7ed7d128d225 9 * The above copyright notice and this permission notice shall be included in all copies or
Vekotin 1:7ed7d128d225 10 * substantial portions of the Software.
Vekotin 1:7ed7d128d225 11 *
Vekotin 1:7ed7d128d225 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
Vekotin 1:7ed7d128d225 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
Vekotin 1:7ed7d128d225 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
Vekotin 1:7ed7d128d225 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Vekotin 1:7ed7d128d225 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Vekotin 1:7ed7d128d225 17 */
Vekotin 1:7ed7d128d225 18
Vekotin 1:7ed7d128d225 19 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
Vekotin 1:7ed7d128d225 20
Vekotin 1:7ed7d128d225 21 #include "USBHAL.h"
Vekotin 1:7ed7d128d225 22
Vekotin 1:7ed7d128d225 23
Vekotin 1:7ed7d128d225 24 // Get endpoint direction
Vekotin 1:7ed7d128d225 25 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
Vekotin 1:7ed7d128d225 26 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
Vekotin 1:7ed7d128d225 27
Vekotin 1:7ed7d128d225 28 // Convert physical endpoint number to register bit
Vekotin 1:7ed7d128d225 29 #define EP(endpoint) (1UL<<endpoint)
Vekotin 1:7ed7d128d225 30
Vekotin 1:7ed7d128d225 31 // Power Control for Peripherals register
Vekotin 1:7ed7d128d225 32 #define PCUSB (1UL<<31)
Vekotin 1:7ed7d128d225 33
Vekotin 1:7ed7d128d225 34 // USB Clock Control register
Vekotin 1:7ed7d128d225 35 #define DEV_CLK_EN (1UL<<1)
Vekotin 1:7ed7d128d225 36 #define AHB_CLK_EN (1UL<<4)
Vekotin 1:7ed7d128d225 37
Vekotin 1:7ed7d128d225 38 // USB Clock Status register
Vekotin 1:7ed7d128d225 39 #define DEV_CLK_ON (1UL<<1)
Vekotin 1:7ed7d128d225 40 #define AHB_CLK_ON (1UL<<4)
Vekotin 1:7ed7d128d225 41
Vekotin 1:7ed7d128d225 42 // USB Device Interupt registers
Vekotin 1:7ed7d128d225 43 #define FRAME (1UL<<0)
Vekotin 1:7ed7d128d225 44 #define EP_FAST (1UL<<1)
Vekotin 1:7ed7d128d225 45 #define EP_SLOW (1UL<<2)
Vekotin 1:7ed7d128d225 46 #define DEV_STAT (1UL<<3)
Vekotin 1:7ed7d128d225 47 #define CCEMPTY (1UL<<4)
Vekotin 1:7ed7d128d225 48 #define CDFULL (1UL<<5)
Vekotin 1:7ed7d128d225 49 #define RxENDPKT (1UL<<6)
Vekotin 1:7ed7d128d225 50 #define TxENDPKT (1UL<<7)
Vekotin 1:7ed7d128d225 51 #define EP_RLZED (1UL<<8)
Vekotin 1:7ed7d128d225 52 #define ERR_INT (1UL<<9)
Vekotin 1:7ed7d128d225 53
Vekotin 1:7ed7d128d225 54 // USB Control register
Vekotin 1:7ed7d128d225 55 #define RD_EN (1<<0)
Vekotin 1:7ed7d128d225 56 #define WR_EN (1<<1)
Vekotin 1:7ed7d128d225 57 #define LOG_ENDPOINT(endpoint) ((endpoint>>1)<<2)
Vekotin 1:7ed7d128d225 58
Vekotin 1:7ed7d128d225 59 // USB Receive Packet Length register
Vekotin 1:7ed7d128d225 60 #define DV (1UL<<10)
Vekotin 1:7ed7d128d225 61 #define PKT_RDY (1UL<<11)
Vekotin 1:7ed7d128d225 62 #define PKT_LNGTH_MASK (0x3ff)
Vekotin 1:7ed7d128d225 63
Vekotin 1:7ed7d128d225 64 // Serial Interface Engine (SIE)
Vekotin 1:7ed7d128d225 65 #define SIE_WRITE (0x01)
Vekotin 1:7ed7d128d225 66 #define SIE_READ (0x02)
Vekotin 1:7ed7d128d225 67 #define SIE_COMMAND (0x05)
Vekotin 1:7ed7d128d225 68 #define SIE_CMD_CODE(phase, data) ((phase<<8)|(data<<16))
Vekotin 1:7ed7d128d225 69
Vekotin 1:7ed7d128d225 70 // SIE Command codes
Vekotin 1:7ed7d128d225 71 #define SIE_CMD_SET_ADDRESS (0xD0)
Vekotin 1:7ed7d128d225 72 #define SIE_CMD_CONFIGURE_DEVICE (0xD8)
Vekotin 1:7ed7d128d225 73 #define SIE_CMD_SET_MODE (0xF3)
Vekotin 1:7ed7d128d225 74 #define SIE_CMD_READ_FRAME_NUMBER (0xF5)
Vekotin 1:7ed7d128d225 75 #define SIE_CMD_READ_TEST_REGISTER (0xFD)
Vekotin 1:7ed7d128d225 76 #define SIE_CMD_SET_DEVICE_STATUS (0xFE)
Vekotin 1:7ed7d128d225 77 #define SIE_CMD_GET_DEVICE_STATUS (0xFE)
Vekotin 1:7ed7d128d225 78 #define SIE_CMD_GET_ERROR_CODE (0xFF)
Vekotin 1:7ed7d128d225 79 #define SIE_CMD_READ_ERROR_STATUS (0xFB)
Vekotin 1:7ed7d128d225 80
Vekotin 1:7ed7d128d225 81 #define SIE_CMD_SELECT_ENDPOINT(endpoint) (0x00+endpoint)
Vekotin 1:7ed7d128d225 82 #define SIE_CMD_SELECT_ENDPOINT_CLEAR_INTERRUPT(endpoint) (0x40+endpoint)
Vekotin 1:7ed7d128d225 83 #define SIE_CMD_SET_ENDPOINT_STATUS(endpoint) (0x40+endpoint)
Vekotin 1:7ed7d128d225 84
Vekotin 1:7ed7d128d225 85 #define SIE_CMD_CLEAR_BUFFER (0xF2)
Vekotin 1:7ed7d128d225 86 #define SIE_CMD_VALIDATE_BUFFER (0xFA)
Vekotin 1:7ed7d128d225 87
Vekotin 1:7ed7d128d225 88 // SIE Device Status register
Vekotin 1:7ed7d128d225 89 #define SIE_DS_CON (1<<0)
Vekotin 1:7ed7d128d225 90 #define SIE_DS_CON_CH (1<<1)
Vekotin 1:7ed7d128d225 91 #define SIE_DS_SUS (1<<2)
Vekotin 1:7ed7d128d225 92 #define SIE_DS_SUS_CH (1<<3)
Vekotin 1:7ed7d128d225 93 #define SIE_DS_RST (1<<4)
Vekotin 1:7ed7d128d225 94
Vekotin 1:7ed7d128d225 95 // SIE Device Set Address register
Vekotin 1:7ed7d128d225 96 #define SIE_DSA_DEV_EN (1<<7)
Vekotin 1:7ed7d128d225 97
Vekotin 1:7ed7d128d225 98 // SIE Configue Device register
Vekotin 1:7ed7d128d225 99 #define SIE_CONF_DEVICE (1<<0)
Vekotin 1:7ed7d128d225 100
Vekotin 1:7ed7d128d225 101 // Select Endpoint register
Vekotin 1:7ed7d128d225 102 #define SIE_SE_FE (1<<0)
Vekotin 1:7ed7d128d225 103 #define SIE_SE_ST (1<<1)
Vekotin 1:7ed7d128d225 104 #define SIE_SE_STP (1<<2)
Vekotin 1:7ed7d128d225 105 #define SIE_SE_PO (1<<3)
Vekotin 1:7ed7d128d225 106 #define SIE_SE_EPN (1<<4)
Vekotin 1:7ed7d128d225 107 #define SIE_SE_B_1_FULL (1<<5)
Vekotin 1:7ed7d128d225 108 #define SIE_SE_B_2_FULL (1<<6)
Vekotin 1:7ed7d128d225 109
Vekotin 1:7ed7d128d225 110 // Set Endpoint Status command
Vekotin 1:7ed7d128d225 111 #define SIE_SES_ST (1<<0)
Vekotin 1:7ed7d128d225 112 #define SIE_SES_DA (1<<5)
Vekotin 1:7ed7d128d225 113 #define SIE_SES_RF_MO (1<<6)
Vekotin 1:7ed7d128d225 114 #define SIE_SES_CND_ST (1<<7)
Vekotin 1:7ed7d128d225 115
Vekotin 1:7ed7d128d225 116
Vekotin 1:7ed7d128d225 117 USBHAL * USBHAL::instance;
Vekotin 1:7ed7d128d225 118
Vekotin 1:7ed7d128d225 119 static volatile int epComplete;
Vekotin 1:7ed7d128d225 120 static uint32_t endpointStallState;
Vekotin 1:7ed7d128d225 121
Vekotin 1:7ed7d128d225 122 static void SIECommand(uint32_t command) {
Vekotin 1:7ed7d128d225 123 // The command phase of a SIE transaction
Vekotin 1:7ed7d128d225 124 LPC_USB->USBDevIntClr = CCEMPTY;
Vekotin 1:7ed7d128d225 125 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_COMMAND, command);
Vekotin 1:7ed7d128d225 126 while (!(LPC_USB->USBDevIntSt & CCEMPTY));
Vekotin 1:7ed7d128d225 127 }
Vekotin 1:7ed7d128d225 128
Vekotin 1:7ed7d128d225 129 static void SIEWriteData(uint8_t data) {
Vekotin 1:7ed7d128d225 130 // The data write phase of a SIE transaction
Vekotin 1:7ed7d128d225 131 LPC_USB->USBDevIntClr = CCEMPTY;
Vekotin 1:7ed7d128d225 132 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_WRITE, data);
Vekotin 1:7ed7d128d225 133 while (!(LPC_USB->USBDevIntSt & CCEMPTY));
Vekotin 1:7ed7d128d225 134 }
Vekotin 1:7ed7d128d225 135
Vekotin 1:7ed7d128d225 136 static uint8_t SIEReadData(uint32_t command) {
Vekotin 1:7ed7d128d225 137 // The data read phase of a SIE transaction
Vekotin 1:7ed7d128d225 138 LPC_USB->USBDevIntClr = CDFULL;
Vekotin 1:7ed7d128d225 139 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_READ, command);
Vekotin 1:7ed7d128d225 140 while (!(LPC_USB->USBDevIntSt & CDFULL));
Vekotin 1:7ed7d128d225 141 return (uint8_t)LPC_USB->USBCmdData;
Vekotin 1:7ed7d128d225 142 }
Vekotin 1:7ed7d128d225 143
Vekotin 1:7ed7d128d225 144 static void SIEsetDeviceStatus(uint8_t status) {
Vekotin 1:7ed7d128d225 145 // Write SIE device status register
Vekotin 1:7ed7d128d225 146 SIECommand(SIE_CMD_SET_DEVICE_STATUS);
Vekotin 1:7ed7d128d225 147 SIEWriteData(status);
Vekotin 1:7ed7d128d225 148 }
Vekotin 1:7ed7d128d225 149
Vekotin 1:7ed7d128d225 150 static uint8_t SIEgetDeviceStatus(void) {
Vekotin 1:7ed7d128d225 151 // Read SIE device status register
Vekotin 1:7ed7d128d225 152 SIECommand(SIE_CMD_GET_DEVICE_STATUS);
Vekotin 1:7ed7d128d225 153 return SIEReadData(SIE_CMD_GET_DEVICE_STATUS);
Vekotin 1:7ed7d128d225 154 }
Vekotin 1:7ed7d128d225 155
Vekotin 1:7ed7d128d225 156 void SIEsetAddress(uint8_t address) {
Vekotin 1:7ed7d128d225 157 // Write SIE device address register
Vekotin 1:7ed7d128d225 158 SIECommand(SIE_CMD_SET_ADDRESS);
Vekotin 1:7ed7d128d225 159 SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN);
Vekotin 1:7ed7d128d225 160 }
Vekotin 1:7ed7d128d225 161
Vekotin 1:7ed7d128d225 162 static uint8_t SIEselectEndpoint(uint8_t endpoint) {
Vekotin 1:7ed7d128d225 163 // SIE select endpoint command
Vekotin 1:7ed7d128d225 164 SIECommand(SIE_CMD_SELECT_ENDPOINT(endpoint));
Vekotin 1:7ed7d128d225 165 return SIEReadData(SIE_CMD_SELECT_ENDPOINT(endpoint));
Vekotin 1:7ed7d128d225 166 }
Vekotin 1:7ed7d128d225 167
Vekotin 1:7ed7d128d225 168 static uint8_t SIEclearBuffer(void) {
Vekotin 1:7ed7d128d225 169 // SIE clear buffer command
Vekotin 1:7ed7d128d225 170 SIECommand(SIE_CMD_CLEAR_BUFFER);
Vekotin 1:7ed7d128d225 171 return SIEReadData(SIE_CMD_CLEAR_BUFFER);
Vekotin 1:7ed7d128d225 172 }
Vekotin 1:7ed7d128d225 173
Vekotin 1:7ed7d128d225 174 static void SIEvalidateBuffer(void) {
Vekotin 1:7ed7d128d225 175 // SIE validate buffer command
Vekotin 1:7ed7d128d225 176 SIECommand(SIE_CMD_VALIDATE_BUFFER);
Vekotin 1:7ed7d128d225 177 }
Vekotin 1:7ed7d128d225 178
Vekotin 1:7ed7d128d225 179 static void SIEsetEndpointStatus(uint8_t endpoint, uint8_t status) {
Vekotin 1:7ed7d128d225 180 // SIE set endpoint status command
Vekotin 1:7ed7d128d225 181 SIECommand(SIE_CMD_SET_ENDPOINT_STATUS(endpoint));
Vekotin 1:7ed7d128d225 182 SIEWriteData(status);
Vekotin 1:7ed7d128d225 183 }
Vekotin 1:7ed7d128d225 184
Vekotin 1:7ed7d128d225 185 static uint16_t SIEgetFrameNumber(void) __attribute__ ((unused));
Vekotin 1:7ed7d128d225 186 static uint16_t SIEgetFrameNumber(void) {
Vekotin 1:7ed7d128d225 187 // Read current frame number
Vekotin 1:7ed7d128d225 188 uint16_t lowByte;
Vekotin 1:7ed7d128d225 189 uint16_t highByte;
Vekotin 1:7ed7d128d225 190
Vekotin 1:7ed7d128d225 191 SIECommand(SIE_CMD_READ_FRAME_NUMBER);
Vekotin 1:7ed7d128d225 192 lowByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
Vekotin 1:7ed7d128d225 193 highByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
Vekotin 1:7ed7d128d225 194
Vekotin 1:7ed7d128d225 195 return (highByte << 8) | lowByte;
Vekotin 1:7ed7d128d225 196 }
Vekotin 1:7ed7d128d225 197
Vekotin 1:7ed7d128d225 198 static void SIEconfigureDevice(void) {
Vekotin 1:7ed7d128d225 199 // SIE Configure device command
Vekotin 1:7ed7d128d225 200 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
Vekotin 1:7ed7d128d225 201 SIEWriteData(SIE_CONF_DEVICE);
Vekotin 1:7ed7d128d225 202 }
Vekotin 1:7ed7d128d225 203
Vekotin 1:7ed7d128d225 204 static void SIEunconfigureDevice(void) {
Vekotin 1:7ed7d128d225 205 // SIE Configure device command
Vekotin 1:7ed7d128d225 206 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
Vekotin 1:7ed7d128d225 207 SIEWriteData(0);
Vekotin 1:7ed7d128d225 208 }
Vekotin 1:7ed7d128d225 209
Vekotin 1:7ed7d128d225 210 static void SIEconnect(void) {
Vekotin 1:7ed7d128d225 211 // Connect USB device
Vekotin 1:7ed7d128d225 212 uint8_t status = SIEgetDeviceStatus();
Vekotin 1:7ed7d128d225 213 SIEsetDeviceStatus(status | SIE_DS_CON);
Vekotin 1:7ed7d128d225 214 }
Vekotin 1:7ed7d128d225 215
Vekotin 1:7ed7d128d225 216
Vekotin 1:7ed7d128d225 217 static void SIEdisconnect(void) {
Vekotin 1:7ed7d128d225 218 // Disconnect USB device
Vekotin 1:7ed7d128d225 219 uint8_t status = SIEgetDeviceStatus();
Vekotin 1:7ed7d128d225 220 SIEsetDeviceStatus(status & ~SIE_DS_CON);
Vekotin 1:7ed7d128d225 221 }
Vekotin 1:7ed7d128d225 222
Vekotin 1:7ed7d128d225 223
Vekotin 1:7ed7d128d225 224 static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) {
Vekotin 1:7ed7d128d225 225 // Implemented using using EP_INT_CLR.
Vekotin 1:7ed7d128d225 226 LPC_USB->USBEpIntClr = EP(endpoint);
Vekotin 1:7ed7d128d225 227 while (!(LPC_USB->USBDevIntSt & CDFULL));
Vekotin 1:7ed7d128d225 228 return (uint8_t)LPC_USB->USBCmdData;
Vekotin 1:7ed7d128d225 229 }
Vekotin 1:7ed7d128d225 230
Vekotin 1:7ed7d128d225 231
Vekotin 1:7ed7d128d225 232 static void enableEndpointEvent(uint8_t endpoint) {
Vekotin 1:7ed7d128d225 233 // Enable an endpoint interrupt
Vekotin 1:7ed7d128d225 234 LPC_USB->USBEpIntEn |= EP(endpoint);
Vekotin 1:7ed7d128d225 235 }
Vekotin 1:7ed7d128d225 236
Vekotin 1:7ed7d128d225 237 static void disableEndpointEvent(uint8_t endpoint) __attribute__ ((unused));
Vekotin 1:7ed7d128d225 238 static void disableEndpointEvent(uint8_t endpoint) {
Vekotin 1:7ed7d128d225 239 // Disable an endpoint interrupt
Vekotin 1:7ed7d128d225 240 LPC_USB->USBEpIntEn &= ~EP(endpoint);
Vekotin 1:7ed7d128d225 241 }
Vekotin 1:7ed7d128d225 242
Vekotin 1:7ed7d128d225 243 static volatile uint32_t __attribute__((used)) dummyRead;
Vekotin 1:7ed7d128d225 244 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
Vekotin 1:7ed7d128d225 245 // Read from an OUT endpoint
Vekotin 1:7ed7d128d225 246 uint32_t size;
Vekotin 1:7ed7d128d225 247 uint32_t i;
Vekotin 1:7ed7d128d225 248 uint32_t data = 0;
Vekotin 1:7ed7d128d225 249 uint8_t offset;
Vekotin 1:7ed7d128d225 250
Vekotin 1:7ed7d128d225 251 LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | RD_EN;
Vekotin 1:7ed7d128d225 252 while (!(LPC_USB->USBRxPLen & PKT_RDY));
Vekotin 1:7ed7d128d225 253
Vekotin 1:7ed7d128d225 254 size = LPC_USB->USBRxPLen & PKT_LNGTH_MASK;
Vekotin 1:7ed7d128d225 255
Vekotin 1:7ed7d128d225 256 offset = 0;
Vekotin 1:7ed7d128d225 257
Vekotin 1:7ed7d128d225 258 if (size > 0) {
Vekotin 1:7ed7d128d225 259 for (i=0; i<size; i++) {
Vekotin 1:7ed7d128d225 260 if (offset==0) {
Vekotin 1:7ed7d128d225 261 // Fetch up to four bytes of data as a word
Vekotin 1:7ed7d128d225 262 data = LPC_USB->USBRxData;
Vekotin 1:7ed7d128d225 263 }
Vekotin 1:7ed7d128d225 264
Vekotin 1:7ed7d128d225 265 // extract a byte
Vekotin 1:7ed7d128d225 266 *buffer = (data>>offset) & 0xff;
Vekotin 1:7ed7d128d225 267 buffer++;
Vekotin 1:7ed7d128d225 268
Vekotin 1:7ed7d128d225 269 // move on to the next byte
Vekotin 1:7ed7d128d225 270 offset = (offset + 8) % 32;
Vekotin 1:7ed7d128d225 271 }
Vekotin 1:7ed7d128d225 272 } else {
Vekotin 1:7ed7d128d225 273 dummyRead = LPC_USB->USBRxData;
Vekotin 1:7ed7d128d225 274 }
Vekotin 1:7ed7d128d225 275
Vekotin 1:7ed7d128d225 276 LPC_USB->USBCtrl = 0;
Vekotin 1:7ed7d128d225 277
Vekotin 1:7ed7d128d225 278 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
Vekotin 1:7ed7d128d225 279 SIEselectEndpoint(endpoint);
Vekotin 1:7ed7d128d225 280 SIEclearBuffer();
Vekotin 1:7ed7d128d225 281 }
Vekotin 1:7ed7d128d225 282
Vekotin 1:7ed7d128d225 283 return size;
Vekotin 1:7ed7d128d225 284 }
Vekotin 1:7ed7d128d225 285
Vekotin 1:7ed7d128d225 286 static void endpointWritecore(uint8_t endpoint, uint8_t *buffer, uint32_t size) {
Vekotin 1:7ed7d128d225 287 // Write to an IN endpoint
Vekotin 1:7ed7d128d225 288 uint32_t temp, data;
Vekotin 1:7ed7d128d225 289 uint8_t offset;
Vekotin 1:7ed7d128d225 290
Vekotin 1:7ed7d128d225 291 LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | WR_EN;
Vekotin 1:7ed7d128d225 292
Vekotin 1:7ed7d128d225 293 LPC_USB->USBTxPLen = size;
Vekotin 1:7ed7d128d225 294 offset = 0;
Vekotin 1:7ed7d128d225 295 data = 0;
Vekotin 1:7ed7d128d225 296
Vekotin 1:7ed7d128d225 297 if (size>0) {
Vekotin 1:7ed7d128d225 298 do {
Vekotin 1:7ed7d128d225 299 // Fetch next data byte into a word-sized temporary variable
Vekotin 1:7ed7d128d225 300 temp = *buffer++;
Vekotin 1:7ed7d128d225 301
Vekotin 1:7ed7d128d225 302 // Add to current data word
Vekotin 1:7ed7d128d225 303 temp = temp << offset;
Vekotin 1:7ed7d128d225 304 data = data | temp;
Vekotin 1:7ed7d128d225 305
Vekotin 1:7ed7d128d225 306 // move on to the next byte
Vekotin 1:7ed7d128d225 307 offset = (offset + 8) % 32;
Vekotin 1:7ed7d128d225 308 size--;
Vekotin 1:7ed7d128d225 309
Vekotin 1:7ed7d128d225 310 if ((offset==0) || (size==0)) {
Vekotin 1:7ed7d128d225 311 // Write the word to the endpoint
Vekotin 1:7ed7d128d225 312 LPC_USB->USBTxData = data;
Vekotin 1:7ed7d128d225 313 data = 0;
Vekotin 1:7ed7d128d225 314 }
Vekotin 1:7ed7d128d225 315 } while (size>0);
Vekotin 1:7ed7d128d225 316 } else {
Vekotin 1:7ed7d128d225 317 LPC_USB->USBTxData = 0;
Vekotin 1:7ed7d128d225 318 }
Vekotin 1:7ed7d128d225 319
Vekotin 1:7ed7d128d225 320 // Clear WR_EN to cover zero length packet case
Vekotin 1:7ed7d128d225 321 LPC_USB->USBCtrl=0;
Vekotin 1:7ed7d128d225 322
Vekotin 1:7ed7d128d225 323 SIEselectEndpoint(endpoint);
Vekotin 1:7ed7d128d225 324 SIEvalidateBuffer();
Vekotin 1:7ed7d128d225 325 }
Vekotin 1:7ed7d128d225 326
Vekotin 1:7ed7d128d225 327 USBHAL::USBHAL(void) {
Vekotin 1:7ed7d128d225 328 // Disable IRQ
Vekotin 1:7ed7d128d225 329 NVIC_DisableIRQ(USB_IRQn);
Vekotin 1:7ed7d128d225 330
Vekotin 1:7ed7d128d225 331 // fill in callback array
Vekotin 1:7ed7d128d225 332 epCallback[0] = &USBHAL::EP1_OUT_callback;
Vekotin 1:7ed7d128d225 333 epCallback[1] = &USBHAL::EP1_IN_callback;
Vekotin 1:7ed7d128d225 334 epCallback[2] = &USBHAL::EP2_OUT_callback;
Vekotin 1:7ed7d128d225 335 epCallback[3] = &USBHAL::EP2_IN_callback;
Vekotin 1:7ed7d128d225 336 epCallback[4] = &USBHAL::EP3_OUT_callback;
Vekotin 1:7ed7d128d225 337 epCallback[5] = &USBHAL::EP3_IN_callback;
Vekotin 1:7ed7d128d225 338 epCallback[6] = &USBHAL::EP4_OUT_callback;
Vekotin 1:7ed7d128d225 339 epCallback[7] = &USBHAL::EP4_IN_callback;
Vekotin 1:7ed7d128d225 340 epCallback[8] = &USBHAL::EP5_OUT_callback;
Vekotin 1:7ed7d128d225 341 epCallback[9] = &USBHAL::EP5_IN_callback;
Vekotin 1:7ed7d128d225 342 epCallback[10] = &USBHAL::EP6_OUT_callback;
Vekotin 1:7ed7d128d225 343 epCallback[11] = &USBHAL::EP6_IN_callback;
Vekotin 1:7ed7d128d225 344 epCallback[12] = &USBHAL::EP7_OUT_callback;
Vekotin 1:7ed7d128d225 345 epCallback[13] = &USBHAL::EP7_IN_callback;
Vekotin 1:7ed7d128d225 346 epCallback[14] = &USBHAL::EP8_OUT_callback;
Vekotin 1:7ed7d128d225 347 epCallback[15] = &USBHAL::EP8_IN_callback;
Vekotin 1:7ed7d128d225 348 epCallback[16] = &USBHAL::EP9_OUT_callback;
Vekotin 1:7ed7d128d225 349 epCallback[17] = &USBHAL::EP9_IN_callback;
Vekotin 1:7ed7d128d225 350 epCallback[18] = &USBHAL::EP10_OUT_callback;
Vekotin 1:7ed7d128d225 351 epCallback[19] = &USBHAL::EP10_IN_callback;
Vekotin 1:7ed7d128d225 352 epCallback[20] = &USBHAL::EP11_OUT_callback;
Vekotin 1:7ed7d128d225 353 epCallback[21] = &USBHAL::EP11_IN_callback;
Vekotin 1:7ed7d128d225 354 epCallback[22] = &USBHAL::EP12_OUT_callback;
Vekotin 1:7ed7d128d225 355 epCallback[23] = &USBHAL::EP12_IN_callback;
Vekotin 1:7ed7d128d225 356 epCallback[24] = &USBHAL::EP13_OUT_callback;
Vekotin 1:7ed7d128d225 357 epCallback[25] = &USBHAL::EP13_IN_callback;
Vekotin 1:7ed7d128d225 358 epCallback[26] = &USBHAL::EP14_OUT_callback;
Vekotin 1:7ed7d128d225 359 epCallback[27] = &USBHAL::EP14_IN_callback;
Vekotin 1:7ed7d128d225 360 epCallback[28] = &USBHAL::EP15_OUT_callback;
Vekotin 1:7ed7d128d225 361 epCallback[29] = &USBHAL::EP15_IN_callback;
Vekotin 1:7ed7d128d225 362
Vekotin 1:7ed7d128d225 363 // Enable power to USB device controller
Vekotin 1:7ed7d128d225 364 LPC_SC->PCONP |= PCUSB;
Vekotin 1:7ed7d128d225 365
Vekotin 1:7ed7d128d225 366 // Enable USB clocks
Vekotin 1:7ed7d128d225 367 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
Vekotin 1:7ed7d128d225 368 while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON));
Vekotin 1:7ed7d128d225 369
Vekotin 1:7ed7d128d225 370 // Configure pins P0.29 and P0.30 to be USB D+ and USB D-
Vekotin 1:7ed7d128d225 371 LPC_PINCON->PINSEL1 &= 0xc3ffffff;
Vekotin 1:7ed7d128d225 372 LPC_PINCON->PINSEL1 |= 0x14000000;
Vekotin 1:7ed7d128d225 373
Vekotin 1:7ed7d128d225 374 // Disconnect USB device
Vekotin 1:7ed7d128d225 375 SIEdisconnect();
Vekotin 1:7ed7d128d225 376
Vekotin 1:7ed7d128d225 377 // Configure pin P2.9 to be Connect
Vekotin 1:7ed7d128d225 378 LPC_PINCON->PINSEL4 &= 0xfffcffff;
Vekotin 1:7ed7d128d225 379 LPC_PINCON->PINSEL4 |= 0x00040000;
Vekotin 1:7ed7d128d225 380
Vekotin 1:7ed7d128d225 381 // Connect must be low for at least 2.5uS
Vekotin 1:7ed7d128d225 382 wait(0.3);
Vekotin 1:7ed7d128d225 383
Vekotin 1:7ed7d128d225 384 // Set the maximum packet size for the control endpoints
Vekotin 1:7ed7d128d225 385 realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
Vekotin 1:7ed7d128d225 386 realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
Vekotin 1:7ed7d128d225 387
Vekotin 1:7ed7d128d225 388 // Attach IRQ
Vekotin 1:7ed7d128d225 389 instance = this;
Vekotin 1:7ed7d128d225 390 NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
Vekotin 1:7ed7d128d225 391
Vekotin 1:7ed7d128d225 392 // Enable interrupts for device events and EP0
Vekotin 1:7ed7d128d225 393 LPC_USB->USBDevIntEn = EP_SLOW | DEV_STAT | FRAME;
Vekotin 1:7ed7d128d225 394 enableEndpointEvent(EP0IN);
Vekotin 1:7ed7d128d225 395 enableEndpointEvent(EP0OUT);
Vekotin 1:7ed7d128d225 396 }
Vekotin 1:7ed7d128d225 397
Vekotin 1:7ed7d128d225 398 USBHAL::~USBHAL(void) {
Vekotin 1:7ed7d128d225 399 // Ensure device disconnected
Vekotin 1:7ed7d128d225 400 SIEdisconnect();
Vekotin 1:7ed7d128d225 401 // Disable USB interrupts
Vekotin 1:7ed7d128d225 402 NVIC_DisableIRQ(USB_IRQn);
Vekotin 1:7ed7d128d225 403 }
Vekotin 1:7ed7d128d225 404
Vekotin 1:7ed7d128d225 405 void USBHAL::connect(void) {
Vekotin 1:7ed7d128d225 406 NVIC_EnableIRQ(USB_IRQn);
Vekotin 1:7ed7d128d225 407 // Connect USB device
Vekotin 1:7ed7d128d225 408 SIEconnect();
Vekotin 1:7ed7d128d225 409 }
Vekotin 1:7ed7d128d225 410
Vekotin 1:7ed7d128d225 411 void USBHAL::disconnect(void) {
Vekotin 1:7ed7d128d225 412 NVIC_DisableIRQ(USB_IRQn);
Vekotin 1:7ed7d128d225 413 // Disconnect USB device
Vekotin 1:7ed7d128d225 414 SIEdisconnect();
Vekotin 1:7ed7d128d225 415 }
Vekotin 1:7ed7d128d225 416
Vekotin 1:7ed7d128d225 417 void USBHAL::configureDevice(void) {
Vekotin 1:7ed7d128d225 418 SIEconfigureDevice();
Vekotin 1:7ed7d128d225 419 }
Vekotin 1:7ed7d128d225 420
Vekotin 1:7ed7d128d225 421 void USBHAL::unconfigureDevice(void) {
Vekotin 1:7ed7d128d225 422 SIEunconfigureDevice();
Vekotin 1:7ed7d128d225 423 }
Vekotin 1:7ed7d128d225 424
Vekotin 1:7ed7d128d225 425 void USBHAL::setAddress(uint8_t address) {
Vekotin 1:7ed7d128d225 426 SIEsetAddress(address);
Vekotin 1:7ed7d128d225 427 }
Vekotin 1:7ed7d128d225 428
Vekotin 1:7ed7d128d225 429 void USBHAL::EP0setup(uint8_t *buffer) {
Vekotin 1:7ed7d128d225 430 endpointReadcore(EP0OUT, buffer);
Vekotin 1:7ed7d128d225 431 }
Vekotin 1:7ed7d128d225 432
Vekotin 1:7ed7d128d225 433 void USBHAL::EP0read(void) {
Vekotin 1:7ed7d128d225 434 // Not required
Vekotin 1:7ed7d128d225 435 }
Vekotin 1:7ed7d128d225 436
Vekotin 1:7ed7d128d225 437 void USBHAL::EP0readStage(void) {
Vekotin 1:7ed7d128d225 438 // Not required
Vekotin 1:7ed7d128d225 439 }
Vekotin 1:7ed7d128d225 440
Vekotin 1:7ed7d128d225 441 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
Vekotin 1:7ed7d128d225 442 return endpointReadcore(EP0OUT, buffer);
Vekotin 1:7ed7d128d225 443 }
Vekotin 1:7ed7d128d225 444
Vekotin 1:7ed7d128d225 445 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
Vekotin 1:7ed7d128d225 446 endpointWritecore(EP0IN, buffer, size);
Vekotin 1:7ed7d128d225 447 }
Vekotin 1:7ed7d128d225 448
Vekotin 1:7ed7d128d225 449 void USBHAL::EP0getWriteResult(void) {
Vekotin 1:7ed7d128d225 450 // Not required
Vekotin 1:7ed7d128d225 451 }
Vekotin 1:7ed7d128d225 452
Vekotin 1:7ed7d128d225 453 void USBHAL::EP0stall(void) {
Vekotin 1:7ed7d128d225 454 // This will stall both control endpoints
Vekotin 1:7ed7d128d225 455 stallEndpoint(EP0OUT);
Vekotin 1:7ed7d128d225 456 }
Vekotin 1:7ed7d128d225 457
Vekotin 1:7ed7d128d225 458 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
Vekotin 1:7ed7d128d225 459 return EP_PENDING;
Vekotin 1:7ed7d128d225 460 }
Vekotin 1:7ed7d128d225 461
Vekotin 1:7ed7d128d225 462 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
Vekotin 1:7ed7d128d225 463
Vekotin 1:7ed7d128d225 464 //for isochronous endpoint, we don't wait an interrupt
Vekotin 1:7ed7d128d225 465 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
Vekotin 1:7ed7d128d225 466 if (!(epComplete & EP(endpoint)))
Vekotin 1:7ed7d128d225 467 return EP_PENDING;
Vekotin 1:7ed7d128d225 468 }
Vekotin 1:7ed7d128d225 469
Vekotin 1:7ed7d128d225 470 *bytesRead = endpointReadcore(endpoint, buffer);
Vekotin 1:7ed7d128d225 471 epComplete &= ~EP(endpoint);
Vekotin 1:7ed7d128d225 472 return EP_COMPLETED;
Vekotin 1:7ed7d128d225 473 }
Vekotin 1:7ed7d128d225 474
Vekotin 1:7ed7d128d225 475 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
Vekotin 1:7ed7d128d225 476 if (getEndpointStallState(endpoint)) {
Vekotin 1:7ed7d128d225 477 return EP_STALLED;
Vekotin 1:7ed7d128d225 478 }
Vekotin 1:7ed7d128d225 479
Vekotin 1:7ed7d128d225 480 epComplete &= ~EP(endpoint);
Vekotin 1:7ed7d128d225 481
Vekotin 1:7ed7d128d225 482 endpointWritecore(endpoint, data, size);
Vekotin 1:7ed7d128d225 483 return EP_PENDING;
Vekotin 1:7ed7d128d225 484 }
Vekotin 1:7ed7d128d225 485
Vekotin 1:7ed7d128d225 486 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
Vekotin 1:7ed7d128d225 487 if (epComplete & EP(endpoint)) {
Vekotin 1:7ed7d128d225 488 epComplete &= ~EP(endpoint);
Vekotin 1:7ed7d128d225 489 return EP_COMPLETED;
Vekotin 1:7ed7d128d225 490 }
Vekotin 1:7ed7d128d225 491
Vekotin 1:7ed7d128d225 492 return EP_PENDING;
Vekotin 1:7ed7d128d225 493 }
Vekotin 1:7ed7d128d225 494
Vekotin 1:7ed7d128d225 495 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
Vekotin 1:7ed7d128d225 496 // Realise an endpoint
Vekotin 1:7ed7d128d225 497 LPC_USB->USBDevIntClr = EP_RLZED;
Vekotin 1:7ed7d128d225 498 LPC_USB->USBReEp |= EP(endpoint);
Vekotin 1:7ed7d128d225 499 LPC_USB->USBEpInd = endpoint;
Vekotin 1:7ed7d128d225 500 LPC_USB->USBMaxPSize = maxPacket;
Vekotin 1:7ed7d128d225 501
Vekotin 1:7ed7d128d225 502 while (!(LPC_USB->USBDevIntSt & EP_RLZED));
Vekotin 1:7ed7d128d225 503 LPC_USB->USBDevIntClr = EP_RLZED;
Vekotin 1:7ed7d128d225 504
Vekotin 1:7ed7d128d225 505 // Clear stall state
Vekotin 1:7ed7d128d225 506 endpointStallState &= ~EP(endpoint);
Vekotin 1:7ed7d128d225 507
Vekotin 1:7ed7d128d225 508 enableEndpointEvent(endpoint);
Vekotin 1:7ed7d128d225 509 return true;
Vekotin 1:7ed7d128d225 510 }
Vekotin 1:7ed7d128d225 511
Vekotin 1:7ed7d128d225 512 void USBHAL::stallEndpoint(uint8_t endpoint) {
Vekotin 1:7ed7d128d225 513 // Stall an endpoint
Vekotin 1:7ed7d128d225 514 if ( (endpoint==EP0IN) || (endpoint==EP0OUT) ) {
Vekotin 1:7ed7d128d225 515 // Conditionally stall both control endpoints
Vekotin 1:7ed7d128d225 516 SIEsetEndpointStatus(EP0OUT, SIE_SES_CND_ST);
Vekotin 1:7ed7d128d225 517 } else {
Vekotin 1:7ed7d128d225 518 SIEsetEndpointStatus(endpoint, SIE_SES_ST);
Vekotin 1:7ed7d128d225 519
Vekotin 1:7ed7d128d225 520 // Update stall state
Vekotin 1:7ed7d128d225 521 endpointStallState |= EP(endpoint);
Vekotin 1:7ed7d128d225 522 }
Vekotin 1:7ed7d128d225 523 }
Vekotin 1:7ed7d128d225 524
Vekotin 1:7ed7d128d225 525 void USBHAL::unstallEndpoint(uint8_t endpoint) {
Vekotin 1:7ed7d128d225 526 // Unstall an endpoint. The endpoint will also be reinitialised
Vekotin 1:7ed7d128d225 527 SIEsetEndpointStatus(endpoint, 0);
Vekotin 1:7ed7d128d225 528
Vekotin 1:7ed7d128d225 529 // Update stall state
Vekotin 1:7ed7d128d225 530 endpointStallState &= ~EP(endpoint);
Vekotin 1:7ed7d128d225 531 }
Vekotin 1:7ed7d128d225 532
Vekotin 1:7ed7d128d225 533 bool USBHAL::getEndpointStallState(uint8_t endpoint) {
Vekotin 1:7ed7d128d225 534 // Returns true if endpoint stalled
Vekotin 1:7ed7d128d225 535 return endpointStallState & EP(endpoint);
Vekotin 1:7ed7d128d225 536 }
Vekotin 1:7ed7d128d225 537
Vekotin 1:7ed7d128d225 538 void USBHAL::remoteWakeup(void) {
Vekotin 1:7ed7d128d225 539 // Remote wakeup
Vekotin 1:7ed7d128d225 540 uint8_t status;
Vekotin 1:7ed7d128d225 541
Vekotin 1:7ed7d128d225 542 // Enable USB clocks
Vekotin 1:7ed7d128d225 543 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
Vekotin 1:7ed7d128d225 544 while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON));
Vekotin 1:7ed7d128d225 545
Vekotin 1:7ed7d128d225 546 status = SIEgetDeviceStatus();
Vekotin 1:7ed7d128d225 547 SIEsetDeviceStatus(status & ~SIE_DS_SUS);
Vekotin 1:7ed7d128d225 548 }
Vekotin 1:7ed7d128d225 549
Vekotin 1:7ed7d128d225 550 void USBHAL::_usbisr(void) {
Vekotin 1:7ed7d128d225 551 instance->usbisr();
Vekotin 1:7ed7d128d225 552 }
Vekotin 1:7ed7d128d225 553
Vekotin 1:7ed7d128d225 554
Vekotin 1:7ed7d128d225 555 void USBHAL::usbisr(void) {
Vekotin 1:7ed7d128d225 556 uint8_t devStat;
Vekotin 1:7ed7d128d225 557
Vekotin 1:7ed7d128d225 558 if (LPC_USB->USBDevIntSt & FRAME) {
Vekotin 1:7ed7d128d225 559 // Start of frame event
Vekotin 1:7ed7d128d225 560 SOF(SIEgetFrameNumber());
Vekotin 1:7ed7d128d225 561 // Clear interrupt status flag
Vekotin 1:7ed7d128d225 562 LPC_USB->USBDevIntClr = FRAME;
Vekotin 1:7ed7d128d225 563 }
Vekotin 1:7ed7d128d225 564
Vekotin 1:7ed7d128d225 565 if (LPC_USB->USBDevIntSt & DEV_STAT) {
Vekotin 1:7ed7d128d225 566 // Device Status interrupt
Vekotin 1:7ed7d128d225 567 // Must clear the interrupt status flag before reading the device status from the SIE
Vekotin 1:7ed7d128d225 568 LPC_USB->USBDevIntClr = DEV_STAT;
Vekotin 1:7ed7d128d225 569
Vekotin 1:7ed7d128d225 570 // Read device status from SIE
Vekotin 1:7ed7d128d225 571 devStat = SIEgetDeviceStatus();
Vekotin 1:7ed7d128d225 572 //printf("devStat: %d\r\n", devStat);
Vekotin 1:7ed7d128d225 573
Vekotin 1:7ed7d128d225 574 if (devStat & SIE_DS_SUS_CH) {
Vekotin 1:7ed7d128d225 575 // Suspend status changed
Vekotin 1:7ed7d128d225 576 if((devStat & SIE_DS_SUS) != 0) {
Vekotin 1:7ed7d128d225 577 suspendStateChanged(0);
Vekotin 1:7ed7d128d225 578 }
Vekotin 1:7ed7d128d225 579 }
Vekotin 1:7ed7d128d225 580
Vekotin 1:7ed7d128d225 581 if (devStat & SIE_DS_RST) {
Vekotin 1:7ed7d128d225 582 // Bus reset
Vekotin 1:7ed7d128d225 583 if((devStat & SIE_DS_SUS) == 0) {
Vekotin 1:7ed7d128d225 584 suspendStateChanged(1);
Vekotin 1:7ed7d128d225 585 }
Vekotin 1:7ed7d128d225 586 busReset();
Vekotin 1:7ed7d128d225 587 }
Vekotin 1:7ed7d128d225 588 }
Vekotin 1:7ed7d128d225 589
Vekotin 1:7ed7d128d225 590 if (LPC_USB->USBDevIntSt & EP_SLOW) {
Vekotin 1:7ed7d128d225 591 // (Slow) Endpoint Interrupt
Vekotin 1:7ed7d128d225 592
Vekotin 1:7ed7d128d225 593 // Process each endpoint interrupt
Vekotin 1:7ed7d128d225 594 if (LPC_USB->USBEpIntSt & EP(EP0OUT)) {
Vekotin 1:7ed7d128d225 595 if (selectEndpointClearInterrupt(EP0OUT) & SIE_SE_STP) {
Vekotin 1:7ed7d128d225 596 // this is a setup packet
Vekotin 1:7ed7d128d225 597 EP0setupCallback();
Vekotin 1:7ed7d128d225 598 } else {
Vekotin 1:7ed7d128d225 599 EP0out();
Vekotin 1:7ed7d128d225 600 }
Vekotin 1:7ed7d128d225 601 LPC_USB->USBDevIntClr = EP_SLOW;
Vekotin 1:7ed7d128d225 602 }
Vekotin 1:7ed7d128d225 603
Vekotin 1:7ed7d128d225 604 if (LPC_USB->USBEpIntSt & EP(EP0IN)) {
Vekotin 1:7ed7d128d225 605 selectEndpointClearInterrupt(EP0IN);
Vekotin 1:7ed7d128d225 606 LPC_USB->USBDevIntClr = EP_SLOW;
Vekotin 1:7ed7d128d225 607 EP0in();
Vekotin 1:7ed7d128d225 608 }
Vekotin 1:7ed7d128d225 609
Vekotin 1:7ed7d128d225 610 for (uint8_t num = 2; num < 16*2; num++) {
Vekotin 1:7ed7d128d225 611 if (LPC_USB->USBEpIntSt & EP(num)) {
Vekotin 1:7ed7d128d225 612 selectEndpointClearInterrupt(num);
Vekotin 1:7ed7d128d225 613 epComplete |= EP(num);
Vekotin 1:7ed7d128d225 614 LPC_USB->USBDevIntClr = EP_SLOW;
Vekotin 1:7ed7d128d225 615 if ((instance->*(epCallback[num - 2]))()) {
Vekotin 1:7ed7d128d225 616 epComplete &= ~EP(num);
Vekotin 1:7ed7d128d225 617 }
Vekotin 1:7ed7d128d225 618 }
Vekotin 1:7ed7d128d225 619 }
Vekotin 1:7ed7d128d225 620 }
Vekotin 1:7ed7d128d225 621 }
Vekotin 1:7ed7d128d225 622
Vekotin 1:7ed7d128d225 623 #endif