Driver for MAX31331 and MAX31334 Real Time Clock ICs.

Committer:
Sinan Divarci
Date:
Tue Aug 02 18:20:54 2022 +0300
Revision:
0:4a2754e462db
Initial Commit

Who changed what in which revision?

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Sinan Divarci 0:4a2754e462db 1 /*******************************************************************************
Sinan Divarci 0:4a2754e462db 2 * Copyright(C) Analog Devices Inc., All Rights Reserved.
Sinan Divarci 0:4a2754e462db 3 *
Sinan Divarci 0:4a2754e462db 4 * Permission is hereby granted, free of charge, to any person obtaining a
Sinan Divarci 0:4a2754e462db 5 * copy of this software and associated documentation files(the "Software"),
Sinan Divarci 0:4a2754e462db 6 * to deal in the Software without restriction, including without limitation
Sinan Divarci 0:4a2754e462db 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
Sinan Divarci 0:4a2754e462db 8 * and/or sell copies of the Software, and to permit persons to whom the
Sinan Divarci 0:4a2754e462db 9 * Software is furnished to do so, subject to the following conditions:
Sinan Divarci 0:4a2754e462db 10 *
Sinan Divarci 0:4a2754e462db 11 * The above copyright notice and this permission notice shall be included
Sinan Divarci 0:4a2754e462db 12 * in all copies or substantial portions of the Software.
Sinan Divarci 0:4a2754e462db 13 *
Sinan Divarci 0:4a2754e462db 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
Sinan Divarci 0:4a2754e462db 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
Sinan Divarci 0:4a2754e462db 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
Sinan Divarci 0:4a2754e462db 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
Sinan Divarci 0:4a2754e462db 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
Sinan Divarci 0:4a2754e462db 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
Sinan Divarci 0:4a2754e462db 20 * OTHER DEALINGS IN THE SOFTWARE.
Sinan Divarci 0:4a2754e462db 21 *
Sinan Divarci 0:4a2754e462db 22 * Except as contained in this notice, the name of Analog Devices Inc.
Sinan Divarci 0:4a2754e462db 23 * shall not be used except as stated in the Analog Devices Inc.
Sinan Divarci 0:4a2754e462db 24 * Branding Policy.
Sinan Divarci 0:4a2754e462db 25 *
Sinan Divarci 0:4a2754e462db 26 * The mere transfer of this software does not imply any licenses
Sinan Divarci 0:4a2754e462db 27 * of trade secrets, proprietary technology, copyrights, patents,
Sinan Divarci 0:4a2754e462db 28 * trademarks, maskwork rights, or any other form of intellectual
Sinan Divarci 0:4a2754e462db 29 * property whatsoever. Analog Devices Inc.retains all ownership rights.
Sinan Divarci 0:4a2754e462db 30 *******************************************************************************
Sinan Divarci 0:4a2754e462db 31 */
Sinan Divarci 0:4a2754e462db 32
Sinan Divarci 0:4a2754e462db 33 #ifndef MAX3133X_REGS_HPP_
Sinan Divarci 0:4a2754e462db 34 #define MAX3133X_REGS_HPP_
Sinan Divarci 0:4a2754e462db 35
Sinan Divarci 0:4a2754e462db 36 #define REG_NOT_AVAILABLE 0xFF
Sinan Divarci 0:4a2754e462db 37
Sinan Divarci 0:4a2754e462db 38 /**
Sinan Divarci 0:4a2754e462db 39 * @brief STATUS Register
Sinan Divarci 0:4a2754e462db 40 */
Sinan Divarci 0:4a2754e462db 41 typedef union {
Sinan Divarci 0:4a2754e462db 42 unsigned char raw;
Sinan Divarci 0:4a2754e462db 43 struct {
Sinan Divarci 0:4a2754e462db 44 unsigned char a1f : 1;
Sinan Divarci 0:4a2754e462db 45 unsigned char a2f : 1;
Sinan Divarci 0:4a2754e462db 46 unsigned char tif : 1;
Sinan Divarci 0:4a2754e462db 47 unsigned char dif : 1;
Sinan Divarci 0:4a2754e462db 48 unsigned char vbatlow : 1;
Sinan Divarci 0:4a2754e462db 49 unsigned char pfail : 1;
Sinan Divarci 0:4a2754e462db 50 unsigned char osf : 1;
Sinan Divarci 0:4a2754e462db 51 unsigned char psdect : 1;
Sinan Divarci 0:4a2754e462db 52 } bits;
Sinan Divarci 0:4a2754e462db 53 } max3133x_status_reg_t;
Sinan Divarci 0:4a2754e462db 54
Sinan Divarci 0:4a2754e462db 55 /**
Sinan Divarci 0:4a2754e462db 56 * @brief ENT_EN Register
Sinan Divarci 0:4a2754e462db 57 */
Sinan Divarci 0:4a2754e462db 58 typedef union {
Sinan Divarci 0:4a2754e462db 59 unsigned char raw;
Sinan Divarci 0:4a2754e462db 60 struct {
Sinan Divarci 0:4a2754e462db 61 unsigned char a1ie : 1;
Sinan Divarci 0:4a2754e462db 62 unsigned char a2ie : 1;
Sinan Divarci 0:4a2754e462db 63 unsigned char tie : 1;
Sinan Divarci 0:4a2754e462db 64 unsigned char die : 1;
Sinan Divarci 0:4a2754e462db 65 unsigned char vbatlowie : 1;
Sinan Divarci 0:4a2754e462db 66 unsigned char pfaile : 1;
Sinan Divarci 0:4a2754e462db 67 unsigned char dosf : 1;
Sinan Divarci 0:4a2754e462db 68 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 69 } bits;
Sinan Divarci 0:4a2754e462db 70 } max3133x_int_en_reg_t;
Sinan Divarci 0:4a2754e462db 71
Sinan Divarci 0:4a2754e462db 72 /**
Sinan Divarci 0:4a2754e462db 73 * @brief RTC_RESET Register
Sinan Divarci 0:4a2754e462db 74 */
Sinan Divarci 0:4a2754e462db 75 typedef union {
Sinan Divarci 0:4a2754e462db 76 unsigned char raw;
Sinan Divarci 0:4a2754e462db 77 struct {
Sinan Divarci 0:4a2754e462db 78 unsigned char swrst : 1;
Sinan Divarci 0:4a2754e462db 79 unsigned char : 7;
Sinan Divarci 0:4a2754e462db 80 } bits;
Sinan Divarci 0:4a2754e462db 81 } max3133x_rtc_reset_reg_t;
Sinan Divarci 0:4a2754e462db 82
Sinan Divarci 0:4a2754e462db 83 /**
Sinan Divarci 0:4a2754e462db 84 * @brief RTC_CONFIG1 Register
Sinan Divarci 0:4a2754e462db 85 */
Sinan Divarci 0:4a2754e462db 86 typedef union {
Sinan Divarci 0:4a2754e462db 87 unsigned char raw;
Sinan Divarci 0:4a2754e462db 88 struct {
Sinan Divarci 0:4a2754e462db 89 unsigned char en_osc : 1;
Sinan Divarci 0:4a2754e462db 90 unsigned char i2c_timeout : 1;
Sinan Divarci 0:4a2754e462db 91 unsigned char data_ret : 1;
Sinan Divarci 0:4a2754e462db 92 unsigned char dip : 1;
Sinan Divarci 0:4a2754e462db 93 unsigned char a1ac : 2;
Sinan Divarci 0:4a2754e462db 94 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 95 } bits;
Sinan Divarci 0:4a2754e462db 96 } max3133x_rtc_config1_reg_t;
Sinan Divarci 0:4a2754e462db 97
Sinan Divarci 0:4a2754e462db 98 /**
Sinan Divarci 0:4a2754e462db 99 * @brief RTC_CONFIG2 Register
Sinan Divarci 0:4a2754e462db 100 */
Sinan Divarci 0:4a2754e462db 101 typedef union {
Sinan Divarci 0:4a2754e462db 102 unsigned char raw;
Sinan Divarci 0:4a2754e462db 103 struct {
Sinan Divarci 0:4a2754e462db 104 unsigned char clko_hz : 2;
Sinan Divarci 0:4a2754e462db 105 unsigned char enclko : 1;
Sinan Divarci 0:4a2754e462db 106 unsigned char : 5;
Sinan Divarci 0:4a2754e462db 107 } bits;
Sinan Divarci 0:4a2754e462db 108 } max31331_rtc_config2_reg_t;
Sinan Divarci 0:4a2754e462db 109
Sinan Divarci 0:4a2754e462db 110 /**
Sinan Divarci 0:4a2754e462db 111 * @brief RTC_CONFIG2 Register
Sinan Divarci 0:4a2754e462db 112 */
Sinan Divarci 0:4a2754e462db 113 typedef union {
Sinan Divarci 0:4a2754e462db 114 unsigned char raw;
Sinan Divarci 0:4a2754e462db 115 struct {
Sinan Divarci 0:4a2754e462db 116 unsigned char clko_hz : 2;
Sinan Divarci 0:4a2754e462db 117 unsigned char enclko : 1;
Sinan Divarci 0:4a2754e462db 118 unsigned char ddb : 1;
Sinan Divarci 0:4a2754e462db 119 unsigned char dse : 1;
Sinan Divarci 0:4a2754e462db 120 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 121 unsigned char slst : 1;
Sinan Divarci 0:4a2754e462db 122 } bits;
Sinan Divarci 0:4a2754e462db 123 } max31334_rtc_config2_reg_t;
Sinan Divarci 0:4a2754e462db 124
Sinan Divarci 0:4a2754e462db 125 /**
Sinan Divarci 0:4a2754e462db 126 * @brief TIMESTAMP_CONFIG Register
Sinan Divarci 0:4a2754e462db 127 */
Sinan Divarci 0:4a2754e462db 128 typedef union {
Sinan Divarci 0:4a2754e462db 129 unsigned char raw;
Sinan Divarci 0:4a2754e462db 130 struct {
Sinan Divarci 0:4a2754e462db 131 unsigned char tse : 1;
Sinan Divarci 0:4a2754e462db 132 unsigned char tsr : 1;
Sinan Divarci 0:4a2754e462db 133 unsigned char tsow : 1;
Sinan Divarci 0:4a2754e462db 134 unsigned char tsdin : 1;
Sinan Divarci 0:4a2754e462db 135 unsigned char tspwm : 1;
Sinan Divarci 0:4a2754e462db 136 unsigned char tsvlow : 1;
Sinan Divarci 0:4a2754e462db 137 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 138 } bits;
Sinan Divarci 0:4a2754e462db 139 } max3133x_timestamp_config_reg_t;
Sinan Divarci 0:4a2754e462db 140
Sinan Divarci 0:4a2754e462db 141 /**
Sinan Divarci 0:4a2754e462db 142 * @brief TIMER_CONFIG Register
Sinan Divarci 0:4a2754e462db 143 */
Sinan Divarci 0:4a2754e462db 144 typedef union {
Sinan Divarci 0:4a2754e462db 145 unsigned char raw;
Sinan Divarci 0:4a2754e462db 146 struct {
Sinan Divarci 0:4a2754e462db 147 unsigned char tfs : 2;
Sinan Divarci 0:4a2754e462db 148 unsigned char trpt : 1;
Sinan Divarci 0:4a2754e462db 149 unsigned char tpause : 1;
Sinan Divarci 0:4a2754e462db 150 unsigned char te : 1;
Sinan Divarci 0:4a2754e462db 151 unsigned char : 3;
Sinan Divarci 0:4a2754e462db 152
Sinan Divarci 0:4a2754e462db 153 } bits;
Sinan Divarci 0:4a2754e462db 154 } max3133x_timer_config_reg_t;
Sinan Divarci 0:4a2754e462db 155
Sinan Divarci 0:4a2754e462db 156 /**
Sinan Divarci 0:4a2754e462db 157 * @brief SLEEP_CONFIG Register
Sinan Divarci 0:4a2754e462db 158 */
Sinan Divarci 0:4a2754e462db 159 typedef union {
Sinan Divarci 0:4a2754e462db 160 unsigned char raw;
Sinan Divarci 0:4a2754e462db 161 struct {
Sinan Divarci 0:4a2754e462db 162 unsigned char a1we : 1;
Sinan Divarci 0:4a2754e462db 163 unsigned char a2we : 1;
Sinan Divarci 0:4a2754e462db 164 unsigned char twe : 1;
Sinan Divarci 0:4a2754e462db 165 unsigned char dwe : 1;
Sinan Divarci 0:4a2754e462db 166 unsigned char wsto : 3;
Sinan Divarci 0:4a2754e462db 167 unsigned char slp : 1;
Sinan Divarci 0:4a2754e462db 168 } bits;
Sinan Divarci 0:4a2754e462db 169 } max31334_sleep_config_reg_t;
Sinan Divarci 0:4a2754e462db 170
Sinan Divarci 0:4a2754e462db 171 /**
Sinan Divarci 0:4a2754e462db 172 * @brief SECONDS_1_128 Register
Sinan Divarci 0:4a2754e462db 173 */
Sinan Divarci 0:4a2754e462db 174 typedef union {
Sinan Divarci 0:4a2754e462db 175 unsigned char raw;
Sinan Divarci 0:4a2754e462db 176 struct {
Sinan Divarci 0:4a2754e462db 177 unsigned char _1_128s : 1;
Sinan Divarci 0:4a2754e462db 178 unsigned char _1_64s : 1;
Sinan Divarci 0:4a2754e462db 179 unsigned char _1_32s : 1;
Sinan Divarci 0:4a2754e462db 180 unsigned char _1_16s : 1;
Sinan Divarci 0:4a2754e462db 181 unsigned char _1_8s : 1;
Sinan Divarci 0:4a2754e462db 182 unsigned char _1_4s : 1;
Sinan Divarci 0:4a2754e462db 183 unsigned char _1_2s : 1;
Sinan Divarci 0:4a2754e462db 184 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 185 } bits;
Sinan Divarci 0:4a2754e462db 186 } max3133x_seconds_1_128_reg_t;
Sinan Divarci 0:4a2754e462db 187
Sinan Divarci 0:4a2754e462db 188 /**
Sinan Divarci 0:4a2754e462db 189 * @brief SECONDS Register
Sinan Divarci 0:4a2754e462db 190 */
Sinan Divarci 0:4a2754e462db 191 typedef union {
Sinan Divarci 0:4a2754e462db 192 unsigned char raw;
Sinan Divarci 0:4a2754e462db 193 struct {
Sinan Divarci 0:4a2754e462db 194 unsigned char seconds : 4;
Sinan Divarci 0:4a2754e462db 195 unsigned char sec_10 : 3;
Sinan Divarci 0:4a2754e462db 196 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 197 } bits;
Sinan Divarci 0:4a2754e462db 198 struct {
Sinan Divarci 0:4a2754e462db 199 unsigned char value : 7;
Sinan Divarci 0:4a2754e462db 200 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 201 } bcd;
Sinan Divarci 0:4a2754e462db 202 } max3133x_seconds_reg_t;
Sinan Divarci 0:4a2754e462db 203
Sinan Divarci 0:4a2754e462db 204 /**
Sinan Divarci 0:4a2754e462db 205 * @brief MINUTES Register
Sinan Divarci 0:4a2754e462db 206 */
Sinan Divarci 0:4a2754e462db 207 typedef union {
Sinan Divarci 0:4a2754e462db 208 unsigned char raw;
Sinan Divarci 0:4a2754e462db 209 struct {
Sinan Divarci 0:4a2754e462db 210 unsigned char minutes : 4;
Sinan Divarci 0:4a2754e462db 211 unsigned char min_10 : 3;
Sinan Divarci 0:4a2754e462db 212 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 213 } bits;
Sinan Divarci 0:4a2754e462db 214 struct {
Sinan Divarci 0:4a2754e462db 215 unsigned char value : 7;
Sinan Divarci 0:4a2754e462db 216 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 217 } bcd;
Sinan Divarci 0:4a2754e462db 218 } max3133x_minutes_reg_t;
Sinan Divarci 0:4a2754e462db 219
Sinan Divarci 0:4a2754e462db 220 /**
Sinan Divarci 0:4a2754e462db 221 * @brief HOURS Register
Sinan Divarci 0:4a2754e462db 222 */
Sinan Divarci 0:4a2754e462db 223 typedef union {
Sinan Divarci 0:4a2754e462db 224 unsigned char raw;
Sinan Divarci 0:4a2754e462db 225 struct {
Sinan Divarci 0:4a2754e462db 226 unsigned char hour : 4;
Sinan Divarci 0:4a2754e462db 227 unsigned char hr_10 : 1;
Sinan Divarci 0:4a2754e462db 228 unsigned char am_pm : 1;
Sinan Divarci 0:4a2754e462db 229 unsigned char f_24_12 : 1;
Sinan Divarci 0:4a2754e462db 230 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 231 } bits_12hr;
Sinan Divarci 0:4a2754e462db 232 struct {
Sinan Divarci 0:4a2754e462db 233 unsigned char value : 5;
Sinan Divarci 0:4a2754e462db 234 unsigned char : 3;
Sinan Divarci 0:4a2754e462db 235 } bcd_12hr;
Sinan Divarci 0:4a2754e462db 236 struct {
Sinan Divarci 0:4a2754e462db 237 unsigned char hour : 4;
Sinan Divarci 0:4a2754e462db 238 unsigned char hr_10 : 2;
Sinan Divarci 0:4a2754e462db 239 unsigned char f_24_12 : 1;
Sinan Divarci 0:4a2754e462db 240 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 241 } bits_24hr;
Sinan Divarci 0:4a2754e462db 242 struct {
Sinan Divarci 0:4a2754e462db 243 unsigned char value : 6;
Sinan Divarci 0:4a2754e462db 244 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 245 } bcd_24hr;
Sinan Divarci 0:4a2754e462db 246 } max3133x_hours_reg_t;
Sinan Divarci 0:4a2754e462db 247
Sinan Divarci 0:4a2754e462db 248 /**
Sinan Divarci 0:4a2754e462db 249 * @brief DAY Register
Sinan Divarci 0:4a2754e462db 250 */
Sinan Divarci 0:4a2754e462db 251 typedef union {
Sinan Divarci 0:4a2754e462db 252 unsigned char raw;
Sinan Divarci 0:4a2754e462db 253 struct {
Sinan Divarci 0:4a2754e462db 254 unsigned char day : 3;
Sinan Divarci 0:4a2754e462db 255 unsigned char : 5;
Sinan Divarci 0:4a2754e462db 256 } bits;
Sinan Divarci 0:4a2754e462db 257 struct {
Sinan Divarci 0:4a2754e462db 258 unsigned char value : 3;
Sinan Divarci 0:4a2754e462db 259 unsigned char : 5;
Sinan Divarci 0:4a2754e462db 260 } bcd;
Sinan Divarci 0:4a2754e462db 261 } max3133x_day_reg_t;
Sinan Divarci 0:4a2754e462db 262
Sinan Divarci 0:4a2754e462db 263 /**
Sinan Divarci 0:4a2754e462db 264 * @brief DATE Register
Sinan Divarci 0:4a2754e462db 265 */
Sinan Divarci 0:4a2754e462db 266 typedef union {
Sinan Divarci 0:4a2754e462db 267 unsigned char raw;
Sinan Divarci 0:4a2754e462db 268 struct {
Sinan Divarci 0:4a2754e462db 269 unsigned char date : 4;
Sinan Divarci 0:4a2754e462db 270 unsigned char date_10 : 2;
Sinan Divarci 0:4a2754e462db 271 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 272 } bits;
Sinan Divarci 0:4a2754e462db 273 struct {
Sinan Divarci 0:4a2754e462db 274 unsigned char value : 6;
Sinan Divarci 0:4a2754e462db 275 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 276 } bcd;
Sinan Divarci 0:4a2754e462db 277 } max3133x_date_reg_t;
Sinan Divarci 0:4a2754e462db 278
Sinan Divarci 0:4a2754e462db 279 /**
Sinan Divarci 0:4a2754e462db 280 * @brief MONTH Register
Sinan Divarci 0:4a2754e462db 281 */
Sinan Divarci 0:4a2754e462db 282 typedef union {
Sinan Divarci 0:4a2754e462db 283 unsigned char raw;
Sinan Divarci 0:4a2754e462db 284 struct {
Sinan Divarci 0:4a2754e462db 285 unsigned char month : 4;
Sinan Divarci 0:4a2754e462db 286 unsigned char month_10 : 1;
Sinan Divarci 0:4a2754e462db 287 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 288 unsigned char century : 1;
Sinan Divarci 0:4a2754e462db 289 } bits;
Sinan Divarci 0:4a2754e462db 290 struct {
Sinan Divarci 0:4a2754e462db 291 unsigned char value : 5;
Sinan Divarci 0:4a2754e462db 292 unsigned char : 3;
Sinan Divarci 0:4a2754e462db 293 } bcd;
Sinan Divarci 0:4a2754e462db 294 } max3133x_month_reg_t;
Sinan Divarci 0:4a2754e462db 295
Sinan Divarci 0:4a2754e462db 296 /**
Sinan Divarci 0:4a2754e462db 297 * @brief YEAR Register
Sinan Divarci 0:4a2754e462db 298 */
Sinan Divarci 0:4a2754e462db 299 typedef union {
Sinan Divarci 0:4a2754e462db 300 unsigned char raw;
Sinan Divarci 0:4a2754e462db 301 struct {
Sinan Divarci 0:4a2754e462db 302 unsigned char year : 4;
Sinan Divarci 0:4a2754e462db 303 unsigned char year_10 : 4;
Sinan Divarci 0:4a2754e462db 304 } bits;
Sinan Divarci 0:4a2754e462db 305 struct {
Sinan Divarci 0:4a2754e462db 306 unsigned char value : 8;
Sinan Divarci 0:4a2754e462db 307 } bcd;
Sinan Divarci 0:4a2754e462db 308 } max3133x_year_reg_t;
Sinan Divarci 0:4a2754e462db 309
Sinan Divarci 0:4a2754e462db 310 /**
Sinan Divarci 0:4a2754e462db 311 * @brief ALM_SEC Register
Sinan Divarci 0:4a2754e462db 312 */
Sinan Divarci 0:4a2754e462db 313 typedef union {
Sinan Divarci 0:4a2754e462db 314 unsigned char raw;
Sinan Divarci 0:4a2754e462db 315 struct {
Sinan Divarci 0:4a2754e462db 316 unsigned char seconds : 4;
Sinan Divarci 0:4a2754e462db 317 unsigned char sec_10 : 3;
Sinan Divarci 0:4a2754e462db 318 unsigned char am1 : 1;
Sinan Divarci 0:4a2754e462db 319 } bits;
Sinan Divarci 0:4a2754e462db 320 struct {
Sinan Divarci 0:4a2754e462db 321 unsigned char value : 7;
Sinan Divarci 0:4a2754e462db 322 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 323 } bcd;
Sinan Divarci 0:4a2754e462db 324 } max3133x_alm_sec_reg_t;
Sinan Divarci 0:4a2754e462db 325
Sinan Divarci 0:4a2754e462db 326 /**
Sinan Divarci 0:4a2754e462db 327 * @brief ALM_MIN Register
Sinan Divarci 0:4a2754e462db 328 */
Sinan Divarci 0:4a2754e462db 329 typedef union {
Sinan Divarci 0:4a2754e462db 330 unsigned char raw;
Sinan Divarci 0:4a2754e462db 331 struct {
Sinan Divarci 0:4a2754e462db 332 unsigned char minutes : 4;
Sinan Divarci 0:4a2754e462db 333 unsigned char min_10 : 3;
Sinan Divarci 0:4a2754e462db 334 unsigned char am2 : 1;
Sinan Divarci 0:4a2754e462db 335 } bits;
Sinan Divarci 0:4a2754e462db 336 struct {
Sinan Divarci 0:4a2754e462db 337 unsigned char value : 7;
Sinan Divarci 0:4a2754e462db 338 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 339 } bcd;
Sinan Divarci 0:4a2754e462db 340 } max3133x_alm_min_reg_t;
Sinan Divarci 0:4a2754e462db 341
Sinan Divarci 0:4a2754e462db 342 /**
Sinan Divarci 0:4a2754e462db 343 * @brief ALM_HRS Register
Sinan Divarci 0:4a2754e462db 344 */
Sinan Divarci 0:4a2754e462db 345 typedef union {
Sinan Divarci 0:4a2754e462db 346 unsigned char raw;
Sinan Divarci 0:4a2754e462db 347 struct {
Sinan Divarci 0:4a2754e462db 348 unsigned char hour : 4;
Sinan Divarci 0:4a2754e462db 349 unsigned char hr_10 : 1;
Sinan Divarci 0:4a2754e462db 350 unsigned char am_pm : 1;
Sinan Divarci 0:4a2754e462db 351 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 352 unsigned char am3 : 1;
Sinan Divarci 0:4a2754e462db 353 } bits_12hr;
Sinan Divarci 0:4a2754e462db 354 struct {
Sinan Divarci 0:4a2754e462db 355 unsigned char value : 5;
Sinan Divarci 0:4a2754e462db 356 unsigned char : 3;
Sinan Divarci 0:4a2754e462db 357 } bcd_12hr;
Sinan Divarci 0:4a2754e462db 358 struct {
Sinan Divarci 0:4a2754e462db 359 unsigned char hour : 4;
Sinan Divarci 0:4a2754e462db 360 unsigned char hr_10 : 2;
Sinan Divarci 0:4a2754e462db 361 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 362 unsigned char am3 : 1;
Sinan Divarci 0:4a2754e462db 363 } bits_24hr;
Sinan Divarci 0:4a2754e462db 364 struct {
Sinan Divarci 0:4a2754e462db 365 unsigned char value : 6;
Sinan Divarci 0:4a2754e462db 366 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 367 } bcd_24hr;
Sinan Divarci 0:4a2754e462db 368 } max3133x_alm_hrs_reg_t;
Sinan Divarci 0:4a2754e462db 369
Sinan Divarci 0:4a2754e462db 370 /**
Sinan Divarci 0:4a2754e462db 371 * @brief ALM_DAY_DATE Register
Sinan Divarci 0:4a2754e462db 372 */
Sinan Divarci 0:4a2754e462db 373 typedef union {
Sinan Divarci 0:4a2754e462db 374 unsigned char raw;
Sinan Divarci 0:4a2754e462db 375 struct {
Sinan Divarci 0:4a2754e462db 376 unsigned char day_date : 4;
Sinan Divarci 0:4a2754e462db 377 unsigned char date_10 : 2;
Sinan Divarci 0:4a2754e462db 378 unsigned char dy_dt_match : 1;
Sinan Divarci 0:4a2754e462db 379 unsigned char am4 : 1;
Sinan Divarci 0:4a2754e462db 380 } bits;
Sinan Divarci 0:4a2754e462db 381 struct {
Sinan Divarci 0:4a2754e462db 382 unsigned char value : 3;
Sinan Divarci 0:4a2754e462db 383 unsigned char : 5;
Sinan Divarci 0:4a2754e462db 384 } bcd_day;
Sinan Divarci 0:4a2754e462db 385 struct {
Sinan Divarci 0:4a2754e462db 386 unsigned char value : 6;
Sinan Divarci 0:4a2754e462db 387 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 388 } bcd_date;
Sinan Divarci 0:4a2754e462db 389 } max3133x_alm_day_date_reg_t;
Sinan Divarci 0:4a2754e462db 390
Sinan Divarci 0:4a2754e462db 391 /**
Sinan Divarci 0:4a2754e462db 392 * @brief ALM_MON Register
Sinan Divarci 0:4a2754e462db 393 */
Sinan Divarci 0:4a2754e462db 394 typedef union {
Sinan Divarci 0:4a2754e462db 395 unsigned char raw;
Sinan Divarci 0:4a2754e462db 396 struct {
Sinan Divarci 0:4a2754e462db 397 unsigned char month : 4;
Sinan Divarci 0:4a2754e462db 398 unsigned char month_10 : 1;
Sinan Divarci 0:4a2754e462db 399 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 400 unsigned char am6 : 1;
Sinan Divarci 0:4a2754e462db 401 unsigned char am5 : 1;
Sinan Divarci 0:4a2754e462db 402 } bits;
Sinan Divarci 0:4a2754e462db 403 struct {
Sinan Divarci 0:4a2754e462db 404 unsigned char value : 5;
Sinan Divarci 0:4a2754e462db 405 unsigned char : 3;
Sinan Divarci 0:4a2754e462db 406 } bcd;
Sinan Divarci 0:4a2754e462db 407 } max3133x_alm_mon_reg_t;
Sinan Divarci 0:4a2754e462db 408
Sinan Divarci 0:4a2754e462db 409 /**
Sinan Divarci 0:4a2754e462db 410 * @brief ALM_YEAR Register
Sinan Divarci 0:4a2754e462db 411 */
Sinan Divarci 0:4a2754e462db 412 typedef union {
Sinan Divarci 0:4a2754e462db 413 unsigned char raw;
Sinan Divarci 0:4a2754e462db 414 struct {
Sinan Divarci 0:4a2754e462db 415 unsigned char year : 4;
Sinan Divarci 0:4a2754e462db 416 unsigned char year_10 : 4;
Sinan Divarci 0:4a2754e462db 417 } bits;
Sinan Divarci 0:4a2754e462db 418 struct {
Sinan Divarci 0:4a2754e462db 419 unsigned char value : 8;
Sinan Divarci 0:4a2754e462db 420 } bcd;
Sinan Divarci 0:4a2754e462db 421 } max3133x_alm_year_reg_t;
Sinan Divarci 0:4a2754e462db 422
Sinan Divarci 0:4a2754e462db 423 /**
Sinan Divarci 0:4a2754e462db 424 * @brief PWR_MGMT Register
Sinan Divarci 0:4a2754e462db 425 */
Sinan Divarci 0:4a2754e462db 426 typedef union {
Sinan Divarci 0:4a2754e462db 427 unsigned char raw;
Sinan Divarci 0:4a2754e462db 428 struct {
Sinan Divarci 0:4a2754e462db 429 unsigned char manual_sel : 1;
Sinan Divarci 0:4a2754e462db 430 unsigned char vback_sel : 1;
Sinan Divarci 0:4a2754e462db 431 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 432 unsigned char en_vbat_detect : 1;
Sinan Divarci 0:4a2754e462db 433 unsigned char : 4;
Sinan Divarci 0:4a2754e462db 434 } bits;
Sinan Divarci 0:4a2754e462db 435 } max3133x_pwr_mgmt_reg_t;
Sinan Divarci 0:4a2754e462db 436
Sinan Divarci 0:4a2754e462db 437 /**
Sinan Divarci 0:4a2754e462db 438 * @brief TRICKLE_REG Register
Sinan Divarci 0:4a2754e462db 439 */
Sinan Divarci 0:4a2754e462db 440 typedef union {
Sinan Divarci 0:4a2754e462db 441 unsigned char raw;
Sinan Divarci 0:4a2754e462db 442 struct {
Sinan Divarci 0:4a2754e462db 443 unsigned char en_trickle : 1;
Sinan Divarci 0:4a2754e462db 444 unsigned char trickle : 3;
Sinan Divarci 0:4a2754e462db 445 unsigned char : 4;
Sinan Divarci 0:4a2754e462db 446 } bits;
Sinan Divarci 0:4a2754e462db 447 } max3133x_trickle_reg_reg_t;
Sinan Divarci 0:4a2754e462db 448
Sinan Divarci 0:4a2754e462db 449 /**
Sinan Divarci 0:4a2754e462db 450 * @brief OFFSET_HIGH Register
Sinan Divarci 0:4a2754e462db 451 */
Sinan Divarci 0:4a2754e462db 452 typedef union {
Sinan Divarci 0:4a2754e462db 453 unsigned char raw;
Sinan Divarci 0:4a2754e462db 454 struct {
Sinan Divarci 0:4a2754e462db 455 unsigned char compword;
Sinan Divarci 0:4a2754e462db 456 } bits;
Sinan Divarci 0:4a2754e462db 457 } max3133x_offset_high_reg_t;
Sinan Divarci 0:4a2754e462db 458
Sinan Divarci 0:4a2754e462db 459 /**
Sinan Divarci 0:4a2754e462db 460 * @brief OFFSET_LOW Register
Sinan Divarci 0:4a2754e462db 461 */
Sinan Divarci 0:4a2754e462db 462 typedef union {
Sinan Divarci 0:4a2754e462db 463 unsigned char raw;
Sinan Divarci 0:4a2754e462db 464 struct {
Sinan Divarci 0:4a2754e462db 465 unsigned char compword;
Sinan Divarci 0:4a2754e462db 466 } bits;
Sinan Divarci 0:4a2754e462db 467 } max3133x_offset_low_reg_t;
Sinan Divarci 0:4a2754e462db 468
Sinan Divarci 0:4a2754e462db 469 /**
Sinan Divarci 0:4a2754e462db 470 * @brief TS_SEC_1_128 Register
Sinan Divarci 0:4a2754e462db 471 */
Sinan Divarci 0:4a2754e462db 472 typedef union {
Sinan Divarci 0:4a2754e462db 473 unsigned char raw;
Sinan Divarci 0:4a2754e462db 474 struct {
Sinan Divarci 0:4a2754e462db 475 unsigned char _1_128s : 1;
Sinan Divarci 0:4a2754e462db 476 unsigned char _1_64s : 1;
Sinan Divarci 0:4a2754e462db 477 unsigned char _1_32s : 1;
Sinan Divarci 0:4a2754e462db 478 unsigned char _1_16s : 1;
Sinan Divarci 0:4a2754e462db 479 unsigned char _1_8s : 1;
Sinan Divarci 0:4a2754e462db 480 unsigned char _1_4s : 1;
Sinan Divarci 0:4a2754e462db 481 unsigned char _1_2s : 1;
Sinan Divarci 0:4a2754e462db 482 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 483 } bits;
Sinan Divarci 0:4a2754e462db 484 } max3133x_ts_sec_1_128_reg_t;
Sinan Divarci 0:4a2754e462db 485
Sinan Divarci 0:4a2754e462db 486 /**
Sinan Divarci 0:4a2754e462db 487 * @brief TS_SEC Register
Sinan Divarci 0:4a2754e462db 488 */
Sinan Divarci 0:4a2754e462db 489 typedef union {
Sinan Divarci 0:4a2754e462db 490 unsigned char raw;
Sinan Divarci 0:4a2754e462db 491 struct {
Sinan Divarci 0:4a2754e462db 492 unsigned char sec : 4;
Sinan Divarci 0:4a2754e462db 493 unsigned char sec_10 : 3;
Sinan Divarci 0:4a2754e462db 494 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 495 } bits;
Sinan Divarci 0:4a2754e462db 496 struct {
Sinan Divarci 0:4a2754e462db 497 unsigned char value : 7;
Sinan Divarci 0:4a2754e462db 498 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 499 } bcd;
Sinan Divarci 0:4a2754e462db 500 } max3133x_ts_sec_reg_t;
Sinan Divarci 0:4a2754e462db 501
Sinan Divarci 0:4a2754e462db 502 /**
Sinan Divarci 0:4a2754e462db 503 * @brief TS_MIN Register
Sinan Divarci 0:4a2754e462db 504 */
Sinan Divarci 0:4a2754e462db 505 typedef union {
Sinan Divarci 0:4a2754e462db 506 unsigned char raw;
Sinan Divarci 0:4a2754e462db 507 struct {
Sinan Divarci 0:4a2754e462db 508 unsigned char min : 4;
Sinan Divarci 0:4a2754e462db 509 unsigned char min_10 : 3;
Sinan Divarci 0:4a2754e462db 510 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 511 } bits;
Sinan Divarci 0:4a2754e462db 512 struct {
Sinan Divarci 0:4a2754e462db 513 unsigned char value : 7;
Sinan Divarci 0:4a2754e462db 514 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 515 } bcd;
Sinan Divarci 0:4a2754e462db 516 } max3133x_ts_min_reg_t;
Sinan Divarci 0:4a2754e462db 517
Sinan Divarci 0:4a2754e462db 518 /**
Sinan Divarci 0:4a2754e462db 519 * @brief TS_HOUR Register
Sinan Divarci 0:4a2754e462db 520 */
Sinan Divarci 0:4a2754e462db 521 typedef union {
Sinan Divarci 0:4a2754e462db 522 unsigned char raw;
Sinan Divarci 0:4a2754e462db 523 struct {
Sinan Divarci 0:4a2754e462db 524 unsigned char hour : 4;
Sinan Divarci 0:4a2754e462db 525 unsigned char hr_10 : 1;
Sinan Divarci 0:4a2754e462db 526 unsigned char am_pm : 1;
Sinan Divarci 0:4a2754e462db 527 unsigned char f_24_12 : 1;
Sinan Divarci 0:4a2754e462db 528 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 529 } bits_12hr;
Sinan Divarci 0:4a2754e462db 530 struct {
Sinan Divarci 0:4a2754e462db 531 unsigned char value : 5;
Sinan Divarci 0:4a2754e462db 532 unsigned char : 3;
Sinan Divarci 0:4a2754e462db 533 } bcd_12hr;
Sinan Divarci 0:4a2754e462db 534 struct {
Sinan Divarci 0:4a2754e462db 535 unsigned char hour : 4;
Sinan Divarci 0:4a2754e462db 536 unsigned char hr_10 : 2;
Sinan Divarci 0:4a2754e462db 537 unsigned char f_24_12 : 1;
Sinan Divarci 0:4a2754e462db 538 unsigned char : 1;
Sinan Divarci 0:4a2754e462db 539 } bits_24hr;
Sinan Divarci 0:4a2754e462db 540 struct {
Sinan Divarci 0:4a2754e462db 541 unsigned char value : 6;
Sinan Divarci 0:4a2754e462db 542 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 543 } bcd_24hr;
Sinan Divarci 0:4a2754e462db 544 } max3133x_ts_hour_reg_t;
Sinan Divarci 0:4a2754e462db 545
Sinan Divarci 0:4a2754e462db 546 /**
Sinan Divarci 0:4a2754e462db 547 * @brief TS_DATE Register
Sinan Divarci 0:4a2754e462db 548 */
Sinan Divarci 0:4a2754e462db 549 typedef union {
Sinan Divarci 0:4a2754e462db 550 unsigned char raw;
Sinan Divarci 0:4a2754e462db 551 struct {
Sinan Divarci 0:4a2754e462db 552 unsigned char date : 4;
Sinan Divarci 0:4a2754e462db 553 unsigned char date_10 : 2;
Sinan Divarci 0:4a2754e462db 554 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 555 } bits;
Sinan Divarci 0:4a2754e462db 556 struct {
Sinan Divarci 0:4a2754e462db 557 unsigned char value : 6;
Sinan Divarci 0:4a2754e462db 558 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 559 } bcd;
Sinan Divarci 0:4a2754e462db 560 } max3133x_ts_date_reg_t;
Sinan Divarci 0:4a2754e462db 561
Sinan Divarci 0:4a2754e462db 562 /**
Sinan Divarci 0:4a2754e462db 563 * @brief TS_MONTH Register
Sinan Divarci 0:4a2754e462db 564 */
Sinan Divarci 0:4a2754e462db 565 typedef union {
Sinan Divarci 0:4a2754e462db 566 unsigned char raw;
Sinan Divarci 0:4a2754e462db 567 struct {
Sinan Divarci 0:4a2754e462db 568 unsigned char month : 4;
Sinan Divarci 0:4a2754e462db 569 unsigned char month_10 : 1;
Sinan Divarci 0:4a2754e462db 570 unsigned char : 2;
Sinan Divarci 0:4a2754e462db 571 unsigned char century : 1;
Sinan Divarci 0:4a2754e462db 572 } bits;
Sinan Divarci 0:4a2754e462db 573 struct {
Sinan Divarci 0:4a2754e462db 574 unsigned char value : 5;
Sinan Divarci 0:4a2754e462db 575 unsigned char : 3;
Sinan Divarci 0:4a2754e462db 576 } bcd;
Sinan Divarci 0:4a2754e462db 577 } max3133x_ts_month_reg_t;
Sinan Divarci 0:4a2754e462db 578
Sinan Divarci 0:4a2754e462db 579 /**
Sinan Divarci 0:4a2754e462db 580 * @brief TS_YEAR Register
Sinan Divarci 0:4a2754e462db 581 */
Sinan Divarci 0:4a2754e462db 582 typedef union {
Sinan Divarci 0:4a2754e462db 583 unsigned char raw;
Sinan Divarci 0:4a2754e462db 584 struct {
Sinan Divarci 0:4a2754e462db 585 unsigned char year : 4;
Sinan Divarci 0:4a2754e462db 586 unsigned char year_10 : 4;
Sinan Divarci 0:4a2754e462db 587 } bits;
Sinan Divarci 0:4a2754e462db 588 struct {
Sinan Divarci 0:4a2754e462db 589 unsigned char value : 8;
Sinan Divarci 0:4a2754e462db 590 } bcd;
Sinan Divarci 0:4a2754e462db 591 } max3133x_ts_year_reg_t;
Sinan Divarci 0:4a2754e462db 592
Sinan Divarci 0:4a2754e462db 593 /**
Sinan Divarci 0:4a2754e462db 594 * @brief TS_FLAGS Register
Sinan Divarci 0:4a2754e462db 595 */
Sinan Divarci 0:4a2754e462db 596 typedef union {
Sinan Divarci 0:4a2754e462db 597 unsigned char raw;
Sinan Divarci 0:4a2754e462db 598 struct {
Sinan Divarci 0:4a2754e462db 599 unsigned char dinf : 1;
Sinan Divarci 0:4a2754e462db 600 unsigned char vccf : 1;
Sinan Divarci 0:4a2754e462db 601 unsigned char vbatf : 1;
Sinan Divarci 0:4a2754e462db 602 unsigned char vlowf : 1;
Sinan Divarci 0:4a2754e462db 603 unsigned char : 4;
Sinan Divarci 0:4a2754e462db 604 } bits;
Sinan Divarci 0:4a2754e462db 605 } max3133x_ts_flags_reg_t;
Sinan Divarci 0:4a2754e462db 606
Sinan Divarci 0:4a2754e462db 607 typedef struct {
Sinan Divarci 0:4a2754e462db 608 max3133x_seconds_1_128_reg_t seconds_1_128_reg;
Sinan Divarci 0:4a2754e462db 609 max3133x_seconds_reg_t seconds_reg;
Sinan Divarci 0:4a2754e462db 610 max3133x_minutes_reg_t minutes_reg;
Sinan Divarci 0:4a2754e462db 611 max3133x_hours_reg_t hours_reg;
Sinan Divarci 0:4a2754e462db 612 max3133x_day_reg_t day_reg;
Sinan Divarci 0:4a2754e462db 613 max3133x_date_reg_t date_reg;
Sinan Divarci 0:4a2754e462db 614 max3133x_month_reg_t month_reg;
Sinan Divarci 0:4a2754e462db 615 max3133x_year_reg_t year_reg;
Sinan Divarci 0:4a2754e462db 616 } max3133x_rtc_time_regs_t;
Sinan Divarci 0:4a2754e462db 617
Sinan Divarci 0:4a2754e462db 618 typedef struct {
Sinan Divarci 0:4a2754e462db 619 max3133x_alm_sec_reg_t sec;
Sinan Divarci 0:4a2754e462db 620 max3133x_alm_min_reg_t min;
Sinan Divarci 0:4a2754e462db 621 max3133x_alm_hrs_reg_t hrs;
Sinan Divarci 0:4a2754e462db 622 max3133x_alm_day_date_reg_t day_date;
Sinan Divarci 0:4a2754e462db 623 max3133x_alm_mon_reg_t mon;
Sinan Divarci 0:4a2754e462db 624 max3133x_alm_year_reg_t year;
Sinan Divarci 0:4a2754e462db 625 }max3133x_alarm_regs_t;
Sinan Divarci 0:4a2754e462db 626
Sinan Divarci 0:4a2754e462db 627 typedef struct {
Sinan Divarci 0:4a2754e462db 628 max3133x_ts_sec_1_128_reg_t ts_sec_1_128_reg;
Sinan Divarci 0:4a2754e462db 629 max3133x_ts_sec_reg_t ts_sec_reg;
Sinan Divarci 0:4a2754e462db 630 max3133x_ts_min_reg_t ts_min_reg;
Sinan Divarci 0:4a2754e462db 631 max3133x_ts_hour_reg_t ts_hour_reg;
Sinan Divarci 0:4a2754e462db 632 max3133x_ts_date_reg_t ts_date_reg;
Sinan Divarci 0:4a2754e462db 633 max3133x_ts_month_reg_t ts_month_reg;
Sinan Divarci 0:4a2754e462db 634 max3133x_ts_year_reg_t ts_year_reg;
Sinan Divarci 0:4a2754e462db 635 max3133x_ts_flags_reg_t ts_flags_reg;
Sinan Divarci 0:4a2754e462db 636 }max3133x_ts_regs_t;
Sinan Divarci 0:4a2754e462db 637
Sinan Divarci 0:4a2754e462db 638 enum max31331_register_address {
Sinan Divarci 0:4a2754e462db 639 /*RTC REG*/
Sinan Divarci 0:4a2754e462db 640 MAX31331_STATUS = 0x00,
Sinan Divarci 0:4a2754e462db 641 MAX31331_INT_EN = 0x01,
Sinan Divarci 0:4a2754e462db 642 MAX31331_RTC_RESET = 0x02,
Sinan Divarci 0:4a2754e462db 643 MAX31331_RTC_CONFIG1 = 0x03,
Sinan Divarci 0:4a2754e462db 644 MAX31331_RTC_CONFIG2 = 0x04,
Sinan Divarci 0:4a2754e462db 645 MAX31331_TIMESTAMP_CONFIG = 0x05,
Sinan Divarci 0:4a2754e462db 646 MAX31331_TIMER_CONFIG = 0x06,
Sinan Divarci 0:4a2754e462db 647 MAX31331_SECONDS_1_128 = 0x07,
Sinan Divarci 0:4a2754e462db 648 MAX31331_SECONDS = 0x08,
Sinan Divarci 0:4a2754e462db 649 MAX31331_MINUTES = 0x09,
Sinan Divarci 0:4a2754e462db 650 MAX31331_HOURS = 0x0A,
Sinan Divarci 0:4a2754e462db 651 MAX31331_DAY = 0x0B,
Sinan Divarci 0:4a2754e462db 652 MAX31331_DATE = 0x0C,
Sinan Divarci 0:4a2754e462db 653 MAX31331_MONTH = 0x0D,
Sinan Divarci 0:4a2754e462db 654 MAX31331_YEAR = 0x0E,
Sinan Divarci 0:4a2754e462db 655 MAX31331_ALM1_SEC = 0x0F,
Sinan Divarci 0:4a2754e462db 656 MAX31331_ALM1_MIN = 0x10,
Sinan Divarci 0:4a2754e462db 657 MAX31331_ALM1_HRS = 0x11,
Sinan Divarci 0:4a2754e462db 658 MAX31331_ALM1_DAY_DATE = 0x12,
Sinan Divarci 0:4a2754e462db 659 MAX31331_ALM1_MON = 0x13,
Sinan Divarci 0:4a2754e462db 660 MAX31331_ALM1_YEAR = 0x14,
Sinan Divarci 0:4a2754e462db 661 MAX31331_ALM2_MIN = 0x15,
Sinan Divarci 0:4a2754e462db 662 MAX31331_ALM2_HRS = 0x16,
Sinan Divarci 0:4a2754e462db 663 MAX31331_ALM2_DAY_DATE = 0x17,
Sinan Divarci 0:4a2754e462db 664 MAX31331_TIMER_COUNT = 0x18,
Sinan Divarci 0:4a2754e462db 665 MAX31331_TIMER_INIT = 0x19,
Sinan Divarci 0:4a2754e462db 666 MAX31331_PWR_MGMT = 0x1A,
Sinan Divarci 0:4a2754e462db 667 MAX31331_TRICKLE_REG = 0x1B,
Sinan Divarci 0:4a2754e462db 668 MAX31331_OFFSET_HIGH = 0x1D,
Sinan Divarci 0:4a2754e462db 669 MAX31331_OFFSET_LOW = 0x1E,
Sinan Divarci 0:4a2754e462db 670 /*TS_RAM_REG*/
Sinan Divarci 0:4a2754e462db 671 MAX31331_TS0_SEC_1_128 = 0x20,
Sinan Divarci 0:4a2754e462db 672 MAX31331_TS0_SEC = 0x21,
Sinan Divarci 0:4a2754e462db 673 MAX31331_TS0_MIN = 0x22,
Sinan Divarci 0:4a2754e462db 674 MAX31331_TS0_HOUR = 0x23,
Sinan Divarci 0:4a2754e462db 675 MAX31331_TS0_DATE = 0x24,
Sinan Divarci 0:4a2754e462db 676 MAX31331_TS0_MONTH = 0x25,
Sinan Divarci 0:4a2754e462db 677 MAX31331_TS0_YEAR = 0x26,
Sinan Divarci 0:4a2754e462db 678 MAX31331_TS0_FLAGS = 0x27,
Sinan Divarci 0:4a2754e462db 679 MAX31331_TS1_SEC_1_128 = 0x28,
Sinan Divarci 0:4a2754e462db 680 MAX31331_TS1_SEC = 0x29,
Sinan Divarci 0:4a2754e462db 681 MAX31331_TS1_MIN = 0x2A,
Sinan Divarci 0:4a2754e462db 682 MAX31331_TS1_HOUR = 0x2B,
Sinan Divarci 0:4a2754e462db 683 MAX31331_TS1_DATE = 0x2C,
Sinan Divarci 0:4a2754e462db 684 MAX31331_TS1_MONTH = 0x2D,
Sinan Divarci 0:4a2754e462db 685 MAX31331_TS1_YEAR = 0x2E,
Sinan Divarci 0:4a2754e462db 686 MAX31331_TS1_FLAGS = 0x2F,
Sinan Divarci 0:4a2754e462db 687 MAX31331_TS2_SEC_1_128 = 0x30,
Sinan Divarci 0:4a2754e462db 688 MAX31331_TS2_SEC = 0x31,
Sinan Divarci 0:4a2754e462db 689 MAX31331_TS2_MIN = 0x32,
Sinan Divarci 0:4a2754e462db 690 MAX31331_TS2_HOUR = 0x33,
Sinan Divarci 0:4a2754e462db 691 MAX31331_TS2_DATE = 0x34,
Sinan Divarci 0:4a2754e462db 692 MAX31331_TS2_MONTH = 0x35,
Sinan Divarci 0:4a2754e462db 693 MAX31331_TS2_YEAR = 0x36,
Sinan Divarci 0:4a2754e462db 694 MAX31331_TS2_FLAGS = 0x37,
Sinan Divarci 0:4a2754e462db 695 MAX31331_TS3_SEC_1_128 = 0x38,
Sinan Divarci 0:4a2754e462db 696 MAX31331_TS3_SEC = 0x39,
Sinan Divarci 0:4a2754e462db 697 MAX31331_TS3_MIN = 0x3A,
Sinan Divarci 0:4a2754e462db 698 MAX31331_TS3_HOUR = 0x3B,
Sinan Divarci 0:4a2754e462db 699 MAX31331_TS3_DATE = 0x3C,
Sinan Divarci 0:4a2754e462db 700 MAX31331_TS3_MONTH = 0x3D,
Sinan Divarci 0:4a2754e462db 701 MAX31331_TS3_YEAR = 0x3E,
Sinan Divarci 0:4a2754e462db 702 MAX31331_TS3_FLAGS = 0x3F,
Sinan Divarci 0:4a2754e462db 703 MAX31331_END,
Sinan Divarci 0:4a2754e462db 704 };
Sinan Divarci 0:4a2754e462db 705
Sinan Divarci 0:4a2754e462db 706 enum max31334_register_address {
Sinan Divarci 0:4a2754e462db 707 /*RTC REG*/
Sinan Divarci 0:4a2754e462db 708 MAX31334_STATUS = 0x00,
Sinan Divarci 0:4a2754e462db 709 MAX31334_INT_EN = 0x01,
Sinan Divarci 0:4a2754e462db 710 MAX31334_RTC_RESET = 0x02,
Sinan Divarci 0:4a2754e462db 711 MAX31334_RTC_CONFIG1 = 0x03,
Sinan Divarci 0:4a2754e462db 712 MAX31334_RTC_CONFIG2 = 0x04,
Sinan Divarci 0:4a2754e462db 713 MAX31334_TIMESTAMP_CONFIG = 0x05,
Sinan Divarci 0:4a2754e462db 714 MAX31334_TIMER_CONFIG = 0x06,
Sinan Divarci 0:4a2754e462db 715 MAX31334_SLEEP_CONFIG = 0x07,
Sinan Divarci 0:4a2754e462db 716 MAX31334_SECONDS_1_128 = 0x08,
Sinan Divarci 0:4a2754e462db 717 MAX31334_SECONDS = 0x09,
Sinan Divarci 0:4a2754e462db 718 MAX31334_MINUTES = 0x0A,
Sinan Divarci 0:4a2754e462db 719 MAX31334_HOURS = 0x0B,
Sinan Divarci 0:4a2754e462db 720 MAX31334_DAY = 0x0C,
Sinan Divarci 0:4a2754e462db 721 MAX31334_DATE = 0x0D,
Sinan Divarci 0:4a2754e462db 722 MAX31334_MONTH = 0x0E,
Sinan Divarci 0:4a2754e462db 723 MAX31334_YEAR = 0x0F,
Sinan Divarci 0:4a2754e462db 724 MAX31334_ALM1_SEC = 0x10,
Sinan Divarci 0:4a2754e462db 725 MAX31334_ALM1_MIN = 0x11,
Sinan Divarci 0:4a2754e462db 726 MAX31334_ALM1_HRS = 0x12,
Sinan Divarci 0:4a2754e462db 727 MAX31334_ALM1_DAY_DATE = 0x13,
Sinan Divarci 0:4a2754e462db 728 MAX31334_ALM1_MON = 0x14,
Sinan Divarci 0:4a2754e462db 729 MAX31334_ALM1_YEAR = 0x15,
Sinan Divarci 0:4a2754e462db 730 MAX31334_ALM2_MIN = 0x16,
Sinan Divarci 0:4a2754e462db 731 MAX31334_ALM2_HRS = 0x17,
Sinan Divarci 0:4a2754e462db 732 MAX31334_ALM2_DAY_DATE = 0x18,
Sinan Divarci 0:4a2754e462db 733 MAX31334_TIMER_COUNT2 = 0x19,
Sinan Divarci 0:4a2754e462db 734 MAX31334_TIMER_COUNT1 = 0x1A,
Sinan Divarci 0:4a2754e462db 735 MAX31334_TIMER_INIT2 = 0x1B,
Sinan Divarci 0:4a2754e462db 736 MAX31334_TIMER_INIT1 = 0x1C,
Sinan Divarci 0:4a2754e462db 737 MAX31334_PWR_MGMT = 0x1D,
Sinan Divarci 0:4a2754e462db 738 MAX31334_TRICKLE_REG = 0x1E,
Sinan Divarci 0:4a2754e462db 739 MAX31334_OFFSET_HIGH = 0x20,
Sinan Divarci 0:4a2754e462db 740 MAX31334_OFFSET_LOW = 0x21,
Sinan Divarci 0:4a2754e462db 741 /*TS_RAM_REG*/
Sinan Divarci 0:4a2754e462db 742 MAX31334_TS0_SEC_1_128 = 0x30,
Sinan Divarci 0:4a2754e462db 743 MAX31334_TS0_SEC = 0x31,
Sinan Divarci 0:4a2754e462db 744 MAX31334_TS0_MIN = 0x32,
Sinan Divarci 0:4a2754e462db 745 MAX31334_TS0_HOUR = 0x33,
Sinan Divarci 0:4a2754e462db 746 MAX31334_TS0_DATE = 0x34,
Sinan Divarci 0:4a2754e462db 747 MAX31334_TS0_MONTH = 0x35,
Sinan Divarci 0:4a2754e462db 748 MAX31334_TS0_YEAR = 0x36,
Sinan Divarci 0:4a2754e462db 749 MAX31334_TS0_FLAGS = 0x37,
Sinan Divarci 0:4a2754e462db 750 MAX31334_TS1_SEC_1_128 = 0x38,
Sinan Divarci 0:4a2754e462db 751 MAX31334_TS1_SEC = 0x39,
Sinan Divarci 0:4a2754e462db 752 MAX31334_TS1_MIN = 0x3A,
Sinan Divarci 0:4a2754e462db 753 MAX31334_TS1_HOUR = 0x3B,
Sinan Divarci 0:4a2754e462db 754 MAX31334_TS1_DATE = 0x3C,
Sinan Divarci 0:4a2754e462db 755 MAX31334_TS1_MONTH = 0x3D,
Sinan Divarci 0:4a2754e462db 756 MAX31334_TS1_YEAR = 0x3E,
Sinan Divarci 0:4a2754e462db 757 MAX31334_TS1_FLAGS = 0x3F,
Sinan Divarci 0:4a2754e462db 758 MAX31334_TS2_SEC_1_128 = 0x40,
Sinan Divarci 0:4a2754e462db 759 MAX31334_TS2_SEC = 0x41,
Sinan Divarci 0:4a2754e462db 760 MAX31334_TS2_MIN = 0x42,
Sinan Divarci 0:4a2754e462db 761 MAX31334_TS2_HOUR = 0x43,
Sinan Divarci 0:4a2754e462db 762 MAX31334_TS2_DATE = 0x44,
Sinan Divarci 0:4a2754e462db 763 MAX31334_TS2_MONTH = 0x45,
Sinan Divarci 0:4a2754e462db 764 MAX31334_TS2_YEAR = 0x46,
Sinan Divarci 0:4a2754e462db 765 MAX31334_TS2_FLAGS = 0x47,
Sinan Divarci 0:4a2754e462db 766 MAX31334_TS3_SEC_1_128 = 0x48,
Sinan Divarci 0:4a2754e462db 767 MAX31334_TS3_SEC = 0x49,
Sinan Divarci 0:4a2754e462db 768 MAX31334_TS3_MIN = 0x4A,
Sinan Divarci 0:4a2754e462db 769 MAX31334_TS3_HOUR = 0x4B,
Sinan Divarci 0:4a2754e462db 770 MAX31334_TS3_DATE = 0x4C,
Sinan Divarci 0:4a2754e462db 771 MAX31334_TS3_MONTH = 0x4D,
Sinan Divarci 0:4a2754e462db 772 MAX31334_TS3_YEAR = 0x4E,
Sinan Divarci 0:4a2754e462db 773 MAX31334_TS3_FLAGS = 0x4F,
Sinan Divarci 0:4a2754e462db 774 MAX31334_END,
Sinan Divarci 0:4a2754e462db 775 };
Sinan Divarci 0:4a2754e462db 776
Sinan Divarci 0:4a2754e462db 777 #endif /* MAX3133X_REGS_HPP_ */