SIMO PMIC with 300mA Switching Charger

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reg_intm_glbl1_t Union Reference

reg_intm_glbl1_t Union Reference

INTM_GLBL1 Register. More...

#include <MAX77659_regs.h>


Detailed Description

INTM_GLBL1 Register.

Address : 0x08

Definition at line 180 of file MAX77659_regs.h.


Field Documentation

unsigned char gpi1_fm

GPI Falling Interrupt Mask.

Bit 0. 0 = Unmasked. If GPI_F goes from 0 to 1, then nIRQ goes low. nIRQ goes high when all interrupt bits are cleared. 1 = Masked. nIRQ does not go low due to GPI_F.

Definition at line 183 of file MAX77659_regs.h.

unsigned char gpi1_rm

GPI Rising Interrupt Mask.

Bit 1. 0 = Unmasked. If GPI_R goes from 0 to 1, then nIRQ goes low. nIRQ goes high when all interrupt bits are cleared. 1 = Masked. nIRQ does not go low due to GPI_R.

Definition at line 187 of file MAX77659_regs.h.

unsigned char ldo_m

LDO0 Fault Interrupt.

Bit 5. 0 = Unmasked. If LDO0_F goes from 0 to 1, then nIRQ goes low. nIRQ goes high when all interrupt bits are cleared. 1 = Masked. nIRQ does not go low due to LDO0_F.

Definition at line 196 of file MAX77659_regs.h.

unsigned char rsvd1

Reserved.

Unutilized bit. Write to 0. Reads are don't care. Bit 3:2.

Definition at line 191 of file MAX77659_regs.h.

unsigned char rsvd2

Reserved.

Unutilized bit. Write to 0. Reads are don't care. Bit 7:6.

Definition at line 200 of file MAX77659_regs.h.

unsigned char sbb_to_m

SBB Timeout Mask.

Bit 4. 0 = Unmasked. If SBB_TO goes from 0 to 1, then nIRQ goes low. nIRQ goes high when all interrupt bits are cleared. 1 = Masked. nIRQ does not go low due to SBB_TO

Definition at line 192 of file MAX77659_regs.h.