Host software for the MAX30001 ECG, PACE, biopotential, bioimpedance, R-to-R peak sensor. Hosted on the MAX32630FTHR.
Dependencies: SDFileSystem USBDevice max32630fthr
Fork of MAX30001-MAX32630FTHR-ECG-EVKIT by
HSP/Interfaces/QuadSpiInterface.cpp@13:6031b0bd9773, 2018-07-24 (annotated)
- Committer:
- Emre.Eken
- Date:
- Tue Jul 24 15:22:35 2018 +0300
- Revision:
- 13:6031b0bd9773
- Parent:
- 0:8e4630a71eb1
.hgtags is added.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 1 | /******************************************************************************* |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 3 | * |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 5 | * copy of this software and associated documentation files (the "Software"), |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 6 | * to deal in the Software without restriction, including without limitation |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 9 | * Software is furnished to do so, subject to the following conditions: |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 10 | * |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 11 | * The above copyright notice and this permission notice shall be included |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 12 | * in all copies or substantial portions of the Software. |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 13 | * |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 21 | * |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 22 | * Except as contained in this notice, the name of Maxim Integrated |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 24 | * Products, Inc. Branding Policy. |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 25 | * |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 26 | * The mere transfer of this software does not imply any licenses |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 28 | * trademarks, maskwork rights, or any other form of intellectual |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 30 | * ownership rights. |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 31 | ******************************************************************************* |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 32 | */ |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 33 | #include "QuadSpiInterface.h" |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 34 | |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 35 | /** |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 36 | * @brief Constructor that accepts pin names for the QUAD SPI interface |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 37 | * @param mosi master out slave in pin name |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 38 | * @param miso master in slave out pin name |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 39 | * @param sclk serial clock pin name |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 40 | * @param cs chip select pin name |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 41 | */ |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 42 | QuadSpiInterface::QuadSpiInterface(PinName mosi, PinName miso, PinName sclk, |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 43 | PinName cs) |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 44 | : spi(mosi, miso, sclk), csPin(cs) { |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 45 | |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 46 | } |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 47 | |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 48 | /** |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 49 | * @brief Transmit and recieve QUAD SPI data |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 50 | * @param tx_buf pointer to transmit byte buffer |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 51 | * @param tx_size number of bytes to transmit |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 52 | * @param rx_buf pointer to the recieve buffer |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 53 | * @param rx_size number of bytes to recieve |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 54 | * @param last flag to indicate if this is the last QUAD SPI transaction for the |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 55 | * current chip select cycle |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 56 | */ |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 57 | int QuadSpiInterface::SPI_Transmit(const uint8_t *tx_buf, uint32_t tx_size, |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 58 | uint8_t *rx_buf, uint32_t rx_size, |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 59 | int last) { |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 60 | uint32_t i; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 61 | int result = 0; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 62 | int index = 0; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 63 | // lower chip select |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 64 | csPin = 0; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 65 | // write bytes out QUAD SPI |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 66 | spi.setQuadMode(); |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 67 | for (i = 0; i < tx_size; i++) { |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 68 | rx_buf[index] = spi.write((int)tx_buf[i]); |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 69 | index++; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 70 | } |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 71 | // read in bytes from QUAD SPI |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 72 | for (i = 0; i < rx_size; i++) { |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 73 | rx_buf[index] = (uint8_t)spi.read(); |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 74 | index++; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 75 | } |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 76 | // raise chip select if this is the last transaction |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 77 | if (last) csPin = 1; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 78 | return result; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 79 | } |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 80 | |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 81 | /** |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 82 | * @brief Transmit and recieve QUAD SPI data |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 83 | * @param tx_buf pointer to transmit byte buffer |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 84 | * @param tx_size number of bytes to transmit |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 85 | * @param rx_buf pointer to the recieve buffer |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 86 | * @param rx_size number of bytes to recieve |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 87 | * @param last flag to indicate if this is the last QUAD SPI transaction for the |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 88 | * current chip select cycle |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 89 | */ |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 90 | int QuadSpiInterface::SPI_Transmit4Wire(const uint8_t *tx_buf, uint32_t tx_size, |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 91 | uint8_t *rx_buf, uint32_t rx_size, |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 92 | int last) { |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 93 | uint32_t i; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 94 | int result = 0; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 95 | int index = 0; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 96 | // lower chip select |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 97 | csPin = 0; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 98 | // write bytes out Single SPI |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 99 | spi.setSingleMode(); |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 100 | for (i = 0; i < tx_size; i++) { |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 101 | rx_buf[index] = spi.write((int)tx_buf[i]); |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 102 | index++; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 103 | } |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 104 | // raise chip select if this is the last transaction |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 105 | if (last) csPin = 1; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 106 | return result; |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 107 | } |
Emre.Eken@IST-LT-35101.maxim-ic.internal | 0:8e4630a71eb1 | 108 |