Maxim Integrated / MAX11410

Dependents:   MAX11410BOB_24bit_ADC MAX11410BOB_Serial_Tester

Embed: (wiki syntax)

« Back to documentation index

Show/hide line numbers MAX11410.h Source File

MAX11410.h

00001 // /*******************************************************************************
00002 // * Copyright (C) 2020 Maxim Integrated Products, Inc., All Rights Reserved.
00003 // *
00004 // * Permission is hereby granted, free of charge, to any person obtaining a
00005 // * copy of this software and associated documentation files (the "Software"),
00006 // * to deal in the Software without restriction, including without limitation
00007 // * the rights to use, copy, modify, merge, publish, distribute, sublicense,
00008 // * and/or sell copies of the Software, and to permit persons to whom the
00009 // * Software is furnished to do so, subject to the following conditions:
00010 // *
00011 // * The above copyright notice and this permission notice shall be included
00012 // * in all copies or substantial portions of the Software.
00013 // *
00014 // * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
00015 // * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
00016 // * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
00017 // * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
00018 // * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
00019 // * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
00020 // * OTHER DEALINGS IN THE SOFTWARE.
00021 // *
00022 // * Except as contained in this notice, the name of Maxim Integrated
00023 // * Products, Inc. shall not be used except as stated in the Maxim Integrated
00024 // * Products, Inc. Branding Policy.
00025 // *
00026 // * The mere transfer of this software does not imply any licenses
00027 // * of trade secrets, proprietary technology, copyrights, patents,
00028 // * trademarks, maskwork rights, or any other form of intellectual
00029 // * property whatsoever. Maxim Integrated Products, Inc. retains all
00030 // * ownership rights.
00031 // *******************************************************************************
00032 // */
00033 // *********************************************************************
00034 // @file MAX11410.h
00035 // *********************************************************************
00036 // Header file
00037 // DO NOT EDIT; except areas designated "CUSTOMIZE". Automatically generated file.
00038 // generated by XMLSystemOfDevicesToMBED.py
00039 // System Name = ExampleSystem
00040 // System Description = Device driver example
00041 // Device Name = MAX11410
00042 // Device Description = 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC
00043 // Device DeviceBriefDescription = 24-bit 1.9ksps Delta-Sigma ADC
00044 // Device Manufacturer = Maxim Integrated
00045 // Device PartNumber = MAX11410ATI+
00046 // Device RegValue_Width = DataWidth16bit_HL
00047 //
00048 // ADC MaxOutputDataRate = 1.9ksps
00049 // ADC NumChannels = 10
00050 // ADC ResolutionBits = 24
00051 //
00052 // SPI CS = ActiveLow
00053 // SPI FrameStart = CS
00054 // SPI CPOL = 0
00055 // SPI CPHA = 0
00056 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
00057 // SPI SCLK Idle Low
00058 // SPI SCLKMaxMHz = 8
00059 // SPI SCLKMinMHz = 0
00060 //
00061 
00062 
00063 // Prevent multiple declaration
00064 #ifndef __MAX11410_H__
00065 #define __MAX11410_H__
00066 
00067 // standard include for target platform -- Platform_Include_Boilerplate
00068 #include "mbed.h"
00069 // Platforms:
00070 //   - MAX32625MBED
00071 //      - supports mbed-os-5.11, requires USBDevice library
00072 //      - add https://developer.mbed.org/teams/MaximIntegrated/code/USBDevice/
00073 //      - remove max32630fthr library (if present)
00074 //      - remove MAX32620FTHR library (if present)
00075 //   - MAX32600MBED
00076 //      - remove max32630fthr library (if present)
00077 //      - remove MAX32620FTHR library (if present)
00078 //      - Windows 10 note:  Don't connect HDK until you are ready to load new firmware into the board.
00079 //   - NUCLEO_F446RE
00080 //      - remove USBDevice library
00081 //      - remove max32630fthr library (if present)
00082 //      - remove MAX32620FTHR library (if present)
00083 //   - NUCLEO_F401RE
00084 //      - remove USBDevice library
00085 //      - remove max32630fthr library (if present)
00086 //      - remove MAX32620FTHR library (if present)
00087 //   - MAX32630FTHR
00088 //      - #include "max32630fthr.h"
00089 //      - add http://os.mbed.org/teams/MaximIntegrated/code/max32630fthr/
00090 //      - remove MAX32620FTHR library (if present)
00091 //   - MAX32620FTHR
00092 //      - #include "MAX32620FTHR.h"
00093 //      - remove max32630fthr library (if present)
00094 //      - add https://os.mbed.com/teams/MaximIntegrated/code/MAX32620FTHR/
00095 //      - not tested yet
00096 //   - MAX32625PICO
00097 //      - #include "max32625pico.h"
00098 //      - add https://os.mbed.com/users/switches/code/max32625pico/
00099 //      - remove max32630fthr library (if present)
00100 //      - remove MAX32620FTHR library (if present)
00101 //      - not tested yet
00102 //      - see https://os.mbed.com/users/switches/code/max32625pico/
00103 //      - see https://os.mbed.com/users/switches/code/PICO_board_demo/
00104 //      - see https://os.mbed.com/users/switches/code/PICO_USB_I2C_SPI/
00105 //      - see https://os.mbed.com/users/switches/code/SerialInterface/
00106 //      - Note: To load the MAX32625PICO firmware, hold the button while
00107 //        connecting the USB cable, then copy firmware bin file 
00108 //        to the MAINTENANCE drive.
00109 //      - see https://os.mbed.com/platforms/MAX32625PICO/
00110 //      - see https://os.mbed.com/teams/MaximIntegrated/wiki/MAX32625PICO-Firmware-Updates
00111 //
00112 // end Platform_Include_Boilerplate
00113 
00114 // CODE GENERATOR: conditional defines
00115 // CODE GENERATOR: class declaration and docstrings
00116 /**
00117  * @brief MAX11410 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC
00118  *
00119  *
00120  *
00121  * Datasheet: https://www.maximintegrated.com/MAX11410
00122  *
00123  *
00124  *
00125  * //---------- CODE GENERATOR: helloCppCodeList
00126  * @code
00127  * // CODE GENERATOR: example code includes
00128  *
00129  * // example code includes
00130  * // standard include for target platform -- Platform_Include_Boilerplate
00131  * #include "mbed.h"
00132  * // Platforms:
00133  * //   - MAX32625MBED
00134  * //      - supports mbed-os-5.11, requires USBDevice library
00135  * //      - add https://developer.mbed.org/teams/MaximIntegrated/code/USBDevice/
00136  * //      - remove max32630fthr library (if present)
00137  * //      - remove MAX32620FTHR library (if present)
00138  * //   - MAX32600MBED
00139  * //      - remove max32630fthr library (if present)
00140  * //      - remove MAX32620FTHR library (if present)
00141  * //      - Windows 10 note:  Don't connect HDK until you are ready to load new firmware into the board.
00142  * //   - NUCLEO_F446RE
00143  * //      - remove USBDevice library
00144  * //      - remove max32630fthr library (if present)
00145  * //      - remove MAX32620FTHR library (if present)
00146  * //   - NUCLEO_F401RE
00147  * //      - remove USBDevice library
00148  * //      - remove max32630fthr library (if present)
00149  * //      - remove MAX32620FTHR library (if present)
00150  * //   - MAX32630FTHR
00151  * //      - #include "max32630fthr.h"
00152  * //      - add http://os.mbed.org/teams/MaximIntegrated/code/max32630fthr/
00153  * //      - remove MAX32620FTHR library (if present)
00154  * //   - MAX32620FTHR
00155  * //      - #include "MAX32620FTHR.h"
00156  * //      - remove max32630fthr library (if present)
00157  * //      - add https://os.mbed.com/teams/MaximIntegrated/code/MAX32620FTHR/
00158  * //      - not tested yet
00159  * //   - MAX32625PICO
00160  * //      - #include "max32625pico.h"
00161  * //      - add https://os.mbed.com/users/switches/code/max32625pico/
00162  * //      - remove max32630fthr library (if present)
00163  * //      - remove MAX32620FTHR library (if present)
00164  * //      - not tested yet
00165  * //      - see https://os.mbed.com/users/switches/code/max32625pico/
00166  * //      - see https://os.mbed.com/users/switches/code/PICO_board_demo/
00167  * //      - see https://os.mbed.com/users/switches/code/PICO_USB_I2C_SPI/
00168  * //      - see https://os.mbed.com/users/switches/code/SerialInterface/
00169  * //      - Note: To load the MAX32625PICO firmware, hold the button while
00170  * //        connecting the USB cable, then copy firmware bin file
00171  * //        to the MAINTENANCE drive.
00172  * //      - see https://os.mbed.com/platforms/MAX32625PICO/
00173  * //      - see https://os.mbed.com/teams/MaximIntegrated/wiki/MAX32625PICO-Firmware-Updates
00174  * //
00175  * // end Platform_Include_Boilerplate
00176  * #include "MAX11410.h"
00177  *
00178  * // example code board support
00179  * //MAX32630FTHR pegasus(MAX32630FTHR::VIO_3V3);
00180  * //DigitalOut rLED(LED1);
00181  * //DigitalOut gLED(LED2);
00182  * //DigitalOut bLED(LED3);
00183  * //
00184  * // Arduino "shield" connector port definitions (MAX32625MBED shown)
00185  * #if defined(TARGET_MAX32625MBED)
00186  * #define A0 AIN_0
00187  * #define A1 AIN_1
00188  * #define A2 AIN_2
00189  * #define A3 AIN_3
00190  * #define D0 P0_0
00191  * #define D1 P0_1
00192  * #define D2 P0_2
00193  * #define D3 P0_3
00194  * #define D4 P0_4
00195  * #define D5 P0_5
00196  * #define D6 P0_6
00197  * #define D7 P0_7
00198  * #define D8 P1_4
00199  * #define D9 P1_5
00200  * #define D10 P1_3
00201  * #define D11 P1_1
00202  * #define D12 P1_2
00203  * #define D13 P1_0
00204  * #elif defined(TARGET_MAX32625PICO)
00205  * #warning "TARGET_MAX32625PICO not previously tested; need to define pins..."
00206  * #define A0 AIN_1
00207  * #define A1 AIN_2
00208  * // #define A2 AIN_3
00209  * // #define A3 AIN_0
00210  * #define D0 P0_0
00211  * #define D1 P0_1
00212  * #define D2 P0_2
00213  * #define D3 P0_3
00214  * #define D4 P1_7
00215  * #define D5 P1_6
00216  * #define D6 P4_4
00217  * #define D7 P4_5
00218  * #define D8 P4_6
00219  * #define D9 P4_7
00220  * #define D10 P0_7
00221  * #define D11 P0_6
00222  * #define D12 P0_5
00223  * #define D13 P0_4
00224  * #endif
00225  *
00226  * // example code declare SPI interface (GPIO controlled CS)
00227  * #if defined(TARGET_MAX32625MBED)
00228  * SPI spi(SPI1_MOSI, SPI1_MISO, SPI1_SCK); // mosi, miso, sclk spi1 TARGET_MAX32625MBED: P1_1 P1_2 P1_0 Arduino 10-pin header D11 D12 D13
00229  * DigitalOut spi_cs(SPI1_SS); // TARGET_MAX32625MBED: P1_3 Arduino 10-pin header D10
00230  * #elif defined(TARGET_MAX32625PICO)
00231  * #warning "TARGET_MAX32625PICO not previously tested; need to define pins..."
00232  * SPI spi(SPI0_MOSI, SPI0_MISO, SPI0_SCK); // mosi, miso, sclk spi1 TARGET_MAX32625PICO: pin P0_5 P0_6 P0_4
00233  * DigitalOut spi_cs(SPI0_SS); // TARGET_MAX32625PICO: pin P0_7
00234  * #elif defined(TARGET_MAX32600MBED)
00235  * SPI spi(SPI2_MOSI, SPI2_MISO, SPI2_SCK); // mosi, miso, sclk spi1 TARGET_MAX32600MBED: Arduino 10-pin header D11 D12 D13
00236  * DigitalOut spi_cs(SPI2_SS); // Generic: Arduino 10-pin header D10
00237  * #elif defined(TARGET_NUCLEO_F446RE) || defined(TARGET_NUCLEO_F401RE)
00238  * // TODO1: avoid resource conflict between P5_0, P5_1, P5_2 SPI and DigitalInOut
00239  * // void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
00240  * //
00241  * // TODO1: NUCLEO_F446RE SPI not working; CS and MOSI data looks OK but no SCLK clock pulses.
00242  * SPI spi(SPI_MOSI, SPI_MISO, SPI_SCK); // mosi, miso, sclk spi1 TARGET_NUCLEO_F446RE: Arduino 10-pin header D11 D12 D13
00243  * DigitalOut spi_cs(SPI_CS); // TARGET_NUCLEO_F446RE: PB_6 Arduino 10-pin header D10
00244  * //
00245  * #else
00246  * SPI spi(D11, D12, D13); // mosi, miso, sclk spi1 TARGET_MAX32600MBED: Arduino 10-pin header D11 D12 D13
00247  * DigitalOut spi_cs(D10); // Generic: Arduino 10-pin header D10
00248  * #endif
00249  *
00250  * // example code declare GPIO interface pins
00251  * // example code declare device instance
00252  * MAX11410 g_MAX11410_device(spi, spi_cs, MAX11410::MAX11410_IC);
00253  *
00254  * // CODE GENERATOR: example code for ADC: serial port declaration
00255  * //--------------------------------------------------
00256  * // Declare the Serial driver
00257  * // default baud rate settings are 9600 8N1
00258  * // install device driver from http://developer.mbed.org/media/downloads/drivers/mbedWinSerial_16466.exe
00259  * // see docs https://docs.mbed.com/docs/mbed-os-handbook/en/5.5/getting_started/what_need/
00260  * #if defined(TARGET_MAX32630)
00261  *     #include "USBSerial.h"
00262  * // Hardware serial port over DAPLink
00263  * // The default baud rate for the DapLink UART is 9600
00264  * //Serial DAPLINKserial(P2_1, P2_0);     // tx, rx
00265  * //    #define HAS_DAPLINK_SERIAL 1
00266  * // Virtual serial port over USB
00267  * // The baud rate does not affect the virtual USBSerial UART.
00268  * USBSerial serial;
00269  * //--------------------------------------------------
00270  * #elif defined(TARGET_MAX32625MBED)
00271  *     #include "USBSerial.h"
00272  * // Hardware serial port over DAPLink
00273  * // The default baud rate for the DapLink UART is 9600
00274  * //Serial DAPLINKserial(P2_1, P2_0);     // tx, rx
00275  * //    #define HAS_DAPLINK_SERIAL 1
00276  * // Virtual serial port over USB
00277  * // The baud rate does not affect the virtual USBSerial UART.
00278  * USBSerial serial;
00279  * //--------------------------------------------------
00280  * #elif defined(TARGET_MAX32600)
00281  *     #include "USBSerial.h"
00282  * // Hardware serial port over DAPLink
00283  * // The default baud rate for the DapLink UART is 9600
00284  * Serial DAPLINKserial(P1_1, P1_0);     // tx, rx
00285  *     #define HAS_DAPLINK_SERIAL 1
00286  * // Virtual serial port over USB
00287  * // The baud rate does not affect the virtual USBSerial UART.
00288  * USBSerial serial;
00289  * //--------------------------------------------------
00290  * #elif defined(TARGET_NUCLEO_F446RE) || defined(TARGET_NUCLEO_F401RE)
00291  * Serial serial(SERIAL_TX, SERIAL_RX);     // tx, rx
00292  * //--------------------------------------------------
00293  * #else
00294  * #if defined(SERIAL_TX)
00295  * #warning "target not previously tested; guess serial pins are SERIAL_TX, SERIAL_RX..."
00296  * Serial serial(SERIAL_TX, SERIAL_RX);     // tx, rx
00297  * #elif defined(USBTX)
00298  * #warning "target not previously tested; guess serial pins are USBTX, USBRX..."
00299  * Serial serial(USBTX, USBRX);     // tx, rx
00300  * #elif defined(UART_TX)
00301  * #warning "target not previously tested; guess serial pins are UART_TX, UART_RX..."
00302  * Serial serial(UART_TX, UART_RX);     // tx, rx
00303  * #else
00304  * #warning "target not previously tested; need to define serial pins..."
00305  * #endif
00306  * #endif
00307  * //
00308  * #include "CmdLine.h"
00309  * CmdLine cmdLine(serial, "serial");
00310  *
00311  * // example code main function
00312  * int main()
00313  * {
00314  *     // setup: put your setup code here, to run once
00315  *
00316  *     // example code: serial port banner message
00317  *     wait(3); // 3000ms timing delay function, platform-specific
00318  *     cmdLine.serial().printf("\r\nHello_MAX11410\r\n");
00319  *
00320  *     // CODE GENERATOR: example code: member function Init
00321  *     // Initialize MAX11410 and verify device ID
00322  *     uint32_t g_SPI_SCLK_Hz = 24000000; // platform limit 24MHz intSPI_SCLK_Platform_Max_MHz * 1000000
00323  *     if (g_MAX11410_device.Init() == 0)
00324  *     {  // init failed; try "safe mode" SPI at slower SCLK rate
00325  *         cmdLine.serial().printf("\r\nMAX11410 Init failed; retry at SPI SCLK frequency 2000000 Hz\r\n");
00326  *
00327  *         g_SPI_SCLK_Hz = 2000000;
00328  *         g_MAX11410_device.spi_frequency(2000000);
00329  *         g_MAX11410_device.Init();
00330  *     }
00331  *     // CODE GENERATOR: get spi properties from device
00332  *     if (g_SPI_SCLK_Hz > g_MAX11410_device.get_spi_frequency())
00333  *     {  // Device limits SPI SCLK frequency
00334  *         g_SPI_SCLK_Hz = g_MAX11410_device.get_spi_frequency();
00335  *         cmdLine.serial().printf("\r\nMAX11410 limits SPI SCLK frequency to %ld Hz\r\n", g_SPI_SCLK_Hz);
00336  *
00337  *         g_MAX11410_device.Init();
00338  *     }
00339  *     if (g_MAX11410_device.get_spi_frequency() > g_SPI_SCLK_Hz)
00340  *     {  // Platform limits SPI SCLK frequency
00341  *         g_MAX11410_device.spi_frequency(g_SPI_SCLK_Hz);
00342  *         cmdLine.serial().printf("\r\nPlatform limits MAX11410 SPI SCLK frequency to %ld Hz\r\n", g_SPI_SCLK_Hz);
00343  *
00344  *         g_MAX11410_device.Init();
00345  *     }
00346  *     // g_SPI_dataMode = g_MAX11410_device.get_spi_dataMode();
00347  *     while (g_MAX11410_device.Init() == 0)
00348  *     {
00349  *         wait(3); // 3000ms timing delay function, platform-specific
00350  *         cmdLine.serial().printf("\r\nMAX11410 Init failed; retry...\r\n");
00351  *
00352  *     }
00353  *
00354  *     while (1)
00355  *     {
00356  *         // loop: put your main code here, to run repeatedly
00357  *
00358  *         // CODE GENERATOR: example code: has no member function REF
00359  *         // CODE GENERATOR: example code for ADC: repeat-forever convert and print conversion result, one record per line
00360  *         // CODE GENERATOR: ResolutionBits = 24
00361  *         // CODE GENERATOR: FScode = 0xffffff
00362  *         // CODE GENERATOR: NumChannels = 10
00363  *         // CODE GENERATOR: banner before helloCppCodeList while(1)
00364  *         cmdLine.serial().printf("v_filter = 0x%2.2x\r\n", g_MAX11410_device.v_filter);
00365  *
00366  *         cmdLine.serial().printf("v_pga = 0x%2.2x\r\n", g_MAX11410_device.v_pga);
00367  *
00368  *         cmdLine.serial().printf("v_ctrl = 0x%2.2x\r\n", g_MAX11410_device.v_ctrl);
00369  *
00370  *         // banner for csv data columns
00371  *         cmdLine.serial().printf("\"AIN0_LSB\",\"AIN1_LSB\",\"AIN2_LSB\",\"AIN3_LSB\",\"AIN4_LSB\",\"AIN5_LSB\",\"AIN6_LSB\",\"AIN7_LSB\",\"AIN8_LSB\",\"AIN9_LSB\"");
00372  *
00373  *         cmdLine.serial().printf("\r\n");
00374  *
00375  *         while(1) { // this code repeats forever
00376  *             // this code repeats forever
00377  *             // CODE GENERATOR: example code: has no member function ScanStandardExternalClock
00378  *             // CODE GENERATOR: example code: has no member function ReadAINcode
00379  *             // CODE GENERATOR: example code: member function Read_All_Voltages
00380  *             // Measure ADC channels in sequence from AIN0 to channelNumber_0_9.
00381  *             // @param[in] g_MAX11410_device.channelNumber_0_15: AIN Channel Number
00382  *             // @param[in] g_MAX11410_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
00383  *             // @param[in] g_MAX11410_device.chan_id_0_1: ADC_MODE_CONTROL.CHAN_ID
00384  *             int channelId_0_9 = 9;
00385  *             //g_MAX11410_device.channelNumber_0_15 = channelId_0_9;
00386  *             //g_MAX11410_device.PowerManagement_0_2 = 0;
00387  *             //g_MAX11410_device.chan_id_0_1 = 1;
00388  *             g_MAX11410_device.Read_All_Voltages();
00389  *
00390  *             // wait(3.0);
00391  *             // CODE GENERATOR: print conversion result
00392  *             // Use Arduino Serial Plotter to view output: Tools | Serial Plotter
00393  *             cmdLine.serial().printf("%d", g_MAX11410_device.AINcode[0]);
00394  *             for (int index = 1; index <= channelId_0_9; index++) {
00395  *                 cmdLine.serial().printf(",%d", g_MAX11410_device.AINcode[index]);
00396  *             }
00397  *             cmdLine.serial().printf("\r\n");
00398  *
00399  *         } // this code repeats forever
00400  *     }
00401  * }
00402  * @endcode
00403  * //---------- CODE GENERATOR: end helloCppCodeList
00404  */
00405 class MAX11410 {
00406 public:
00407 // CODE GENERATOR: TypedefEnum EnumItem declarations
00408 // CODE GENERATOR: TypedefEnum MAX11410_CMDOP_enum_t
00409     //----------------------------------------
00410     /// Command Operation Format (see function DecodeCommand)
00411     ///
00412     /// Naming convention is CMDOP_bitstream_OPERATION_NAME
00413     /// - rxxx_xxxx = read/write bit (1=read, 0=write)
00414     /// - xaaa_aaaa = 7-bit register address field -- see MAX11410_CMD_enum_t
00415     /// - xxxx = don't care
00416     typedef enum MAX11410_CMDOP_enum_t {
00417         CMDOP_0aaa_aaaa_WriteRegister = 0x00, //!< 0b00000000
00418         CMDOP_1aaa_aaaa_ReadRegister = 0x80, //!< 0b10000000
00419     } MAX11410_CMDOP_enum_t;
00420 
00421 // CODE GENERATOR: TypedefEnum MAX11410_CMD_enum_t
00422     //----------------------------------------
00423     /// Register Addresses
00424     ///
00425     /// Naming convention is CMD_bitstream_FUNCTION_NAME
00426     /// - r = read/write bit (1=read, 0=write)
00427     /// - xaaa_aaaa = 7-bit register address field
00428     /// - dddd_dddd = 8-bit register data field
00429     /// - dddd_dddd_dddd_dddd = 16-bit register data field
00430     /// - dddd_dddd_dddd_dddd_dddd_dddd = 24-bit register data field
00431     /// - xxxx = don't care
00432     typedef enum MAX11410_CMD_enum_t {
00433         CMD_r000_0000_xxxx_xxdd_PD = 0x00, //!< 0b0000000
00434         CMD_r000_0001_xddd_xxdd_CONV_START = 0x01, //!< 0b0000001
00435         CMD_r000_0010_xddd_dddd_SEQ_START = 0x02, //!< 0b0000010
00436         CMD_r000_0011_xxxx_xddd_CAL_START = 0x03, //!< 0b0000011
00437         CMD_r000_0100_dddd_xddd_GP0_CTRL = 0x04, //!< 0b0000100
00438         CMD_r000_0101_dddd_xddd_GP1_CTRL = 0x05, //!< 0b0000101
00439         CMD_r000_0110_xddd_xxdd_GP_CONV = 0x06, //!< 0b0000110
00440         CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR = 0x07, //!< 0b0000111
00441         CMD_r000_1000_x0dd_dddd_FILTER = 0x08, //!< 0b0001000
00442         CMD_r000_1001_dddd_dddd_CTRL = 0x09, //!< 0b0001001
00443         CMD_r000_1010_dddd_dddd_SOURCE = 0x0a, //!< 0b0001010
00444         CMD_r000_1011_dddd_dddd_MUX_CTRL0 = 0x0b, //!< 0b0001011
00445         CMD_r000_1100_dddd_dddd_MUX_CTRL1 = 0x0c, //!< 0b0001100
00446         CMD_r000_1101_dddd_dddd_MUX_CTRL2 = 0x0d, //!< 0b0001101
00447         CMD_r000_1110_00ss_0ggg_PGA = 0x0e, //!< 0b0001110
00448         CMD_r000_1111_dddd_dddd_WAIT_EXT = 0x0f, //!< 0b0001111
00449         CMD_r001_0000_xxxx_xxxx_WAIT_START = 0x10, //!< 0b0010000
00450         CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID = 0x11, //!< 0b0010001
00451         CMD_r001_0010_xxxx_xxxx_dddd_xxdd_dddd_dddd_SYSC_SEL = 0x12, //!< 0b0010010
00452         CMD_r001_0011_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_A = 0x13, //!< 0b0010011
00453         CMD_r001_0100_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_B = 0x14, //!< 0b0010100
00454         CMD_r001_0101_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_A = 0x15, //!< 0b0010101
00455         CMD_r001_0110_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_B = 0x16, //!< 0b0010110
00456         CMD_r001_0111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_OFF = 0x17, //!< 0b0010111
00457         CMD_r001_1000_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_1 = 0x18, //!< 0b0011000
00458         CMD_r001_1001_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_2 = 0x19, //!< 0b0011001
00459         CMD_r001_1010_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_4 = 0x1a, //!< 0b0011010
00460         CMD_r001_1011_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_8 = 0x1b, //!< 0b0011011
00461         CMD_r001_1100_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_16 = 0x1c, //!< 0b0011100
00462         CMD_r001_1101_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_32 = 0x1d, //!< 0b0011101
00463         CMD_r001_1110_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_64 = 0x1e, //!< 0b0011110
00464         CMD_r001_1111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_128 = 0x1f, //!< 0b0011111
00465         CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0 = 0x20, //!< 0b0100000
00466         CMD_r010_0001_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH1 = 0x21, //!< 0b0100001
00467         CMD_r010_0010_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH2 = 0x22, //!< 0b0100010
00468         CMD_r010_0011_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH3 = 0x23, //!< 0b0100011
00469         CMD_r010_0100_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH4 = 0x24, //!< 0b0100100
00470         CMD_r010_0101_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH5 = 0x25, //!< 0b0100101
00471         CMD_r010_0110_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH6 = 0x26, //!< 0b0100110
00472         CMD_r010_0111_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH7 = 0x27, //!< 0b0100111
00473         CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0 = 0x28, //!< 0b0101000
00474         CMD_r010_1001_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH1 = 0x29, //!< 0b0101001
00475         CMD_r010_1010_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH2 = 0x2a, //!< 0b0101010
00476         CMD_r010_1011_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH3 = 0x2b, //!< 0b0101011
00477         CMD_r010_1100_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH4 = 0x2c, //!< 0b0101100
00478         CMD_r010_1101_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH5 = 0x2d, //!< 0b0101101
00479         CMD_r010_1110_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH6 = 0x2e, //!< 0b0101110
00480         CMD_r010_1111_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH7 = 0x2f, //!< 0b0101111
00481         CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0 = 0x30, //!< 0b0110000
00482         CMD_r011_0001_dddd_dddd_dddd_dddd_dddd_dddd_DATA1 = 0x31, //!< 0b0110001
00483         CMD_r011_0010_dddd_dddd_dddd_dddd_dddd_dddd_DATA2 = 0x32, //!< 0b0110010
00484         CMD_r011_0011_dddd_dddd_dddd_dddd_dddd_dddd_DATA3 = 0x33, //!< 0b0110011
00485         CMD_r011_0100_dddd_dddd_dddd_dddd_dddd_dddd_DATA4 = 0x34, //!< 0b0110100
00486         CMD_r011_0101_dddd_dddd_dddd_dddd_dddd_dddd_DATA5 = 0x35, //!< 0b0110101
00487         CMD_r011_0110_dddd_dddd_dddd_dddd_dddd_dddd_DATA6 = 0x36, //!< 0b0110110
00488         CMD_r011_0111_dddd_dddd_dddd_dddd_dddd_dddd_DATA7 = 0x37, //!< 0b0110111
00489         CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS = 0x38, //!< 0b0111000
00490         CMD_r011_1001_dddd_dddd_dddd_dddd_dxxd_dddd_STATUS_IE = 0x39, //!< 0b0111001
00491         CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0 = 0x3a, //!< 0b0111010
00492         CMD_r011_1011_xaaa_aaaa_dddd_dddd_UC_1 = 0x3b, //!< 0b0111011
00493         CMD_r011_1100_xaaa_aaaa_dddd_dddd_UC_2 = 0x3c, //!< 0b0111100
00494         CMD_r011_1101_xaaa_aaaa_dddd_dddd_UC_3 = 0x3d, //!< 0b0111101
00495         CMD_r011_1110_xaaa_aaaa_dddd_dddd_UC_4 = 0x3e, //!< 0b0111110
00496         CMD_r011_1111_xaaa_aaaa_dddd_dddd_UC_5 = 0x3f, //!< 0b0111111
00497         CMD_r100_0000_xaaa_aaaa_dddd_dddd_UC_6 = 0x40, //!< 0b1000000
00498         CMD_r100_0001_xaaa_aaaa_dddd_dddd_UC_7 = 0x41, //!< 0b1000001
00499         CMD_r100_0010_xaaa_aaaa_dddd_dddd_UC_8 = 0x42, //!< 0b1000010
00500         CMD_r100_0011_xaaa_aaaa_dddd_dddd_UC_9 = 0x43, //!< 0b1000011
00501         CMD_r100_0100_xaaa_aaaa_dddd_dddd_UC_10 = 0x44, //!< 0b1000100
00502         CMD_r100_0101_xaaa_aaaa_dddd_dddd_UC_11 = 0x45, //!< 0b1000101
00503         CMD_r100_0110_xaaa_aaaa_dddd_dddd_UC_12 = 0x46, //!< 0b1000110
00504         CMD_r100_0111_xaaa_aaaa_dddd_dddd_UC_13 = 0x47, //!< 0b1000111
00505         CMD_r100_1000_xaaa_aaaa_dddd_dddd_UC_14 = 0x48, //!< 0b1001000
00506         CMD_r100_1001_xaaa_aaaa_dddd_dddd_UC_15 = 0x49, //!< 0b1001001
00507         CMD_r100_1010_xaaa_aaaa_dddd_dddd_UC_16 = 0x4a, //!< 0b1001010
00508         CMD_r100_1011_xaaa_aaaa_dddd_dddd_UC_17 = 0x4b, //!< 0b1001011
00509         CMD_r100_1100_xaaa_aaaa_dddd_dddd_UC_18 = 0x4c, //!< 0b1001100
00510         CMD_r100_1101_xaaa_aaaa_dddd_dddd_UC_19 = 0x4d, //!< 0b1001101
00511         CMD_r100_1110_xaaa_aaaa_dddd_dddd_UC_20 = 0x4e, //!< 0b1001110
00512         CMD_r100_1111_xaaa_aaaa_dddd_dddd_UC_21 = 0x4f, //!< 0b1001111
00513         CMD_r101_0000_xaaa_aaaa_dddd_dddd_UC_22 = 0x50, //!< 0b1010000
00514         CMD_r101_0001_xaaa_aaaa_dddd_dddd_UC_23 = 0x51, //!< 0b1010001
00515         CMD_r101_0010_xaaa_aaaa_dddd_dddd_UC_24 = 0x52, //!< 0b1010010
00516         CMD_r101_0011_xaaa_aaaa_dddd_dddd_UC_25 = 0x53, //!< 0b1010011
00517         CMD_r101_0100_xaaa_aaaa_dddd_dddd_UC_26 = 0x54, //!< 0b1010100
00518         CMD_r101_0101_xaaa_aaaa_dddd_dddd_UC_27 = 0x55, //!< 0b1010101
00519         CMD_r101_0110_xaaa_aaaa_dddd_dddd_UC_28 = 0x56, //!< 0b1010110
00520         CMD_r101_0111_xaaa_aaaa_dddd_dddd_UC_29 = 0x57, //!< 0b1010111
00521         CMD_r101_1000_xaaa_aaaa_dddd_dddd_UC_30 = 0x58, //!< 0b1011000
00522         CMD_r101_1001_xaaa_aaaa_dddd_dddd_UC_31 = 0x59, //!< 0b1011001
00523         CMD_r101_1010_xaaa_aaaa_dddd_dddd_UC_32 = 0x5a, //!< 0b1011010
00524         CMD_r101_1011_xaaa_aaaa_dddd_dddd_UC_33 = 0x5b, //!< 0b1011011
00525         CMD_r101_1100_xaaa_aaaa_dddd_dddd_UC_34 = 0x5c, //!< 0b1011100
00526         CMD_r101_1101_xaaa_aaaa_dddd_dddd_UC_35 = 0x5d, //!< 0b1011101
00527         CMD_r101_1110_xaaa_aaaa_dddd_dddd_UC_36 = 0x5e, //!< 0b1011110
00528         CMD_r101_1111_xaaa_aaaa_dddd_dddd_UC_37 = 0x5f, //!< 0b1011111
00529         CMD_r110_0000_xaaa_aaaa_dddd_dddd_UC_38 = 0x60, //!< 0b1100000
00530         CMD_r110_0001_xaaa_aaaa_dddd_dddd_UC_39 = 0x61, //!< 0b1100001
00531         CMD_r110_0010_xaaa_aaaa_dddd_dddd_UC_40 = 0x62, //!< 0b1100010
00532         CMD_r110_0011_xaaa_aaaa_dddd_dddd_UC_41 = 0x63, //!< 0b1100011
00533         CMD_r110_0100_xaaa_aaaa_dddd_dddd_UC_42 = 0x64, //!< 0b1100100
00534         CMD_r110_0101_xaaa_aaaa_dddd_dddd_UC_43 = 0x65, //!< 0b1100101
00535         CMD_r110_0110_xaaa_aaaa_dddd_dddd_UC_44 = 0x66, //!< 0b1100110
00536         CMD_r110_0111_xaaa_aaaa_dddd_dddd_UC_45 = 0x67, //!< 0b1100111
00537         CMD_r110_1000_xaaa_aaaa_dddd_dddd_UC_46 = 0x68, //!< 0b1101000
00538         CMD_r110_1001_xaaa_aaaa_dddd_dddd_UC_47 = 0x69, //!< 0b1101001
00539         CMD_r110_1010_xaaa_aaaa_dddd_dddd_UC_48 = 0x6a, //!< 0b1101010
00540         CMD_r110_1011_xaaa_aaaa_dddd_dddd_UC_49 = 0x6b, //!< 0b1101011
00541         CMD_r110_1100_xaaa_aaaa_dddd_dddd_UC_50 = 0x6c, //!< 0b1101100
00542         CMD_r110_1101_xaaa_aaaa_dddd_dddd_UC_51 = 0x6d, //!< 0b1101101
00543         CMD_r110_1110_xaaa_aaaa_dddd_dddd_UC_52 = 0x6e, //!< 0b1101110
00544         CMD_r110_1111_xxxx_xxxx_xaaa_aaaa_UCADDR = 0x6f, //!< 0b1101111
00545     } MAX11410_CMD_enum_t;
00546 
00547 // CODE GENERATOR: TypedefEnum MAX11410_SEQ_ADDR_enum_t
00548     //----------------------------------------
00549     /// Microcode Sequencer Addresses.
00550     /// CMD_r000_0010_xddd_dddd_SEQ_START
00551     /// CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR
00552     ///
00553     /// Naming convention is CMD_bitstream_FUNCTION_NAME
00554     /// - xaaa_aaaa = 7-bit register address field
00555     /// - dddd_dddd = 8-bit register data field
00556     /// - xxxx = don't care
00557     typedef enum MAX11410_SEQ_ADDR_enum_t {
00558         SEQ_ADDR_r011_1010_xaaa_aaaa_dddd_dddd_UC_0 = 0x3a, //!< 0b0111010
00559         SEQ_ADDR_r011_1011_xaaa_aaaa_dddd_dddd_UC_1 = 0x3b, //!< 0b0111011
00560         SEQ_ADDR_r011_1100_xaaa_aaaa_dddd_dddd_UC_2 = 0x3c, //!< 0b0111100
00561         SEQ_ADDR_r011_1101_xaaa_aaaa_dddd_dddd_UC_3 = 0x3d, //!< 0b0111101
00562         SEQ_ADDR_r011_1110_xaaa_aaaa_dddd_dddd_UC_4 = 0x3e, //!< 0b0111110
00563         SEQ_ADDR_r011_1111_xaaa_aaaa_dddd_dddd_UC_5 = 0x3f, //!< 0b0111111
00564         SEQ_ADDR_r100_0000_xaaa_aaaa_dddd_dddd_UC_6 = 0x40, //!< 0b1000000
00565         SEQ_ADDR_r100_0001_xaaa_aaaa_dddd_dddd_UC_7 = 0x41, //!< 0b1000001
00566         SEQ_ADDR_r100_0010_xaaa_aaaa_dddd_dddd_UC_8 = 0x42, //!< 0b1000010
00567         SEQ_ADDR_r100_0011_xaaa_aaaa_dddd_dddd_UC_9 = 0x43, //!< 0b1000011
00568         SEQ_ADDR_r100_0100_xaaa_aaaa_dddd_dddd_UC_10 = 0x44, //!< 0b1000100
00569         SEQ_ADDR_r100_0101_xaaa_aaaa_dddd_dddd_UC_11 = 0x45, //!< 0b1000101
00570         SEQ_ADDR_r100_0110_xaaa_aaaa_dddd_dddd_UC_12 = 0x46, //!< 0b1000110
00571         SEQ_ADDR_r100_0111_xaaa_aaaa_dddd_dddd_UC_13 = 0x47, //!< 0b1000111
00572         SEQ_ADDR_r100_1000_xaaa_aaaa_dddd_dddd_UC_14 = 0x48, //!< 0b1001000
00573         SEQ_ADDR_r100_1001_xaaa_aaaa_dddd_dddd_UC_15 = 0x49, //!< 0b1001001
00574         SEQ_ADDR_r100_1010_xaaa_aaaa_dddd_dddd_UC_16 = 0x4a, //!< 0b1001010
00575         SEQ_ADDR_r100_1011_xaaa_aaaa_dddd_dddd_UC_17 = 0x4b, //!< 0b1001011
00576         SEQ_ADDR_r100_1100_xaaa_aaaa_dddd_dddd_UC_18 = 0x4c, //!< 0b1001100
00577         SEQ_ADDR_r100_1101_xaaa_aaaa_dddd_dddd_UC_19 = 0x4d, //!< 0b1001101
00578         SEQ_ADDR_r100_1110_xaaa_aaaa_dddd_dddd_UC_20 = 0x4e, //!< 0b1001110
00579         SEQ_ADDR_r100_1111_xaaa_aaaa_dddd_dddd_UC_21 = 0x4f, //!< 0b1001111
00580         SEQ_ADDR_r101_0000_xaaa_aaaa_dddd_dddd_UC_22 = 0x50, //!< 0b1010000
00581         SEQ_ADDR_r101_0001_xaaa_aaaa_dddd_dddd_UC_23 = 0x51, //!< 0b1010001
00582         SEQ_ADDR_r101_0010_xaaa_aaaa_dddd_dddd_UC_24 = 0x52, //!< 0b1010010
00583         SEQ_ADDR_r101_0011_xaaa_aaaa_dddd_dddd_UC_25 = 0x53, //!< 0b1010011
00584         SEQ_ADDR_r101_0100_xaaa_aaaa_dddd_dddd_UC_26 = 0x54, //!< 0b1010100
00585         SEQ_ADDR_r101_0101_xaaa_aaaa_dddd_dddd_UC_27 = 0x55, //!< 0b1010101
00586         SEQ_ADDR_r101_0110_xaaa_aaaa_dddd_dddd_UC_28 = 0x56, //!< 0b1010110
00587         SEQ_ADDR_r101_0111_xaaa_aaaa_dddd_dddd_UC_29 = 0x57, //!< 0b1010111
00588         SEQ_ADDR_r101_1000_xaaa_aaaa_dddd_dddd_UC_30 = 0x58, //!< 0b1011000
00589         SEQ_ADDR_r101_1001_xaaa_aaaa_dddd_dddd_UC_31 = 0x59, //!< 0b1011001
00590         SEQ_ADDR_r101_1010_xaaa_aaaa_dddd_dddd_UC_32 = 0x5a, //!< 0b1011010
00591         SEQ_ADDR_r101_1011_xaaa_aaaa_dddd_dddd_UC_33 = 0x5b, //!< 0b1011011
00592         SEQ_ADDR_r101_1100_xaaa_aaaa_dddd_dddd_UC_34 = 0x5c, //!< 0b1011100
00593         SEQ_ADDR_r101_1101_xaaa_aaaa_dddd_dddd_UC_35 = 0x5d, //!< 0b1011101
00594         SEQ_ADDR_r101_1110_xaaa_aaaa_dddd_dddd_UC_36 = 0x5e, //!< 0b1011110
00595         SEQ_ADDR_r101_1111_xaaa_aaaa_dddd_dddd_UC_37 = 0x5f, //!< 0b1011111
00596         SEQ_ADDR_r110_0000_xaaa_aaaa_dddd_dddd_UC_38 = 0x60, //!< 0b1100000
00597         SEQ_ADDR_r110_0001_xaaa_aaaa_dddd_dddd_UC_39 = 0x61, //!< 0b1100001
00598         SEQ_ADDR_r110_0010_xaaa_aaaa_dddd_dddd_UC_40 = 0x62, //!< 0b1100010
00599         SEQ_ADDR_r110_0011_xaaa_aaaa_dddd_dddd_UC_41 = 0x63, //!< 0b1100011
00600         SEQ_ADDR_r110_0100_xaaa_aaaa_dddd_dddd_UC_42 = 0x64, //!< 0b1100100
00601         SEQ_ADDR_r110_0101_xaaa_aaaa_dddd_dddd_UC_43 = 0x65, //!< 0b1100101
00602         SEQ_ADDR_r110_0110_xaaa_aaaa_dddd_dddd_UC_44 = 0x66, //!< 0b1100110
00603         SEQ_ADDR_r110_0111_xaaa_aaaa_dddd_dddd_UC_45 = 0x67, //!< 0b1100111
00604         SEQ_ADDR_r110_1000_xaaa_aaaa_dddd_dddd_UC_46 = 0x68, //!< 0b1101000
00605         SEQ_ADDR_r110_1001_xaaa_aaaa_dddd_dddd_UC_47 = 0x69, //!< 0b1101001
00606         SEQ_ADDR_r110_1010_xaaa_aaaa_dddd_dddd_UC_48 = 0x6a, //!< 0b1101010
00607         SEQ_ADDR_r110_1011_xaaa_aaaa_dddd_dddd_UC_49 = 0x6b, //!< 0b1101011
00608         SEQ_ADDR_r110_1100_xaaa_aaaa_dddd_dddd_UC_50 = 0x6c, //!< 0b1101100
00609         SEQ_ADDR_r110_1101_xaaa_aaaa_dddd_dddd_UC_51 = 0x6d, //!< 0b1101101
00610         SEQ_ADDR_r110_1110_xaaa_aaaa_dddd_dddd_UC_52 = 0x6e, //!< 0b1101110
00611     } MAX11410_SEQ_ADDR_enum_t;
00612 
00613 // CODE GENERATOR: TypedefEnum MAX11410_STATUS_enum_t
00614     //----------------------------------------
00615     /// Status indicator bits
00616     /// CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS fields
00617     ///
00618     typedef enum MAX11410_STATUS_enum_t {
00619         STATUS_000001_CONV_RDY = 0x00000001, //!< 0b00000000000000000000000000000001
00620         STATUS_000002_SEQ_RDY = 0x00000002, //!< 0b00000000000000000000000000000010
00621         STATUS_000004_CAL_RDY = 0x00000004, //!< 0b00000000000000000000000000000100
00622         STATUS_000008_WAIT_DONE = 0x00000008, //!< 0b00000000000000000000000000001000
00623         STATUS_000010_DATA_RDY = 0x00000010, //!< 0b00000000000000000000000000010000
00624         STATUS_000020_reserved = 0x00000020, //!< 0b00000000000000000000000000100000
00625         STATUS_000040_reserved = 0x00000040, //!< 0b00000000000000000000000001000000
00626         STATUS_000080_SYSGOR = 0x00000080, //!< 0b00000000000000000000000010000000
00627         STATUS_000100_TUR_0 = 0x00000100, //!< 0b00000000000000000000000100000000
00628         STATUS_000200_TUR_1 = 0x00000200, //!< 0b00000000000000000000001000000000
00629         STATUS_000400_TUR_2 = 0x00000400, //!< 0b00000000000000000000010000000000
00630         STATUS_000800_TUR_3 = 0x00000800, //!< 0b00000000000000000000100000000000
00631         STATUS_001000_TUR_4 = 0x00001000, //!< 0b00000000000000000001000000000000
00632         STATUS_002000_TUR_5 = 0x00002000, //!< 0b00000000000000000010000000000000
00633         STATUS_004000_TUR_6 = 0x00004000, //!< 0b00000000000000000100000000000000
00634         STATUS_008000_TUR_7 = 0x00008000, //!< 0b00000000000000001000000000000000
00635         STATUS_010000_TOR_0 = 0x00010000, //!< 0b00000000000000010000000000000000
00636         STATUS_020000_TOR_1 = 0x00020000, //!< 0b00000000000000100000000000000000
00637         STATUS_040000_TOR_2 = 0x00040000, //!< 0b00000000000001000000000000000000
00638         STATUS_080000_TOR_3 = 0x00080000, //!< 0b00000000000010000000000000000000
00639         STATUS_100000_TOR_4 = 0x00100000, //!< 0b00000000000100000000000000000000
00640         STATUS_200000_TOR_5 = 0x00200000, //!< 0b00000000001000000000000000000000
00641         STATUS_400000_TOR_6 = 0x00400000, //!< 0b00000000010000000000000000000000
00642         STATUS_800000_TOR_7 = 0x00800000, //!< 0b00000000100000000000000000000000
00643     } MAX11410_STATUS_enum_t;
00644 
00645 // CODE GENERATOR: TypedefEnum MAX11410_PD_enum_t
00646     //----------------------------------------
00647     /// Power-down state command
00648     /// CMD_r000_0000_xxxx_xxdd_PD PD[1:0] field
00649     ///
00650     /// - 00: Normal mode
00651     /// - 01: Standby mode -- Powers down all analog circuity, but not the internal voltage regulator
00652     /// - 10: Sleep mode -- Powers down all analog circuitry including the internal voltage regulator
00653     /// - 11: Reset -- all registers reset to POR state (Self Clearing to 01 Standby mode)
00654     typedef enum MAX11410_PD_enum_t {
00655         PD_00_Normal = 0x00, //!< 0b00
00656         PD_01_Standby = 0x01, //!< 0b01
00657         PD_10_Sleep = 0x02, //!< 0b10
00658         PD_11_Reset = 0x03, //!< 0b11
00659     } MAX11410_PD_enum_t;
00660 
00661 // CODE GENERATOR: TypedefEnum MAX11410_DEST_enum_t
00662     //----------------------------------------
00663     /// Conversion / seqeuncer start command
00664     /// CMD_r000_0001_xddd_xxdd_CONV_START DEST[2:0] field.
00665     /// CMD_r000_0110_xddd_xxdd_GP_CONV GP_DEST[2:0] field.
00666     ///
00667     /// - 000: Store result in DATA0
00668     /// - 001: Store result in DATA1
00669     /// - 010: Store result in DATA2
00670     /// - 011: Store result in DATA3
00671     /// - 100: Store result in DATA4
00672     /// - 101: Store result in DATA5
00673     /// - 110: Store result in DATA6
00674     /// - 111: Store result in DATA7
00675     typedef enum MAX11410_DEST_enum_t {
00676         DEST_000_DATA0 = 0x00, //!< 0b000
00677         DEST_001_DATA1 = 0x01, //!< 0b001
00678         DEST_010_DATA2 = 0x02, //!< 0b010
00679         DEST_011_DATA3 = 0x03, //!< 0b011
00680         DEST_100_DATA4 = 0x04, //!< 0b100
00681         DEST_101_DATA5 = 0x05, //!< 0b101
00682         DEST_110_DATA6 = 0x06, //!< 0b110
00683         DEST_111_DATA7 = 0x07, //!< 0b111
00684     } MAX11410_DEST_enum_t;
00685 
00686 // CODE GENERATOR: TypedefEnum MAX11410_CONV_TYPE_enum_t
00687     //----------------------------------------
00688     /// Conversion / seqeuncer start command
00689     /// CMD_r000_0001_xddd_xxdd_CONV_START CONV_TYPE[1:0] field.
00690     /// CMD_r000_0110_xddd_xxdd_GP_CONV GP_CONV_TYPE[2:0] field.
00691     ///
00692     /// - 00: Single conversion
00693     /// - 01: Continuous conversions
00694     /// - 10, 11: 1:4 Duty cycled conversions (modulator low-power mode)
00695     typedef enum MAX11410_CONV_TYPE_enum_t {
00696         CONV_TYPE_00_Single = 0x00, //!< 0b00
00697         CONV_TYPE_01_Continuous = 0x01, //!< 0b01
00698         CONV_TYPE_10_DutyCycle_1_4 = 0x02, //!< 0b10
00699         CONV_TYPE_11_DutyCycle_1_4 = 0x03, //!< 0b11
00700     } MAX11410_CONV_TYPE_enum_t;
00701 
00702 // CODE GENERATOR: TypedefEnum MAX11410_CAL_TYPE_enum_t
00703     //----------------------------------------
00704     /// Calbration command
00705     /// CMD_r000_0011_xxxx_xddd_CAL_START CAL_TYPE[2:0] field
00706     ///
00707     /// - 000: Performs a self-calibration. Resulting offset calibration value is stored in the SELF_OFF register, and the 1x gain calibration value is stored in the SELF_GAIN_1 register.
00708     /// - 001: Performs a PGA gain calibration at the currently programmed PGA gain. A 'No Op' will result if PGA Gain calibration is executed with the PGA disabled via the SIG_PATH register, or with the GAIN register set to 1x.The resulting gain calibration value is stored in the SELF_GAIN_[2-128] register corresponding to the currently programmed PGA GAIN setting.
00709     /// - 010: Reserved
00710     /// - 011: Reserved
00711     /// - 100: Performs a system offset calibration. The resulting calibration value is stored in the SYS_OFF_A register.
00712     /// - 101: Performs a system gain calibration. The resulting calibration value is stored in the SYS_GAIN_A register.
00713     /// - 110: Performs a system offset calibration. The resulting calibration value is stored in the SYS_OFF_B register.
00714     /// - 111: Performs a system gain calibration. The resulting calibration value is stored in the SYS_GAIN_B register.
00715     typedef enum MAX11410_CAL_TYPE_enum_t {
00716         CAL_TYPE_000_SELF_CAL = 0x00, //!< 0b000
00717         CAL_TYPE_001_PGA_GAIN = 0x01, //!< 0b001
00718         CAL_TYPE_010_reserved = 0x02, //!< 0b010
00719         CAL_TYPE_011_reserved = 0x03, //!< 0b011
00720         CAL_TYPE_100_SYS_OFF_A = 0x04, //!< 0b100
00721         CAL_TYPE_101_SYS_GAIN_A = 0x05, //!< 0b101
00722         CAL_TYPE_110_SYS_OFF_B = 0x06, //!< 0b110
00723         CAL_TYPE_111_SYS_GAIN_B = 0x07, //!< 0b111
00724     } MAX11410_CAL_TYPE_enum_t;
00725 
00726 // CODE GENERATOR: TypedefEnum MAX11410_GP0_DIR_enum_t
00727     //----------------------------------------
00728     /// GPIO0 pin command
00729     /// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_DIR[1:0] field (bits 7:6)
00730     ///
00731     /// - 00: Input mode, reference to VDDIO (default)
00732     /// - 01: Reserved
00733     /// - 10: Output mode, open-drain output
00734     /// - 11: Output mode, CMOS output
00735     typedef enum MAX11410_GP0_DIR_enum_t {
00736         GP0_DIR_00_Input = 0x00, //!< 0b00
00737         GP0_DIR_01_reserved = 0x01, //!< 0b01
00738         GP0_DIR_10_OutputOpenDrain = 0x02, //!< 0b10
00739         GP0_DIR_11_Output = 0x03, //!< 0b11
00740     } MAX11410_GP0_DIR_enum_t;
00741 
00742 // CODE GENERATOR: TypedefEnum MAX11410_GP0_ISEL_enum_t
00743     //----------------------------------------
00744     /// GPIO0 pin command
00745     /// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_ISEL[1:0] field (bits 5:4)
00746     ///
00747     /// - 00: GPIO_0 input disabled (default)
00748     /// - 01: GPIO_0 input configured as rising-edge-triggered conversion start
00749     /// - 10: GPIO_0 input configured as rising-edge-triggered sequence start from GP_SEQ_ADDR
00750     /// - 11: Reserved
00751     typedef enum MAX11410_GP0_ISEL_enum_t {
00752         GP0_ISEL_00_disabled = 0x00, //!< 0b00
00753         GP0_ISEL_01_TRIGGER_CONV_START = 0x01, //!< 0b01
00754         GP0_ISEL_10_TRIGGER_SEQ_START = 0x02, //!< 0b10
00755         GP0_ISEL_11_reserved = 0x03, //!< 0b11
00756     } MAX11410_GP0_ISEL_enum_t;
00757 
00758 // CODE GENERATOR: TypedefEnum MAX11410_GP0_OSEL_enum_t
00759     //----------------------------------------
00760     /// GPIO0 pin command
00761     /// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_OSEL[2:0] field (bits 2:0)
00762     ///
00763     /// - 000: GPIO_0 output disabled, high Z (default)
00764     /// - 001: GPIO_0 output is configured as INTRB (active low)
00765     /// - 010: GPIO_0 output is configured as INTR (active high)
00766     /// - 011: GPIO_0 output is configured as state Logic 0
00767     /// - 100: GPIO_0 output is configured as state Logic 1
00768     /// - 101: GPIO_0 output is configured as automatic low-side switch operation (CMOS output mode overridden)
00769     /// - 110: GPIO_0 output is configured as modulator active status
00770     /// - 111: GPIO_0 output is configured as system clock (2.456Mhz Nominal)
00771     typedef enum MAX11410_GP0_OSEL_enum_t {
00772         GP0_OSEL_000_disabled = 0x00, //!< 0b000
00773         GP0_OSEL_001_INTRB = 0x01, //!< 0b001
00774         GP0_OSEL_010_INTR = 0x02, //!< 0b010
00775         GP0_OSEL_011_LOGIC_0 = 0x03, //!< 0b011
00776         GP0_OSEL_100_LOGIC_1 = 0x04, //!< 0b100
00777         GP0_OSEL_101_AUTO_LOWSIDE_SWITCH = 0x05, //!< 0b101
00778         GP0_OSEL_110_MODULATOR_ACTIVE_STATUS = 0x06, //!< 0b110
00779         GP0_OSEL_111_CLOCK_2M456 = 0x07, //!< 0b111
00780     } MAX11410_GP0_OSEL_enum_t;
00781 
00782 // CODE GENERATOR: TypedefEnum MAX11410_GP1_DIR_enum_t
00783     //----------------------------------------
00784     /// GPIO1 pin command
00785     /// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_DIR[1:0] field (bits 7:6)
00786     ///
00787     /// - 00: Input mode, reference to VDDIO (default)
00788     /// - 01: Reserved
00789     /// - 10: Output mode, open-drain output
00790     /// - 11: Output mode, CMOS output
00791     typedef enum MAX11410_GP1_DIR_enum_t {
00792         GP1_DIR_00_Input = 0x00, //!< 0b00
00793         GP1_DIR_01_reserved = 0x01, //!< 0b01
00794         GP1_DIR_10_OutputOpenDrain = 0x02, //!< 0b10
00795         GP1_DIR_11_Output = 0x03, //!< 0b11
00796     } MAX11410_GP1_DIR_enum_t;
00797 
00798 // CODE GENERATOR: TypedefEnum MAX11410_GP1_ISEL_enum_t
00799     //----------------------------------------
00800     /// GPIO1 pin command
00801     /// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_ISEL[1:0] field (bits 5:4)
00802     ///
00803     /// - 00: GPIO_1 input disabled (default)
00804     /// - 01: GPIO_1 input configured as rising-edge-triggered conversion start
00805     /// - 10: GPIO_1 input configured as rising-edge-triggered sequence start from GP_SEQ_ADDR
00806     /// - 11: Reserved
00807     typedef enum MAX11410_GP1_ISEL_enum_t {
00808         GP1_ISEL_00_disabled = 0x00, //!< 0b00
00809         GP1_ISEL_01_TRIGGER_CONV_START = 0x01, //!< 0b01
00810         GP1_ISEL_10_TRIGGER_SEQ_START = 0x02, //!< 0b10
00811         GP1_ISEL_11_reserved = 0x03, //!< 0b11
00812     } MAX11410_GP1_ISEL_enum_t;
00813 
00814 // CODE GENERATOR: TypedefEnum MAX11410_GP1_OSEL_enum_t
00815     //----------------------------------------
00816     /// GPIO1 pin command
00817     /// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_OSEL[2:0] field (bits 2:0)
00818     ///
00819     /// - 000: GPIO_1 output disabled, high Z (default)
00820     /// - 001: GPIO_1 output is configured as INTRB (active low)
00821     /// - 010: GPIO_1 output is configured as INTR (active high)
00822     /// - 011: GPIO_1 output is configured as state Logic 0
00823     /// - 100: GPIO_1 output is configured as state Logic 1
00824     /// - 101: GPIO_1 output is configured as system clock (2.456Mhz Nominal)
00825     /// - 110: GPIO_1 output is configured as modulator active status
00826     /// - 111: GPIO_1 output is configured as automatic low-side switch operation (CMOS output mode overridden)
00827     typedef enum MAX11410_GP1_OSEL_enum_t {
00828         GP1_OSEL_000_disabled = 0x00, //!< 0b000
00829         GP1_OSEL_001_INTRB = 0x01, //!< 0b001
00830         GP1_OSEL_010_INTR = 0x02, //!< 0b010
00831         GP1_OSEL_011_LOGIC_0 = 0x03, //!< 0b011
00832         GP1_OSEL_100_LOGIC_1 = 0x04, //!< 0b100
00833         GP1_OSEL_101_AUTO_LOWSIDE_SWITCH = 0x05, //!< 0b101
00834         GP1_OSEL_110_MODULATOR_ACTIVE_STATUS = 0x06, //!< 0b110
00835         GP1_OSEL_111_CLOCK_2M456 = 0x07, //!< 0b111
00836     } MAX11410_GP1_OSEL_enum_t;
00837 
00838 // CODE GENERATOR: TypedefEnum MAX11410_LINEF_enum_t
00839     //----------------------------------------
00840     /// Filter command
00841     /// CMD_r000_1000_x0dd_dddd_FILTER LINEF[1:0] field
00842     ///
00843     /// - 00: Simultaneous 50/60Hz FIR rejection (default)
00844     /// - 01: 50Hz FIR rejection
00845     /// - 10: 60Hz FIR rejection
00846     /// - 11: SINC4
00847     typedef enum MAX11410_LINEF_enum_t {
00848         LINEF_00_50Hz_60Hz_FIR = 0x00, //!< 0b00
00849         LINEF_01_50Hz_FIR = 0x01, //!< 0b01
00850         LINEF_10_60Hz_FIR = 0x02, //!< 0b10
00851         LINEF_11_SINC4 = 0x03, //!< 0b11
00852     } MAX11410_LINEF_enum_t;
00853 
00854 // CODE GENERATOR: TypedefEnum MAX11410_RATE_enum_t
00855     //----------------------------------------
00856     /// Filter command
00857     /// CMD_r000_1000_x0dd_dddd_FILTER RATE[3:0] field
00858     ///
00859     /// Sets conversion rate based on LINEF value. See Table 9a through Table 9d for details.
00860     ///
00861     /// Table 9a. LINEF = 00 Data Rate and Filter Rejection Settings
00862     ///
00863     ///  Rate      | LINEF                  | CONV_TYPE                  | Rate
00864     /// -----------|------------------------|----------------------------|----------
00865     ///  RATE_0000 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_00_Single        |  1.0SPS
00866     ///  RATE_0001 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_00_Single        |  2.0SPS
00867     ///  RATE_0010 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_00_Single        |  4.0SPS
00868     ///  RATE_0011 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_00_Single        |  8.0SPS
00869     ///  RATE_0100 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_00_Single        | 16.0SPS
00870     ///  RATE_0000 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_01_Continuous    |  1.1SPS
00871     ///  RATE_0001 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_01_Continuous    |  2.1SPS
00872     ///  RATE_0010 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_01_Continuous    |  4.2SPS
00873     ///  RATE_0011 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_01_Continuous    |  8.4SPS
00874     ///  RATE_0100 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_01_Continuous    | 16.8SPS
00875     ///  RATE_0000 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 |  0.3SPS
00876     ///  RATE_0001 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 |  0.5SPS
00877     ///  RATE_0010 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 |  1.1SPS
00878     ///  RATE_0011 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 |  2.1SPS
00879     ///  RATE_0100 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 |  4.2SPS
00880     ///
00881     /// Table 9b. LINEF = 01 Data Rate and Filter Rejection Settings
00882     ///
00883     ///  Rate     | LINEF                  | CONV_TYPE                  | Rate
00884     /// ----------|------------------------|----------------------------|----------
00885     /// RATE_0000 | LINEF_01_50Hz_FIR      | CONV_TYPE_00_Single        |  1.3SPS
00886     /// RATE_0001 | LINEF_01_50Hz_FIR      | CONV_TYPE_00_Single        |  2.5SPS
00887     /// RATE_0010 | LINEF_01_50Hz_FIR      | CONV_TYPE_00_Single        |  5.0SPS
00888     /// RATE_0011 | LINEF_01_50Hz_FIR      | CONV_TYPE_00_Single        | 10.0SPS
00889     /// RATE_0100 | LINEF_01_50Hz_FIR      | CONV_TYPE_00_Single        | 20.0SPS
00890     /// RATE_0101 | LINEF_01_50Hz_FIR      | CONV_TYPE_00_Single        | 35.6SPS
00891     /// RATE_0000 | LINEF_01_50Hz_FIR      | CONV_TYPE_01_Continuous    |  1.3SPS
00892     /// RATE_0001 | LINEF_01_50Hz_FIR      | CONV_TYPE_01_Continuous    |  2.7SPS
00893     /// RATE_0010 | LINEF_01_50Hz_FIR      | CONV_TYPE_01_Continuous    |  5.3SPS
00894     /// RATE_0011 | LINEF_01_50Hz_FIR      | CONV_TYPE_01_Continuous    | 10.7SPS
00895     /// RATE_0100 | LINEF_01_50Hz_FIR      | CONV_TYPE_01_Continuous    | 21.3SPS
00896     /// RATE_0101 | LINEF_01_50Hz_FIR      | CONV_TYPE_01_Continuous    | 40.0SPS
00897     /// RATE_0000 | LINEF_01_50Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 |  0.3SPS
00898     /// RATE_0001 | LINEF_01_50Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 |  0.7SPS
00899     /// RATE_0010 | LINEF_01_50Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 |  1.3SPS
00900     /// RATE_0011 | LINEF_01_50Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 |  2.7SPS
00901     /// RATE_0100 | LINEF_01_50Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 |  5.3SPS
00902     /// RATE_0101 | LINEF_01_50Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 | 10.0SPS
00903     ///
00904     /// Table 9c. LINEF = 10 Data Rate and Filter Rejection Settings
00905     ///
00906     ///  Rate     | LINEF                  | CONV_TYPE                  | Rate
00907     /// ----------|------------------------|----------------------------|----------
00908     /// RATE_0000 | LINEF_10_60Hz_FIR      | CONV_TYPE_00_Single        |  1.3SPS
00909     /// RATE_0001 | LINEF_10_60Hz_FIR      | CONV_TYPE_00_Single        |  2.5SPS
00910     /// RATE_0010 | LINEF_10_60Hz_FIR      | CONV_TYPE_00_Single        |  5.0SPS
00911     /// RATE_0011 | LINEF_10_60Hz_FIR      | CONV_TYPE_00_Single        | 10.0SPS
00912     /// RATE_0100 | LINEF_10_60Hz_FIR      | CONV_TYPE_00_Single        | 20.0SPS
00913     /// RATE_0101 | LINEF_10_60Hz_FIR      | CONV_TYPE_00_Single        | 35.6SPS
00914     /// RATE_0000 | LINEF_10_60Hz_FIR      | CONV_TYPE_01_Continuous    |  1.3SPS
00915     /// RATE_0001 | LINEF_10_60Hz_FIR      | CONV_TYPE_01_Continuous    |  2.7SPS
00916     /// RATE_0010 | LINEF_10_60Hz_FIR      | CONV_TYPE_01_Continuous    |  5.3SPS
00917     /// RATE_0011 | LINEF_10_60Hz_FIR      | CONV_TYPE_01_Continuous    | 10.7SPS
00918     /// RATE_0100 | LINEF_10_60Hz_FIR      | CONV_TYPE_01_Continuous    | 21.3SPS
00919     /// RATE_0101 | LINEF_10_60Hz_FIR      | CONV_TYPE_01_Continuous    | 40.0SPS
00920     /// RATE_0000 | LINEF_10_60Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 |  0.3SPS
00921     /// RATE_0001 | LINEF_10_60Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 |  0.7SPS
00922     /// RATE_0010 | LINEF_10_60Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 |  1.3SPS
00923     /// RATE_0011 | LINEF_10_60Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 |  2.7SPS
00924     /// RATE_0100 | LINEF_10_60Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 |  5.3SPS
00925     /// RATE_0101 | LINEF_10_60Hz_FIR      | CONV_TYPE_10_DutyCycle_1_4 | 10.0SPS
00926     ///
00927     /// Table 9d. LINEF = 11 Data Rate and Filter Rejection Settings
00928     ///
00929     ///  Rate     | LINEF                  | CONV_TYPE                  | Rate
00930     /// ----------|------------------------|----------------------------|----------
00931     /// RATE_0000 | LINEF_11_SINC4         | CONV_TYPE_00_Single        |     1SPS
00932     /// RATE_0001 | LINEF_11_SINC4         | CONV_TYPE_00_Single        |     2.5SPS
00933     /// RATE_0010 | LINEF_11_SINC4         | CONV_TYPE_00_Single        |     5SPS
00934     /// RATE_0011 | LINEF_11_SINC4         | CONV_TYPE_00_Single        |    10SPS
00935     /// RATE_0100 | LINEF_11_SINC4         | CONV_TYPE_00_Single        |    15SPS
00936     /// RATE_0101 | LINEF_11_SINC4         | CONV_TYPE_00_Single        |    30SPS
00937     /// RATE_0110 | LINEF_11_SINC4         | CONV_TYPE_00_Single        |    60SPS
00938     /// RATE_0111 | LINEF_11_SINC4         | CONV_TYPE_00_Single        |   120SPS
00939     /// RATE_1000 | LINEF_11_SINC4         | CONV_TYPE_00_Single        |   240SPS
00940     /// RATE_1001 | LINEF_11_SINC4         | CONV_TYPE_00_Single        |   480SPS
00941     /// RATE_0000 | LINEF_11_SINC4         | CONV_TYPE_01_Continuous    |    4SPS
00942     /// RATE_0001 | LINEF_11_SINC4         | CONV_TYPE_01_Continuous    |   10SPS
00943     /// RATE_0010 | LINEF_11_SINC4         | CONV_TYPE_01_Continuous    |   20SPS
00944     /// RATE_0011 | LINEF_11_SINC4         | CONV_TYPE_01_Continuous    |   40SPS
00945     /// RATE_0100 | LINEF_11_SINC4         | CONV_TYPE_01_Continuous    |   60SPS
00946     /// RATE_0101 | LINEF_11_SINC4         | CONV_TYPE_01_Continuous    |  120SPS
00947     /// RATE_0110 | LINEF_11_SINC4         | CONV_TYPE_01_Continuous    |  240SPS
00948     /// RATE_0111 | LINEF_11_SINC4         | CONV_TYPE_01_Continuous    |  480SPS
00949     /// RATE_1000 | LINEF_11_SINC4         | CONV_TYPE_01_Continuous    |  960SPS
00950     /// RATE_1001 | LINEF_11_SINC4         | CONV_TYPE_01_Continuous    | 1920SPS
00951     /// RATE_0000 | LINEF_11_SINC4         | CONV_TYPE_10_DutyCycle_1_4 |    1SPS
00952     /// RATE_0001 | LINEF_11_SINC4         | CONV_TYPE_10_DutyCycle_1_4 |    2.5SPS
00953     /// RATE_0010 | LINEF_11_SINC4         | CONV_TYPE_10_DutyCycle_1_4 |    5SPS
00954     /// RATE_0011 | LINEF_11_SINC4         | CONV_TYPE_10_DutyCycle_1_4 |   10SPS
00955     /// RATE_0100 | LINEF_11_SINC4         | CONV_TYPE_10_DutyCycle_1_4 |   15SPS
00956     /// RATE_0101 | LINEF_11_SINC4         | CONV_TYPE_10_DutyCycle_1_4 |   30SPS
00957     /// RATE_0110 | LINEF_11_SINC4         | CONV_TYPE_10_DutyCycle_1_4 |   60SPS
00958     /// RATE_0111 | LINEF_11_SINC4         | CONV_TYPE_10_DutyCycle_1_4 |  120SPS
00959     /// RATE_1000 | LINEF_11_SINC4         | CONV_TYPE_10_DutyCycle_1_4 |  240SPS
00960     /// RATE_1001 | LINEF_11_SINC4         | CONV_TYPE_10_DutyCycle_1_4 |  480SPS
00961     ///
00962     typedef enum MAX11410_RATE_enum_t {
00963         RATE_0000 = 0x00, //!< 0b0000
00964         RATE_0001 = 0x01, //!< 0b0001
00965         RATE_0010 = 0x02, //!< 0b0010
00966         RATE_0011 = 0x03, //!< 0b0011
00967         RATE_0100 = 0x04, //!< 0b0100
00968         RATE_0101 = 0x05, //!< 0b0101
00969         RATE_0110 = 0x06, //!< 0b0110
00970         RATE_0111 = 0x07, //!< 0b0111
00971         RATE_1000 = 0x08, //!< 0b1000
00972         RATE_1001 = 0x09, //!< 0b1001
00973         RATE_1010 = 0x0a, //!< 0b1010
00974         RATE_1011 = 0x0b, //!< 0b1011
00975         RATE_1100 = 0x0c, //!< 0b1100
00976         RATE_1101 = 0x0d, //!< 0b1101
00977         RATE_1110 = 0x0e, //!< 0b1110
00978         RATE_1111 = 0x0f, //!< 0b1111
00979     } MAX11410_RATE_enum_t;
00980 
00981 // CODE GENERATOR: TypedefEnum MAX11410_REF_SEL_enum_t
00982     //----------------------------------------
00983     /// Filter command
00984     /// CMD_r000_1001_dddd_dddd_CTRL REF_SEL[2:0] field
00985     ///
00986     /// - 000: AIN0(REF0P)/AIN1(REF0N)
00987     /// - 001: REF1P/REF1N (default)
00988     /// - 010: REF2P/REF2N
00989     /// - 011: AVDD/AGND
00990     /// - 100: AIN0(REF0P)/AGND (single-ended mode)
00991     /// - 101: REF1P/AGND (single-ended mode)
00992     /// - 110: REF2P/AGND (single-ended mode)
00993     /// - 111: AVDD/AGND
00994     typedef enum MAX11410_REF_SEL_enum_t {
00995         REF_SEL_000_AIN0_AIN1 = 0x00, //!< 0b000
00996         REF_SEL_001_REF1P_REF1N = 0x01, //!< 0b001
00997         REF_SEL_010_REF2P_REF2N = 0x02, //!< 0b010
00998         REF_SEL_011_AVDD_AGND = 0x03, //!< 0b011
00999         REF_SEL_100_AIN0_AGND = 0x04, //!< 0b100
01000         REF_SEL_101_REF1P_AGND = 0x05, //!< 0b101
01001         REF_SEL_110_REF2P_AGND = 0x06, //!< 0b110
01002         REF_SEL_111_AVDD_AGND = 0x07, //!< 0b111
01003     } MAX11410_REF_SEL_enum_t;
01004 
01005 // CODE GENERATOR: TypedefEnum MAX11410_VBIAS_MODE_enum_t
01006     //----------------------------------------
01007     /// Source command
01008     /// CMD_r000_1010_dddd_dddd_SOURCE VBIAS_MODE[1:0] field
01009     ///
01010     /// - 00: Active mode (default)
01011     /// - 01: High impedance; 125kOhm output impedance
01012     /// - 10: Low impedance; 20kOhm output impedance
01013     /// - 11: Low impedance; 20kOhm output impedance
01014     typedef enum MAX11410_VBIAS_MODE_enum_t {
01015         VBIAS_MODE_00_Active = 0x00, //!< 0b00
01016         VBIAS_MODE_01_125kOhm = 0x01, //!< 0b01
01017         VBIAS_MODE_10_20kOhm = 0x02, //!< 0b10
01018         VBIAS_MODE_11_20kOhm = 0x03, //!< 0b11
01019     } MAX11410_VBIAS_MODE_enum_t;
01020 
01021 // CODE GENERATOR: TypedefEnum MAX11410_BRN_MODE_enum_t
01022     //----------------------------------------
01023     /// Source command
01024     /// CMD_r000_1010_dddd_dddd_SOURCE BRN_MODE[1:0] field
01025     ///
01026     /// - 00: Powered down, burnout sources disabled (default)
01027     /// - 01: 0.5uA burnout current sources enabled
01028     /// - 10: 1uA burnout current sources enabled
01029     /// - 11: 10uA burnout current sources enabled
01030     typedef enum MAX11410_BRN_MODE_enum_t {
01031         BRN_MODE_00_disabled = 0x00, //!< 0b00
01032         BRN_MODE_01_0u5A = 0x01, //!< 0b01
01033         BRN_MODE_10_1uA = 0x02, //!< 0b10
01034         BRN_MODE_11_10uA = 0x03, //!< 0b11
01035     } MAX11410_BRN_MODE_enum_t;
01036 
01037 // CODE GENERATOR: TypedefEnum MAX11410_IDAC_MODE_enum_t
01038     //----------------------------------------
01039     /// Source command
01040     /// CMD_r000_1010_dddd_dddd_SOURCE IDAC_MODE[3:0] field
01041     ///
01042     /// - 0000: 10uA (default)
01043     /// - 0001: 50uA
01044     /// - 0010: 75uA
01045     /// - 0011: 100uA
01046     /// - 0100: 125uA
01047     /// - 0101: 150uA
01048     /// - 0110: 175uA
01049     /// - 0111: 200uA
01050     /// - 1000: 225uA
01051     /// - 1001: 250uA
01052     /// - 1010: 300uA
01053     /// - 1011: 400uA
01054     /// - 1100: 600uA
01055     /// - 1101: 800uA
01056     /// - 1110: 1200uA
01057     /// - 1111: 1600uA
01058     typedef enum MAX11410_IDAC_MODE_enum_t {
01059         IDAC_MODE_0000_10uA = 0x00, //!< 0b0000
01060         IDAC_MODE_0001_50uA = 0x01, //!< 0b0001
01061         IDAC_MODE_0010_75uA = 0x02, //!< 0b0010
01062         IDAC_MODE_0011_100uA = 0x03, //!< 0b0011
01063         IDAC_MODE_0100_125uA = 0x04, //!< 0b0100
01064         IDAC_MODE_0101_150uA = 0x05, //!< 0b0101
01065         IDAC_MODE_0110_175uA = 0x06, //!< 0b0110
01066         IDAC_MODE_0111_200uA = 0x07, //!< 0b0111
01067         IDAC_MODE_1000_225uA = 0x08, //!< 0b1000
01068         IDAC_MODE_1001_250uA = 0x09, //!< 0b1001
01069         IDAC_MODE_1010_300uA = 0x0a, //!< 0b1010
01070         IDAC_MODE_1011_400uA = 0x0b, //!< 0b1011
01071         IDAC_MODE_1100_600uA = 0x0c, //!< 0b1100
01072         IDAC_MODE_1101_800uA = 0x0d, //!< 0b1101
01073         IDAC_MODE_1110_1200uA = 0x0e, //!< 0b1110
01074         IDAC_MODE_1111_1600uA = 0x0f, //!< 0b1111
01075     } MAX11410_IDAC_MODE_enum_t;
01076 
01077 // CODE GENERATOR: TypedefEnum MAX11410_AINP_SEL_enum_t
01078     //----------------------------------------
01079     /// Input multiplexer channel selection
01080     /// CMD_r000_1011_dddd_dddd_MUX_CTRL0 field AINP_SEL[3:0]
01081     ///
01082     /// - 0000: AINP = AIN0
01083     /// - 0001: AINP = AIN1
01084     /// - 0010: AINP = AIN2
01085     /// - 0011: AINP = AIN3
01086     /// - 0100: AINP = AIN4
01087     /// - 0101: AINP = AIN5
01088     /// - 0110: AINP = AIN6
01089     /// - 0111: AINP = AIN7
01090     /// - 1000: AINP = AIN8
01091     /// - 1001: AINP = AIN9
01092     /// - 1010: AINP = AVDD
01093     /// - 1011: AINN = Unconnected
01094     /// - 1100: AINN = Unconnected
01095     /// - 1101: AINN = Unconnected
01096     /// - 1110: AINN = Unconnected
01097     /// - 1111: AINN = Unconnected (default)
01098     typedef enum MAX11410_AINP_SEL_enum_t {
01099         AINP_SEL_0000_AIN0 = 0x00, //!< 0b0000
01100         AINP_SEL_0001_AIN1 = 0x01, //!< 0b0001
01101         AINP_SEL_0010_AIN2 = 0x02, //!< 0b0010
01102         AINP_SEL_0011_AIN3 = 0x03, //!< 0b0011
01103         AINP_SEL_0100_AIN4 = 0x04, //!< 0b0100
01104         AINP_SEL_0101_AIN5 = 0x05, //!< 0b0101
01105         AINP_SEL_0110_AIN6 = 0x06, //!< 0b0110
01106         AINP_SEL_0111_AIN7 = 0x07, //!< 0b0111
01107         AINP_SEL_1000_AIN8 = 0x08, //!< 0b1000
01108         AINP_SEL_1001_AIN9 = 0x09, //!< 0b1001
01109         AINP_SEL_1010_AVDD = 0x0a, //!< 0b1010
01110         AINP_SEL_1011_unconnected = 0x0b, //!< 0b1011
01111         AINP_SEL_1100_unconnected = 0x0c, //!< 0b1100
01112         AINP_SEL_1101_unconnected = 0x0d, //!< 0b1101
01113         AINP_SEL_1110_unconnected = 0x0e, //!< 0b1110
01114         AINP_SEL_1111_unconnected = 0x0f, //!< 0b1111
01115     } MAX11410_AINP_SEL_enum_t;
01116 
01117 // CODE GENERATOR: TypedefEnum MAX11410_AINN_SEL_enum_t
01118     //----------------------------------------
01119     /// Input multiplexer channel selection
01120     /// CMD_r000_1011_dddd_dddd_MUX_CTRL0 field AINN_SEL[3:0]
01121     ///
01122     /// - 0000: AINN = AIN0
01123     /// - 0001: AINN = AIN1
01124     /// - 0010: AINN = AIN2
01125     /// - 0011: AINN = AIN3
01126     /// - 0100: AINN = AIN4
01127     /// - 0101: AINN = AIN5
01128     /// - 0110: AINN = AIN6
01129     /// - 0111: AINN = AIN7
01130     /// - 1000: AINN = AIN8
01131     /// - 1001: AINN = AIN9
01132     /// - 1010: AINN = GND
01133     /// - 1011: AINN = Unconnected
01134     /// - 1100: AINN = Unconnected
01135     /// - 1101: AINN = Unconnected
01136     /// - 1110: AINN = Unconnected
01137     /// - 1111: AINN = Unconnected (default)
01138     typedef enum MAX11410_AINN_SEL_enum_t {
01139         AINN_SEL_0000_AIN0 = 0x00, //!< 0b0000
01140         AINN_SEL_0001_AIN1 = 0x01, //!< 0b0001
01141         AINN_SEL_0010_AIN2 = 0x02, //!< 0b0010
01142         AINN_SEL_0011_AIN3 = 0x03, //!< 0b0011
01143         AINN_SEL_0100_AIN4 = 0x04, //!< 0b0100
01144         AINN_SEL_0101_AIN5 = 0x05, //!< 0b0101
01145         AINN_SEL_0110_AIN6 = 0x06, //!< 0b0110
01146         AINN_SEL_0111_AIN7 = 0x07, //!< 0b0111
01147         AINN_SEL_1000_AIN8 = 0x08, //!< 0b1000
01148         AINN_SEL_1001_AIN9 = 0x09, //!< 0b1001
01149         AINN_SEL_1010_GND = 0x0a, //!< 0b1010
01150         AINN_SEL_1011_unconnected = 0x0b, //!< 0b1011
01151         AINN_SEL_1100_unconnected = 0x0c, //!< 0b1100
01152         AINN_SEL_1101_unconnected = 0x0d, //!< 0b1101
01153         AINN_SEL_1110_unconnected = 0x0e, //!< 0b1110
01154         AINN_SEL_1111_unconnected = 0x0f, //!< 0b1111
01155     } MAX11410_AINN_SEL_enum_t;
01156 
01157 // CODE GENERATOR: TypedefEnum MAX11410_IDAC1_SEL_enum_t
01158     //----------------------------------------
01159     /// Input multiplexer channel selection
01160     /// CMD_r000_1100_dddd_dddd_MUX_CTRL1 field IDAC1_SEL[3:0]
01161     ///
01162     /// - 0000: AIN0
01163     /// - 0001: AIN1
01164     /// - 0010: AIN2
01165     /// - 0011: AIN3
01166     /// - 0100: AIN4
01167     /// - 0101: AIN5
01168     /// - 0110: AIN6
01169     /// - 0111: AIN7
01170     /// - 1000: AIN8
01171     /// - 1001: AIN9
01172     /// - 1010: Unconnected; IDAC1 powered down.
01173     /// - 1011: Unconnected; IDAC1 powered down.
01174     /// - 1100: Unconnected; IDAC1 powered down.
01175     /// - 1101: Unconnected; IDAC1 powered down.
01176     /// - 1110: Unconnected; IDAC1 powered down.
01177     /// - 1111: Unconnected; IDAC1 powered down.(Default)
01178     typedef enum MAX11410_IDAC1_SEL_enum_t {
01179         IDAC1_SEL_0000_AIN0 = 0x00, //!< 0b0000
01180         IDAC1_SEL_0001_AIN1 = 0x01, //!< 0b0001
01181         IDAC1_SEL_0010_AIN2 = 0x02, //!< 0b0010
01182         IDAC1_SEL_0011_AIN3 = 0x03, //!< 0b0011
01183         IDAC1_SEL_0100_AIN4 = 0x04, //!< 0b0100
01184         IDAC1_SEL_0101_AIN5 = 0x05, //!< 0b0101
01185         IDAC1_SEL_0110_AIN6 = 0x06, //!< 0b0110
01186         IDAC1_SEL_0111_AIN7 = 0x07, //!< 0b0111
01187         IDAC1_SEL_1000_AIN8 = 0x08, //!< 0b1000
01188         IDAC1_SEL_1001_AIN9 = 0x09, //!< 0b1001
01189         IDAC1_SEL_1010_unconnected = 0x0a, //!< 0b1010
01190         IDAC1_SEL_1011_unconnected = 0x0b, //!< 0b1011
01191         IDAC1_SEL_1100_unconnected = 0x0c, //!< 0b1100
01192         IDAC1_SEL_1101_unconnected = 0x0d, //!< 0b1101
01193         IDAC1_SEL_1110_unconnected = 0x0e, //!< 0b1110
01194         IDAC1_SEL_1111_unconnected = 0x0f, //!< 0b1111
01195     } MAX11410_IDAC1_SEL_enum_t;
01196 
01197 // CODE GENERATOR: TypedefEnum MAX11410_IDAC0_SEL_enum_t
01198     //----------------------------------------
01199     /// Input multiplexer channel selection
01200     /// CMD_r000_1100_dddd_dddd_MUX_CTRL1 field IDAC0_SEL[3:0]
01201     ///
01202     /// - 0000: AIN0
01203     /// - 0001: AIN1
01204     /// - 0010: AIN2
01205     /// - 0011: AIN3
01206     /// - 0100: AIN4
01207     /// - 0101: AIN5
01208     /// - 0110: AIN6
01209     /// - 0111: AIN7
01210     /// - 1000: AIN8
01211     /// - 1001: AIN9
01212     /// - 1010: Unconnected; IDAC0 powered down.
01213     /// - 1011: Unconnected; IDAC0 powered down.
01214     /// - 1100: Unconnected; IDAC0 powered down.
01215     /// - 1101: Unconnected; IDAC0 powered down.
01216     /// - 1110: Unconnected; IDAC0 powered down.
01217     /// - 1111: Unconnected; IDAC0 powered down.(Default)
01218     typedef enum MAX11410_IDAC0_SEL_enum_t {
01219         IDAC0_SEL_0000_AIN0 = 0x00, //!< 0b0000
01220         IDAC0_SEL_0001_AIN1 = 0x01, //!< 0b0001
01221         IDAC0_SEL_0010_AIN2 = 0x02, //!< 0b0010
01222         IDAC0_SEL_0011_AIN3 = 0x03, //!< 0b0011
01223         IDAC0_SEL_0100_AIN4 = 0x04, //!< 0b0100
01224         IDAC0_SEL_0101_AIN5 = 0x05, //!< 0b0101
01225         IDAC0_SEL_0110_AIN6 = 0x06, //!< 0b0110
01226         IDAC0_SEL_0111_AIN7 = 0x07, //!< 0b0111
01227         IDAC0_SEL_1000_AIN8 = 0x08, //!< 0b1000
01228         IDAC0_SEL_1001_AIN9 = 0x09, //!< 0b1001
01229         IDAC0_SEL_1010_unconnected = 0x0a, //!< 0b1010
01230         IDAC0_SEL_1011_unconnected = 0x0b, //!< 0b1011
01231         IDAC0_SEL_1100_unconnected = 0x0c, //!< 0b1100
01232         IDAC0_SEL_1101_unconnected = 0x0d, //!< 0b1101
01233         IDAC0_SEL_1110_unconnected = 0x0e, //!< 0b1110
01234         IDAC0_SEL_1111_unconnected = 0x0f, //!< 0b1111
01235     } MAX11410_IDAC0_SEL_enum_t;
01236 
01237 // CODE GENERATOR: TypedefEnum MAX11410_SIG_PATH_enum_t
01238     //----------------------------------------
01239     /// Input multiplexer channel selection
01240     /// CMD_r000_1110_00ss_0ggg_PGA field SIG_PATH[1:0]
01241     ///
01242     /// - 00: Buffered, low-power, unity-gain path (PGA disabled, digital gain) [default]
01243     /// - 01: Bypass path (signal buffer disabled,PGA disabled, digital gain)
01244     /// - 10: PGA path (signal buffer disabled, analog gain)
01245     /// - 11: Reserved
01246     typedef enum MAX11410_SIG_PATH_enum_t {
01247         SIG_PATH_00_BUFFERED = 0x00, //!< 0b00
01248         SIG_PATH_01_BYPASS = 0x01, //!< 0b01
01249         SIG_PATH_10_PGA = 0x02, //!< 0b10
01250         SIG_PATH_11_reserved = 0x03, //!< 0b11
01251     } MAX11410_SIG_PATH_enum_t;
01252 
01253 // CODE GENERATOR: TypedefEnum MAX11410_GAIN_enum_t
01254     //----------------------------------------
01255     /// Input multiplexer channel selection
01256     /// CMD_r000_1110_00ss_0ggg_PGA field GAIN[2:0]
01257     ///
01258     /// - 000: 1 (default)
01259     /// - 001: 2
01260     /// - 010: 4
01261     /// - 011: 8
01262     /// - 100: 16
01263     /// - 101: 32
01264     /// - 110: 64
01265     /// - 111: 128
01266     typedef enum MAX11410_GAIN_enum_t {
01267         GAIN_000_1 = 0x00, //!< 0b000
01268         GAIN_001_2 = 0x01, //!< 0b001
01269         GAIN_010_4 = 0x02, //!< 0b010
01270         GAIN_011_8 = 0x03, //!< 0b011
01271         GAIN_100_16 = 0x04, //!< 0b100
01272         GAIN_101_32 = 0x05, //!< 0b101
01273         GAIN_110_64 = 0x06, //!< 0b110
01274         GAIN_111_128 = 0x07, //!< 0b111
01275     } MAX11410_GAIN_enum_t;
01276 
01277 // TODO1: CODE GENERATOR: ic_variant -- IC's supported with this driver
01278     /**
01279      * @brief IC's supported with this driver
01280      * @details MAX11410
01281      */
01282     typedef enum
01283     {
01284         MAX11410_IC = 0,
01285         //MAX11410_IC = 1
01286     } MAX11410_ic_t;
01287 
01288 // TODO1: CODE GENERATOR: class constructor declaration
01289     /**********************************************************//**
01290     * @brief Constructor for MAX11410 Class.
01291     *
01292     * @details Requires an existing SPI object as well as a DigitalOut object.
01293     * The DigitalOut object is used for a chip enable signal
01294     *
01295     * On Entry:
01296     *     @param[in] spi - pointer to existing SPI object
01297     *     @param[in] cs_pin - pointer to a DigitalOut pin object
01298     *     CODE GENERATOR: class constructor docstrings gpio InputPin pins
01299     *     CODE GENERATOR: class constructor docstrings gpio OutputPin pins
01300     *     @param[in] ic_variant - which type of MAX11410 is used
01301     *
01302     * On Exit:
01303     *
01304     * @return None
01305     **************************************************************/
01306     MAX11410(SPI &spi, DigitalOut &cs_pin, // SPI interface
01307             // CODE GENERATOR: class constructor declaration gpio InputPin pins
01308             // CODE GENERATOR: class constructor declaration gpio OutputPin pins
01309             MAX11410_ic_t ic_variant);
01310 
01311 // CODE GENERATOR: class destructor declaration
01312     /************************************************************
01313      * @brief Default destructor for MAX11410 Class.
01314      *
01315      * @details Destroys SPI object if owner
01316      *
01317      * On Entry:
01318      *
01319      * On Exit:
01320      *
01321      * @return None
01322      **************************************************************/
01323     ~MAX11410();
01324 
01325     // CODE GENERATOR: Declare SPI diagnostic function pointer void onSPIprint()
01326     /// Function pointer void f(size_t byteCount, uint8_t mosiData[], uint8_t misoData[])
01327     Callback<void(size_t, uint8_t*, uint8_t*)> onSPIprint; //!< optional @ref onSPIprint SPI diagnostic function
01328 
01329     // CODE GENERATOR: spi_frequency setter declaration
01330     /// set SPI SCLK frequency
01331     void spi_frequency(int spi_sclk_Hz);
01332 
01333     // CODE GENERATOR: spi_frequency getter declaration and definition
01334     /// get SPI SCLK frequency
01335     int get_spi_frequency() const { return m_SPI_SCLK_Hz; }
01336 
01337     // CODE GENERATOR: spi_dataMode getter declaration and definition
01338     /// get SPI mode
01339     int get_spi_dataMode() const { return m_SPI_dataMode; }
01340 
01341 //----------------------------------------
01342 // CODE GENERATOR: omit typedef enum MAX11410_device_t, class members instead of global device object
01343 public:
01344 
01345     /// AIN0-AIN1 reference voltage, in Volts
01346     double ref0_v;
01347 
01348     /// REF1P-REF1N reference voltage, in Volts
01349     double ref1_v;
01350 
01351     /// REF2P-REF2N reference voltage, in Volts
01352     double ref2_v;
01353 
01354     /// AVDD-AGND reference voltage, in Volts
01355     double avdd_v;
01356 
01357     /// shadow of register ctrl CMD_r000_1001_dddd_dddd_CTRL
01358     uint32_t ctrl;
01359 
01360     /// read-only pga gain 1, 2, 4, 8, 16, 32, 64, or 128 set by Configure_PGA gain index register pga CMD_r000_1110_00ss_0ggg_PGA
01361     uint8_t pgaGain;
01362 
01363     /// shadow of read-only register status CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS
01364     uint32_t status;
01365 
01366     /// shadow of read-only register data0 CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0
01367     uint32_t data0;
01368 
01369     /// Each channel's most recent value in LSBs.
01370     /// Updated by Measure_Voltage function.
01371     /// Use VoltageOfCode function to convert LSBs to physical voltage.
01372     /// (Valid index range AINP_SEL_0000_AIN0 to AINP_SEL_1010_AVDD).
01373     /// AINP_SEL_1010_AVDD is a sentinel position.
01374     ///
01375     uint32_t AINcode[11];
01376 
01377     /// When driver polls status of a pin signal or a register status bit,
01378     /// and there is no device physically connected, the driver must
01379     /// be able to halt and report failure if too many tries. Each attempt
01380     /// counts down until loop_limit is reached or exceeded.
01381     ///
01382     /// If driver seems to hang or takes too long to decide that device
01383     /// is not connected, reduce the futility countdown limit value.
01384     ///
01385     /// If driver sometimes works but sometimes intermittently fails to
01386     /// recognize device is attached, increase the futility countdown limit.
01387     int loop_limit;
01388 
01389     /// read-only constant list of registers to be read by menu item * with no arguments
01390     MAX11410::MAX11410_CMD_enum_t* readAllStatusList;
01391 
01392     /// read-only constant number of registers to be read by menu item * with no arguments
01393     uint8_t readAllStatusListLen;
01394 
01395     /// timing delay after enable RTD bias current in Measure_RTD()
01396     int rtd_ms;
01397 
01398     /// RTD Resistance measurement; Thermocouple Cold Junction, in Ohms
01399     double rtd_ohm;
01400 
01401     /// Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
01402     double rtd_degc;
01403 
01404     /// filter register configuration in Measure_RTD()
01405     uint8_t rtd_filter;
01406 
01407     /// ctrl register configuration in Measure_RTD()
01408     uint8_t rtd_ctrl;
01409 
01410     /// source register configuration in Measure_RTD()
01411     uint8_t rtd_source;
01412 
01413     /// pga register configuration in Measure_RTD()
01414     uint8_t rtd_pga;
01415 
01416     /// filter register configuration in Measure_Voltage()
01417     uint8_t v_filter;
01418 
01419     /// ctrl register configuration in Measure_Voltage()
01420     uint8_t v_ctrl;
01421 
01422     /// pga register configuration in Measure_Voltage()
01423     uint8_t v_pga;
01424 
01425     /// Thermocouple voltage measurement, in Volts
01426     double tc_v;
01427 
01428     /// Temperature calculated from Thermocouple voltage, in degrees C
01429     double tc_delta_degc;
01430 
01431     /// Temperature calculated from Thermocouple voltage, in degrees C
01432     double tc_degc;
01433 
01434 // CODE GENERATOR: omit global g_MAX11410_device
01435 
01436 // CODE GENERATOR: extern function declarations
01437 // CODE GENERATOR: extern function declaration SPIoutputCS
01438 //----------------------------------------
01439 // Assert SPI Chip Select
01440 // SPI chip-select for MAX11410
01441 //
01442     void SPIoutputCS(int isLogicHigh);
01443 
01444 // CODE GENERATOR: extern function declaration SPIwrite16bits
01445 //----------------------------------------
01446 // SPI write 16 bits
01447 // SPI interface to MAX11410 shift 16 bits mosiData into MAX11410 DIN
01448 //
01449     void SPIwrite16bits(int16_t mosiData16);
01450 
01451 // CODE GENERATOR: extern function declaration SPIreadWrite16bits
01452 //----------------------------------------
01453 // SPI read and write 16 bits
01454 // SPI interface to MAX11410 shift 16 bits mosiData16 into MAX11410 DIN
01455 // while simultaneously capturing 16 bits miso data from MAX11410 DOUT
01456 //
01457     int16_t SPIreadWrite16bits(int16_t mosiData16);
01458 
01459 // CODE GENERATOR: extern function declaration SPIreadWrite32bits
01460 //----------------------------------------
01461 // SPI read and write 32 bits
01462 // SPI interface to MAX11410 shift 32 bits mosiData into MAX11410 DIN
01463 // while simultaneously capturing 32 bits miso data from MAX11410 DOUT
01464 //
01465     int32_t SPIreadWrite32bits(int32_t mosiData32);
01466 
01467 // CODE GENERATOR: class member data
01468 private:
01469 // CODE GENERATOR: class member data for SPI interface
01470     // SPI object
01471     SPI &m_spi;
01472     int m_SPI_SCLK_Hz;
01473     int m_SPI_dataMode;
01474     int m_SPI_cs_state;
01475 
01476     // Selector pin object
01477     DigitalOut &m_cs_pin;
01478 
01479 // CODE GENERATOR: class member data for gpio InputPin pins
01480 // CODE GENERATOR: class member data for gpio OutputPin pins
01481 
01482     // Identifies which IC variant is being used
01483     MAX11410_ic_t m_ic_variant;
01484 
01485 public:
01486 
01487 // CODE GENERATOR: class member function declarations
01488     //----------------------------------------
01489     /// Menu item '!'
01490     /// Initialize device
01491     ///
01492     /// @test Init() expect 1
01493     ///
01494     /// @test group POR // verify initial register values
01495     /// @test group PORverbose // verify initial register values
01496     /// @test group PORverbose tinyTester.print("PART_ID value")
01497     /// @test group POR RegRead(MAX11410::CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID, buffer) expect 1 expect-buffer 0x000F02
01498     ///
01499     /// @test group PORverbose tinyTester.print("POR value 0x04 CMD_r000_0100_dddd_xddd_GP0_CTRL")
01500     /// @test group POR RegRead(MAX11410::CMD_r000_0100_dddd_xddd_GP0_CTRL, buffer) expect 1 expect-buffer 0x00
01501     ///
01502     /// @test group PORverbose tinyTester.print("POR value 0x05 CMD_r000_0101_dddd_xddd_GP1_CTRL")
01503     /// @test group POR RegRead(MAX11410::CMD_r000_0101_dddd_xddd_GP1_CTRL, buffer) expect 1 expect-buffer 0x00
01504     ///
01505     /// @test group PORverbose tinyTester.print("POR value 0x07 CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR")
01506     /// @test group POR RegRead(MAX11410::CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR, buffer) expect 1 expect-buffer 0x00003a
01507     ///
01508     /// @test group PORverbose tinyTester.print("POR value 0x08 CMD_r000_1000_x0dd_dddd_FILTER")
01509     /// @test group POR RegRead(MAX11410::CMD_r000_1000_x0dd_dddd_FILTER, buffer) expect 1 expect-buffer 0x00
01510     ///
01511     /// @test group PORverbose tinyTester.print("POR value 0x09 CMD_r000_1001_dddd_dddd_CTRL")
01512     /// @test group POR RegRead(MAX11410::CMD_r000_1001_dddd_dddd_CTRL, buffer) expect 1 expect-buffer 0x000001
01513     ///
01514     /// @test group PORverbose tinyTester.print("POR value 0x0a CMD_r000_1010_dddd_dddd_SOURCE")
01515     /// @test group POR RegRead(MAX11410::CMD_r000_1010_dddd_dddd_SOURCE, buffer) expect 1 expect-buffer 0x00
01516     ///
01517     /// @test group PORverbose tinyTester.print("POR value 0x0b CMD_r000_1011_dddd_dddd_MUX_CTRL0")
01518     /// @test group POR RegRead(MAX11410::CMD_r000_1011_dddd_dddd_MUX_CTRL0, buffer) expect 1 expect-buffer 0x0000ff
01519     ///
01520     /// @test group PORverbose tinyTester.print("POR value 0x0c CMD_r000_1100_dddd_dddd_MUX_CTRL1")
01521     /// @test group POR RegRead(MAX11410::CMD_r000_1100_dddd_dddd_MUX_CTRL1, buffer) expect 1 expect-buffer 0x0000ff
01522     ///
01523     /// @test group PORverbose tinyTester.print("POR value 0x0d CMD_r000_1101_dddd_dddd_MUX_CTRL2")
01524     /// @test group POR RegRead(MAX11410::CMD_r000_1101_dddd_dddd_MUX_CTRL2, buffer) expect 1 expect-buffer 0x00
01525     ///
01526     /// @test group PORverbose tinyTester.print("POR value 0x0e CMD_r000_1110_00ss_0ggg_PGA")
01527     /// @test group POR RegRead(MAX11410::CMD_r000_1110_00ss_0ggg_PGA, buffer) expect 1 expect-buffer 0x00
01528     ///
01529     /// @future test     CMD_r000_1111_dddd_dddd_WAIT_EXT = 0x0f, //!< 0b0001111
01530     /// @future test     CMD_r001_0000_xxxx_xxxx_WAIT_START = 0x10, //!< 0b0010000
01531     ///
01532     /// @test group RES1KA2A3TOGND // measure a 1kohm resistor between (AIN2,AIN3) and AGND to verify ref2_v (disabled by default)
01533     /// @test group RES1KA2A3TOGNDMORE // measure a 1kohm resistor between (AIN2,AIN3) and AGND to verify ref2_v in more detail
01534     /// @test group RES1KA2A3TOGNDMORE tinyTester.print("measure a 1kohm resistor between (AIN2,AIN3) and AGND to verify ref2_v")
01535     /// @test group RES1KA2A3TOGND tinyTester.settle_time_msec = 1000 // default 250
01536     /// @test group RES1KA2A3TOGND RegWrite(0x0C, 0xF3) expect 1 // *mux_ctrl1=0xf3 drives current source from AIN3
01537     ///
01538     /// @test group RES1KA2A3TOGNDMORE RegWrite(0x0A, 0x03) expect 1 // *source=0x03 idac_mode=100uA, 1k resistor 0.1V
01539     /// @test group RES1KA2A3TOGNDMORE tinyTester.print("idac_mode=100uA, 1k resistor 0.1V")
01540     /// @test group RES1KA2A3TOGNDMORE tinyTester.Wait_Output_Settling()
01541     /// @test group RES1KA2A3TOGNDMORE Measure_Voltage(2,10) expect 0.1
01542     /// @test group RES1KA2A3TOGNDMORE AINcode[2] expect (uint32_t)337731 within 33773 // idac_mode=100uA, 1k resistor 0.1V
01543     ///
01544     /// @test group RES1KA2A3TOGNDMORE RegWrite(0x0A, 0x0D) expect 1 // *source=0x0d idac_mode=800uA, 1k resistor 0.8V
01545     /// @test group RES1KA2A3TOGNDMORE tinyTester.print("idac_mode=800uA, 1k resistor 0.8V")
01546     /// @test group RES1KA2A3TOGNDMORE tinyTester.Wait_Output_Settling()
01547     /// @test group RES1KA2A3TOGNDMORE Measure_Voltage(2,10) expect 0.8
01548     /// @test group RES1KA2A3TOGNDMORE AINcode[2] expect (uint32_t)2724467 within 33773 // idac_mode=800uA, 1k resistor 0.8V
01549     ///
01550     /// @test group RES1KA2A3TOGND RegWrite(0x0A, 0x0B) expect 1 // *source=0x0b idac_mode=400uA, 1k resistor 0.4V
01551     /// @test group RES1KA2A3TOGNDMORE tinyTester.print("idac_mode=400uA, 1k resistor 0.4V")
01552     /// @test group RES1KA2A3TOGND tinyTester.Wait_Output_Settling()
01553     /// @test group RES1KA2A3TOGND Measure_Voltage(2,10) expect 0.4
01554     /// @test group RES1KA2A3TOGNDMORE AINcode[2] expect (uint32_t)1343163 within 33773 // idac_mode=400uA, 1k resistor 0.4V
01555     ///
01556     /// @test tinyTester.print("check filter register is writeable")
01557     /// @future test tinyTester.print("this is a real mess dealing with the custom types")
01558     /// @test RegWrite(0x08, 0x34) expect 1
01559     /// @future test tinyTester.print("error: no matching function for call to 'MaximTinyTester::FunctionCall_Expect(const char [18], uint8_t (&)(MAX11410::MAX11410_CMD_enum_t, uint32_t), MAX11410::MAX11410_CMD_enum_t, uint32_t, int)'")
01560     /// @future test RegWrite(CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1
01561     /// @future test RegWrite(MAX11410_CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1
01562     /// @future test RegWrite(MAX11410::MAX11410_CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1
01563     ///
01564     /// @test tinyTester.print("check filter register is readable")
01565     /// @test RegRead(0x08, buffer) expect 1 expect-buffer 0x34
01566     /// @future test RegRead(MAX11410::MAX11410_CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, &buffer) expect 1 expect-buffer 0x34
01567     ///
01568     /// @test tinyTester.settle_time_msec = 250 // default 250
01569     /// @test tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
01570     /// @test tinyTester.input_timeout_time_msec = 250 // default 250
01571     /// @test tinyTester.settle_time_msec = 20 // default 250
01572     /// @test tinyTester.blink_time_msec = 20 // quickly speed through the software verification
01573     /// @test tinyTester.input_timeout_time_msec = 100 // default 250
01574     ///
01575     /// @test tinyTester.Wait_Output_Settling()
01576     ///
01577     /// @future test tinyTester.DigitalIn_Read_Expect_WarnOnly(DigitalIn& digitalInPin, const char* pinName, int expect_result, const char *expect_description)
01578     ///
01579     /// @return 1 on success; 0 on failure
01580     uint8_t Init(void);
01581 
01582     //----------------------------------------
01583     /// Return the physical voltage corresponding to conversion result,
01584     /// for unipolar mode.
01585     /// Does not perform any offset or gain correction.
01586     ///
01587     /// @pre CTRL::U_BN = 1 -- Unipolar mode
01588     /// @pre CTRL::FORMAT = x
01589     /// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
01590     /// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
01591     /// @return physical voltage corresponding to MAX11410 code.
01592     ///
01593     /// @test group UNIPOLAR // Verify function VoltageOfCode_Unipolar
01594     /// @test group UNIPOLAR tinyTester.blink_time_msec = 20 // quickly speed through the software verification
01595     /// @test group UNIPOLAR Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V
01596     /// @test group UNIPOLAR Configure_PGA(0,0) expect 1 // These tests require PGA gain=1
01597     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0xFFFFFF) expect 2.500 within 0.030 // Full Scale
01598     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0xFFFFFE) expect 2.500              // Full Scale
01599     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0xCCCCCC) expect 2.000              // Two Volts
01600     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0xC00000) expect 1.875              // 75% Scale
01601     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0x800000) expect 1.250              // Mid Scale
01602     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0x666666) expect 1.000              // One Volt
01603     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0x400000) expect 0.625              // 25% Scale
01604     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0x0A3D70) expect 0.100              // 100mV
01605     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0x000064) expect 0.000014901162     // 100 LSB
01606     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0x00000A) expect 0.0000014901162    // Ten LSB
01607     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0x000003) expect 0.00000044703483   // Three LSB
01608     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0x000002) expect 0.00000029802326   // Two LSB
01609     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0x000001) expect 0.00000014901162   // One LSB
01610     /// @test group UNIPOLAR VoltageOfCode_Unipolar(0x000000) expect 0.0                // Zero Scale
01611     /// @test group UNIPOLAR tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
01612     ///
01613     double VoltageOfCode_Unipolar(uint32_t value_u24);
01614 
01615     //----------------------------------------
01616     /// Return the physical voltage corresponding to conversion result,
01617     /// when conversion format is Bipolar mode, offset binary.
01618     /// Does not perform any offset or gain correction.
01619     ///
01620     /// @pre CTRL::U_BN = 0 -- Bipolar mode
01621     /// @pre CTRL::FORMAT = 1 -- offset binary
01622     /// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
01623     /// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
01624     /// @return physical voltage corresponding to MAX11410 code.
01625     ///
01626     /// @test group BIPOB // Verify function VoltageOfCode_Bipolar_OffsetBinary
01627     /// @test group BIPOB tinyTester.blink_time_msec = 20 // quickly speed through the software verification
01628     /// @test group BIPOB Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V
01629     /// @test group BIPOB Configure_PGA(0,0) expect 1 // These tests require PGA gain=1
01630     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xFFFFFF) expect 2.5 within 0.030  // Full Scale
01631     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xFFFFFE) expect 2.5               // Full Scale
01632     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xC00000) expect 1.25              // Mid Scale
01633     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800003) expect 0.00000894069671  // Three LSB
01634     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800002) expect 0.00000596046447  // Two LSB
01635     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800001) expect 0.0000029802326   // One LSB
01636     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800000) expect 0.0               // Zero Scale
01637     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFF) expect -0.0000029802326  // Negative One LSB
01638     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFE) expect -0.0000059604644  // Negative Two LSB
01639     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFD) expect -0.0000089406967  // Negative Three LSB
01640     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x400000) expect -1.25             // Negative Mid Scale
01641     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x000001) expect -2.5              // Negative Full Scale
01642     /// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x000000) expect -2.5              // Negative Full Scale
01643     /// @test group BIPOB tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
01644     ///
01645     double VoltageOfCode_Bipolar_OffsetBinary(uint32_t value_u24);
01646 
01647     //----------------------------------------
01648     /// Return the physical voltage corresponding to conversion result,
01649     /// when conversion format is Bipolar mode, 2's complement.
01650     /// Does not perform any offset or gain correction.
01651     ///
01652     /// @pre CTRL::U_BN = 0 -- Bipolar mode
01653     /// @pre CTRL::FORMAT = 0 -- 2's complement
01654     /// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
01655     /// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
01656     /// @return physical voltage corresponding to MAX11410 code.
01657     ///
01658     /// @test group BIP2C // Verify function VoltageOfCode_Bipolar_2sComplement
01659     /// @test group BIP2C tinyTester.blink_time_msec = 20 // quickly speed through the software verification
01660     /// @test group BIP2C Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V
01661     /// @test group BIP2C Configure_PGA(0,0) expect 1 // These tests require PGA gain=1
01662     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x7FFFFF) expect 2.500 within 0.030 // Full Scale
01663     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x7FFFFE) expect 2.500              // Full Scale
01664     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x666666) expect 2.000              // Two Volts
01665     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x600000) expect 1.875              // 75% Scale
01666     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x400000) expect 1.250              // Mid Scale
01667     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x333333) expect 1.000              // One Volt
01668     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x200000) expect 0.625              // 25% Scale
01669     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x051eb8) expect 0.100              // 100mV
01670     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000003) expect 0.00000894069671   // Three LSB
01671     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000002) expect 0.00000596046447   // Two LSB
01672     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000001) expect 0.0000029802326    // One LSB
01673     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000000) expect 0.0                // Zero Scale
01674     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFF) expect -0.0000029802326   // Negative One LSB
01675     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFE) expect -0.0000059604644   // Negative Two LSB
01676     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFD) expect -0.0000089406967   // Negative Three LSB
01677     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFAE148) expect -0.100             // Negative 100mV
01678     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xE00000) expect -0.625             // Negative 25% Scale
01679     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xCCCCCD) expect -1.000             // Negative One Volt
01680     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xC00000) expect -1.250             // Negative Mid Scale
01681     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xA00000) expect -1.875             // Negative 75% Scale
01682     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x99999A) expect -2.000             // Negative Two Volts
01683     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x800001) expect -2.500             // Negative Full Scale
01684     /// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x800000) expect -2.500             // Negative Full Scale
01685     /// @test group BIP2C tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
01686     ///
01687     double VoltageOfCode_Bipolar_2sComplement(uint32_t value_u24);
01688 
01689     //----------------------------------------
01690     /// Return the physical voltage corresponding to conversion result,
01691     /// when conversion format is determined by the CTRL register.
01692     /// Does not perform any offset or gain correction.
01693     ///
01694     /// @pre CTRL::U_BN and CTRL::FORMAT = 0 select offset binary, 2's complement, or straight binary
01695     /// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
01696     /// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
01697     /// @return physical voltage corresponding to MAX11410 code.
01698     double VoltageOfCode(uint32_t value_u24);
01699 
01700 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
01701 // CODE GENERATOR: looks like this is a 'write' register access function
01702     //----------------------------------------
01703     /// Write a MAX11410 register.
01704     ///
01705     /// CMDOP_1aaa_aaaa_ReadRegister bit is cleared 0 indicating a write operation.
01706     ///
01707     /// MAX11410 register length can be determined by function RegSize.
01708     ///
01709     /// For 8-bit register size:
01710     ///
01711     ///     SPI 16-bit transfer
01712     ///
01713     ///     SPI MOSI = 0aaa_aaaa_dddd_dddd
01714     ///
01715     ///     SPI MISO = xxxx_xxxx_xxxx_xxxx
01716     ///
01717     /// For 16-bit register size:
01718     ///
01719     ///     SPI 24-bit or 32-bit transfer
01720     ///
01721     ///     SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
01722     ///
01723     ///     SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
01724     ///
01725     /// For 24-bit register size:
01726     ///
01727     ///     SPI 32-bit transfer
01728     ///
01729     ///     SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
01730     ///
01731     ///     SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
01732     ///
01733     /// @return 1 on success; 0 on failure
01734     uint8_t RegWrite(MAX11410_CMD_enum_t commandByte, uint32_t regData);
01735 
01736 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
01737 // CODE GENERATOR: looks like this is a 'read' register access function
01738     //----------------------------------------
01739     /// Read an 8-bit MAX11410 register
01740     ///
01741     /// CMDOP_1aaa_aaaa_ReadRegister bit is set 1 indicating a read operation.
01742     ///
01743     /// MAX11410 register length can be determined by function RegSize.
01744     ///
01745     /// For 8-bit register size:
01746     ///
01747     ///     SPI 16-bit transfer
01748     ///
01749     ///     SPI MOSI = 1aaa_aaaa_0000_0000
01750     ///
01751     ///     SPI MISO = xxxx_xxxx_dddd_dddd
01752     ///
01753     /// For 16-bit register size:
01754     ///
01755     ///     SPI 24-bit or 32-bit transfer
01756     ///
01757     ///     SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000
01758     ///
01759     ///     SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
01760     ///
01761     /// For 24-bit register size:
01762     ///
01763     ///     SPI 32-bit transfer
01764     ///
01765     ///     SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
01766     ///
01767     ///     SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
01768     ///
01769     ///
01770     /// @return 1 on success; 0 on failure
01771     uint8_t RegRead(MAX11410_CMD_enum_t commandByte, uint32_t* ptrRegData);
01772 
01773 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
01774 // CODE GENERATOR: looks like this is a 'size' register access function
01775     //----------------------------------------
01776     /// Return the size of a MAX11410 register
01777     ///
01778     /// @return 8 for 8-bit, 16 for 16-bit, 24 for 24-bit, else 0 for undefined register size
01779     uint8_t RegSize(MAX11410_CMD_enum_t commandByte);
01780 
01781 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
01782     //----------------------------------------
01783     /// Decode operation from commandByte
01784     ///
01785     /// @return operation such as idle, read register, write register, etc.
01786     MAX11410::MAX11410_CMDOP_enum_t DecodeCommand(MAX11410_CMD_enum_t commandByte);
01787 
01788 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
01789     //----------------------------------------
01790     /// Return the address field of a MAX11410 register
01791     ///
01792     /// @return register address field as given in datasheet
01793     uint8_t RegAddrOfCommand(MAX11410_CMD_enum_t commandByte);
01794 
01795 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
01796 // CODE GENERATOR: looks like this is a 'read' register access function
01797     //----------------------------------------
01798     /// Test whether a command byte is a register read command
01799     ///
01800     /// @return true if command byte is a register read command
01801     uint8_t IsRegReadCommand(MAX11410_CMD_enum_t commandByte);
01802 
01803 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
01804 // CODE GENERATOR: looks like this is a 'write' register access function
01805     //----------------------------------------
01806     /// Test whether a command byte is a register write command
01807     ///
01808     /// @return true if command byte is a register write command
01809     uint8_t IsRegWriteCommand(MAX11410_CMD_enum_t commandByte);
01810 
01811 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
01812 // CODE GENERATOR: looks like this is a 'name' register access function
01813     //----------------------------------------
01814     /// Return the name of a MAX11410 register
01815     ///
01816     /// @return null-terminated constant C string containing register name or empty string
01817     const char* RegName(MAX11410_CMD_enum_t commandByte);
01818 
01819     //----------------------------------------
01820     /// Menu item 'XF'
01821     ///
01822     /// FILTER Select Filter and Rate.
01823     /// Sets conversion rate based on RATE, LINEF, and CONV_TYPE value. See Table 9a through Table 9d for details.
01824     /// For CONV_TYPE_01_Continuous, linef=LINEF_11_SINC4, rate=RATE_0100 selects output data rate 60SPS.
01825     ///
01826     /// @param[in] linef = filter type, default=MAX11410::MAX11410_LINEF_enum_t::LINEF_11_SINC4
01827     /// @param[in] rate = output data rate selection, default=MAX11410::MAX11410_RATE_enum_t::RATE_0100
01828     ///
01829     /// @return 1 on success; 0 on failure
01830     uint8_t Configure_FILTER(uint8_t linef, uint8_t rate);
01831 
01832     //----------------------------------------
01833     /// Menu item 'XP'
01834     ///
01835     /// PGA Select Gain and Signal Path.
01836     ///
01837     /// @param[in] sigpath = signal path, default=MAX11410::MAX11410_SIG_PATH_enum_t::SIG_PATH_00_BUFFERED
01838     /// @param[in] gain = gain selection, default=MAX11410::MAX11410_GAIN_enum_t::GAIN_000_1
01839     ///
01840     /// @return 1 on success; 0 on failure
01841     uint8_t Configure_PGA(uint8_t sigpath, uint8_t gain);
01842 
01843     //----------------------------------------
01844     /// Menu item 'XC'
01845     ///
01846     /// CTRL Select clock, format, and reference.
01847     ///
01848     /// @param[in] extclk = external clock enable, default=0
01849     /// @param[in] u_bn = unipolar input range enable, default=0
01850     /// @param[in] format = offset binary format enable, default=0
01851     /// @param[in] refbufp_en = REFP reference buffer enable, default=0
01852     /// @param[in] refbufn_en = REFN reference buffer enable, default=0
01853     /// @param[in] ref_sel = reference selection, default=MAX11410::MAX11410_REF_SEL_enum_t::REF_SEL_001_REF1P_REF1N
01854     ///
01855     /// @return 1 on success; 0 on failure
01856     uint8_t Configure_CTRL(uint8_t extclk, uint8_t u_bn, uint8_t format, uint8_t refbufp_en, uint8_t refbufn_en, uint8_t ref_sel);
01857 
01858     //----------------------------------------
01859     /// Menu item 'XR'
01860     ///
01861     /// CTRL select reference, without changing the other fields.
01862     ///
01863     /// @pre ctrl = shadow of CTRL register
01864     /// @param[in] ref_sel = reference selection, default=MAX11410::MAX11410_REF_SEL_enum_t::REF_SEL_001_REF1P_REF1N
01865     ///
01866     /// @return 1 on success; 0 on failure
01867     uint8_t Configure_CTRL_REF(uint8_t ref_sel);
01868 
01869     //----------------------------------------
01870     /// Menu item 'XS'
01871     ///
01872     /// SOURCE Configure voltage bias source, current source, burnout mode
01873     ///
01874     /// @param[in] vbias_mode = bias voltage mode, default=MAX11410::MAX11410_VBIAS_MODE_enum_t::VBIAS_MODE_00_Active
01875     /// @param[in] brn_mode = burnout source mode, default=MAX11410::MAX11410_BRN_MODE_enum_t::BRN_MODE_00_disabled
01876     /// @param[in] idac_mode = current source value, default=MAX11410::MAX11410_IDAC_MODE_enum_t::IDAC_MODE_0000_10uA
01877     ///
01878     /// @return 1 on success; 0 on failure
01879     uint8_t Configure_SOURCE(uint8_t vbias_mode, uint8_t brn_mode, uint8_t idac_mode);
01880 
01881     //----------------------------------------
01882     /// Menu item 'XM'
01883     ///
01884     /// MUX_CTRL0 Select pins for analog input AINP and AINN
01885     ///
01886     /// @param[in] ainp = channel high side, default=MAX11410::MAX11410_AINP_SEL_enum_t::AINP_SEL_0000_AIN0
01887     /// @param[in] ainn = channel low side, default=MAX11410::MAX11410_AINN_SEL_enum_t::AINN_SEL_1010_GND
01888     ///
01889     /// @return 1 on success; 0 on failure
01890     uint8_t Configure_MUX_CTRL0(uint8_t ainp, uint8_t ainn);
01891 
01892     //----------------------------------------
01893     /// Menu item 'XI'
01894     ///
01895     /// MUX_CTRL1 Select pins for current source
01896     ///
01897     /// @param[in] idac1_sel = channel high side, default=MAX11410::MAX11410_IDAC1_SEL_enum_t::IDAC1_SEL_1111_unconnected
01898     /// @param[in] idac0_sel = channel low side, default=MAX11410::MAX11410_IDAC0_SEL_enum_t::IDAC0_SEL_1111_unconnected
01899     ///
01900     /// @return 1 on success; 0 on failure
01901     uint8_t Configure_MUX_CTRL1(uint8_t idac1_sel, uint8_t idac0_sel);
01902 
01903     //----------------------------------------
01904     /// Menu item 'XV'
01905     ///
01906     /// MUX_CTRL2 Select pins for voltage bias source
01907     ///
01908     /// @param[in] vbias_ain7_ain0_bitmap = bit map of AIN7..AIN0 enables for voltage bias, default=0
01909     ///
01910     /// @return 1 on success; 0 on failure
01911     uint8_t Configure_MUX_CTRL2(uint8_t vbias_ain7_ain0_bitmap);
01912 
01913     //----------------------------------------
01914     /// Menu item 'X0'
01915     ///
01916     /// CAL_START Calibrate Self Offset and Gain.
01917     ///
01918     /// @return 1 on success; 0 on failure
01919     uint8_t Calibrate_Self_Offset_Gain(void);
01920 
01921     //----------------------------------------
01922     /// Menu item 'X1'
01923     ///
01924     /// CAL_START Calibrate Selected PGA.
01925     ///
01926     /// @return 1 on success; 0 on failure
01927     uint8_t Calibrate_PGA_Gain(void);
01928 
01929     //----------------------------------------
01930     /// CAL_START Calibrate System Offset A.
01931     ///
01932     /// @return 1 on success; 0 on failure
01933     uint8_t Calibrate_System_Offset_A(void);
01934 
01935     //----------------------------------------
01936     /// CAL_START Calibrate System Gain A.
01937     ///
01938     /// @return 1 on success; 0 on failure
01939     uint8_t Calibrate_System_Gain_A(void);
01940 
01941     //----------------------------------------
01942     /// CAL_START Calibrate System Offset B.
01943     ///
01944     /// @return 1 on success; 0 on failure
01945     uint8_t Calibrate_System_Offset_B(void);
01946 
01947     //----------------------------------------
01948     /// CAL_START Calibrate System Gain B.
01949     ///
01950     /// @return 1 on success; 0 on failure
01951     uint8_t Calibrate_System_Gain_B(void);
01952 
01953     //----------------------------------------
01954     /// Menu item '$' -> AINcode[0], AINcode[1], AINcode[2], AINcode[3], AINcode[4], AINcode[5], AINcode[6], AINcode[7], AINcode[8], AINcode[9], AINcode[10]
01955     ///
01956     /// Measure all ADC channels in sequence.
01957     /// Diagnostic output pulse on GP0 for each channel's measurement.
01958     /// Diagnostic output pulse on GP1 for entire loop.
01959     ///
01960     /// @post AINcode[0..10]: measurement result LSB code
01961     ///
01962     /// @return 1 on success; 0 on failure
01963     uint8_t Read_All_Voltages(void);
01964 
01965     //----------------------------------------
01966     /// Menu item 'V'
01967     /// Trigger Measurement for voltage input.
01968     ///
01969     /// Example code for typical voltage measurement.
01970     ///
01971     /// @pre external connection REF2P-REF2N is a reference voltage
01972     /// @pre VRef = Voltage of REF input, in Volts
01973     /// @pre v_filter = filter register configuration, 0x34 for LINEF_11_SINC4 RATE_0100 output data rate 60SPS
01974     /// @pre v_ctrl = ctrl register configuration, 0x02 for bipolar REF_SEL_010_REF2P_REF2N
01975     /// @pre v_pga = pga register configuration, 0x00 for SIG_PATH_00_BUFFERED GAIN_000_1
01976     /// @param[in] ainp = channel high side, default=AINP_SEL_0000_AIN0
01977     /// @param[in] ainn = channel low side, default=AINN_SEL_1010_GND
01978     /// @post AINcode[ainp]: measurement result LSB code
01979     ///
01980     /// Output data rate (sample rate) is determined by filter register.
01981     /// filter register configuration in Measure_Voltage CONV_TYPE_01_Continuous
01982     /// v_filter=0x00 -- LINEF_00_50Hz_60Hz_FIR  RATE_0000 |  1.1SPS
01983     /// v_filter=0x01 -- LINEF_00_50Hz_60Hz_FIR  RATE_0001 |  2.1SPS
01984     /// v_filter=0x02 -- LINEF_00_50Hz_60Hz_FIR  RATE_0010 |  4.2SPS
01985     /// v_filter=0x03 -- LINEF_00_50Hz_60Hz_FIR  RATE_0011 |  8.4SPS
01986     /// v_filter=0x04 -- LINEF_00_50Hz_60Hz_FIR  RATE_0100 | 16.8SPS
01987     /// v_filter=0x10 -- LINEF_01_50Hz_FIR       RATE_0000 |  1.3SPS
01988     /// v_filter=0x11 -- LINEF_01_50Hz_FIR       RATE_0001 |  2.7SPS
01989     /// v_filter=0x12 -- LINEF_01_50Hz_FIR       RATE_0010 |  5.3SPS
01990     /// v_filter=0x13 -- LINEF_01_50Hz_FIR       RATE_0011 | 10.7SPS
01991     /// v_filter=0x14 -- LINEF_01_50Hz_FIR       RATE_0100 | 21.3SPS
01992     /// v_filter=0x15 -- LINEF_01_50Hz_FIR       RATE_0101 | 40.0SPS
01993     /// v_filter=0x20 -- LINEF_10_60Hz_FIR       RATE_0000 |   1.3SPS
01994     /// v_filter=0x21 -- LINEF_10_60Hz_FIR       RATE_0001 |   2.7SPS
01995     /// v_filter=0x22 -- LINEF_10_60Hz_FIR       RATE_0010 |   5.3SPS
01996     /// v_filter=0x23 -- LINEF_10_60Hz_FIR       RATE_0011 |  10.7SPS
01997     /// v_filter=0x24 -- LINEF_10_60Hz_FIR       RATE_0100 |  21.3SPS
01998     /// v_filter=0x25 -- LINEF_10_60Hz_FIR       RATE_0101 |  40.0SPS
01999     /// v_filter=0x30 -- LINEF_11_SINC4          RATE_0000 |    4SPS
02000     /// v_filter=0x31 -- LINEF_11_SINC4          RATE_0001 |   10SPS
02001     /// v_filter=0x32 -- LINEF_11_SINC4          RATE_0010 |   20SPS
02002     /// v_filter=0x33 -- LINEF_11_SINC4          RATE_0011 |   40SPS
02003     /// v_filter=0x34 --*LINEF_11_SINC4          RATE_0100 |   60SPS
02004     /// v_filter=0x35 -- LINEF_11_SINC4          RATE_0101 |  120SPS
02005     /// v_filter=0x36 -- LINEF_11_SINC4          RATE_0110 |  240SPS
02006     /// v_filter=0x37 -- LINEF_11_SINC4          RATE_0111 |  480SPS
02007     /// v_filter=0x38 -- LINEF_11_SINC4          RATE_1000 |  960SPS
02008     /// v_filter=0x39 -- LINEF_11_SINC4          RATE_1001 | 1920SPS
02009     ///
02010     /// @return ideal voltage calculated from raw LSB code and reference voltage
02011     double Measure_Voltage(MAX11410_AINP_SEL_enum_t ainp, MAX11410_AINN_SEL_enum_t ainn);
02012 
02013     //----------------------------------------
02014     /// Menu item 'R' -> rtd_ohm, rtd_degc
02015     /// Trigger Measurement for Resistive Temperature Device (RTD).
02016     ///
02017     /// Example code for typical RTD measurement.
02018     ///
02019     /// @pre external connection REF1P-REF1N is a reference resistor
02020     /// @pre ref1_v = reference resistance in ohms, default=4999
02021     /// @pre rtd_filter = filter register configuration, 0x34 for LINEF_11_SINC4 RATE_0100 output data rate 60SPS
02022     /// @pre rtd_ctrl = ctrl register configuration, 0x40 for ref0_v, 0x41 for ref1_v, 0x42 for ref2_v
02023     /// @pre rtd_souce = souce register configuration, 0x0B for IDAC_MODE_1011_400uA
02024     /// @pre rtd_pga = pga register configuration, 0x21 for SIG_PATH_10_PGA GAIN_001_2
02025     /// @param[in] rtd_iout = channel RTD high side force, default=AINP_SEL_0111_AIN7
02026     /// @param[in] rtd_ainp = channel RTD high side sense, default=AINP_SEL_1000_AIN8
02027     /// @param[in] rtd_ainn = channel RTD low side, default=AINN_SEL_1001_AIN9
02028     /// @post AINcode[rtd_ainp]: measurement result LSB code
02029     /// @post rtd_ohm: measurement result resistance in Ohms
02030     /// @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
02031     ///
02032     /// Output data rate (sample rate) is determined by filter register.
02033     /// filter register configuration in Measure_RTD CONV_TYPE_01_Continuous
02034     /// rtd_filter=0x00 -- LINEF_00_50Hz_60Hz_FIR  RATE_0000 |  1.1SPS
02035     /// rtd_filter=0x01 -- LINEF_00_50Hz_60Hz_FIR  RATE_0001 |  2.1SPS
02036     /// rtd_filter=0x02 -- LINEF_00_50Hz_60Hz_FIR  RATE_0010 |  4.2SPS
02037     /// rtd_filter=0x03 -- LINEF_00_50Hz_60Hz_FIR  RATE_0011 |  8.4SPS
02038     /// rtd_filter=0x04 -- LINEF_00_50Hz_60Hz_FIR  RATE_0100 | 16.8SPS
02039     /// rtd_filter=0x10 -- LINEF_01_50Hz_FIR       RATE_0000 |  1.3SPS
02040     /// rtd_filter=0x11 -- LINEF_01_50Hz_FIR       RATE_0001 |  2.7SPS
02041     /// rtd_filter=0x12 -- LINEF_01_50Hz_FIR       RATE_0010 |  5.3SPS
02042     /// rtd_filter=0x13 -- LINEF_01_50Hz_FIR       RATE_0011 | 10.7SPS
02043     /// rtd_filter=0x14 -- LINEF_01_50Hz_FIR       RATE_0100 | 21.3SPS
02044     /// rtd_filter=0x15 -- LINEF_01_50Hz_FIR       RATE_0101 | 40.0SPS
02045     /// rtd_filter=0x20 -- LINEF_10_60Hz_FIR       RATE_0000 |   1.3SPS
02046     /// rtd_filter=0x21 -- LINEF_10_60Hz_FIR       RATE_0001 |   2.7SPS
02047     /// rtd_filter=0x22 -- LINEF_10_60Hz_FIR       RATE_0010 |   5.3SPS
02048     /// rtd_filter=0x23 -- LINEF_10_60Hz_FIR       RATE_0011 |  10.7SPS
02049     /// rtd_filter=0x24 -- LINEF_10_60Hz_FIR       RATE_0100 |  21.3SPS
02050     /// rtd_filter=0x25 -- LINEF_10_60Hz_FIR       RATE_0101 |  40.0SPS
02051     /// rtd_filter=0x30 -- LINEF_11_SINC4          RATE_0000 |    4SPS
02052     /// rtd_filter=0x31 -- LINEF_11_SINC4          RATE_0001 |   10SPS
02053     /// rtd_filter=0x32 -- LINEF_11_SINC4          RATE_0010 |   20SPS
02054     /// rtd_filter=0x33 -- LINEF_11_SINC4          RATE_0011 |   40SPS
02055     /// rtd_filter=0x34 --*LINEF_11_SINC4          RATE_0100 |   60SPS
02056     /// rtd_filter=0x35 -- LINEF_11_SINC4          RATE_0101 |  120SPS
02057     /// rtd_filter=0x36 -- LINEF_11_SINC4          RATE_0110 |  240SPS
02058     /// rtd_filter=0x37 -- LINEF_11_SINC4          RATE_0111 |  480SPS
02059     /// rtd_filter=0x38 -- LINEF_11_SINC4          RATE_1000 |  960SPS
02060     /// rtd_filter=0x39 -- LINEF_11_SINC4          RATE_1001 | 1920SPS
02061     ///
02062     /// @return resistance calculated from raw LSB code and reference resistance
02063     double Measure_RTD(MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn);
02064 
02065     //----------------------------------------
02066     /// Return the physical temperature corresponding to measured resistance
02067     /// of a PT1000 type Resistive Temperature Device (RTD).
02068     ///
02069     /// @param[in] rtd_ohm = RTD resistance in ohms, default=1000
02070     /// @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
02071     ///
02072     /// @return ideal temperature in degrees C, calculated from RTD resistance in ohms
02073     /// @test group RTD_PT1000 // PT1000 type Resistive Temperature Device (RTD)
02074     /// @test group RTD_PT1000 tinyTester.blink_time_msec = 20 // quickly speed through the software verification
02075     /// @test group RTD_PT1000 TemperatureOfRTD_PT1000(842.94) expect -40.0 within 0.1 // PT-1000 RTD at -40C
02076     /// @test group RTD_PT1000 TemperatureOfRTD_PT1000(1000.0) expect 0.0   within 0.1 // PT-1000 RTD at 0C
02077     /// @test group RTD_PT1000 TemperatureOfRTD_PT1000(1097.3) expect 25.0  within 0.1 // PT-1000 RTD at 25C
02078     /// @test group RTD_PT1000 TemperatureOfRTD_PT1000(1328.1) expect 85.0  within 0.1 // PT-1000 RTD at 85C
02079     /// @test group RTD_PT1000 TemperatureOfRTD_PT1000(1479.5) expect 125.0 within 0.1 // PT-1000 RTD at 125C
02080     /// @test group RTD_PT1000 tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
02081     ///
02082     double TemperatureOfRTD_PT1000(double rtd_ohm);
02083 
02084     //----------------------------------------
02085     /// Return the physical temperature corresponding to measured resistance
02086     /// of a PT100 type Resistive Temperature Device (RTD).
02087     ///
02088     /// @param[in] rtd_ohm = RTD resistance in ohms, default=100
02089     /// @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
02090     ///
02091     /// @return ideal temperature in degrees C, calculated from RTD resistance in ohms
02092     /// @test group RTD_PT100 // PT100 type Resistive Temperature Device (RTD)
02093     /// @test group RTD_PT100 tinyTester.blink_time_msec = 20 // quickly speed through the software verification
02094     /// @test group RTD_PT100 TemperatureOfRTD_PT100(84.294) expect -40.0 within 0.1 // PT-100 RTD at -40C
02095     /// @test group RTD_PT100 TemperatureOfRTD_PT100(100.00) expect 0.0   within 0.1 // PT-100 RTD at 0C
02096     /// @test group RTD_PT100 TemperatureOfRTD_PT100(109.73) expect 25.0  within 0.1 // PT-100 RTD at 25C
02097     /// @test group RTD_PT100 TemperatureOfRTD_PT100(132.81) expect 85.0  within 0.1 // PT-100 RTD at 85C
02098     /// @test group RTD_PT100 TemperatureOfRTD_PT100(147.95) expect 125.0 within 0.1 // PT-100 RTD at 125C
02099     /// @test group RTD_PT100 tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
02100     ///
02101     double TemperatureOfRTD_PT100(double rtd_ohm);
02102 
02103     //----------------------------------------
02104     /// Return the physical temperature corresponding to measured resistance
02105     /// of a PT100 or PT1000 type Resistive Temperature Device (RTD).
02106     ///
02107     /// @param[in] rtd_ohm = RTD resistance in ohms, default=100
02108     /// @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
02109     ///
02110     /// @return ideal temperature in degrees C, calculated from RTD resistance in ohms
02111     /// @test group RTD // Verify function TemperatureOfRTD
02112     /// @test group RTD tinyTester.blink_time_msec = 20 // quickly speed through the software verification
02113     /// @test group RTD TemperatureOfRTD(84.294) expect -40.0 within 0.1 // PT-100 RTD at -40C
02114     /// @test group RTD TemperatureOfRTD(100.00) expect 0.0   within 0.1 // PT-100 RTD at 0C
02115     /// @test group RTD TemperatureOfRTD(109.73) expect 25.0  within 0.1 // PT-100 RTD at 25C
02116     /// @test group RTD TemperatureOfRTD(132.81) expect 85.0  within 0.1 // PT-100 RTD at 85C
02117     /// @test group RTD TemperatureOfRTD(147.95) expect 125.0 within 0.1 // PT-100 RTD at 125C
02118     /// @test group RTD TemperatureOfRTD(842.94) expect -40.0 within 0.1 // PT-1000 RTD at -40C
02119     /// @test group RTD TemperatureOfRTD(1000.0) expect 0.0   within 0.1 // PT-1000 RTD at 0C
02120     /// @test group RTD TemperatureOfRTD(1097.3) expect 25.0  within 0.1 // PT-1000 RTD at 25C
02121     /// @test group RTD TemperatureOfRTD(1328.1) expect 85.0  within 0.1 // PT-1000 RTD at 85C
02122     /// @test group RTD TemperatureOfRTD(1479.5) expect 125.0 within 0.1 // PT-1000 RTD at 125C
02123     /// @test group RTD tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
02124     ///
02125     double TemperatureOfRTD(double rtd_ohm);
02126 
02127     //----------------------------------------
02128     /// Menu item 'TM' -> tc_v, tc_delta_degc, tc_degc
02129     /// Trigger Measurement for Thermocouple
02130     ///
02131     /// Example code for typical Thermocouple measurement.
02132     /// An RTD measures the "cold junction" where TC connects to the board,
02133     /// and the TC measures the temperature difference above the cold junction.
02134     ///
02135     /// @param[in] tc_ainp = channel of Thermocouple high side, default=AINP_SEL_0101_AIN5
02136     /// @param[in] tc_ainn = channel of Thermocouple low side, default=AINN_SEL_0110_AIN6
02137     /// @param[in] rtd_iout = channel RTD high side force, default=AINP_SEL_0111_AIN7
02138     /// @param[in] rtd_ainp = channel RTD high side sense, default=AINP_SEL_1000_AIN8
02139     /// @param[in] rtd_ainn = channel RTD low side, default=AINN_SEL_1001_AIN9
02140     /// @post AINcode[tc_ainp]: measurement result LSB code
02141     /// @post tc_v: raw thermocouple voltage in Volts
02142     /// @post tc_delta_degc: temperature in degC above cold junction
02143     /// @post tc_degc: temperature in degC
02144     ///
02145     /// @return 1 on success; 0 on failure
02146     double Measure_Thermocouple(MAX11410_AINP_SEL_enum_t tc_ainp, MAX11410_AINN_SEL_enum_t tc_ainn, MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn);
02147 
02148     //----------------------------------------
02149     /// Return the physical temperature corresponding to measured voltage
02150     /// of a type K Thermocouple (TC).
02151     ///
02152     /// @pre {0}.rtd_degc = cold junction temperature, in degrees C
02153     /// @param[in] tc_v = Thermocouple voltage in volts, default=0.0254
02154     ///
02155     /// @return ideal temperature in degrees C, calculated from RTD resistance in ohms
02156     /// @test group TC_1 // Verify Thermocouple function TemperatureOfTC_TypeK
02157     /// @test group TC_2 // Verify Thermocouple function TemperatureOfTC_TypeK in more detail
02158     /// @test group TC_1 tinyTester.blink_time_msec = 20 // quickly speed through the software verification
02159     /// @test group TC_1 TemperatureOfTC_TypeK(0.000e-3) expect  0.0    within 0.1 // TC_TypeK at   0C = 0.000mV
02160     /// @test group TC_1 TemperatureOfTC_TypeK(0.039e-3) expect  1.0    within 0.1 // TC_TypeK at   1C = 0.039mV
02161     /// @test group TC_1 TemperatureOfTC_TypeK(0.079e-3) expect  2.0    within 0.1 // TC_TypeK at   2C = 0.079mV
02162     /// @test group TC_1 TemperatureOfTC_TypeK(0.119e-3) expect  3.0    within 0.1 // TC_TypeK at   3C = 0.119mV
02163     /// @test group TC_2 TemperatureOfTC_TypeK(0.158e-3) expect  4.0     within 0.1 // TC_TypeK at   4C = 0.158mV
02164     /// @test group TC_2 TemperatureOfTC_TypeK(0.198e-3) expect  5.0     within 0.1 // TC_TypeK at   5C = 0.198mV
02165     /// @test group TC_2 TemperatureOfTC_TypeK(0.238e-3) expect  6.0     within 0.1 // TC_TypeK at   6C = 0.238mV
02166     /// @test group TC_2 TemperatureOfTC_TypeK(0.2775e-3) expect  7.0    within 0.1 // TC_TypeK at   7C = 0.2775mV
02167     /// @test group TC_2 TemperatureOfTC_TypeK(0.317e-3) expect  8.0     within 0.1 // TC_TypeK at   8C = 0.317mV
02168     /// @test group TC_2 TemperatureOfTC_TypeK(0.357e-3) expect  9.0     within 0.1 // TC_TypeK at   9C = 0.357mV
02169     /// @test group TC_1 TemperatureOfTC_TypeK(0.397e-3) expect 10.0    within 0.1 // TC_TypeK at  10C = 0.397mV
02170     /// @test group TC_1 TemperatureOfTC_TypeK(0.798e-3) expect 20.0    within 0.1 // TC_TypeK at  20C = 0.798mV
02171     /// @test group TC_1 TemperatureOfTC_TypeK(1.081e-3) expect 27.0    within 0.1 // TC_TypeK at  27C = 1.081mV
02172     /// @test group TC_1 TemperatureOfTC_TypeK(1.203e-3) expect 30.0    within 0.1 // TC_TypeK at  30C = 1.203mV
02173     /// @test group TC_1 TemperatureOfTC_TypeK(1.612e-3) expect 40.0    within 0.1 // TC_TypeK at  40C = 1.612mV
02174     /// @test group TC_1 TemperatureOfTC_TypeK(2.023e-3) expect 50.0    within 0.1 // TC_TypeK at  50C = 2.023mV
02175     /// @test group TC_1 TemperatureOfTC_TypeK(2.436e-3) expect 60.0    within 0.1 // TC_TypeK at  60C = 2.436mV
02176     /// @test group TC_1 TemperatureOfTC_TypeK(2.851e-3) expect 70.0    within 0.1 // TC_TypeK at  70C = 2.851mV
02177     /// @test group TC_1 TemperatureOfTC_TypeK(3.267e-3) expect 80.0    within 0.1 // TC_TypeK at  80C = 3.267mV
02178     /// @test group TC_1 TemperatureOfTC_TypeK(3.682e-3) expect 90.0    within 0.1 // TC_TypeK at  90C = 3.682mV
02179     /// @test group TC_1 TemperatureOfTC_TypeK(4.096e-3) expect 100.0   within 0.1 // TC_TypeK at  100C = 4.096mV
02180     /// @test group TC_2 TemperatureOfTC_TypeK(4.509e-3) expect 110.0    within 0.1 // TC_TypeK at  110C = 4.509mV
02181     /// @test group TC_2 TemperatureOfTC_TypeK(4.920e-3) expect 120.0    within 0.1 // TC_TypeK at  120C = 4.920mV
02182     /// @test group TC_2 TemperatureOfTC_TypeK(5.328e-3) expect 130.0    within 0.1 // TC_TypeK at  130C = 5.328mV
02183     /// @test group TC_2 TemperatureOfTC_TypeK(5.735e-3) expect 140.0    within 0.1 // TC_TypeK at  140C = 5.735mV
02184     /// @test group TC_2 TemperatureOfTC_TypeK(6.138e-3) expect 150.0    within 0.1 // TC_TypeK at  150C = 6.138mV
02185     /// @test group TC_2 TemperatureOfTC_TypeK(6.540e-3) expect 160.0    within 0.1 // TC_TypeK at  160C = 6.540mV
02186     /// @test group TC_2 TemperatureOfTC_TypeK(6.941e-3) expect 170.0    within 0.1 // TC_TypeK at  170C = 6.941mV
02187     /// @test group TC_2 TemperatureOfTC_TypeK(7.340e-3) expect 180.0    within 0.1 // TC_TypeK at  180C = 7.340mV
02188     /// @test group TC_1 TemperatureOfTC_TypeK(7.739e-3) expect 190.0   within 0.1 // TC_TypeK at  190C = 7.739mV
02189     /// @test group TC_1 TemperatureOfTC_TypeK(8.138e-3) expect 200.0   within 0.1 // TC_TypeK at  200C = 8.138mV
02190     /// @test group TC_1 TemperatureOfTC_TypeK(8.539e-3) expect 210.0   within 0.1 // TC_TypeK at  210C = 8.539mV
02191     /// @test group TC_1 TemperatureOfTC_TypeK(8.940e-3) expect 220.0   within 0.1 // TC_TypeK at  220C = 8.940mV
02192     /// @test group TC_2 TemperatureOfTC_TypeK(9.343e-3) expect 230.0    within 0.1 // TC_TypeK at  230C = 9.343mV
02193     /// @test group TC_2 TemperatureOfTC_TypeK(9.747e-3) expect 240.0    within 0.1 // TC_TypeK at  240C = 9.747mV
02194     /// @test group TC_2 TemperatureOfTC_TypeK(10.153e-3) expect 250.0   within 0.1 // TC_TypeK at  250C = 10.153mV
02195     /// @test group TC_2 TemperatureOfTC_TypeK(10.561e-3) expect 260.0   within 0.1 // TC_TypeK at  260C = 10.561mV
02196     /// @test group TC_2 TemperatureOfTC_TypeK(10.971e-3) expect 270.0   within 0.1 // TC_TypeK at  270C = 10.971mV
02197     /// @test group TC_2 TemperatureOfTC_TypeK(11.382e-3) expect 280.0   within 0.1 // TC_TypeK at  280C = 11.382mV
02198     /// @test group TC_2 TemperatureOfTC_TypeK(11.795e-3) expect 290.0   within 0.1 // TC_TypeK at  290C = 11.795mV
02199     /// @test group TC_1 TemperatureOfTC_TypeK(12.209e-3) expect 300.0  within 0.1 // TC_TypeK at  300C = 12.209mV
02200     /// @test group TC_2 TemperatureOfTC_TypeK(14.293e-3) expect 350.0   within 0.1 // TC_TypeK at  350C = 14.293mV
02201     /// @test group TC_1 TemperatureOfTC_TypeK(16.397e-3) expect 400.0  within 0.1 // TC_TypeK at  400C = 16.397mV
02202     /// @test group TC_1 TemperatureOfTC_TypeK(18.516e-3) expect 450.0  within 0.1 // TC_TypeK at  450C = 18.516mV
02203     /// @test group TC_1 TemperatureOfTC_TypeK(20.218e-3) expect 490.0  // TC_TypeK at  490C = 20.218mV
02204     /// @test group TC_1 tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
02205     ///
02206     double TemperatureOfTC_TypeK(double tc_v);
02207 
02208     //----------------------------------------
02209     /// Calculate temperature in degrees C from input voltage,
02210     /// using a given set of polynomial coefficients.
02211     /// For example:
02212     ///
02213     /// t = coefficients[0] + coefficients[1] * DMMavg + coefficients[2] * DmMMavg**2
02214     ///
02215     /// @param[in] thermocouple_voltage_uV = Thermocouple voltage in microvolts
02216     ///
02217     /// @return ideal temperature in degrees C, calculated from polynomial coefficients
02218     ///
02219     double temperatureDegC_polynomial(double thermocouple_voltage_uV, int num_coefficients, double coefficients[]);
02220 
02221 }; // end of class MAX11410
02222 
02223 #endif // __MAX11410_H__
02224 
02225 // End of file