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Dependents: MAX11410BOB_24bit_ADC MAX11410BOB_Serial_Tester

MAX11410.h@22:c6812214a933, 2020-04-13 (annotated)

Committer:: whismanoid
Date:: Mon Apr 13 02:59:22 2020 +0000
Revision:: 22:c6812214a933
Parent:: 21:847b2220e96e
Child:: 23:22e7830bcccb

shorter arg/prop names, rtd_ms, self tests

Who changed what in which revision?

User	Revision	Line number	New contents of line
whismanoid	0:68e64068330f	1	// /*******************************************************************************
whismanoid	4:c169ba85d673	2	// * Copyright (C) 2020 Maxim Integrated Products, Inc., All Rights Reserved.
whismanoid	0:68e64068330f	3	// *
whismanoid	0:68e64068330f	4	// * Permission is hereby granted, free of charge, to any person obtaining a
whismanoid	0:68e64068330f	5	// * copy of this software and associated documentation files (the "Software"),
whismanoid	0:68e64068330f	6	// * to deal in the Software without restriction, including without limitation
whismanoid	0:68e64068330f	7	// * the rights to use, copy, modify, merge, publish, distribute, sublicense,
whismanoid	0:68e64068330f	8	// * and/or sell copies of the Software, and to permit persons to whom the
whismanoid	0:68e64068330f	9	// * Software is furnished to do so, subject to the following conditions:
whismanoid	0:68e64068330f	10	// *
whismanoid	0:68e64068330f	11	// * The above copyright notice and this permission notice shall be included
whismanoid	0:68e64068330f	12	// * in all copies or substantial portions of the Software.
whismanoid	0:68e64068330f	13	// *
whismanoid	0:68e64068330f	14	// * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
whismanoid	0:68e64068330f	15	// * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
whismanoid	0:68e64068330f	16	// * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
whismanoid	0:68e64068330f	17	// * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
whismanoid	0:68e64068330f	18	// * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
whismanoid	0:68e64068330f	19	// * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
whismanoid	0:68e64068330f	20	// * OTHER DEALINGS IN THE SOFTWARE.
whismanoid	0:68e64068330f	21	// *
whismanoid	0:68e64068330f	22	// * Except as contained in this notice, the name of Maxim Integrated
whismanoid	0:68e64068330f	23	// * Products, Inc. shall not be used except as stated in the Maxim Integrated
whismanoid	0:68e64068330f	24	// * Products, Inc. Branding Policy.
whismanoid	0:68e64068330f	25	// *
whismanoid	0:68e64068330f	26	// * The mere transfer of this software does not imply any licenses
whismanoid	0:68e64068330f	27	// * of trade secrets, proprietary technology, copyrights, patents,
whismanoid	0:68e64068330f	28	// * trademarks, maskwork rights, or any other form of intellectual
whismanoid	0:68e64068330f	29	// * property whatsoever. Maxim Integrated Products, Inc. retains all
whismanoid	0:68e64068330f	30	// * ownership rights.
whismanoid	0:68e64068330f	31	// *******************************************************************************
whismanoid	0:68e64068330f	32	// */
whismanoid	0:68e64068330f	33	// *********************************************************************
whismanoid	0:68e64068330f	34	// @file MAX11410.h
whismanoid	0:68e64068330f	35	// *********************************************************************
whismanoid	0:68e64068330f	36	// Header file
whismanoid	0:68e64068330f	37	// DO NOT EDIT; except areas designated "CUSTOMIZE". Automatically generated file.
whismanoid	0:68e64068330f	38	// generated by XMLSystemOfDevicesToMBED.py
whismanoid	0:68e64068330f	39	// System Name = ExampleSystem
whismanoid	0:68e64068330f	40	// System Description = Device driver example
whismanoid	0:68e64068330f	41	// Device Name = MAX11410
whismanoid	0:68e64068330f	42	// Device Description = 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC
whismanoid	0:68e64068330f	43	// Device DeviceBriefDescription = 24-bit 1.9ksps Delta-Sigma ADC
whismanoid	0:68e64068330f	44	// Device Manufacturer = Maxim Integrated
whismanoid	0:68e64068330f	45	// Device PartNumber = MAX11410ATI+
whismanoid	0:68e64068330f	46	// Device RegValue_Width = DataWidth16bit_HL
whismanoid	0:68e64068330f	47	//
whismanoid	0:68e64068330f	48	// ADC MaxOutputDataRate = 1.9ksps
whismanoid	0:68e64068330f	49	// ADC NumChannels = 10
whismanoid	0:68e64068330f	50	// ADC ResolutionBits = 24
whismanoid	0:68e64068330f	51	//
whismanoid	0:68e64068330f	52	// SPI CS = ActiveLow
whismanoid	0:68e64068330f	53	// SPI FrameStart = CS
whismanoid	0:68e64068330f	54	// SPI CPOL = 0
whismanoid	0:68e64068330f	55	// SPI CPHA = 0
whismanoid	0:68e64068330f	56	// SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid	0:68e64068330f	57	// SPI SCLK Idle Low
whismanoid	0:68e64068330f	58	// SPI SCLKMaxMHz = 8
whismanoid	0:68e64068330f	59	// SPI SCLKMinMHz = 0
whismanoid	0:68e64068330f	60	//
whismanoid	0:68e64068330f	61
whismanoid	0:68e64068330f	62
whismanoid	0:68e64068330f	63	// Prevent multiple declaration
whismanoid	0:68e64068330f	64	#ifndef __MAX11410_H__
whismanoid	0:68e64068330f	65	#define __MAX11410_H__
whismanoid	0:68e64068330f	66
whismanoid	0:68e64068330f	67	// standard include for target platform -- Platform_Include_Boilerplate
whismanoid	0:68e64068330f	68	#include "mbed.h"
whismanoid	0:68e64068330f	69	// Platforms:
whismanoid	0:68e64068330f	70	// - MAX32625MBED
whismanoid	0:68e64068330f	71	// - supports mbed-os-5.11, requires USBDevice library
whismanoid	0:68e64068330f	72	// - add https://developer.mbed.org/teams/MaximIntegrated/code/USBDevice/
whismanoid	0:68e64068330f	73	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	74	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	75	// - MAX32600MBED
whismanoid	0:68e64068330f	76	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	77	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	78	// - Windows 10 note: Don't connect HDK until you are ready to load new firmware into the board.
whismanoid	0:68e64068330f	79	// - NUCLEO_F446RE
whismanoid	0:68e64068330f	80	// - remove USBDevice library
whismanoid	0:68e64068330f	81	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	82	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	83	// - NUCLEO_F401RE
whismanoid	0:68e64068330f	84	// - remove USBDevice library
whismanoid	0:68e64068330f	85	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	86	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	87	// - MAX32630FTHR
whismanoid	0:68e64068330f	88	// - #include "max32630fthr.h"
whismanoid	0:68e64068330f	89	// - add http://os.mbed.org/teams/MaximIntegrated/code/max32630fthr/
whismanoid	0:68e64068330f	90	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	91	// - MAX32620FTHR
whismanoid	0:68e64068330f	92	// - #include "MAX32620FTHR.h"
whismanoid	0:68e64068330f	93	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	94	// - add https://os.mbed.com/teams/MaximIntegrated/code/MAX32620FTHR/
whismanoid	0:68e64068330f	95	// - not tested yet
whismanoid	0:68e64068330f	96	// - MAX32625PICO
whismanoid	0:68e64068330f	97	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	98	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	99	// - not tested yet
whismanoid	0:68e64068330f	100	//
whismanoid	0:68e64068330f	101	// end Platform_Include_Boilerplate
whismanoid	0:68e64068330f	102
whismanoid	0:68e64068330f	103	// CODE GENERATOR: conditional defines
whismanoid	0:68e64068330f	104	// CODE GENERATOR: class declaration and docstrings
whismanoid	0:68e64068330f	105	/**
whismanoid	0:68e64068330f	106	* @brief MAX11410 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC
whismanoid	0:68e64068330f	107	*
whismanoid	0:68e64068330f	108	*
whismanoid	0:68e64068330f	109	*
whismanoid	0:68e64068330f	110	* Datasheet: https://www.maximintegrated.com/MAX11410
whismanoid	0:68e64068330f	111	*
whismanoid	0:68e64068330f	112	*
whismanoid	0:68e64068330f	113	*
whismanoid	0:68e64068330f	114	* //---------- CODE GENERATOR: helloCppCodeList
whismanoid	0:68e64068330f	115	* @code
whismanoid	0:68e64068330f	116	* // CODE GENERATOR: example code includes
whismanoid	0:68e64068330f	117	*
whismanoid	0:68e64068330f	118	* // example code includes
whismanoid	0:68e64068330f	119	* // standard include for target platform -- Platform_Include_Boilerplate
whismanoid	0:68e64068330f	120	* #include "mbed.h"
whismanoid	0:68e64068330f	121	* // Platforms:
whismanoid	0:68e64068330f	122	* // - MAX32625MBED
whismanoid	0:68e64068330f	123	* // - supports mbed-os-5.11, requires USBDevice library
whismanoid	0:68e64068330f	124	* // - add https://developer.mbed.org/teams/MaximIntegrated/code/USBDevice/
whismanoid	0:68e64068330f	125	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	126	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	127	* // - MAX32600MBED
whismanoid	0:68e64068330f	128	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	129	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	130	* // - Windows 10 note: Don't connect HDK until you are ready to load new firmware into the board.
whismanoid	0:68e64068330f	131	* // - NUCLEO_F446RE
whismanoid	0:68e64068330f	132	* // - remove USBDevice library
whismanoid	0:68e64068330f	133	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	134	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	135	* // - NUCLEO_F401RE
whismanoid	0:68e64068330f	136	* // - remove USBDevice library
whismanoid	0:68e64068330f	137	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	138	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	139	* // - MAX32630FTHR
whismanoid	0:68e64068330f	140	* // - #include "max32630fthr.h"
whismanoid	0:68e64068330f	141	* // - add http://os.mbed.org/teams/MaximIntegrated/code/max32630fthr/
whismanoid	0:68e64068330f	142	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	143	* // - MAX32620FTHR
whismanoid	0:68e64068330f	144	* // - #include "MAX32620FTHR.h"
whismanoid	0:68e64068330f	145	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	146	* // - add https://os.mbed.com/teams/MaximIntegrated/code/MAX32620FTHR/
whismanoid	0:68e64068330f	147	* // - not tested yet
whismanoid	0:68e64068330f	148	* // - MAX32625PICO
whismanoid	0:68e64068330f	149	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	150	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	151	* // - not tested yet
whismanoid	0:68e64068330f	152	* //
whismanoid	0:68e64068330f	153	* // end Platform_Include_Boilerplate
whismanoid	0:68e64068330f	154	* #include "MAX11410.h"
whismanoid	0:68e64068330f	155	*
whismanoid	0:68e64068330f	156	* // example code board support
whismanoid	0:68e64068330f	157	* //MAX32630FTHR pegasus(MAX32630FTHR::VIO_3V3);
whismanoid	0:68e64068330f	158	* //DigitalOut rLED(LED1);
whismanoid	0:68e64068330f	159	* //DigitalOut gLED(LED2);
whismanoid	0:68e64068330f	160	* //DigitalOut bLED(LED3);
whismanoid	0:68e64068330f	161	* //
whismanoid	0:68e64068330f	162	* // Arduino "shield" connector port definitions (MAX32625MBED shown)
whismanoid	0:68e64068330f	163	* #if defined(TARGET_MAX32625MBED)
whismanoid	0:68e64068330f	164	* #define A0 AIN_0
whismanoid	0:68e64068330f	165	* #define A1 AIN_1
whismanoid	0:68e64068330f	166	* #define A2 AIN_2
whismanoid	0:68e64068330f	167	* #define A3 AIN_3
whismanoid	0:68e64068330f	168	* #define D0 P0_0
whismanoid	0:68e64068330f	169	* #define D1 P0_1
whismanoid	0:68e64068330f	170	* #define D2 P0_2
whismanoid	0:68e64068330f	171	* #define D3 P0_3
whismanoid	0:68e64068330f	172	* #define D4 P0_4
whismanoid	0:68e64068330f	173	* #define D5 P0_5
whismanoid	0:68e64068330f	174	* #define D6 P0_6
whismanoid	0:68e64068330f	175	* #define D7 P0_7
whismanoid	0:68e64068330f	176	* #define D8 P1_4
whismanoid	0:68e64068330f	177	* #define D9 P1_5
whismanoid	0:68e64068330f	178	* #define D10 P1_3
whismanoid	0:68e64068330f	179	* #define D11 P1_1
whismanoid	0:68e64068330f	180	* #define D12 P1_2
whismanoid	0:68e64068330f	181	* #define D13 P1_0
whismanoid	0:68e64068330f	182	* #endif
whismanoid	0:68e64068330f	183	*
whismanoid	17:0e9f2dfc2a30	184	* // example code declare SPI interface (GPIO controlled CS)
whismanoid	0:68e64068330f	185	* #if defined(TARGET_MAX32625MBED)
whismanoid	0:68e64068330f	186	* SPI spi(SPI1_MOSI, SPI1_MISO, SPI1_SCK); // mosi, miso, sclk spi1 TARGET_MAX32625MBED: P1_1 P1_2 P1_0 Arduino 10-pin header D11 D12 D13
whismanoid	0:68e64068330f	187	* DigitalOut spi_cs(SPI1_SS); // TARGET_MAX32625MBED: P1_3 Arduino 10-pin header D10
whismanoid	0:68e64068330f	188	* #elif defined(TARGET_MAX32600MBED)
whismanoid	0:68e64068330f	189	* SPI spi(SPI2_MOSI, SPI2_MISO, SPI2_SCK); // mosi, miso, sclk spi1 TARGET_MAX32600MBED: Arduino 10-pin header D11 D12 D13
whismanoid	0:68e64068330f	190	* DigitalOut spi_cs(SPI2_SS); // Generic: Arduino 10-pin header D10
whismanoid	17:0e9f2dfc2a30	191	* #elif defined(TARGET_NUCLEO_F446RE) \|\| defined(TARGET_NUCLEO_F401RE)
whismanoid	17:0e9f2dfc2a30	192	* // TODO1: avoid resource conflict between P5_0, P5_1, P5_2 SPI and DigitalInOut
whismanoid	17:0e9f2dfc2a30	193	* // void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
whismanoid	17:0e9f2dfc2a30	194	* //
whismanoid	17:0e9f2dfc2a30	195	* // TODO1: NUCLEO_F446RE SPI not working; CS and MOSI data looks OK but no SCLK clock pulses.
whismanoid	17:0e9f2dfc2a30	196	* SPI spi(SPI_MOSI, SPI_MISO, SPI_SCK); // mosi, miso, sclk spi1 TARGET_NUCLEO_F446RE: Arduino 10-pin header D11 D12 D13
whismanoid	17:0e9f2dfc2a30	197	* DigitalOut spi_cs(SPI_CS); // TARGET_NUCLEO_F446RE: PB_6 Arduino 10-pin header D10
whismanoid	17:0e9f2dfc2a30	198	* //
whismanoid	0:68e64068330f	199	* #else
whismanoid	0:68e64068330f	200	* SPI spi(D11, D12, D13); // mosi, miso, sclk spi1 TARGET_MAX32600MBED: Arduino 10-pin header D11 D12 D13
whismanoid	0:68e64068330f	201	* DigitalOut spi_cs(D10); // Generic: Arduino 10-pin header D10
whismanoid	0:68e64068330f	202	* #endif
whismanoid	0:68e64068330f	203	*
whismanoid	0:68e64068330f	204	* // example code declare GPIO interface pins
whismanoid	0:68e64068330f	205	* // example code declare device instance
whismanoid	0:68e64068330f	206	* MAX11410 g_MAX11410_device(spi, spi_cs, MAX11410::MAX11410_IC);
whismanoid	0:68e64068330f	207	*
whismanoid	0:68e64068330f	208	* // CODE GENERATOR: example code for ADC: serial port declaration
whismanoid	0:68e64068330f	209	* //--------------------------------------------------
whismanoid	0:68e64068330f	210	* // Declare the Serial driver
whismanoid	0:68e64068330f	211	* // default baud rate settings are 9600 8N1
whismanoid	0:68e64068330f	212	* // install device driver from http://developer.mbed.org/media/downloads/drivers/mbedWinSerial_16466.exe
whismanoid	0:68e64068330f	213	* // see docs https://docs.mbed.com/docs/mbed-os-handbook/en/5.5/getting_started/what_need/
whismanoid	0:68e64068330f	214	* #if defined(TARGET_MAX32630)
whismanoid	0:68e64068330f	215	* #include "USBSerial.h"
whismanoid	0:68e64068330f	216	* // Hardware serial port over DAPLink
whismanoid	0:68e64068330f	217	* // The default baud rate for the DapLink UART is 9600
whismanoid	0:68e64068330f	218	* //Serial DAPLINKserial(P2_1, P2_0); // tx, rx
whismanoid	0:68e64068330f	219	* // #define HAS_DAPLINK_SERIAL 1
whismanoid	0:68e64068330f	220	* // Virtual serial port over USB
whismanoid	0:68e64068330f	221	* // The baud rate does not affect the virtual USBSerial UART.
whismanoid	0:68e64068330f	222	* USBSerial serial;
whismanoid	0:68e64068330f	223	* //--------------------------------------------------
whismanoid	0:68e64068330f	224	* #elif defined(TARGET_MAX32625MBED)
whismanoid	0:68e64068330f	225	* #include "USBSerial.h"
whismanoid	0:68e64068330f	226	* // Hardware serial port over DAPLink
whismanoid	0:68e64068330f	227	* // The default baud rate for the DapLink UART is 9600
whismanoid	0:68e64068330f	228	* //Serial DAPLINKserial(P2_1, P2_0); // tx, rx
whismanoid	0:68e64068330f	229	* // #define HAS_DAPLINK_SERIAL 1
whismanoid	0:68e64068330f	230	* // Virtual serial port over USB
whismanoid	0:68e64068330f	231	* // The baud rate does not affect the virtual USBSerial UART.
whismanoid	0:68e64068330f	232	* USBSerial serial;
whismanoid	0:68e64068330f	233	* //--------------------------------------------------
whismanoid	0:68e64068330f	234	* #elif defined(TARGET_MAX32600)
whismanoid	0:68e64068330f	235	* #include "USBSerial.h"
whismanoid	0:68e64068330f	236	* // Hardware serial port over DAPLink
whismanoid	0:68e64068330f	237	* // The default baud rate for the DapLink UART is 9600
whismanoid	0:68e64068330f	238	* Serial DAPLINKserial(P1_1, P1_0); // tx, rx
whismanoid	0:68e64068330f	239	* #define HAS_DAPLINK_SERIAL 1
whismanoid	0:68e64068330f	240	* // Virtual serial port over USB
whismanoid	0:68e64068330f	241	* // The baud rate does not affect the virtual USBSerial UART.
whismanoid	0:68e64068330f	242	* USBSerial serial;
whismanoid	0:68e64068330f	243	* //--------------------------------------------------
whismanoid	0:68e64068330f	244	* #elif defined(TARGET_NUCLEO_F446RE) \|\| defined(TARGET_NUCLEO_F401RE)
whismanoid	0:68e64068330f	245	* Serial serial(SERIAL_TX, SERIAL_RX); // tx, rx
whismanoid	0:68e64068330f	246	* //--------------------------------------------------
whismanoid	0:68e64068330f	247	* #else
whismanoid	0:68e64068330f	248	* #if defined(SERIAL_TX)
whismanoid	0:68e64068330f	249	* #warning "target not previously tested; guess serial pins are SERIAL_TX, SERIAL_RX..."
whismanoid	0:68e64068330f	250	* Serial serial(SERIAL_TX, SERIAL_RX); // tx, rx
whismanoid	0:68e64068330f	251	* #elif defined(USBTX)
whismanoid	0:68e64068330f	252	* #warning "target not previously tested; guess serial pins are USBTX, USBRX..."
whismanoid	0:68e64068330f	253	* Serial serial(USBTX, USBRX); // tx, rx
whismanoid	0:68e64068330f	254	* #elif defined(UART_TX)
whismanoid	0:68e64068330f	255	* #warning "target not previously tested; guess serial pins are UART_TX, UART_RX..."
whismanoid	0:68e64068330f	256	* Serial serial(UART_TX, UART_RX); // tx, rx
whismanoid	0:68e64068330f	257	* #else
whismanoid	0:68e64068330f	258	* #warning "target not previously tested; need to define serial pins..."
whismanoid	0:68e64068330f	259	* #endif
whismanoid	0:68e64068330f	260	* #endif
whismanoid	0:68e64068330f	261	* //
whismanoid	0:68e64068330f	262	* #include "CmdLine.h"
whismanoid	0:68e64068330f	263	* CmdLine cmdLine(serial, "serial");
whismanoid	0:68e64068330f	264	*
whismanoid	0:68e64068330f	265	* // example code main function
whismanoid	0:68e64068330f	266	* int main()
whismanoid	0:68e64068330f	267	* {
whismanoid	18:83a84c5ee00f	268	* // example code: serial port banner message
whismanoid	18:83a84c5ee00f	269	* wait(3); // 3000ms timing delay function, platform-specific
whismanoid	18:83a84c5ee00f	270	* cmdLine.serial().printf("\r\nHello_MAX11410\r\n");
whismanoid	18:83a84c5ee00f	271	*
whismanoid	0:68e64068330f	272	* // CODE GENERATOR: example code: member function Init
whismanoid	18:83a84c5ee00f	273	* // Initialize MAX11410 and verify device ID
whismanoid	18:83a84c5ee00f	274	* uint32_t g_SPI_SCLK_Hz = 24000000; // platform limit 24MHz intSPI_SCLK_Platform_Max_MHz * 1000000
whismanoid	18:83a84c5ee00f	275	* if (g_MAX11410_device.Init() == 0)
whismanoid	18:83a84c5ee00f	276	* { // init failed; try "safe mode" SPI at slower SCLK rate
whismanoid	18:83a84c5ee00f	277	* cmdLine.serial().printf("\r\nMAX11410 Init failed; retry at SPI SCLK frequency 2000000 Hz\r\n");
whismanoid	18:83a84c5ee00f	278	*
whismanoid	18:83a84c5ee00f	279	* g_SPI_SCLK_Hz = 2000000;
whismanoid	18:83a84c5ee00f	280	* g_MAX11410_device.spi_frequency(2000000);
whismanoid	18:83a84c5ee00f	281	* g_MAX11410_device.Init();
whismanoid	18:83a84c5ee00f	282	* }
whismanoid	18:83a84c5ee00f	283	* // CODE GENERATOR: get spi properties from device
whismanoid	18:83a84c5ee00f	284	* if (g_SPI_SCLK_Hz > g_MAX11410_device.get_spi_frequency())
whismanoid	18:83a84c5ee00f	285	* { // Device limits SPI SCLK frequency
whismanoid	18:83a84c5ee00f	286	* g_SPI_SCLK_Hz = g_MAX11410_device.get_spi_frequency();
whismanoid	18:83a84c5ee00f	287	* cmdLine.serial().printf("\r\nMAX11410 limits SPI SCLK frequency to %ld Hz\r\n", g_SPI_SCLK_Hz);
whismanoid	18:83a84c5ee00f	288	*
whismanoid	18:83a84c5ee00f	289	* g_MAX11410_device.Init();
whismanoid	18:83a84c5ee00f	290	* }
whismanoid	18:83a84c5ee00f	291	* if (g_MAX11410_device.get_spi_frequency() > g_SPI_SCLK_Hz)
whismanoid	18:83a84c5ee00f	292	* { // Platform limits SPI SCLK frequency
whismanoid	18:83a84c5ee00f	293	* g_MAX11410_device.spi_frequency(g_SPI_SCLK_Hz);
whismanoid	18:83a84c5ee00f	294	* cmdLine.serial().printf("\r\nPlatform limits MAX11410 SPI SCLK frequency to %ld Hz\r\n", g_SPI_SCLK_Hz);
whismanoid	18:83a84c5ee00f	295	*
whismanoid	18:83a84c5ee00f	296	* g_MAX11410_device.Init();
whismanoid	18:83a84c5ee00f	297	* }
whismanoid	18:83a84c5ee00f	298	* // g_SPI_dataMode = g_MAX11410_device.get_spi_dataMode();
whismanoid	18:83a84c5ee00f	299	* while (g_MAX11410_device.Init() == 0)
whismanoid	18:83a84c5ee00f	300	* {
whismanoid	18:83a84c5ee00f	301	* wait(3); // 3000ms timing delay function, platform-specific
whismanoid	18:83a84c5ee00f	302	* cmdLine.serial().printf("\r\nMAX11410 Init failed; retry...\r\n");
whismanoid	18:83a84c5ee00f	303	*
whismanoid	18:83a84c5ee00f	304	* }
whismanoid	0:68e64068330f	305	*
whismanoid	0:68e64068330f	306	* while (1)
whismanoid	0:68e64068330f	307	* {
whismanoid	0:68e64068330f	308	* // CODE GENERATOR: example code: has no member function REF
whismanoid	0:68e64068330f	309	* // CODE GENERATOR: example code for ADC: repeat-forever convert and print conversion result, one record per line
whismanoid	0:68e64068330f	310	* // CODE GENERATOR: ResolutionBits = 24
whismanoid	0:68e64068330f	311	* // CODE GENERATOR: FScode = None
whismanoid	0:68e64068330f	312	* // CODE GENERATOR: NumChannels = 10
whismanoid	0:68e64068330f	313	* while(1) { // this code repeats forever
whismanoid	0:68e64068330f	314	* // this code repeats forever
whismanoid	0:68e64068330f	315	* // CODE GENERATOR: example code: has no member function ScanStandardExternalClock
whismanoid	0:68e64068330f	316	* // CODE GENERATOR: example code: has no member function ReadAINcode
whismanoid	1:d57c1a2cb83c	317	* // CODE GENERATOR: example code: member function Read_All_Voltages
whismanoid	0:68e64068330f	318	* // Measure ADC channels in sequence from AIN0 to channelNumber_0_9.
whismanoid	0:68e64068330f	319	* // @param[in] g_MAX11410_device.channelNumber_0_15: AIN Channel Number
whismanoid	0:68e64068330f	320	* // @param[in] g_MAX11410_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	0:68e64068330f	321	* // @param[in] g_MAX11410_device.chan_id_0_1: ADC_MODE_CONTROL.CHAN_ID
whismanoid	0:68e64068330f	322	* int channelId_0_9 = 9;
whismanoid	0:68e64068330f	323	* //g_MAX11410_device.channelNumber_0_15 = channelId_0_9;
whismanoid	0:68e64068330f	324	* //g_MAX11410_device.PowerManagement_0_2 = 0;
whismanoid	0:68e64068330f	325	* //g_MAX11410_device.chan_id_0_1 = 1;
whismanoid	6:2d39fd70692c	326	* g_MAX11410_device.Read_All_Voltages();
whismanoid	0:68e64068330f	327	*
whismanoid	0:68e64068330f	328	* // wait(3.0);
whismanoid	0:68e64068330f	329	* // CODE GENERATOR: print conversion result
whismanoid	0:68e64068330f	330	* // Use Arduino Serial Plotter to view output: Tools \| Serial Plotter
whismanoid	0:68e64068330f	331	* cmdLine.serial().printf("%d", g_MAX11410_device.AINcode[0]);
whismanoid	0:68e64068330f	332	* for (int index = 1; index <= channelId_0_9; index++) {
whismanoid	0:68e64068330f	333	* cmdLine.serial().printf(",%d", g_MAX11410_device.AINcode[index]);
whismanoid	0:68e64068330f	334	* }
whismanoid	0:68e64068330f	335	* cmdLine.serial().printf("\r\n");
whismanoid	0:68e64068330f	336	*
whismanoid	0:68e64068330f	337	* } // this code repeats forever
whismanoid	0:68e64068330f	338	* }
whismanoid	0:68e64068330f	339	* }
whismanoid	0:68e64068330f	340	* @endcode
whismanoid	0:68e64068330f	341	* //---------- CODE GENERATOR: end helloCppCodeList
whismanoid	0:68e64068330f	342	*/
whismanoid	0:68e64068330f	343	class MAX11410 {
whismanoid	0:68e64068330f	344	public:
whismanoid	0:68e64068330f	345	// CODE GENERATOR: TypedefEnum EnumItem declarations
whismanoid	11:abde565b8497	346	// CODE GENERATOR: TypedefEnum MAX11410_CMDOP_enum_t
whismanoid	11:abde565b8497	347	//----------------------------------------
whismanoid	11:abde565b8497	348	/// Command Operation Format (see function DecodeCommand)
whismanoid	11:abde565b8497	349	///
whismanoid	11:abde565b8497	350	/// Naming convention is CMDOP_bitstream_OPERATION_NAME
whismanoid	11:abde565b8497	351	/// - rxxx_xxxx = read/write bit (1=read, 0=write)
whismanoid	14:b49eecf7e4d8	352	/// - xaaa_aaaa = 7-bit register address field -- see MAX11410_CMD_enum_t
whismanoid	11:abde565b8497	353	/// - xxxx = don't care
whismanoid	11:abde565b8497	354	typedef enum MAX11410_CMDOP_enum_t {
whismanoid	18:83a84c5ee00f	355	CMDOP_0aaa_aaaa_WriteRegister = 0x00, //!< 0b00000000
whismanoid	18:83a84c5ee00f	356	CMDOP_1aaa_aaaa_ReadRegister = 0x80, //!< 0b10000000
whismanoid	11:abde565b8497	357	} MAX11410_CMDOP_enum_t;
whismanoid	11:abde565b8497	358
whismanoid	0:68e64068330f	359	// CODE GENERATOR: TypedefEnum MAX11410_CMD_enum_t
whismanoid	0:68e64068330f	360	//----------------------------------------
whismanoid	0:68e64068330f	361	/// Register Addresses
whismanoid	0:68e64068330f	362	///
whismanoid	0:68e64068330f	363	/// Naming convention is CMD_bitstream_FUNCTION_NAME
whismanoid	0:68e64068330f	364	/// - r = read/write bit (1=read, 0=write)
whismanoid	0:68e64068330f	365	/// - xaaa_aaaa = 7-bit register address field
whismanoid	0:68e64068330f	366	/// - dddd_dddd = 8-bit register data field
whismanoid	0:68e64068330f	367	/// - dddd_dddd_dddd_dddd = 16-bit register data field
whismanoid	0:68e64068330f	368	/// - dddd_dddd_dddd_dddd_dddd_dddd = 24-bit register data field
whismanoid	0:68e64068330f	369	/// - xxxx = don't care
whismanoid	0:68e64068330f	370	typedef enum MAX11410_CMD_enum_t {
whismanoid	18:83a84c5ee00f	371	CMD_r000_0000_xxxx_xxdd_PD = 0x00, //!< 0b0000000
whismanoid	18:83a84c5ee00f	372	CMD_r000_0001_xddd_xxdd_CONV_START = 0x01, //!< 0b0000001
whismanoid	18:83a84c5ee00f	373	CMD_r000_0010_xddd_dddd_SEQ_START = 0x02, //!< 0b0000010
whismanoid	18:83a84c5ee00f	374	CMD_r000_0011_xxxx_xddd_CAL_START = 0x03, //!< 0b0000011
whismanoid	18:83a84c5ee00f	375	CMD_r000_0100_dddd_xddd_GP0_CTRL = 0x04, //!< 0b0000100
whismanoid	18:83a84c5ee00f	376	CMD_r000_0101_dddd_xddd_GP1_CTRL = 0x05, //!< 0b0000101
whismanoid	18:83a84c5ee00f	377	CMD_r000_0110_xddd_xxdd_GP_CONV = 0x06, //!< 0b0000110
whismanoid	18:83a84c5ee00f	378	CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR = 0x07, //!< 0b0000111
whismanoid	18:83a84c5ee00f	379	CMD_r000_1000_x0dd_dddd_FILTER = 0x08, //!< 0b0001000
whismanoid	18:83a84c5ee00f	380	CMD_r000_1001_dddd_dddd_CTRL = 0x09, //!< 0b0001001
whismanoid	18:83a84c5ee00f	381	CMD_r000_1010_dddd_dddd_SOURCE = 0x0a, //!< 0b0001010
whismanoid	18:83a84c5ee00f	382	CMD_r000_1011_dddd_dddd_MUX_CTRL0 = 0x0b, //!< 0b0001011
whismanoid	18:83a84c5ee00f	383	CMD_r000_1100_dddd_dddd_MUX_CTRL1 = 0x0c, //!< 0b0001100
whismanoid	18:83a84c5ee00f	384	CMD_r000_1101_dddd_dddd_MUX_CTRL2 = 0x0d, //!< 0b0001101
whismanoid	18:83a84c5ee00f	385	CMD_r000_1110_xxdd_xddd_PGA = 0x0e, //!< 0b0001110
whismanoid	18:83a84c5ee00f	386	CMD_r000_1111_dddd_dddd_WAIT_EXT = 0x0f, //!< 0b0001111
whismanoid	18:83a84c5ee00f	387	CMD_r001_0000_xxxx_xxxx_WAIT_START = 0x10, //!< 0b0010000
whismanoid	18:83a84c5ee00f	388	CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID = 0x11, //!< 0b0010001
whismanoid	18:83a84c5ee00f	389	CMD_r001_0010_xxxx_xxxx_dddd_xxdd_dddd_dddd_SYSC_SEL = 0x12, //!< 0b0010010
whismanoid	18:83a84c5ee00f	390	CMD_r001_0011_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_A = 0x13, //!< 0b0010011
whismanoid	18:83a84c5ee00f	391	CMD_r001_0100_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_B = 0x14, //!< 0b0010100
whismanoid	18:83a84c5ee00f	392	CMD_r001_0101_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_A = 0x15, //!< 0b0010101
whismanoid	18:83a84c5ee00f	393	CMD_r001_0110_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_B = 0x16, //!< 0b0010110
whismanoid	18:83a84c5ee00f	394	CMD_r001_0111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_OFF = 0x17, //!< 0b0010111
whismanoid	18:83a84c5ee00f	395	CMD_r001_1000_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_1 = 0x18, //!< 0b0011000
whismanoid	18:83a84c5ee00f	396	CMD_r001_1001_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_2 = 0x19, //!< 0b0011001
whismanoid	18:83a84c5ee00f	397	CMD_r001_1010_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_4 = 0x1a, //!< 0b0011010
whismanoid	18:83a84c5ee00f	398	CMD_r001_1011_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_8 = 0x1b, //!< 0b0011011
whismanoid	18:83a84c5ee00f	399	CMD_r001_1100_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_16 = 0x1c, //!< 0b0011100
whismanoid	18:83a84c5ee00f	400	CMD_r001_1101_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_32 = 0x1d, //!< 0b0011101
whismanoid	18:83a84c5ee00f	401	CMD_r001_1110_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_64 = 0x1e, //!< 0b0011110
whismanoid	18:83a84c5ee00f	402	CMD_r001_1111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_128 = 0x1f, //!< 0b0011111
whismanoid	18:83a84c5ee00f	403	CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0 = 0x20, //!< 0b0100000
whismanoid	18:83a84c5ee00f	404	CMD_r010_0001_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH1 = 0x21, //!< 0b0100001
whismanoid	18:83a84c5ee00f	405	CMD_r010_0010_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH2 = 0x22, //!< 0b0100010
whismanoid	18:83a84c5ee00f	406	CMD_r010_0011_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH3 = 0x23, //!< 0b0100011
whismanoid	18:83a84c5ee00f	407	CMD_r010_0100_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH4 = 0x24, //!< 0b0100100
whismanoid	18:83a84c5ee00f	408	CMD_r010_0101_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH5 = 0x25, //!< 0b0100101
whismanoid	18:83a84c5ee00f	409	CMD_r010_0110_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH6 = 0x26, //!< 0b0100110
whismanoid	18:83a84c5ee00f	410	CMD_r010_0111_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH7 = 0x27, //!< 0b0100111
whismanoid	18:83a84c5ee00f	411	CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0 = 0x28, //!< 0b0101000
whismanoid	18:83a84c5ee00f	412	CMD_r010_1001_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH1 = 0x29, //!< 0b0101001
whismanoid	18:83a84c5ee00f	413	CMD_r010_1010_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH2 = 0x2a, //!< 0b0101010
whismanoid	18:83a84c5ee00f	414	CMD_r010_1011_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH3 = 0x2b, //!< 0b0101011
whismanoid	18:83a84c5ee00f	415	CMD_r010_1100_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH4 = 0x2c, //!< 0b0101100
whismanoid	18:83a84c5ee00f	416	CMD_r010_1101_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH5 = 0x2d, //!< 0b0101101
whismanoid	18:83a84c5ee00f	417	CMD_r010_1110_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH6 = 0x2e, //!< 0b0101110
whismanoid	18:83a84c5ee00f	418	CMD_r010_1111_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH7 = 0x2f, //!< 0b0101111
whismanoid	18:83a84c5ee00f	419	CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0 = 0x30, //!< 0b0110000
whismanoid	18:83a84c5ee00f	420	CMD_r011_0001_dddd_dddd_dddd_dddd_dddd_dddd_DATA1 = 0x31, //!< 0b0110001
whismanoid	18:83a84c5ee00f	421	CMD_r011_0010_dddd_dddd_dddd_dddd_dddd_dddd_DATA2 = 0x32, //!< 0b0110010
whismanoid	18:83a84c5ee00f	422	CMD_r011_0011_dddd_dddd_dddd_dddd_dddd_dddd_DATA3 = 0x33, //!< 0b0110011
whismanoid	18:83a84c5ee00f	423	CMD_r011_0100_dddd_dddd_dddd_dddd_dddd_dddd_DATA4 = 0x34, //!< 0b0110100
whismanoid	18:83a84c5ee00f	424	CMD_r011_0101_dddd_dddd_dddd_dddd_dddd_dddd_DATA5 = 0x35, //!< 0b0110101
whismanoid	18:83a84c5ee00f	425	CMD_r011_0110_dddd_dddd_dddd_dddd_dddd_dddd_DATA6 = 0x36, //!< 0b0110110
whismanoid	18:83a84c5ee00f	426	CMD_r011_0111_dddd_dddd_dddd_dddd_dddd_dddd_DATA7 = 0x37, //!< 0b0110111
whismanoid	18:83a84c5ee00f	427	CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS = 0x38, //!< 0b0111000
whismanoid	18:83a84c5ee00f	428	CMD_r011_1001_dddd_dddd_dddd_dddd_dxxd_dddd_STATUS_IE = 0x39, //!< 0b0111001
whismanoid	18:83a84c5ee00f	429	CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0 = 0x3a, //!< 0b0111010
whismanoid	18:83a84c5ee00f	430	CMD_r011_1011_xaaa_aaaa_dddd_dddd_UC_1 = 0x3b, //!< 0b0111011
whismanoid	18:83a84c5ee00f	431	CMD_r011_1100_xaaa_aaaa_dddd_dddd_UC_2 = 0x3c, //!< 0b0111100
whismanoid	18:83a84c5ee00f	432	CMD_r011_1101_xaaa_aaaa_dddd_dddd_UC_3 = 0x3d, //!< 0b0111101
whismanoid	18:83a84c5ee00f	433	CMD_r011_1110_xaaa_aaaa_dddd_dddd_UC_4 = 0x3e, //!< 0b0111110
whismanoid	18:83a84c5ee00f	434	CMD_r011_1111_xaaa_aaaa_dddd_dddd_UC_5 = 0x3f, //!< 0b0111111
whismanoid	18:83a84c5ee00f	435	CMD_r100_0000_xaaa_aaaa_dddd_dddd_UC_6 = 0x40, //!< 0b1000000
whismanoid	18:83a84c5ee00f	436	CMD_r100_0001_xaaa_aaaa_dddd_dddd_UC_7 = 0x41, //!< 0b1000001
whismanoid	18:83a84c5ee00f	437	CMD_r100_0010_xaaa_aaaa_dddd_dddd_UC_8 = 0x42, //!< 0b1000010
whismanoid	18:83a84c5ee00f	438	CMD_r100_0011_xaaa_aaaa_dddd_dddd_UC_9 = 0x43, //!< 0b1000011
whismanoid	18:83a84c5ee00f	439	CMD_r100_0100_xaaa_aaaa_dddd_dddd_UC_10 = 0x44, //!< 0b1000100
whismanoid	18:83a84c5ee00f	440	CMD_r100_0101_xaaa_aaaa_dddd_dddd_UC_11 = 0x45, //!< 0b1000101
whismanoid	18:83a84c5ee00f	441	CMD_r100_0110_xaaa_aaaa_dddd_dddd_UC_12 = 0x46, //!< 0b1000110
whismanoid	18:83a84c5ee00f	442	CMD_r100_0111_xaaa_aaaa_dddd_dddd_UC_13 = 0x47, //!< 0b1000111
whismanoid	18:83a84c5ee00f	443	CMD_r100_1000_xaaa_aaaa_dddd_dddd_UC_14 = 0x48, //!< 0b1001000
whismanoid	18:83a84c5ee00f	444	CMD_r100_1001_xaaa_aaaa_dddd_dddd_UC_15 = 0x49, //!< 0b1001001
whismanoid	18:83a84c5ee00f	445	CMD_r100_1010_xaaa_aaaa_dddd_dddd_UC_16 = 0x4a, //!< 0b1001010
whismanoid	18:83a84c5ee00f	446	CMD_r100_1011_xaaa_aaaa_dddd_dddd_UC_17 = 0x4b, //!< 0b1001011
whismanoid	18:83a84c5ee00f	447	CMD_r100_1100_xaaa_aaaa_dddd_dddd_UC_18 = 0x4c, //!< 0b1001100
whismanoid	18:83a84c5ee00f	448	CMD_r100_1101_xaaa_aaaa_dddd_dddd_UC_19 = 0x4d, //!< 0b1001101
whismanoid	18:83a84c5ee00f	449	CMD_r100_1110_xaaa_aaaa_dddd_dddd_UC_20 = 0x4e, //!< 0b1001110
whismanoid	18:83a84c5ee00f	450	CMD_r100_1111_xaaa_aaaa_dddd_dddd_UC_21 = 0x4f, //!< 0b1001111
whismanoid	18:83a84c5ee00f	451	CMD_r101_0000_xaaa_aaaa_dddd_dddd_UC_22 = 0x50, //!< 0b1010000
whismanoid	18:83a84c5ee00f	452	CMD_r101_0001_xaaa_aaaa_dddd_dddd_UC_23 = 0x51, //!< 0b1010001
whismanoid	18:83a84c5ee00f	453	CMD_r101_0010_xaaa_aaaa_dddd_dddd_UC_24 = 0x52, //!< 0b1010010
whismanoid	18:83a84c5ee00f	454	CMD_r101_0011_xaaa_aaaa_dddd_dddd_UC_25 = 0x53, //!< 0b1010011
whismanoid	18:83a84c5ee00f	455	CMD_r101_0100_xaaa_aaaa_dddd_dddd_UC_26 = 0x54, //!< 0b1010100
whismanoid	18:83a84c5ee00f	456	CMD_r101_0101_xaaa_aaaa_dddd_dddd_UC_27 = 0x55, //!< 0b1010101
whismanoid	18:83a84c5ee00f	457	CMD_r101_0110_xaaa_aaaa_dddd_dddd_UC_28 = 0x56, //!< 0b1010110
whismanoid	18:83a84c5ee00f	458	CMD_r101_0111_xaaa_aaaa_dddd_dddd_UC_29 = 0x57, //!< 0b1010111
whismanoid	18:83a84c5ee00f	459	CMD_r101_1000_xaaa_aaaa_dddd_dddd_UC_30 = 0x58, //!< 0b1011000
whismanoid	18:83a84c5ee00f	460	CMD_r101_1001_xaaa_aaaa_dddd_dddd_UC_31 = 0x59, //!< 0b1011001
whismanoid	18:83a84c5ee00f	461	CMD_r101_1010_xaaa_aaaa_dddd_dddd_UC_32 = 0x5a, //!< 0b1011010
whismanoid	18:83a84c5ee00f	462	CMD_r101_1011_xaaa_aaaa_dddd_dddd_UC_33 = 0x5b, //!< 0b1011011
whismanoid	18:83a84c5ee00f	463	CMD_r101_1100_xaaa_aaaa_dddd_dddd_UC_34 = 0x5c, //!< 0b1011100
whismanoid	18:83a84c5ee00f	464	CMD_r101_1101_xaaa_aaaa_dddd_dddd_UC_35 = 0x5d, //!< 0b1011101
whismanoid	18:83a84c5ee00f	465	CMD_r101_1110_xaaa_aaaa_dddd_dddd_UC_36 = 0x5e, //!< 0b1011110
whismanoid	18:83a84c5ee00f	466	CMD_r101_1111_xaaa_aaaa_dddd_dddd_UC_37 = 0x5f, //!< 0b1011111
whismanoid	18:83a84c5ee00f	467	CMD_r110_0000_xaaa_aaaa_dddd_dddd_UC_38 = 0x60, //!< 0b1100000
whismanoid	18:83a84c5ee00f	468	CMD_r110_0001_xaaa_aaaa_dddd_dddd_UC_39 = 0x61, //!< 0b1100001
whismanoid	18:83a84c5ee00f	469	CMD_r110_0010_xaaa_aaaa_dddd_dddd_UC_40 = 0x62, //!< 0b1100010
whismanoid	18:83a84c5ee00f	470	CMD_r110_0011_xaaa_aaaa_dddd_dddd_UC_41 = 0x63, //!< 0b1100011
whismanoid	18:83a84c5ee00f	471	CMD_r110_0100_xaaa_aaaa_dddd_dddd_UC_42 = 0x64, //!< 0b1100100
whismanoid	18:83a84c5ee00f	472	CMD_r110_0101_xaaa_aaaa_dddd_dddd_UC_43 = 0x65, //!< 0b1100101
whismanoid	18:83a84c5ee00f	473	CMD_r110_0110_xaaa_aaaa_dddd_dddd_UC_44 = 0x66, //!< 0b1100110
whismanoid	18:83a84c5ee00f	474	CMD_r110_0111_xaaa_aaaa_dddd_dddd_UC_45 = 0x67, //!< 0b1100111
whismanoid	18:83a84c5ee00f	475	CMD_r110_1000_xaaa_aaaa_dddd_dddd_UC_46 = 0x68, //!< 0b1101000
whismanoid	18:83a84c5ee00f	476	CMD_r110_1001_xaaa_aaaa_dddd_dddd_UC_47 = 0x69, //!< 0b1101001
whismanoid	18:83a84c5ee00f	477	CMD_r110_1010_xaaa_aaaa_dddd_dddd_UC_48 = 0x6a, //!< 0b1101010
whismanoid	18:83a84c5ee00f	478	CMD_r110_1011_xaaa_aaaa_dddd_dddd_UC_49 = 0x6b, //!< 0b1101011
whismanoid	18:83a84c5ee00f	479	CMD_r110_1100_xaaa_aaaa_dddd_dddd_UC_50 = 0x6c, //!< 0b1101100
whismanoid	18:83a84c5ee00f	480	CMD_r110_1101_xaaa_aaaa_dddd_dddd_UC_51 = 0x6d, //!< 0b1101101
whismanoid	18:83a84c5ee00f	481	CMD_r110_1110_xaaa_aaaa_dddd_dddd_UC_52 = 0x6e, //!< 0b1101110
whismanoid	18:83a84c5ee00f	482	CMD_r110_1111_xxxx_xxxx_xaaa_aaaa_UCADDR = 0x6f, //!< 0b1101111
whismanoid	0:68e64068330f	483	} MAX11410_CMD_enum_t;
whismanoid	0:68e64068330f	484
whismanoid	0:68e64068330f	485	// CODE GENERATOR: TypedefEnum MAX11410_SEQ_ADDR_enum_t
whismanoid	0:68e64068330f	486	//----------------------------------------
whismanoid	0:68e64068330f	487	/// Microcode Sequencer Addresses.
whismanoid	0:68e64068330f	488	/// CMD_r000_0010_xddd_dddd_SEQ_START
whismanoid	0:68e64068330f	489	/// CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR
whismanoid	0:68e64068330f	490	///
whismanoid	0:68e64068330f	491	/// Naming convention is CMD_bitstream_FUNCTION_NAME
whismanoid	0:68e64068330f	492	/// - xaaa_aaaa = 7-bit register address field
whismanoid	0:68e64068330f	493	/// - dddd_dddd = 8-bit register data field
whismanoid	0:68e64068330f	494	/// - xxxx = don't care
whismanoid	0:68e64068330f	495	typedef enum MAX11410_SEQ_ADDR_enum_t {
whismanoid	18:83a84c5ee00f	496	SEQ_ADDR_r011_1010_xaaa_aaaa_dddd_dddd_UC_0 = 0x3a, //!< 0b0111010
whismanoid	18:83a84c5ee00f	497	SEQ_ADDR_r011_1011_xaaa_aaaa_dddd_dddd_UC_1 = 0x3b, //!< 0b0111011
whismanoid	18:83a84c5ee00f	498	SEQ_ADDR_r011_1100_xaaa_aaaa_dddd_dddd_UC_2 = 0x3c, //!< 0b0111100
whismanoid	18:83a84c5ee00f	499	SEQ_ADDR_r011_1101_xaaa_aaaa_dddd_dddd_UC_3 = 0x3d, //!< 0b0111101
whismanoid	18:83a84c5ee00f	500	SEQ_ADDR_r011_1110_xaaa_aaaa_dddd_dddd_UC_4 = 0x3e, //!< 0b0111110
whismanoid	18:83a84c5ee00f	501	SEQ_ADDR_r011_1111_xaaa_aaaa_dddd_dddd_UC_5 = 0x3f, //!< 0b0111111
whismanoid	18:83a84c5ee00f	502	SEQ_ADDR_r100_0000_xaaa_aaaa_dddd_dddd_UC_6 = 0x40, //!< 0b1000000
whismanoid	18:83a84c5ee00f	503	SEQ_ADDR_r100_0001_xaaa_aaaa_dddd_dddd_UC_7 = 0x41, //!< 0b1000001
whismanoid	18:83a84c5ee00f	504	SEQ_ADDR_r100_0010_xaaa_aaaa_dddd_dddd_UC_8 = 0x42, //!< 0b1000010
whismanoid	18:83a84c5ee00f	505	SEQ_ADDR_r100_0011_xaaa_aaaa_dddd_dddd_UC_9 = 0x43, //!< 0b1000011
whismanoid	18:83a84c5ee00f	506	SEQ_ADDR_r100_0100_xaaa_aaaa_dddd_dddd_UC_10 = 0x44, //!< 0b1000100
whismanoid	18:83a84c5ee00f	507	SEQ_ADDR_r100_0101_xaaa_aaaa_dddd_dddd_UC_11 = 0x45, //!< 0b1000101
whismanoid	18:83a84c5ee00f	508	SEQ_ADDR_r100_0110_xaaa_aaaa_dddd_dddd_UC_12 = 0x46, //!< 0b1000110
whismanoid	18:83a84c5ee00f	509	SEQ_ADDR_r100_0111_xaaa_aaaa_dddd_dddd_UC_13 = 0x47, //!< 0b1000111
whismanoid	18:83a84c5ee00f	510	SEQ_ADDR_r100_1000_xaaa_aaaa_dddd_dddd_UC_14 = 0x48, //!< 0b1001000
whismanoid	18:83a84c5ee00f	511	SEQ_ADDR_r100_1001_xaaa_aaaa_dddd_dddd_UC_15 = 0x49, //!< 0b1001001
whismanoid	18:83a84c5ee00f	512	SEQ_ADDR_r100_1010_xaaa_aaaa_dddd_dddd_UC_16 = 0x4a, //!< 0b1001010
whismanoid	18:83a84c5ee00f	513	SEQ_ADDR_r100_1011_xaaa_aaaa_dddd_dddd_UC_17 = 0x4b, //!< 0b1001011
whismanoid	18:83a84c5ee00f	514	SEQ_ADDR_r100_1100_xaaa_aaaa_dddd_dddd_UC_18 = 0x4c, //!< 0b1001100
whismanoid	18:83a84c5ee00f	515	SEQ_ADDR_r100_1101_xaaa_aaaa_dddd_dddd_UC_19 = 0x4d, //!< 0b1001101
whismanoid	18:83a84c5ee00f	516	SEQ_ADDR_r100_1110_xaaa_aaaa_dddd_dddd_UC_20 = 0x4e, //!< 0b1001110
whismanoid	18:83a84c5ee00f	517	SEQ_ADDR_r100_1111_xaaa_aaaa_dddd_dddd_UC_21 = 0x4f, //!< 0b1001111
whismanoid	18:83a84c5ee00f	518	SEQ_ADDR_r101_0000_xaaa_aaaa_dddd_dddd_UC_22 = 0x50, //!< 0b1010000
whismanoid	18:83a84c5ee00f	519	SEQ_ADDR_r101_0001_xaaa_aaaa_dddd_dddd_UC_23 = 0x51, //!< 0b1010001
whismanoid	18:83a84c5ee00f	520	SEQ_ADDR_r101_0010_xaaa_aaaa_dddd_dddd_UC_24 = 0x52, //!< 0b1010010
whismanoid	18:83a84c5ee00f	521	SEQ_ADDR_r101_0011_xaaa_aaaa_dddd_dddd_UC_25 = 0x53, //!< 0b1010011
whismanoid	18:83a84c5ee00f	522	SEQ_ADDR_r101_0100_xaaa_aaaa_dddd_dddd_UC_26 = 0x54, //!< 0b1010100
whismanoid	18:83a84c5ee00f	523	SEQ_ADDR_r101_0101_xaaa_aaaa_dddd_dddd_UC_27 = 0x55, //!< 0b1010101
whismanoid	18:83a84c5ee00f	524	SEQ_ADDR_r101_0110_xaaa_aaaa_dddd_dddd_UC_28 = 0x56, //!< 0b1010110
whismanoid	18:83a84c5ee00f	525	SEQ_ADDR_r101_0111_xaaa_aaaa_dddd_dddd_UC_29 = 0x57, //!< 0b1010111
whismanoid	18:83a84c5ee00f	526	SEQ_ADDR_r101_1000_xaaa_aaaa_dddd_dddd_UC_30 = 0x58, //!< 0b1011000
whismanoid	18:83a84c5ee00f	527	SEQ_ADDR_r101_1001_xaaa_aaaa_dddd_dddd_UC_31 = 0x59, //!< 0b1011001
whismanoid	18:83a84c5ee00f	528	SEQ_ADDR_r101_1010_xaaa_aaaa_dddd_dddd_UC_32 = 0x5a, //!< 0b1011010
whismanoid	18:83a84c5ee00f	529	SEQ_ADDR_r101_1011_xaaa_aaaa_dddd_dddd_UC_33 = 0x5b, //!< 0b1011011
whismanoid	18:83a84c5ee00f	530	SEQ_ADDR_r101_1100_xaaa_aaaa_dddd_dddd_UC_34 = 0x5c, //!< 0b1011100
whismanoid	18:83a84c5ee00f	531	SEQ_ADDR_r101_1101_xaaa_aaaa_dddd_dddd_UC_35 = 0x5d, //!< 0b1011101
whismanoid	18:83a84c5ee00f	532	SEQ_ADDR_r101_1110_xaaa_aaaa_dddd_dddd_UC_36 = 0x5e, //!< 0b1011110
whismanoid	18:83a84c5ee00f	533	SEQ_ADDR_r101_1111_xaaa_aaaa_dddd_dddd_UC_37 = 0x5f, //!< 0b1011111
whismanoid	18:83a84c5ee00f	534	SEQ_ADDR_r110_0000_xaaa_aaaa_dddd_dddd_UC_38 = 0x60, //!< 0b1100000
whismanoid	18:83a84c5ee00f	535	SEQ_ADDR_r110_0001_xaaa_aaaa_dddd_dddd_UC_39 = 0x61, //!< 0b1100001
whismanoid	18:83a84c5ee00f	536	SEQ_ADDR_r110_0010_xaaa_aaaa_dddd_dddd_UC_40 = 0x62, //!< 0b1100010
whismanoid	18:83a84c5ee00f	537	SEQ_ADDR_r110_0011_xaaa_aaaa_dddd_dddd_UC_41 = 0x63, //!< 0b1100011
whismanoid	18:83a84c5ee00f	538	SEQ_ADDR_r110_0100_xaaa_aaaa_dddd_dddd_UC_42 = 0x64, //!< 0b1100100
whismanoid	18:83a84c5ee00f	539	SEQ_ADDR_r110_0101_xaaa_aaaa_dddd_dddd_UC_43 = 0x65, //!< 0b1100101
whismanoid	18:83a84c5ee00f	540	SEQ_ADDR_r110_0110_xaaa_aaaa_dddd_dddd_UC_44 = 0x66, //!< 0b1100110
whismanoid	18:83a84c5ee00f	541	SEQ_ADDR_r110_0111_xaaa_aaaa_dddd_dddd_UC_45 = 0x67, //!< 0b1100111
whismanoid	18:83a84c5ee00f	542	SEQ_ADDR_r110_1000_xaaa_aaaa_dddd_dddd_UC_46 = 0x68, //!< 0b1101000
whismanoid	18:83a84c5ee00f	543	SEQ_ADDR_r110_1001_xaaa_aaaa_dddd_dddd_UC_47 = 0x69, //!< 0b1101001
whismanoid	18:83a84c5ee00f	544	SEQ_ADDR_r110_1010_xaaa_aaaa_dddd_dddd_UC_48 = 0x6a, //!< 0b1101010
whismanoid	18:83a84c5ee00f	545	SEQ_ADDR_r110_1011_xaaa_aaaa_dddd_dddd_UC_49 = 0x6b, //!< 0b1101011
whismanoid	18:83a84c5ee00f	546	SEQ_ADDR_r110_1100_xaaa_aaaa_dddd_dddd_UC_50 = 0x6c, //!< 0b1101100
whismanoid	18:83a84c5ee00f	547	SEQ_ADDR_r110_1101_xaaa_aaaa_dddd_dddd_UC_51 = 0x6d, //!< 0b1101101
whismanoid	18:83a84c5ee00f	548	SEQ_ADDR_r110_1110_xaaa_aaaa_dddd_dddd_UC_52 = 0x6e, //!< 0b1101110
whismanoid	0:68e64068330f	549	} MAX11410_SEQ_ADDR_enum_t;
whismanoid	0:68e64068330f	550
whismanoid	9:06ca88952f1c	551	// CODE GENERATOR: TypedefEnum MAX11410_STATUS_enum_t
whismanoid	9:06ca88952f1c	552	//----------------------------------------
whismanoid	9:06ca88952f1c	553	/// Status indicator bits
whismanoid	9:06ca88952f1c	554	/// CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS fields
whismanoid	9:06ca88952f1c	555	///
whismanoid	9:06ca88952f1c	556	typedef enum MAX11410_STATUS_enum_t {
whismanoid	18:83a84c5ee00f	557	STATUS_000001_CONV_RDY = 0x00000001, //!< 0b00000000000000000000000000000001
whismanoid	18:83a84c5ee00f	558	STATUS_000002_SEQ_RDY = 0x00000002, //!< 0b00000000000000000000000000000010
whismanoid	18:83a84c5ee00f	559	STATUS_000004_CAL_RDY = 0x00000004, //!< 0b00000000000000000000000000000100
whismanoid	18:83a84c5ee00f	560	STATUS_000008_WAIT_DONE = 0x00000008, //!< 0b00000000000000000000000000001000
whismanoid	18:83a84c5ee00f	561	STATUS_000010_DATA_RDY = 0x00000010, //!< 0b00000000000000000000000000010000
whismanoid	18:83a84c5ee00f	562	STATUS_000020_reserved = 0x00000020, //!< 0b00000000000000000000000000100000
whismanoid	18:83a84c5ee00f	563	STATUS_000040_reserved = 0x00000040, //!< 0b00000000000000000000000001000000
whismanoid	18:83a84c5ee00f	564	STATUS_000080_SYSGOR = 0x00000080, //!< 0b00000000000000000000000010000000
whismanoid	18:83a84c5ee00f	565	STATUS_000100_TUR_0 = 0x00000100, //!< 0b00000000000000000000000100000000
whismanoid	18:83a84c5ee00f	566	STATUS_000200_TUR_1 = 0x00000200, //!< 0b00000000000000000000001000000000
whismanoid	18:83a84c5ee00f	567	STATUS_000400_TUR_2 = 0x00000400, //!< 0b00000000000000000000010000000000
whismanoid	18:83a84c5ee00f	568	STATUS_000800_TUR_3 = 0x00000800, //!< 0b00000000000000000000100000000000
whismanoid	18:83a84c5ee00f	569	STATUS_001000_TUR_4 = 0x00001000, //!< 0b00000000000000000001000000000000
whismanoid	18:83a84c5ee00f	570	STATUS_002000_TUR_5 = 0x00002000, //!< 0b00000000000000000010000000000000
whismanoid	18:83a84c5ee00f	571	STATUS_004000_TUR_6 = 0x00004000, //!< 0b00000000000000000100000000000000
whismanoid	18:83a84c5ee00f	572	STATUS_008000_TUR_7 = 0x00008000, //!< 0b00000000000000001000000000000000
whismanoid	18:83a84c5ee00f	573	STATUS_010000_TOR_0 = 0x00010000, //!< 0b00000000000000010000000000000000
whismanoid	18:83a84c5ee00f	574	STATUS_020000_TOR_1 = 0x00020000, //!< 0b00000000000000100000000000000000
whismanoid	18:83a84c5ee00f	575	STATUS_040000_TOR_2 = 0x00040000, //!< 0b00000000000001000000000000000000
whismanoid	18:83a84c5ee00f	576	STATUS_080000_TOR_3 = 0x00080000, //!< 0b00000000000010000000000000000000
whismanoid	18:83a84c5ee00f	577	STATUS_100000_TOR_4 = 0x00100000, //!< 0b00000000000100000000000000000000
whismanoid	18:83a84c5ee00f	578	STATUS_200000_TOR_5 = 0x00200000, //!< 0b00000000001000000000000000000000
whismanoid	18:83a84c5ee00f	579	STATUS_400000_TOR_6 = 0x00400000, //!< 0b00000000010000000000000000000000
whismanoid	18:83a84c5ee00f	580	STATUS_800000_TOR_7 = 0x00800000, //!< 0b00000000100000000000000000000000
whismanoid	9:06ca88952f1c	581	} MAX11410_STATUS_enum_t;
whismanoid	9:06ca88952f1c	582
whismanoid	0:68e64068330f	583	// CODE GENERATOR: TypedefEnum MAX11410_PD_enum_t
whismanoid	0:68e64068330f	584	//----------------------------------------
whismanoid	0:68e64068330f	585	/// Power-down state command
whismanoid	0:68e64068330f	586	/// CMD_r000_0000_xxxx_xxdd_PD PD[1:0] field
whismanoid	0:68e64068330f	587	///
whismanoid	0:68e64068330f	588	/// - 00: Normal mode
whismanoid	0:68e64068330f	589	/// - 01: Standby mode -- Powers down all analog circuity, but not the internal voltage regulator
whismanoid	0:68e64068330f	590	/// - 10: Sleep mode -- Powers down all analog circuitry including the internal voltage regulator
whismanoid	0:68e64068330f	591	/// - 11: Reset -- all registers reset to POR state (Self Clearing to 01 Standby mode)
whismanoid	0:68e64068330f	592	typedef enum MAX11410_PD_enum_t {
whismanoid	18:83a84c5ee00f	593	PD_00_Normal = 0x00, //!< 0b00
whismanoid	18:83a84c5ee00f	594	PD_01_Standby = 0x01, //!< 0b01
whismanoid	18:83a84c5ee00f	595	PD_10_Sleep = 0x02, //!< 0b10
whismanoid	18:83a84c5ee00f	596	PD_11_Reset = 0x03, //!< 0b11
whismanoid	0:68e64068330f	597	} MAX11410_PD_enum_t;
whismanoid	0:68e64068330f	598
whismanoid	0:68e64068330f	599	// CODE GENERATOR: TypedefEnum MAX11410_DEST_enum_t
whismanoid	0:68e64068330f	600	//----------------------------------------
whismanoid	0:68e64068330f	601	/// Conversion / seqeuncer start command
whismanoid	0:68e64068330f	602	/// CMD_r000_0001_xddd_xxdd_CONV_START DEST[2:0] field.
whismanoid	0:68e64068330f	603	/// CMD_r000_0110_xddd_xxdd_GP_CONV GP_DEST[2:0] field.
whismanoid	0:68e64068330f	604	///
whismanoid	0:68e64068330f	605	/// - 000: Store result in DATA0
whismanoid	0:68e64068330f	606	/// - 001: Store result in DATA1
whismanoid	0:68e64068330f	607	/// - 010: Store result in DATA2
whismanoid	0:68e64068330f	608	/// - 011: Store result in DATA3
whismanoid	0:68e64068330f	609	/// - 100: Store result in DATA4
whismanoid	0:68e64068330f	610	/// - 101: Store result in DATA5
whismanoid	0:68e64068330f	611	/// - 110: Store result in DATA6
whismanoid	0:68e64068330f	612	/// - 111: Store result in DATA7
whismanoid	0:68e64068330f	613	typedef enum MAX11410_DEST_enum_t {
whismanoid	18:83a84c5ee00f	614	DEST_000_DATA0 = 0x00, //!< 0b000
whismanoid	18:83a84c5ee00f	615	DEST_001_DATA1 = 0x01, //!< 0b001
whismanoid	18:83a84c5ee00f	616	DEST_010_DATA2 = 0x02, //!< 0b010
whismanoid	18:83a84c5ee00f	617	DEST_011_DATA3 = 0x03, //!< 0b011
whismanoid	18:83a84c5ee00f	618	DEST_100_DATA4 = 0x04, //!< 0b100
whismanoid	18:83a84c5ee00f	619	DEST_101_DATA5 = 0x05, //!< 0b101
whismanoid	18:83a84c5ee00f	620	DEST_110_DATA6 = 0x06, //!< 0b110
whismanoid	18:83a84c5ee00f	621	DEST_111_DATA7 = 0x07, //!< 0b111
whismanoid	0:68e64068330f	622	} MAX11410_DEST_enum_t;
whismanoid	0:68e64068330f	623
whismanoid	0:68e64068330f	624	// CODE GENERATOR: TypedefEnum MAX11410_CONV_TYPE_enum_t
whismanoid	0:68e64068330f	625	//----------------------------------------
whismanoid	0:68e64068330f	626	/// Conversion / seqeuncer start command
whismanoid	0:68e64068330f	627	/// CMD_r000_0001_xddd_xxdd_CONV_START CONV_TYPE[1:0] field.
whismanoid	0:68e64068330f	628	/// CMD_r000_0110_xddd_xxdd_GP_CONV GP_CONV_TYPE[2:0] field.
whismanoid	0:68e64068330f	629	///
whismanoid	0:68e64068330f	630	/// - 00: Single conversion
whismanoid	0:68e64068330f	631	/// - 01: Continuous conversions
whismanoid	0:68e64068330f	632	/// - 10, 11: 1:4 Duty cycled conversions (modulator low-power mode)
whismanoid	0:68e64068330f	633	typedef enum MAX11410_CONV_TYPE_enum_t {
whismanoid	18:83a84c5ee00f	634	CONV_TYPE_00_Single = 0x00, //!< 0b00
whismanoid	18:83a84c5ee00f	635	CONV_TYPE_01_Continuous = 0x01, //!< 0b01
whismanoid	18:83a84c5ee00f	636	CONV_TYPE_10_DutyCycle_1_4 = 0x02, //!< 0b10
whismanoid	18:83a84c5ee00f	637	CONV_TYPE_11_DutyCycle_1_4 = 0x03, //!< 0b11
whismanoid	0:68e64068330f	638	} MAX11410_CONV_TYPE_enum_t;
whismanoid	0:68e64068330f	639
whismanoid	0:68e64068330f	640	// CODE GENERATOR: TypedefEnum MAX11410_CAL_TYPE_enum_t
whismanoid	0:68e64068330f	641	//----------------------------------------
whismanoid	0:68e64068330f	642	/// Calbration command
whismanoid	0:68e64068330f	643	/// CMD_r000_0011_xxxx_xddd_CAL_START CAL_TYPE[2:0] field
whismanoid	0:68e64068330f	644	///
whismanoid	0:68e64068330f	645	/// - 000: Performs a self-calibration. Resulting offset calibration value is stored in the SELF_OFF register, and the 1x gain calibration value is stored in the SELF_GAIN_1 register.
whismanoid	0:68e64068330f	646	/// - 001: Performs a PGA gain calibration at the currently programmed PGA gain. A 'No Op' will result if PGA Gain calibration is executed with the PGA disabled via the SIG_PATH register, or with the GAIN register set to 1x.The resulting gain calibration value is stored in the SELF_GAIN_[2-128] register corresponding to the currently programmed PGA GAIN setting.
whismanoid	0:68e64068330f	647	/// - 010: Reserved
whismanoid	0:68e64068330f	648	/// - 011: Reserved
whismanoid	0:68e64068330f	649	/// - 100: Performs a system offset calibration. The resulting calibration value is stored in the SYS_OFF_A register.
whismanoid	0:68e64068330f	650	/// - 101: Performs a system gain calibration. The resulting calibration value is stored in the SYS_GAIN_A register.
whismanoid	0:68e64068330f	651	/// - 110: Performs a system offset calibration. The resulting calibration value is stored in the SYS_OFF_B register.
whismanoid	0:68e64068330f	652	/// - 111: Performs a system gain calibration. The resulting calibration value is stored in the SYS_GAIN_B register.
whismanoid	0:68e64068330f	653	typedef enum MAX11410_CAL_TYPE_enum_t {
whismanoid	18:83a84c5ee00f	654	CAL_TYPE_000_SELF_CAL = 0x00, //!< 0b000
whismanoid	18:83a84c5ee00f	655	CAL_TYPE_001_PGA_GAIN = 0x01, //!< 0b001
whismanoid	18:83a84c5ee00f	656	CAL_TYPE_010_reserved = 0x02, //!< 0b010
whismanoid	18:83a84c5ee00f	657	CAL_TYPE_011_reserved = 0x03, //!< 0b011
whismanoid	18:83a84c5ee00f	658	CAL_TYPE_100_SYS_OFF_A = 0x04, //!< 0b100
whismanoid	18:83a84c5ee00f	659	CAL_TYPE_101_SYS_GAIN_A = 0x05, //!< 0b101
whismanoid	18:83a84c5ee00f	660	CAL_TYPE_110_SYS_OFF_B = 0x06, //!< 0b110
whismanoid	18:83a84c5ee00f	661	CAL_TYPE_111_SYS_GAIN_B = 0x07, //!< 0b111
whismanoid	0:68e64068330f	662	} MAX11410_CAL_TYPE_enum_t;
whismanoid	0:68e64068330f	663
whismanoid	0:68e64068330f	664	// CODE GENERATOR: TypedefEnum MAX11410_GP0_DIR_enum_t
whismanoid	0:68e64068330f	665	//----------------------------------------
whismanoid	0:68e64068330f	666	/// GPIO0 pin command
whismanoid	14:b49eecf7e4d8	667	/// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_DIR[1:0] field (bits 7:6)
whismanoid	0:68e64068330f	668	///
whismanoid	0:68e64068330f	669	/// - 00: Input mode, reference to VDDIO (default)
whismanoid	0:68e64068330f	670	/// - 01: Reserved
whismanoid	0:68e64068330f	671	/// - 10: Output mode, open-drain output
whismanoid	0:68e64068330f	672	/// - 11: Output mode, CMOS output
whismanoid	0:68e64068330f	673	typedef enum MAX11410_GP0_DIR_enum_t {
whismanoid	18:83a84c5ee00f	674	GP0_DIR_00_Input = 0x00, //!< 0b00
whismanoid	18:83a84c5ee00f	675	GP0_DIR_01_reserved = 0x01, //!< 0b01
whismanoid	18:83a84c5ee00f	676	GP0_DIR_10_OutputOpenDrain = 0x02, //!< 0b10
whismanoid	18:83a84c5ee00f	677	GP0_DIR_11_Output = 0x03, //!< 0b11
whismanoid	0:68e64068330f	678	} MAX11410_GP0_DIR_enum_t;
whismanoid	0:68e64068330f	679
whismanoid	0:68e64068330f	680	// CODE GENERATOR: TypedefEnum MAX11410_GP0_ISEL_enum_t
whismanoid	0:68e64068330f	681	//----------------------------------------
whismanoid	0:68e64068330f	682	/// GPIO0 pin command
whismanoid	14:b49eecf7e4d8	683	/// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_ISEL[1:0] field (bits 5:4)
whismanoid	0:68e64068330f	684	///
whismanoid	0:68e64068330f	685	/// - 00: GPIO_0 input disabled (default)
whismanoid	0:68e64068330f	686	/// - 01: GPIO_0 input configured as rising-edge-triggered conversion start
whismanoid	0:68e64068330f	687	/// - 10: GPIO_0 input configured as rising-edge-triggered sequence start from GP_SEQ_ADDR
whismanoid	0:68e64068330f	688	/// - 11: Reserved
whismanoid	0:68e64068330f	689	typedef enum MAX11410_GP0_ISEL_enum_t {
whismanoid	18:83a84c5ee00f	690	GP0_ISEL_00_disabled = 0x00, //!< 0b00
whismanoid	18:83a84c5ee00f	691	GP0_ISEL_01_TRIGGER_CONV_START = 0x01, //!< 0b01
whismanoid	18:83a84c5ee00f	692	GP0_ISEL_10_TRIGGER_SEQ_START = 0x02, //!< 0b10
whismanoid	18:83a84c5ee00f	693	GP0_ISEL_11_reserved = 0x03, //!< 0b11
whismanoid	0:68e64068330f	694	} MAX11410_GP0_ISEL_enum_t;
whismanoid	0:68e64068330f	695
whismanoid	0:68e64068330f	696	// CODE GENERATOR: TypedefEnum MAX11410_GP0_OSEL_enum_t
whismanoid	0:68e64068330f	697	//----------------------------------------
whismanoid	0:68e64068330f	698	/// GPIO0 pin command
whismanoid	14:b49eecf7e4d8	699	/// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_OSEL[2:0] field (bits 2:0)
whismanoid	0:68e64068330f	700	///
whismanoid	0:68e64068330f	701	/// - 000: GPIO_0 output disabled, high Z (default)
whismanoid	0:68e64068330f	702	/// - 001: GPIO_0 output is configured as INTRB (active low)
whismanoid	0:68e64068330f	703	/// - 010: GPIO_0 output is configured as INTR (active high)
whismanoid	0:68e64068330f	704	/// - 011: GPIO_0 output is configured as state Logic 0
whismanoid	0:68e64068330f	705	/// - 100: GPIO_0 output is configured as state Logic 1
whismanoid	0:68e64068330f	706	/// - 101: GPIO_0 output is configured as automatic low-side switch operation (CMOS output mode overridden)
whismanoid	0:68e64068330f	707	/// - 110: GPIO_0 output is configured as modulator active status
whismanoid	0:68e64068330f	708	/// - 111: GPIO_0 output is configured as system clock (2.456Mhz Nominal)
whismanoid	0:68e64068330f	709	typedef enum MAX11410_GP0_OSEL_enum_t {
whismanoid	18:83a84c5ee00f	710	GP0_OSEL_000_disabled = 0x00, //!< 0b000
whismanoid	18:83a84c5ee00f	711	GP0_OSEL_001_INTRB = 0x01, //!< 0b001
whismanoid	18:83a84c5ee00f	712	GP0_OSEL_010_INTR = 0x02, //!< 0b010
whismanoid	18:83a84c5ee00f	713	GP0_OSEL_011_LOGIC_0 = 0x03, //!< 0b011
whismanoid	18:83a84c5ee00f	714	GP0_OSEL_100_LOGIC_1 = 0x04, //!< 0b100
whismanoid	18:83a84c5ee00f	715	GP0_OSEL_101_AUTO_LOWSIDE_SWITCH = 0x05, //!< 0b101
whismanoid	18:83a84c5ee00f	716	GP0_OSEL_110_MODULATOR_ACTIVE_STATUS = 0x06, //!< 0b110
whismanoid	18:83a84c5ee00f	717	GP0_OSEL_111_CLOCK_2M456 = 0x07, //!< 0b111
whismanoid	0:68e64068330f	718	} MAX11410_GP0_OSEL_enum_t;
whismanoid	0:68e64068330f	719
whismanoid	0:68e64068330f	720	// CODE GENERATOR: TypedefEnum MAX11410_GP1_DIR_enum_t
whismanoid	0:68e64068330f	721	//----------------------------------------
whismanoid	0:68e64068330f	722	/// GPIO1 pin command
whismanoid	14:b49eecf7e4d8	723	/// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_DIR[1:0] field (bits 7:6)
whismanoid	0:68e64068330f	724	///
whismanoid	0:68e64068330f	725	/// - 00: Input mode, reference to VDDIO (default)
whismanoid	0:68e64068330f	726	/// - 01: Reserved
whismanoid	0:68e64068330f	727	/// - 10: Output mode, open-drain output
whismanoid	0:68e64068330f	728	/// - 11: Output mode, CMOS output
whismanoid	0:68e64068330f	729	typedef enum MAX11410_GP1_DIR_enum_t {
whismanoid	18:83a84c5ee00f	730	GP1_DIR_00_Input = 0x00, //!< 0b00
whismanoid	18:83a84c5ee00f	731	GP1_DIR_01_reserved = 0x01, //!< 0b01
whismanoid	18:83a84c5ee00f	732	GP1_DIR_10_OutputOpenDrain = 0x02, //!< 0b10
whismanoid	18:83a84c5ee00f	733	GP1_DIR_11_Output = 0x03, //!< 0b11
whismanoid	0:68e64068330f	734	} MAX11410_GP1_DIR_enum_t;
whismanoid	0:68e64068330f	735
whismanoid	0:68e64068330f	736	// CODE GENERATOR: TypedefEnum MAX11410_GP1_ISEL_enum_t
whismanoid	0:68e64068330f	737	//----------------------------------------
whismanoid	0:68e64068330f	738	/// GPIO1 pin command
whismanoid	14:b49eecf7e4d8	739	/// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_ISEL[1:0] field (bits 5:4)
whismanoid	0:68e64068330f	740	///
whismanoid	0:68e64068330f	741	/// - 00: GPIO_1 input disabled (default)
whismanoid	0:68e64068330f	742	/// - 01: GPIO_1 input configured as rising-edge-triggered conversion start
whismanoid	0:68e64068330f	743	/// - 10: GPIO_1 input configured as rising-edge-triggered sequence start from GP_SEQ_ADDR
whismanoid	0:68e64068330f	744	/// - 11: Reserved
whismanoid	0:68e64068330f	745	typedef enum MAX11410_GP1_ISEL_enum_t {
whismanoid	18:83a84c5ee00f	746	GP1_ISEL_00_disabled = 0x00, //!< 0b00
whismanoid	18:83a84c5ee00f	747	GP1_ISEL_01_TRIGGER_CONV_START = 0x01, //!< 0b01
whismanoid	18:83a84c5ee00f	748	GP1_ISEL_10_TRIGGER_SEQ_START = 0x02, //!< 0b10
whismanoid	18:83a84c5ee00f	749	GP1_ISEL_11_reserved = 0x03, //!< 0b11
whismanoid	0:68e64068330f	750	} MAX11410_GP1_ISEL_enum_t;
whismanoid	0:68e64068330f	751
whismanoid	0:68e64068330f	752	// CODE GENERATOR: TypedefEnum MAX11410_GP1_OSEL_enum_t
whismanoid	0:68e64068330f	753	//----------------------------------------
whismanoid	0:68e64068330f	754	/// GPIO1 pin command
whismanoid	14:b49eecf7e4d8	755	/// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_OSEL[2:0] field (bits 2:0)
whismanoid	0:68e64068330f	756	///
whismanoid	0:68e64068330f	757	/// - 000: GPIO_1 output disabled, high Z (default)
whismanoid	0:68e64068330f	758	/// - 001: GPIO_1 output is configured as INTRB (active low)
whismanoid	0:68e64068330f	759	/// - 010: GPIO_1 output is configured as INTR (active high)
whismanoid	0:68e64068330f	760	/// - 011: GPIO_1 output is configured as state Logic 0
whismanoid	0:68e64068330f	761	/// - 100: GPIO_1 output is configured as state Logic 1
whismanoid	0:68e64068330f	762	/// - 101: GPIO_1 output is configured as system clock (2.456Mhz Nominal)
whismanoid	0:68e64068330f	763	/// - 110: GPIO_1 output is configured as modulator active status
whismanoid	0:68e64068330f	764	/// - 111: GPIO_1 output is configured as automatic low-side switch operation (CMOS output mode overridden)
whismanoid	0:68e64068330f	765	typedef enum MAX11410_GP1_OSEL_enum_t {
whismanoid	18:83a84c5ee00f	766	GP1_OSEL_000_disabled = 0x00, //!< 0b000
whismanoid	18:83a84c5ee00f	767	GP1_OSEL_001_INTRB = 0x01, //!< 0b001
whismanoid	18:83a84c5ee00f	768	GP1_OSEL_010_INTR = 0x02, //!< 0b010
whismanoid	18:83a84c5ee00f	769	GP1_OSEL_011_LOGIC_0 = 0x03, //!< 0b011
whismanoid	18:83a84c5ee00f	770	GP1_OSEL_100_LOGIC_1 = 0x04, //!< 0b100
whismanoid	18:83a84c5ee00f	771	GP1_OSEL_101_AUTO_LOWSIDE_SWITCH = 0x05, //!< 0b101
whismanoid	18:83a84c5ee00f	772	GP1_OSEL_110_MODULATOR_ACTIVE_STATUS = 0x06, //!< 0b110
whismanoid	18:83a84c5ee00f	773	GP1_OSEL_111_CLOCK_2M456 = 0x07, //!< 0b111
whismanoid	0:68e64068330f	774	} MAX11410_GP1_OSEL_enum_t;
whismanoid	0:68e64068330f	775
whismanoid	0:68e64068330f	776	// CODE GENERATOR: TypedefEnum MAX11410_LINEF_enum_t
whismanoid	0:68e64068330f	777	//----------------------------------------
whismanoid	0:68e64068330f	778	/// Filter command
whismanoid	0:68e64068330f	779	/// CMD_r000_1000_x0dd_dddd_FILTER LINEF[1:0] field
whismanoid	0:68e64068330f	780	///
whismanoid	0:68e64068330f	781	/// - 00: Simultaneous 50/60Hz FIR rejection (default)
whismanoid	0:68e64068330f	782	/// - 01: 50Hz FIR rejection
whismanoid	0:68e64068330f	783	/// - 10: 60Hz FIR rejection
whismanoid	0:68e64068330f	784	/// - 11: SINC4
whismanoid	0:68e64068330f	785	typedef enum MAX11410_LINEF_enum_t {
whismanoid	18:83a84c5ee00f	786	LINEF_00_50Hz_60Hz_FIR = 0x00, //!< 0b00
whismanoid	18:83a84c5ee00f	787	LINEF_01_50Hz_FIR = 0x01, //!< 0b01
whismanoid	18:83a84c5ee00f	788	LINEF_10_60Hz_FIR = 0x02, //!< 0b10
whismanoid	18:83a84c5ee00f	789	LINEF_11_SINC4 = 0x03, //!< 0b11
whismanoid	0:68e64068330f	790	} MAX11410_LINEF_enum_t;
whismanoid	0:68e64068330f	791
whismanoid	0:68e64068330f	792	// CODE GENERATOR: TypedefEnum MAX11410_RATE_enum_t
whismanoid	0:68e64068330f	793	//----------------------------------------
whismanoid	0:68e64068330f	794	/// Filter command
whismanoid	0:68e64068330f	795	/// CMD_r000_1000_x0dd_dddd_FILTER RATE[3:0] field
whismanoid	0:68e64068330f	796	///
whismanoid	0:68e64068330f	797	/// Sets conversion rate based on LINEF value. See Table 9a through Table 9d for details.
whismanoid	0:68e64068330f	798	///
whismanoid	0:68e64068330f	799	/// Table 9a. LINEF = 00 Data Rate and Filter Rejection Settings
whismanoid	0:68e64068330f	800	///
whismanoid	0:68e64068330f	801	/// Rate \| LINEF \| CONV_TYPE \| Rate
whismanoid	0:68e64068330f	802	/// -----------\|------------------------\|----------------------------\|----------
whismanoid	0:68e64068330f	803	/// RATE_0000 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_00_Single \| 1.0SPS
whismanoid	0:68e64068330f	804	/// RATE_0001 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_00_Single \| 2.0SPS
whismanoid	0:68e64068330f	805	/// RATE_0010 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_00_Single \| 4.0SPS
whismanoid	0:68e64068330f	806	/// RATE_0011 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_00_Single \| 8.0SPS
whismanoid	0:68e64068330f	807	/// RATE_0100 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_00_Single \| 16.0SPS
whismanoid	0:68e64068330f	808	/// RATE_0000 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_01_Continuous \| 1.1SPS
whismanoid	0:68e64068330f	809	/// RATE_0001 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_01_Continuous \| 2.1SPS
whismanoid	0:68e64068330f	810	/// RATE_0010 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_01_Continuous \| 4.2SPS
whismanoid	0:68e64068330f	811	/// RATE_0011 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_01_Continuous \| 8.4SPS
whismanoid	0:68e64068330f	812	/// RATE_0100 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_01_Continuous \| 16.8SPS
whismanoid	0:68e64068330f	813	/// RATE_0000 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.3SPS
whismanoid	0:68e64068330f	814	/// RATE_0001 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.5SPS
whismanoid	0:68e64068330f	815	/// RATE_0010 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 1.1SPS
whismanoid	0:68e64068330f	816	/// RATE_0011 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 2.1SPS
whismanoid	0:68e64068330f	817	/// RATE_0100 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 4.2SPS
whismanoid	0:68e64068330f	818	///
whismanoid	0:68e64068330f	819	/// Table 9b. LINEF = 01 Data Rate and Filter Rejection Settings
whismanoid	0:68e64068330f	820	///
whismanoid	0:68e64068330f	821	/// Rate \| LINEF \| CONV_TYPE \| Rate
whismanoid	0:68e64068330f	822	/// ----------\|------------------------\|----------------------------\|----------
whismanoid	0:68e64068330f	823	/// RATE_0000 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 1.3SPS
whismanoid	0:68e64068330f	824	/// RATE_0001 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 2.5SPS
whismanoid	0:68e64068330f	825	/// RATE_0010 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 5.0SPS
whismanoid	0:68e64068330f	826	/// RATE_0011 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 10.0SPS
whismanoid	0:68e64068330f	827	/// RATE_0100 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 20.0SPS
whismanoid	0:68e64068330f	828	/// RATE_0101 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 35.6SPS
whismanoid	0:68e64068330f	829	/// RATE_0000 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 1.3SPS
whismanoid	0:68e64068330f	830	/// RATE_0001 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 2.7SPS
whismanoid	0:68e64068330f	831	/// RATE_0010 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 5.3SPS
whismanoid	0:68e64068330f	832	/// RATE_0011 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 10.7SPS
whismanoid	0:68e64068330f	833	/// RATE_0100 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 21.3SPS
whismanoid	0:68e64068330f	834	/// RATE_0101 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 40.0SPS
whismanoid	0:68e64068330f	835	/// RATE_0000 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.3SPS
whismanoid	0:68e64068330f	836	/// RATE_0001 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.7SPS
whismanoid	0:68e64068330f	837	/// RATE_0010 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 1.3SPS
whismanoid	0:68e64068330f	838	/// RATE_0011 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 2.7SPS
whismanoid	0:68e64068330f	839	/// RATE_0100 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 5.3SPS
whismanoid	0:68e64068330f	840	/// RATE_0101 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 10.0SPS
whismanoid	0:68e64068330f	841	///
whismanoid	0:68e64068330f	842	/// Table 9c. LINEF = 10 Data Rate and Filter Rejection Settings
whismanoid	0:68e64068330f	843	///
whismanoid	0:68e64068330f	844	/// Rate \| LINEF \| CONV_TYPE \| Rate
whismanoid	0:68e64068330f	845	/// ----------\|------------------------\|----------------------------\|----------
whismanoid	0:68e64068330f	846	/// RATE_0000 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 1.3SPS
whismanoid	0:68e64068330f	847	/// RATE_0001 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 2.5SPS
whismanoid	0:68e64068330f	848	/// RATE_0010 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 5.0SPS
whismanoid	0:68e64068330f	849	/// RATE_0011 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 10.0SPS
whismanoid	0:68e64068330f	850	/// RATE_0100 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 20.0SPS
whismanoid	0:68e64068330f	851	/// RATE_0101 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 35.6SPS
whismanoid	0:68e64068330f	852	/// RATE_0000 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 1.3SPS
whismanoid	0:68e64068330f	853	/// RATE_0001 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 2.7SPS
whismanoid	0:68e64068330f	854	/// RATE_0010 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 5.3SPS
whismanoid	0:68e64068330f	855	/// RATE_0011 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 10.7SPS
whismanoid	0:68e64068330f	856	/// RATE_0100 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 21.3SPS
whismanoid	0:68e64068330f	857	/// RATE_0101 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 40.0SPS
whismanoid	0:68e64068330f	858	/// RATE_0000 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.3SPS
whismanoid	0:68e64068330f	859	/// RATE_0001 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.7SPS
whismanoid	0:68e64068330f	860	/// RATE_0010 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 1.3SPS
whismanoid	0:68e64068330f	861	/// RATE_0011 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 2.7SPS
whismanoid	0:68e64068330f	862	/// RATE_0100 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 5.3SPS
whismanoid	0:68e64068330f	863	/// RATE_0101 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 10.0SPS
whismanoid	0:68e64068330f	864	///
whismanoid	0:68e64068330f	865	/// Table 9d. LINEF = 11 Data Rate and Filter Rejection Settings
whismanoid	0:68e64068330f	866	///
whismanoid	0:68e64068330f	867	/// Rate \| LINEF \| CONV_TYPE \| Rate
whismanoid	0:68e64068330f	868	/// ----------\|------------------------\|----------------------------\|----------
whismanoid	0:68e64068330f	869	/// RATE_0000 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 1SPS
whismanoid	0:68e64068330f	870	/// RATE_0001 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 2.5SPS
whismanoid	0:68e64068330f	871	/// RATE_0010 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 5SPS
whismanoid	0:68e64068330f	872	/// RATE_0011 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 10SPS
whismanoid	0:68e64068330f	873	/// RATE_0100 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 15SPS
whismanoid	0:68e64068330f	874	/// RATE_0101 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 30SPS
whismanoid	0:68e64068330f	875	/// RATE_0110 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 60SPS
whismanoid	0:68e64068330f	876	/// RATE_0111 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 120SPS
whismanoid	0:68e64068330f	877	/// RATE_1000 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 240SPS
whismanoid	0:68e64068330f	878	/// RATE_1001 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 480SPS
whismanoid	0:68e64068330f	879	/// RATE_0000 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 4SPS
whismanoid	0:68e64068330f	880	/// RATE_0001 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 10SPS
whismanoid	0:68e64068330f	881	/// RATE_0010 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 20SPS
whismanoid	0:68e64068330f	882	/// RATE_0011 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 40SPS
whismanoid	0:68e64068330f	883	/// RATE_0100 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 60SPS
whismanoid	0:68e64068330f	884	/// RATE_0101 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 120SPS
whismanoid	0:68e64068330f	885	/// RATE_0110 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 240SPS
whismanoid	0:68e64068330f	886	/// RATE_0111 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 480SPS
whismanoid	0:68e64068330f	887	/// RATE_1000 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 960SPS
whismanoid	0:68e64068330f	888	/// RATE_1001 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 1920SPS
whismanoid	0:68e64068330f	889	/// RATE_0000 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 1SPS
whismanoid	0:68e64068330f	890	/// RATE_0001 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 2.5SPS
whismanoid	0:68e64068330f	891	/// RATE_0010 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 5SPS
whismanoid	0:68e64068330f	892	/// RATE_0011 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 10SPS
whismanoid	0:68e64068330f	893	/// RATE_0100 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 15SPS
whismanoid	0:68e64068330f	894	/// RATE_0101 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 30SPS
whismanoid	0:68e64068330f	895	/// RATE_0110 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 60SPS
whismanoid	0:68e64068330f	896	/// RATE_0111 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 120SPS
whismanoid	0:68e64068330f	897	/// RATE_1000 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 240SPS
whismanoid	0:68e64068330f	898	/// RATE_1001 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 480SPS
whismanoid	0:68e64068330f	899	///
whismanoid	0:68e64068330f	900	typedef enum MAX11410_RATE_enum_t {
whismanoid	18:83a84c5ee00f	901	RATE_0000 = 0x00, //!< 0b0000
whismanoid	18:83a84c5ee00f	902	RATE_0001 = 0x01, //!< 0b0001
whismanoid	18:83a84c5ee00f	903	RATE_0010 = 0x02, //!< 0b0010
whismanoid	18:83a84c5ee00f	904	RATE_0011 = 0x03, //!< 0b0011
whismanoid	18:83a84c5ee00f	905	RATE_0100 = 0x04, //!< 0b0100
whismanoid	18:83a84c5ee00f	906	RATE_0101 = 0x05, //!< 0b0101
whismanoid	18:83a84c5ee00f	907	RATE_0110 = 0x06, //!< 0b0110
whismanoid	18:83a84c5ee00f	908	RATE_0111 = 0x07, //!< 0b0111
whismanoid	18:83a84c5ee00f	909	RATE_1000 = 0x08, //!< 0b1000
whismanoid	18:83a84c5ee00f	910	RATE_1001 = 0x09, //!< 0b1001
whismanoid	18:83a84c5ee00f	911	RATE_1010 = 0x0a, //!< 0b1010
whismanoid	18:83a84c5ee00f	912	RATE_1011 = 0x0b, //!< 0b1011
whismanoid	18:83a84c5ee00f	913	RATE_1100 = 0x0c, //!< 0b1100
whismanoid	18:83a84c5ee00f	914	RATE_1101 = 0x0d, //!< 0b1101
whismanoid	18:83a84c5ee00f	915	RATE_1110 = 0x0e, //!< 0b1110
whismanoid	18:83a84c5ee00f	916	RATE_1111 = 0x0f, //!< 0b1111
whismanoid	0:68e64068330f	917	} MAX11410_RATE_enum_t;
whismanoid	0:68e64068330f	918
whismanoid	0:68e64068330f	919	// CODE GENERATOR: TypedefEnum MAX11410_REF_SEL_enum_t
whismanoid	0:68e64068330f	920	//----------------------------------------
whismanoid	0:68e64068330f	921	/// Filter command
whismanoid	0:68e64068330f	922	/// CMD_r000_1001_dddd_dddd_CTRL REF_SEL[2:0] field
whismanoid	0:68e64068330f	923	///
whismanoid	0:68e64068330f	924	/// - 000: AIN0(REF0P)/AIN1(REF0N)
whismanoid	0:68e64068330f	925	/// - 001: REF1P/REF1N (default)
whismanoid	0:68e64068330f	926	/// - 010: REF2P/REF2N
whismanoid	0:68e64068330f	927	/// - 011: AVDD/AGND
whismanoid	0:68e64068330f	928	/// - 100: AIN0(REF0P)/AGND (single-ended mode)
whismanoid	0:68e64068330f	929	/// - 101: REF1P/AGND (single-ended mode)
whismanoid	0:68e64068330f	930	/// - 110: REF2P/AGND (single-ended mode)
whismanoid	0:68e64068330f	931	/// - 111: AVDD/AGND
whismanoid	0:68e64068330f	932	typedef enum MAX11410_REF_SEL_enum_t {
whismanoid	18:83a84c5ee00f	933	REF_SEL_000_AIN0_AIN1 = 0x00, //!< 0b000
whismanoid	18:83a84c5ee00f	934	REF_SEL_001_REF1P_REF1N = 0x01, //!< 0b001
whismanoid	18:83a84c5ee00f	935	REF_SEL_010_REF2P_REF2N = 0x02, //!< 0b010
whismanoid	18:83a84c5ee00f	936	REF_SEL_011_AVDD_AGND = 0x03, //!< 0b011
whismanoid	18:83a84c5ee00f	937	REF_SEL_100_AIN0_AGND = 0x04, //!< 0b100
whismanoid	18:83a84c5ee00f	938	REF_SEL_101_REF1P_AGND = 0x05, //!< 0b101
whismanoid	18:83a84c5ee00f	939	REF_SEL_110_REF2P_AGND = 0x06, //!< 0b110
whismanoid	18:83a84c5ee00f	940	REF_SEL_111_AVDD_AGND = 0x07, //!< 0b111
whismanoid	0:68e64068330f	941	} MAX11410_REF_SEL_enum_t;
whismanoid	0:68e64068330f	942
whismanoid	0:68e64068330f	943	// CODE GENERATOR: TypedefEnum MAX11410_VBIAS_MODE_enum_t
whismanoid	0:68e64068330f	944	//----------------------------------------
whismanoid	0:68e64068330f	945	/// Source command
whismanoid	0:68e64068330f	946	/// CMD_r000_1010_dddd_dddd_SOURCE VBIAS_MODE[1:0] field
whismanoid	0:68e64068330f	947	///
whismanoid	0:68e64068330f	948	/// - 00: Active mode (default)
whismanoid	0:68e64068330f	949	/// - 01: High impedance; 125kOhm output impedance
whismanoid	0:68e64068330f	950	/// - 10: Low impedance; 20kOhm output impedance
whismanoid	0:68e64068330f	951	/// - 11: Low impedance; 20kOhm output impedance
whismanoid	0:68e64068330f	952	typedef enum MAX11410_VBIAS_MODE_enum_t {
whismanoid	18:83a84c5ee00f	953	VBIAS_MODE_00_Active = 0x00, //!< 0b00
whismanoid	18:83a84c5ee00f	954	VBIAS_MODE_01_125kOhm = 0x01, //!< 0b01
whismanoid	18:83a84c5ee00f	955	VBIAS_MODE_10_20kOhm = 0x02, //!< 0b10
whismanoid	18:83a84c5ee00f	956	VBIAS_MODE_11_20kOhm = 0x03, //!< 0b11
whismanoid	0:68e64068330f	957	} MAX11410_VBIAS_MODE_enum_t;
whismanoid	0:68e64068330f	958
whismanoid	0:68e64068330f	959	// CODE GENERATOR: TypedefEnum MAX11410_BRN_MODE_enum_t
whismanoid	0:68e64068330f	960	//----------------------------------------
whismanoid	0:68e64068330f	961	/// Source command
whismanoid	0:68e64068330f	962	/// CMD_r000_1010_dddd_dddd_SOURCE BRN_MODE[1:0] field
whismanoid	0:68e64068330f	963	///
whismanoid	0:68e64068330f	964	/// - 00: Powered down, burnout sources disabled (default)
whismanoid	0:68e64068330f	965	/// - 01: 0.5uA burnout current sources enabled
whismanoid	0:68e64068330f	966	/// - 10: 1uA burnout current sources enabled
whismanoid	0:68e64068330f	967	/// - 11: 10uA burnout current sources enabled
whismanoid	0:68e64068330f	968	typedef enum MAX11410_BRN_MODE_enum_t {
whismanoid	18:83a84c5ee00f	969	BRN_MODE_00_disabled = 0x00, //!< 0b00
whismanoid	18:83a84c5ee00f	970	BRN_MODE_01_0u5A = 0x01, //!< 0b01
whismanoid	18:83a84c5ee00f	971	BRN_MODE_10_1uA = 0x02, //!< 0b10
whismanoid	18:83a84c5ee00f	972	BRN_MODE_11_10uA = 0x03, //!< 0b11
whismanoid	0:68e64068330f	973	} MAX11410_BRN_MODE_enum_t;
whismanoid	0:68e64068330f	974
whismanoid	0:68e64068330f	975	// CODE GENERATOR: TypedefEnum MAX11410_IDAC_MODE_enum_t
whismanoid	0:68e64068330f	976	//----------------------------------------
whismanoid	0:68e64068330f	977	/// Source command
whismanoid	0:68e64068330f	978	/// CMD_r000_1010_dddd_dddd_SOURCE IDAC_MODE[3:0] field
whismanoid	0:68e64068330f	979	///
whismanoid	0:68e64068330f	980	/// - 0000: 10uA (default)
whismanoid	0:68e64068330f	981	/// - 0001: 50uA
whismanoid	0:68e64068330f	982	/// - 0010: 75uA
whismanoid	0:68e64068330f	983	/// - 0011: 100uA
whismanoid	0:68e64068330f	984	/// - 0100: 125uA
whismanoid	0:68e64068330f	985	/// - 0101: 150uA
whismanoid	0:68e64068330f	986	/// - 0110: 175uA
whismanoid	0:68e64068330f	987	/// - 0111: 200uA
whismanoid	0:68e64068330f	988	/// - 1000: 225uA
whismanoid	0:68e64068330f	989	/// - 1001: 250uA
whismanoid	0:68e64068330f	990	/// - 1010: 300uA
whismanoid	0:68e64068330f	991	/// - 1011: 400uA
whismanoid	0:68e64068330f	992	/// - 1100: 600uA
whismanoid	0:68e64068330f	993	/// - 1101: 800uA
whismanoid	0:68e64068330f	994	/// - 1110: 1200uA
whismanoid	0:68e64068330f	995	/// - 1111: 1600uA
whismanoid	0:68e64068330f	996	typedef enum MAX11410_IDAC_MODE_enum_t {
whismanoid	18:83a84c5ee00f	997	IDAC_MODE_0000_10uA = 0x00, //!< 0b0000
whismanoid	18:83a84c5ee00f	998	IDAC_MODE_0001_50uA = 0x01, //!< 0b0001
whismanoid	18:83a84c5ee00f	999	IDAC_MODE_0010_75uA = 0x02, //!< 0b0010
whismanoid	18:83a84c5ee00f	1000	IDAC_MODE_0011_100uA = 0x03, //!< 0b0011
whismanoid	18:83a84c5ee00f	1001	IDAC_MODE_0100_125uA = 0x04, //!< 0b0100
whismanoid	18:83a84c5ee00f	1002	IDAC_MODE_0101_150uA = 0x05, //!< 0b0101
whismanoid	18:83a84c5ee00f	1003	IDAC_MODE_0110_175uA = 0x06, //!< 0b0110
whismanoid	18:83a84c5ee00f	1004	IDAC_MODE_0111_200uA = 0x07, //!< 0b0111
whismanoid	18:83a84c5ee00f	1005	IDAC_MODE_1000_225uA = 0x08, //!< 0b1000
whismanoid	18:83a84c5ee00f	1006	IDAC_MODE_1001_250uA = 0x09, //!< 0b1001
whismanoid	18:83a84c5ee00f	1007	IDAC_MODE_1010_300uA = 0x0a, //!< 0b1010
whismanoid	18:83a84c5ee00f	1008	IDAC_MODE_1011_400uA = 0x0b, //!< 0b1011
whismanoid	18:83a84c5ee00f	1009	IDAC_MODE_1100_600uA = 0x0c, //!< 0b1100
whismanoid	18:83a84c5ee00f	1010	IDAC_MODE_1101_800uA = 0x0d, //!< 0b1101
whismanoid	18:83a84c5ee00f	1011	IDAC_MODE_1110_1200uA = 0x0e, //!< 0b1110
whismanoid	18:83a84c5ee00f	1012	IDAC_MODE_1111_1600uA = 0x0f, //!< 0b1111
whismanoid	0:68e64068330f	1013	} MAX11410_IDAC_MODE_enum_t;
whismanoid	0:68e64068330f	1014
whismanoid	0:68e64068330f	1015	// CODE GENERATOR: TypedefEnum MAX11410_AINP_SEL_enum_t
whismanoid	0:68e64068330f	1016	//----------------------------------------
whismanoid	0:68e64068330f	1017	/// Input multiplexer channel selection
whismanoid	0:68e64068330f	1018	/// CMD_r000_1011_dddd_dddd_MUX_CTRL0 field AINP_SEL[3:0]
whismanoid	0:68e64068330f	1019	///
whismanoid	0:68e64068330f	1020	/// - 0000: AINP = AIN0
whismanoid	0:68e64068330f	1021	/// - 0001: AINP = AIN1
whismanoid	0:68e64068330f	1022	/// - 0010: AINP = AIN2
whismanoid	0:68e64068330f	1023	/// - 0011: AINP = AIN3
whismanoid	0:68e64068330f	1024	/// - 0100: AINP = AIN4
whismanoid	0:68e64068330f	1025	/// - 0101: AINP = AIN5
whismanoid	0:68e64068330f	1026	/// - 0110: AINP = AIN6
whismanoid	0:68e64068330f	1027	/// - 0111: AINP = AIN7
whismanoid	0:68e64068330f	1028	/// - 1000: AINP = AIN8
whismanoid	0:68e64068330f	1029	/// - 1001: AINP = AIN9
whismanoid	0:68e64068330f	1030	/// - 1010: AINP = AVDD
whismanoid	0:68e64068330f	1031	/// - 1011: AINN = Unconnected
whismanoid	0:68e64068330f	1032	/// - 1100: AINN = Unconnected
whismanoid	0:68e64068330f	1033	/// - 1101: AINN = Unconnected
whismanoid	0:68e64068330f	1034	/// - 1110: AINN = Unconnected
whismanoid	0:68e64068330f	1035	/// - 1111: AINN = Unconnected (default)
whismanoid	0:68e64068330f	1036	typedef enum MAX11410_AINP_SEL_enum_t {
whismanoid	18:83a84c5ee00f	1037	AINP_SEL_0000_AIN0 = 0x00, //!< 0b0000
whismanoid	18:83a84c5ee00f	1038	AINP_SEL_0001_AIN1 = 0x01, //!< 0b0001
whismanoid	18:83a84c5ee00f	1039	AINP_SEL_0010_AIN2 = 0x02, //!< 0b0010
whismanoid	18:83a84c5ee00f	1040	AINP_SEL_0011_AIN3 = 0x03, //!< 0b0011
whismanoid	18:83a84c5ee00f	1041	AINP_SEL_0100_AIN4 = 0x04, //!< 0b0100
whismanoid	18:83a84c5ee00f	1042	AINP_SEL_0101_AIN5 = 0x05, //!< 0b0101
whismanoid	18:83a84c5ee00f	1043	AINP_SEL_0110_AIN6 = 0x06, //!< 0b0110
whismanoid	18:83a84c5ee00f	1044	AINP_SEL_0111_AIN7 = 0x07, //!< 0b0111
whismanoid	18:83a84c5ee00f	1045	AINP_SEL_1000_AIN8 = 0x08, //!< 0b1000
whismanoid	18:83a84c5ee00f	1046	AINP_SEL_1001_AIN9 = 0x09, //!< 0b1001
whismanoid	18:83a84c5ee00f	1047	AINP_SEL_1010_AVDD = 0x0a, //!< 0b1010
whismanoid	18:83a84c5ee00f	1048	AINP_SEL_1011_unconnected = 0x0b, //!< 0b1011
whismanoid	18:83a84c5ee00f	1049	AINP_SEL_1100_unconnected = 0x0c, //!< 0b1100
whismanoid	18:83a84c5ee00f	1050	AINP_SEL_1101_unconnected = 0x0d, //!< 0b1101
whismanoid	18:83a84c5ee00f	1051	AINP_SEL_1110_unconnected = 0x0e, //!< 0b1110
whismanoid	18:83a84c5ee00f	1052	AINP_SEL_1111_unconnected = 0x0f, //!< 0b1111
whismanoid	0:68e64068330f	1053	} MAX11410_AINP_SEL_enum_t;
whismanoid	0:68e64068330f	1054
whismanoid	0:68e64068330f	1055	// CODE GENERATOR: TypedefEnum MAX11410_AINN_SEL_enum_t
whismanoid	0:68e64068330f	1056	//----------------------------------------
whismanoid	0:68e64068330f	1057	/// Input multiplexer channel selection
whismanoid	1:d57c1a2cb83c	1058	/// CMD_r000_1011_dddd_dddd_MUX_CTRL0 field AINN_SEL[3:0]
whismanoid	0:68e64068330f	1059	///
whismanoid	0:68e64068330f	1060	/// - 0000: AINN = AIN0
whismanoid	0:68e64068330f	1061	/// - 0001: AINN = AIN1
whismanoid	0:68e64068330f	1062	/// - 0010: AINN = AIN2
whismanoid	0:68e64068330f	1063	/// - 0011: AINN = AIN3
whismanoid	0:68e64068330f	1064	/// - 0100: AINN = AIN4
whismanoid	0:68e64068330f	1065	/// - 0101: AINN = AIN5
whismanoid	0:68e64068330f	1066	/// - 0110: AINN = AIN6
whismanoid	0:68e64068330f	1067	/// - 0111: AINN = AIN7
whismanoid	0:68e64068330f	1068	/// - 1000: AINN = AIN8
whismanoid	0:68e64068330f	1069	/// - 1001: AINN = AIN9
whismanoid	0:68e64068330f	1070	/// - 1010: AINN = GND
whismanoid	0:68e64068330f	1071	/// - 1011: AINN = Unconnected
whismanoid	0:68e64068330f	1072	/// - 1100: AINN = Unconnected
whismanoid	0:68e64068330f	1073	/// - 1101: AINN = Unconnected
whismanoid	0:68e64068330f	1074	/// - 1110: AINN = Unconnected
whismanoid	0:68e64068330f	1075	/// - 1111: AINN = Unconnected (default)
whismanoid	0:68e64068330f	1076	typedef enum MAX11410_AINN_SEL_enum_t {
whismanoid	18:83a84c5ee00f	1077	AINN_SEL_0000_AIN0 = 0x00, //!< 0b0000
whismanoid	18:83a84c5ee00f	1078	AINN_SEL_0001_AIN1 = 0x01, //!< 0b0001
whismanoid	18:83a84c5ee00f	1079	AINN_SEL_0010_AIN2 = 0x02, //!< 0b0010
whismanoid	18:83a84c5ee00f	1080	AINN_SEL_0011_AIN3 = 0x03, //!< 0b0011
whismanoid	18:83a84c5ee00f	1081	AINN_SEL_0100_AIN4 = 0x04, //!< 0b0100
whismanoid	18:83a84c5ee00f	1082	AINN_SEL_0101_AIN5 = 0x05, //!< 0b0101
whismanoid	18:83a84c5ee00f	1083	AINN_SEL_0110_AIN6 = 0x06, //!< 0b0110
whismanoid	18:83a84c5ee00f	1084	AINN_SEL_0111_AIN7 = 0x07, //!< 0b0111
whismanoid	18:83a84c5ee00f	1085	AINN_SEL_1000_AIN8 = 0x08, //!< 0b1000
whismanoid	18:83a84c5ee00f	1086	AINN_SEL_1001_AIN9 = 0x09, //!< 0b1001
whismanoid	18:83a84c5ee00f	1087	AINN_SEL_1010_GND = 0x0a, //!< 0b1010
whismanoid	18:83a84c5ee00f	1088	AINN_SEL_1011_unconnected = 0x0b, //!< 0b1011
whismanoid	18:83a84c5ee00f	1089	AINN_SEL_1100_unconnected = 0x0c, //!< 0b1100
whismanoid	18:83a84c5ee00f	1090	AINN_SEL_1101_unconnected = 0x0d, //!< 0b1101
whismanoid	18:83a84c5ee00f	1091	AINN_SEL_1110_unconnected = 0x0e, //!< 0b1110
whismanoid	18:83a84c5ee00f	1092	AINN_SEL_1111_unconnected = 0x0f, //!< 0b1111
whismanoid	0:68e64068330f	1093	} MAX11410_AINN_SEL_enum_t;
whismanoid	0:68e64068330f	1094
whismanoid	0:68e64068330f	1095	// CODE GENERATOR: TypedefEnum MAX11410_IDAC1_SEL_enum_t
whismanoid	0:68e64068330f	1096	//----------------------------------------
whismanoid	0:68e64068330f	1097	/// Input multiplexer channel selection
whismanoid	0:68e64068330f	1098	/// CMD_r000_1100_dddd_dddd_MUX_CTRL1 field IDAC1_SEL[3:0]
whismanoid	0:68e64068330f	1099	///
whismanoid	0:68e64068330f	1100	/// - 0000: AIN0
whismanoid	0:68e64068330f	1101	/// - 0001: AIN1
whismanoid	0:68e64068330f	1102	/// - 0010: AIN2
whismanoid	0:68e64068330f	1103	/// - 0011: AIN3
whismanoid	0:68e64068330f	1104	/// - 0100: AIN4
whismanoid	0:68e64068330f	1105	/// - 0101: AIN5
whismanoid	0:68e64068330f	1106	/// - 0110: AIN6
whismanoid	0:68e64068330f	1107	/// - 0111: AIN7
whismanoid	0:68e64068330f	1108	/// - 1000: AIN8
whismanoid	0:68e64068330f	1109	/// - 1001: AIN9
whismanoid	0:68e64068330f	1110	/// - 1010: Unconnected; IDAC1 powered down.
whismanoid	0:68e64068330f	1111	/// - 1011: Unconnected; IDAC1 powered down.
whismanoid	0:68e64068330f	1112	/// - 1100: Unconnected; IDAC1 powered down.
whismanoid	0:68e64068330f	1113	/// - 1101: Unconnected; IDAC1 powered down.
whismanoid	0:68e64068330f	1114	/// - 1110: Unconnected; IDAC1 powered down.
whismanoid	0:68e64068330f	1115	/// - 1111: Unconnected; IDAC1 powered down.(Default)
whismanoid	0:68e64068330f	1116	typedef enum MAX11410_IDAC1_SEL_enum_t {
whismanoid	18:83a84c5ee00f	1117	IDAC1_SEL_0000_AIN0 = 0x00, //!< 0b0000
whismanoid	18:83a84c5ee00f	1118	IDAC1_SEL_0001_AIN1 = 0x01, //!< 0b0001
whismanoid	18:83a84c5ee00f	1119	IDAC1_SEL_0010_AIN2 = 0x02, //!< 0b0010
whismanoid	18:83a84c5ee00f	1120	IDAC1_SEL_0011_AIN3 = 0x03, //!< 0b0011
whismanoid	18:83a84c5ee00f	1121	IDAC1_SEL_0100_AIN4 = 0x04, //!< 0b0100
whismanoid	18:83a84c5ee00f	1122	IDAC1_SEL_0101_AIN5 = 0x05, //!< 0b0101
whismanoid	18:83a84c5ee00f	1123	IDAC1_SEL_0110_AIN6 = 0x06, //!< 0b0110
whismanoid	18:83a84c5ee00f	1124	IDAC1_SEL_0111_AIN7 = 0x07, //!< 0b0111
whismanoid	18:83a84c5ee00f	1125	IDAC1_SEL_1000_AIN8 = 0x08, //!< 0b1000
whismanoid	18:83a84c5ee00f	1126	IDAC1_SEL_1001_AIN9 = 0x09, //!< 0b1001
whismanoid	18:83a84c5ee00f	1127	IDAC1_SEL_1010_unconnected = 0x0a, //!< 0b1010
whismanoid	18:83a84c5ee00f	1128	IDAC1_SEL_1011_unconnected = 0x0b, //!< 0b1011
whismanoid	18:83a84c5ee00f	1129	IDAC1_SEL_1100_unconnected = 0x0c, //!< 0b1100
whismanoid	18:83a84c5ee00f	1130	IDAC1_SEL_1101_unconnected = 0x0d, //!< 0b1101
whismanoid	18:83a84c5ee00f	1131	IDAC1_SEL_1110_unconnected = 0x0e, //!< 0b1110
whismanoid	18:83a84c5ee00f	1132	IDAC1_SEL_1111_unconnected = 0x0f, //!< 0b1111
whismanoid	0:68e64068330f	1133	} MAX11410_IDAC1_SEL_enum_t;
whismanoid	0:68e64068330f	1134
whismanoid	0:68e64068330f	1135	// CODE GENERATOR: TypedefEnum MAX11410_IDAC0_SEL_enum_t
whismanoid	0:68e64068330f	1136	//----------------------------------------
whismanoid	0:68e64068330f	1137	/// Input multiplexer channel selection
whismanoid	0:68e64068330f	1138	/// CMD_r000_1100_dddd_dddd_MUX_CTRL1 field IDAC0_SEL[3:0]
whismanoid	0:68e64068330f	1139	///
whismanoid	0:68e64068330f	1140	/// - 0000: AIN0
whismanoid	0:68e64068330f	1141	/// - 0001: AIN1
whismanoid	0:68e64068330f	1142	/// - 0010: AIN2
whismanoid	0:68e64068330f	1143	/// - 0011: AIN3
whismanoid	0:68e64068330f	1144	/// - 0100: AIN4
whismanoid	0:68e64068330f	1145	/// - 0101: AIN5
whismanoid	0:68e64068330f	1146	/// - 0110: AIN6
whismanoid	0:68e64068330f	1147	/// - 0111: AIN7
whismanoid	0:68e64068330f	1148	/// - 1000: AIN8
whismanoid	0:68e64068330f	1149	/// - 1001: AIN9
whismanoid	0:68e64068330f	1150	/// - 1010: Unconnected; IDAC0 powered down.
whismanoid	0:68e64068330f	1151	/// - 1011: Unconnected; IDAC0 powered down.
whismanoid	0:68e64068330f	1152	/// - 1100: Unconnected; IDAC0 powered down.
whismanoid	0:68e64068330f	1153	/// - 1101: Unconnected; IDAC0 powered down.
whismanoid	0:68e64068330f	1154	/// - 1110: Unconnected; IDAC0 powered down.
whismanoid	0:68e64068330f	1155	/// - 1111: Unconnected; IDAC0 powered down.(Default)
whismanoid	0:68e64068330f	1156	typedef enum MAX11410_IDAC0_SEL_enum_t {
whismanoid	18:83a84c5ee00f	1157	IDAC0_SEL_0000_AIN0 = 0x00, //!< 0b0000
whismanoid	18:83a84c5ee00f	1158	IDAC0_SEL_0001_AIN1 = 0x01, //!< 0b0001
whismanoid	18:83a84c5ee00f	1159	IDAC0_SEL_0010_AIN2 = 0x02, //!< 0b0010
whismanoid	18:83a84c5ee00f	1160	IDAC0_SEL_0011_AIN3 = 0x03, //!< 0b0011
whismanoid	18:83a84c5ee00f	1161	IDAC0_SEL_0100_AIN4 = 0x04, //!< 0b0100
whismanoid	18:83a84c5ee00f	1162	IDAC0_SEL_0101_AIN5 = 0x05, //!< 0b0101
whismanoid	18:83a84c5ee00f	1163	IDAC0_SEL_0110_AIN6 = 0x06, //!< 0b0110
whismanoid	18:83a84c5ee00f	1164	IDAC0_SEL_0111_AIN7 = 0x07, //!< 0b0111
whismanoid	18:83a84c5ee00f	1165	IDAC0_SEL_1000_AIN8 = 0x08, //!< 0b1000
whismanoid	18:83a84c5ee00f	1166	IDAC0_SEL_1001_AIN9 = 0x09, //!< 0b1001
whismanoid	18:83a84c5ee00f	1167	IDAC0_SEL_1010_unconnected = 0x0a, //!< 0b1010
whismanoid	18:83a84c5ee00f	1168	IDAC0_SEL_1011_unconnected = 0x0b, //!< 0b1011
whismanoid	18:83a84c5ee00f	1169	IDAC0_SEL_1100_unconnected = 0x0c, //!< 0b1100
whismanoid	18:83a84c5ee00f	1170	IDAC0_SEL_1101_unconnected = 0x0d, //!< 0b1101
whismanoid	18:83a84c5ee00f	1171	IDAC0_SEL_1110_unconnected = 0x0e, //!< 0b1110
whismanoid	18:83a84c5ee00f	1172	IDAC0_SEL_1111_unconnected = 0x0f, //!< 0b1111
whismanoid	0:68e64068330f	1173	} MAX11410_IDAC0_SEL_enum_t;
whismanoid	0:68e64068330f	1174
whismanoid	0:68e64068330f	1175	// CODE GENERATOR: TypedefEnum MAX11410_SIG_PATH_enum_t
whismanoid	0:68e64068330f	1176	//----------------------------------------
whismanoid	0:68e64068330f	1177	/// Input multiplexer channel selection
whismanoid	0:68e64068330f	1178	/// CMD_r000_1110_xxdd_xddd_PGA field SIG_PATH[1:0]
whismanoid	0:68e64068330f	1179	///
whismanoid	0:68e64068330f	1180	/// - 00: Buffered, low-power, unity-gain path (PGA disabled, digital gain) [default]
whismanoid	0:68e64068330f	1181	/// - 01: Bypass path (signal buffer disabled,PGA disabled, digital gain)
whismanoid	0:68e64068330f	1182	/// - 10: PGA path (signal buffer disabled, analog gain)
whismanoid	0:68e64068330f	1183	/// - 11: Reserved
whismanoid	0:68e64068330f	1184	typedef enum MAX11410_SIG_PATH_enum_t {
whismanoid	18:83a84c5ee00f	1185	SIG_PATH_00_BUFFERED = 0x00, //!< 0b00
whismanoid	18:83a84c5ee00f	1186	SIG_PATH_01_BYPASS = 0x01, //!< 0b01
whismanoid	18:83a84c5ee00f	1187	SIG_PATH_10_PGA = 0x02, //!< 0b10
whismanoid	18:83a84c5ee00f	1188	SIG_PATH_11_reserved = 0x03, //!< 0b11
whismanoid	0:68e64068330f	1189	} MAX11410_SIG_PATH_enum_t;
whismanoid	0:68e64068330f	1190
whismanoid	0:68e64068330f	1191	// CODE GENERATOR: TypedefEnum MAX11410_GAIN_enum_t
whismanoid	0:68e64068330f	1192	//----------------------------------------
whismanoid	0:68e64068330f	1193	/// Input multiplexer channel selection
whismanoid	0:68e64068330f	1194	/// CMD_r000_1110_xxdd_xddd_PGA field GAIN[2:0]
whismanoid	0:68e64068330f	1195	///
whismanoid	0:68e64068330f	1196	/// - 000: 1 (default)
whismanoid	0:68e64068330f	1197	/// - 001: 2
whismanoid	0:68e64068330f	1198	/// - 010: 4
whismanoid	0:68e64068330f	1199	/// - 011: 8
whismanoid	0:68e64068330f	1200	/// - 100: 16
whismanoid	0:68e64068330f	1201	/// - 101: 32
whismanoid	0:68e64068330f	1202	/// - 110: 64
whismanoid	0:68e64068330f	1203	/// - 111: 128
whismanoid	0:68e64068330f	1204	typedef enum MAX11410_GAIN_enum_t {
whismanoid	18:83a84c5ee00f	1205	GAIN_000_1 = 0x00, //!< 0b000
whismanoid	18:83a84c5ee00f	1206	GAIN_001_2 = 0x01, //!< 0b001
whismanoid	18:83a84c5ee00f	1207	GAIN_010_4 = 0x02, //!< 0b010
whismanoid	18:83a84c5ee00f	1208	GAIN_011_8 = 0x03, //!< 0b011
whismanoid	18:83a84c5ee00f	1209	GAIN_100_16 = 0x04, //!< 0b100
whismanoid	18:83a84c5ee00f	1210	GAIN_101_32 = 0x05, //!< 0b101
whismanoid	18:83a84c5ee00f	1211	GAIN_110_64 = 0x06, //!< 0b110
whismanoid	18:83a84c5ee00f	1212	GAIN_111_128 = 0x07, //!< 0b111
whismanoid	0:68e64068330f	1213	} MAX11410_GAIN_enum_t;
whismanoid	0:68e64068330f	1214
whismanoid	0:68e64068330f	1215	// TODO1: CODE GENERATOR: ic_variant -- IC's supported with this driver
whismanoid	0:68e64068330f	1216	/**
whismanoid	0:68e64068330f	1217	* @brief IC's supported with this driver
whismanoid	0:68e64068330f	1218	* @details MAX11410
whismanoid	0:68e64068330f	1219	*/
whismanoid	0:68e64068330f	1220	typedef enum
whismanoid	0:68e64068330f	1221	{
whismanoid	0:68e64068330f	1222	MAX11410_IC = 0,
whismanoid	0:68e64068330f	1223	//MAX11410_IC = 1
whismanoid	0:68e64068330f	1224	} MAX11410_ic_t;
whismanoid	0:68e64068330f	1225
whismanoid	0:68e64068330f	1226	// TODO1: CODE GENERATOR: class constructor declaration
whismanoid	0:68e64068330f	1227	/********************************************************//
whismanoid	0:68e64068330f	1228	* @brief Constructor for MAX11410 Class.
whismanoid	0:68e64068330f	1229	*
whismanoid	0:68e64068330f	1230	* @details Requires an existing SPI object as well as a DigitalOut object.
whismanoid	0:68e64068330f	1231	* The DigitalOut object is used for a chip enable signal
whismanoid	0:68e64068330f	1232	*
whismanoid	0:68e64068330f	1233	* On Entry:
whismanoid	0:68e64068330f	1234	* @param[in] spi - pointer to existing SPI object
whismanoid	0:68e64068330f	1235	* @param[in] cs_pin - pointer to a DigitalOut pin object
whismanoid	0:68e64068330f	1236	* CODE GENERATOR: class constructor docstrings gpio InputPin pins
whismanoid	0:68e64068330f	1237	* CODE GENERATOR: class constructor docstrings gpio OutputPin pins
whismanoid	0:68e64068330f	1238	* @param[in] ic_variant - which type of MAX11410 is used
whismanoid	0:68e64068330f	1239	*
whismanoid	0:68e64068330f	1240	* On Exit:
whismanoid	0:68e64068330f	1241	*
whismanoid	0:68e64068330f	1242	* @return None
whismanoid	0:68e64068330f	1243	**************************************************************/
whismanoid	0:68e64068330f	1244	MAX11410(SPI &spi, DigitalOut &cs_pin, // SPI interface
whismanoid	0:68e64068330f	1245	// CODE GENERATOR: class constructor declaration gpio InputPin pins
whismanoid	0:68e64068330f	1246	// CODE GENERATOR: class constructor declaration gpio OutputPin pins
whismanoid	0:68e64068330f	1247	MAX11410_ic_t ic_variant);
whismanoid	0:68e64068330f	1248
whismanoid	0:68e64068330f	1249	// CODE GENERATOR: class destructor declaration
whismanoid	0:68e64068330f	1250	/************************************************************
whismanoid	0:68e64068330f	1251	* @brief Default destructor for MAX11410 Class.
whismanoid	0:68e64068330f	1252	*
whismanoid	0:68e64068330f	1253	* @details Destroys SPI object if owner
whismanoid	0:68e64068330f	1254	*
whismanoid	0:68e64068330f	1255	* On Entry:
whismanoid	0:68e64068330f	1256	*
whismanoid	0:68e64068330f	1257	* On Exit:
whismanoid	0:68e64068330f	1258	*
whismanoid	0:68e64068330f	1259	* @return None
whismanoid	0:68e64068330f	1260	**************************************************************/
whismanoid	0:68e64068330f	1261	~MAX11410();
whismanoid	0:68e64068330f	1262
whismanoid	0:68e64068330f	1263	// CODE GENERATOR: Declare SPI diagnostic function pointer void onSPIprint()
whismanoid	0:68e64068330f	1264	/// Function pointer void f(size_t byteCount, uint8_t mosiData[], uint8_t misoData[])
whismanoid	0:68e64068330f	1265	Callback<void(size_t, uint8_t, uint8_t)> onSPIprint; //!< optional @ref onSPIprint SPI diagnostic function
whismanoid	0:68e64068330f	1266
whismanoid	0:68e64068330f	1267	// CODE GENERATOR: spi_frequency setter declaration
whismanoid	0:68e64068330f	1268	/// set SPI SCLK frequency
whismanoid	0:68e64068330f	1269	void spi_frequency(int spi_sclk_Hz);
whismanoid	0:68e64068330f	1270
whismanoid	1:d57c1a2cb83c	1271	// CODE GENERATOR: spi_frequency getter declaration and definition
whismanoid	1:d57c1a2cb83c	1272	/// get SPI SCLK frequency
whismanoid	1:d57c1a2cb83c	1273	int get_spi_frequency() const { return m_SPI_SCLK_Hz; }
whismanoid	1:d57c1a2cb83c	1274
whismanoid	1:d57c1a2cb83c	1275	// CODE GENERATOR: spi_dataMode getter declaration and definition
whismanoid	1:d57c1a2cb83c	1276	/// get SPI mode
whismanoid	1:d57c1a2cb83c	1277	int get_spi_dataMode() const { return m_SPI_dataMode; }
whismanoid	1:d57c1a2cb83c	1278
whismanoid	0:68e64068330f	1279	//----------------------------------------
whismanoid	0:68e64068330f	1280	// CODE GENERATOR: omit typedef enum MAX11410_device_t, class members instead of global device object
whismanoid	0:68e64068330f	1281	public:
whismanoid	0:68e64068330f	1282
whismanoid	1:d57c1a2cb83c	1283	/// AIN0-AIN1 reference voltage, in Volts
whismanoid	22:c6812214a933	1284	double ref0_v;
whismanoid	1:d57c1a2cb83c	1285
whismanoid	1:d57c1a2cb83c	1286	/// REF1P-REF1N reference voltage, in Volts
whismanoid	22:c6812214a933	1287	double ref1_v;
whismanoid	1:d57c1a2cb83c	1288
whismanoid	1:d57c1a2cb83c	1289	/// REF2P-REF2N reference voltage, in Volts
whismanoid	22:c6812214a933	1290	double ref2_v;
whismanoid	1:d57c1a2cb83c	1291
whismanoid	1:d57c1a2cb83c	1292	/// AVDD-AGND reference voltage, in Volts
whismanoid	22:c6812214a933	1293	double avdd_v;
whismanoid	21:847b2220e96e	1294
whismanoid	1:d57c1a2cb83c	1295	/// shadow of register ctrl CMD_r000_1001_dddd_dddd_CTRL
whismanoid	1:d57c1a2cb83c	1296	uint32_t ctrl;
whismanoid	1:d57c1a2cb83c	1297
whismanoid	1:d57c1a2cb83c	1298	/// read-only pga gain 1, 2, 4, 8, 16, 32, 64, or 128 set by Configure_PGA gain index register pga CMD_r000_1110_xxdd_xddd_PGA
whismanoid	1:d57c1a2cb83c	1299	uint8_t pgaGain;
whismanoid	0:68e64068330f	1300
whismanoid	22:c6812214a933	1301	/// shadow of read-only register status CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS
whismanoid	0:68e64068330f	1302	uint32_t status;
whismanoid	0:68e64068330f	1303
whismanoid	22:c6812214a933	1304	/// shadow of read-only register data0 CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0
whismanoid	0:68e64068330f	1305	uint32_t data0;
whismanoid	0:68e64068330f	1306
whismanoid	1:d57c1a2cb83c	1307	/// Each channel's most recent value in LSBs.
whismanoid	1:d57c1a2cb83c	1308	/// Updated by Measure_Voltage function.
whismanoid	1:d57c1a2cb83c	1309	/// Use VoltageOfCode function to convert LSBs to physical voltage.
whismanoid	14:b49eecf7e4d8	1310	/// (Valid index range AINP_SEL_0000_AIN0 to AINP_SEL_1010_AVDD).
whismanoid	14:b49eecf7e4d8	1311	/// AINP_SEL_1010_AVDD is a sentinel position.
whismanoid	8:3a9dfa2e8234	1312	///
whismanoid	8:3a9dfa2e8234	1313	uint32_t AINcode[11];
whismanoid	1:d57c1a2cb83c	1314
whismanoid	21:847b2220e96e	1315	/// When driver polls status of a pin signal or a register status bit,
whismanoid	21:847b2220e96e	1316	/// and there is no device physically connected, the driver must
whismanoid	21:847b2220e96e	1317	/// be able to halt and report failure if too many tries. Each attempt
whismanoid	22:c6812214a933	1318	/// counts down until loop_limit is reached or exceeded.
whismanoid	21:847b2220e96e	1319	///
whismanoid	21:847b2220e96e	1320	/// If driver seems to hang or takes too long to decide that device
whismanoid	21:847b2220e96e	1321	/// is not connected, reduce the futility countdown limit value.
whismanoid	21:847b2220e96e	1322	///
whismanoid	21:847b2220e96e	1323	/// If driver sometimes works but sometimes intermittently fails to
whismanoid	21:847b2220e96e	1324	/// recognize device is attached, increase the futility countdown limit.
whismanoid	22:c6812214a933	1325	int loop_limit;
whismanoid	21:847b2220e96e	1326
whismanoid	21:847b2220e96e	1327	/// read-only constant list of registers to be read by menu item * with no arguments
whismanoid	21:847b2220e96e	1328	MAX11410::MAX11410_CMD_enum_t* readAllStatusList;
whismanoid	21:847b2220e96e	1329
whismanoid	21:847b2220e96e	1330	/// read-only constant number of registers to be read by menu item * with no arguments
whismanoid	21:847b2220e96e	1331	uint8_t readAllStatusListLen;
whismanoid	21:847b2220e96e	1332
whismanoid	22:c6812214a933	1333	/// timing delay after enable RTD bias current in Measure_RTD()
whismanoid	22:c6812214a933	1334	int rtd_ms;
whismanoid	22:c6812214a933	1335
whismanoid	22:c6812214a933	1336	/// RTD Resistance measurement; Thermocouple Cold Junction, in Ohms
whismanoid	22:c6812214a933	1337	double rtd_ohm;
whismanoid	22:c6812214a933	1338
whismanoid	22:c6812214a933	1339	/// Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
whismanoid	22:c6812214a933	1340	double rtd_degc;
whismanoid	22:c6812214a933	1341
whismanoid	22:c6812214a933	1342	/// Thermocouple voltage measurement, in Volts
whismanoid	22:c6812214a933	1343	double tc_v;
whismanoid	22:c6812214a933	1344
whismanoid	22:c6812214a933	1345	/// Temperature calculated from Thermocouple voltage, in degrees C
whismanoid	22:c6812214a933	1346	double tc_delta_degc;
whismanoid	22:c6812214a933	1347
whismanoid	22:c6812214a933	1348	/// Temperature calculated from Thermocouple voltage, in degrees C
whismanoid	22:c6812214a933	1349	double tc_degc;
whismanoid	22:c6812214a933	1350
whismanoid	0:68e64068330f	1351	// CODE GENERATOR: omit global g_MAX11410_device
whismanoid	0:68e64068330f	1352
whismanoid	0:68e64068330f	1353	// CODE GENERATOR: extern function declarations
whismanoid	0:68e64068330f	1354	// CODE GENERATOR: extern function declaration SPIoutputCS
whismanoid	0:68e64068330f	1355	//----------------------------------------
whismanoid	0:68e64068330f	1356	// Assert SPI Chip Select
whismanoid	0:68e64068330f	1357	// SPI chip-select for MAX11410
whismanoid	0:68e64068330f	1358	//
whismanoid	0:68e64068330f	1359	void SPIoutputCS(int isLogicHigh);
whismanoid	0:68e64068330f	1360
whismanoid	0:68e64068330f	1361	// CODE GENERATOR: extern function declaration SPIwrite16bits
whismanoid	0:68e64068330f	1362	//----------------------------------------
whismanoid	0:68e64068330f	1363	// SPI write 16 bits
whismanoid	0:68e64068330f	1364	// SPI interface to MAX11410 shift 16 bits mosiData into MAX11410 DIN
whismanoid	0:68e64068330f	1365	//
whismanoid	0:68e64068330f	1366	void SPIwrite16bits(int16_t mosiData16);
whismanoid	0:68e64068330f	1367
whismanoid	0:68e64068330f	1368	// CODE GENERATOR: extern function declaration SPIreadWrite16bits
whismanoid	0:68e64068330f	1369	//----------------------------------------
whismanoid	0:68e64068330f	1370	// SPI read and write 16 bits
whismanoid	0:68e64068330f	1371	// SPI interface to MAX11410 shift 16 bits mosiData16 into MAX11410 DIN
whismanoid	0:68e64068330f	1372	// while simultaneously capturing 16 bits miso data from MAX11410 DOUT
whismanoid	0:68e64068330f	1373	//
whismanoid	0:68e64068330f	1374	int16_t SPIreadWrite16bits(int16_t mosiData16);
whismanoid	0:68e64068330f	1375
whismanoid	0:68e64068330f	1376	// CODE GENERATOR: extern function declaration SPIreadWrite32bits
whismanoid	0:68e64068330f	1377	//----------------------------------------
whismanoid	0:68e64068330f	1378	// SPI read and write 32 bits
whismanoid	0:68e64068330f	1379	// SPI interface to MAX11410 shift 32 bits mosiData into MAX11410 DIN
whismanoid	0:68e64068330f	1380	// while simultaneously capturing 32 bits miso data from MAX11410 DOUT
whismanoid	0:68e64068330f	1381	//
whismanoid	0:68e64068330f	1382	int32_t SPIreadWrite32bits(int32_t mosiData32);
whismanoid	0:68e64068330f	1383
whismanoid	0:68e64068330f	1384	// CODE GENERATOR: class member data
whismanoid	0:68e64068330f	1385	private:
whismanoid	0:68e64068330f	1386	// CODE GENERATOR: class member data for SPI interface
whismanoid	0:68e64068330f	1387	// SPI object
whismanoid	0:68e64068330f	1388	SPI &m_spi;
whismanoid	0:68e64068330f	1389	int m_SPI_SCLK_Hz;
whismanoid	0:68e64068330f	1390	int m_SPI_dataMode;
whismanoid	0:68e64068330f	1391	int m_SPI_cs_state;
whismanoid	0:68e64068330f	1392
whismanoid	0:68e64068330f	1393	// Selector pin object
whismanoid	0:68e64068330f	1394	DigitalOut &m_cs_pin;
whismanoid	0:68e64068330f	1395
whismanoid	0:68e64068330f	1396	// CODE GENERATOR: class member data for gpio InputPin pins
whismanoid	0:68e64068330f	1397	// CODE GENERATOR: class member data for gpio OutputPin pins
whismanoid	0:68e64068330f	1398
whismanoid	0:68e64068330f	1399	// Identifies which IC variant is being used
whismanoid	0:68e64068330f	1400	MAX11410_ic_t m_ic_variant;
whismanoid	0:68e64068330f	1401
whismanoid	0:68e64068330f	1402	public:
whismanoid	0:68e64068330f	1403
whismanoid	0:68e64068330f	1404	// CODE GENERATOR: class member function declarations
whismanoid	0:68e64068330f	1405	//----------------------------------------
whismanoid	0:68e64068330f	1406	/// Menu item '!'
whismanoid	0:68e64068330f	1407	/// Initialize device
whismanoid	19:50cf5da53d36	1408	///
whismanoid	19:50cf5da53d36	1409	/// TODO1: #169 MAX11410 Self Test for Test Fixture Firmware
whismanoid	19:50cf5da53d36	1410	/// @test Init() expect 1
whismanoid	19:50cf5da53d36	1411	///
whismanoid	19:50cf5da53d36	1412	/// @future test xxxxxx // comment
whismanoid	19:50cf5da53d36	1413	///
whismanoid	19:50cf5da53d36	1414	/// TODO1: #169 SelfTest support RegRead
whismanoid	22:c6812214a933	1415	/// @test group POR // verify initial register values (enabled by default)
whismanoid	20:fb7527415308	1416	/// @future test tinyTester.print("PART_ID value")
whismanoid	22:c6812214a933	1417	/// @test group POR RegRead(MAX11410::CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID, buffer) expect 1 expect-buffer 0x000F02
whismanoid	20:fb7527415308	1418	///
whismanoid	20:fb7527415308	1419	/// @future test tinyTester.print("POR value 0x04 CMD_r000_0100_dddd_xddd_GP0_CTRL")
whismanoid	22:c6812214a933	1420	/// @test group POR RegRead(MAX11410::CMD_r000_0100_dddd_xddd_GP0_CTRL, buffer) expect 1 expect-buffer 0x00
whismanoid	20:fb7527415308	1421	///
whismanoid	20:fb7527415308	1422	/// @future test tinyTester.print("POR value 0x05 CMD_r000_0101_dddd_xddd_GP1_CTRL")
whismanoid	22:c6812214a933	1423	/// @test group POR RegRead(MAX11410::CMD_r000_0101_dddd_xddd_GP1_CTRL, buffer) expect 1 expect-buffer 0x00
whismanoid	20:fb7527415308	1424	///
whismanoid	20:fb7527415308	1425	/// @future test tinyTester.print("POR value 0x07 CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR")
whismanoid	22:c6812214a933	1426	/// @test group POR RegRead(MAX11410::CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR, buffer) expect 1 expect-buffer 0x00003a
whismanoid	19:50cf5da53d36	1427	///
whismanoid	19:50cf5da53d36	1428	/// TODO1: #169 SelfTest support RegWrite and custom enum types
whismanoid	20:fb7527415308	1429	/// @future test tinyTester.print("POR value 0x08 CMD_r000_1000_x0dd_dddd_FILTER")
whismanoid	22:c6812214a933	1430	/// @test group POR RegRead(MAX11410::CMD_r000_1000_x0dd_dddd_FILTER, buffer) expect 1 expect-buffer 0x00
whismanoid	20:fb7527415308	1431	/// could also be stated as RegRead(0x08, buffer) expect 1 expect-buffer 0x00
whismanoid	20:fb7527415308	1432	///
whismanoid	20:fb7527415308	1433	/// @future test tinyTester.print("POR value 0x09 CMD_r000_1001_dddd_dddd_CTRL")
whismanoid	22:c6812214a933	1434	/// @test group POR RegRead(MAX11410::CMD_r000_1001_dddd_dddd_CTRL, buffer) expect 1 expect-buffer 0x000001
whismanoid	20:fb7527415308	1435	///
whismanoid	20:fb7527415308	1436	/// @future test tinyTester.print("POR value 0x0a CMD_r000_1010_dddd_dddd_SOURCE")
whismanoid	22:c6812214a933	1437	/// @test group POR RegRead(MAX11410::CMD_r000_1010_dddd_dddd_SOURCE, buffer) expect 1 expect-buffer 0x00
whismanoid	20:fb7527415308	1438	///
whismanoid	20:fb7527415308	1439	/// @future test tinyTester.print("POR value 0x0b CMD_r000_1011_dddd_dddd_MUX_CTRL0")
whismanoid	22:c6812214a933	1440	/// @test group POR RegRead(MAX11410::CMD_r000_1011_dddd_dddd_MUX_CTRL0, buffer) expect 1 expect-buffer 0x0000ff
whismanoid	20:fb7527415308	1441	///
whismanoid	20:fb7527415308	1442	/// @future test tinyTester.print("POR value 0x0c CMD_r000_1100_dddd_dddd_MUX_CTRL1")
whismanoid	22:c6812214a933	1443	/// @test group POR RegRead(MAX11410::CMD_r000_1100_dddd_dddd_MUX_CTRL1, buffer) expect 1 expect-buffer 0x0000ff
whismanoid	20:fb7527415308	1444	///
whismanoid	20:fb7527415308	1445	/// @future test tinyTester.print("POR value 0x0d CMD_r000_1101_dddd_dddd_MUX_CTRL2")
whismanoid	22:c6812214a933	1446	/// @test group POR RegRead(MAX11410::CMD_r000_1101_dddd_dddd_MUX_CTRL2, buffer) expect 1 expect-buffer 0x00
whismanoid	20:fb7527415308	1447	///
whismanoid	20:fb7527415308	1448	/// @future test tinyTester.print("POR value 0x0e CMD_r000_1110_xxdd_xddd_PGA")
whismanoid	22:c6812214a933	1449	/// @test group POR RegRead(MAX11410::CMD_r000_1110_xxdd_xddd_PGA, buffer) expect 1 expect-buffer 0x00
whismanoid	20:fb7527415308	1450	///
whismanoid	20:fb7527415308	1451	/// @future test CMD_r000_1111_dddd_dddd_WAIT_EXT = 0x0f, //!< 0b0001111
whismanoid	20:fb7527415308	1452	/// @future test CMD_r001_0000_xxxx_xxxx_WAIT_START = 0x10, //!< 0b0010000
whismanoid	20:fb7527415308	1453	///
whismanoid	22:c6812214a933	1454	/// @test group RES1KA0A1TOGND // measure a 1kohm resistor between (AIN0,AIN1) and AGND to verify ref2_v (disabled by default)
whismanoid	22:c6812214a933	1455	/// @test group RES1KA0A1TOGNDMORE // measure a 1kohm resistor between (AIN0,AIN1) and AGND to verify ref2_v in more detail
whismanoid	22:c6812214a933	1456	/// @test group RES1KA0A1TOGNDMORE tinyTester.print("measure a 1kohm resistor between (AIN0,AIN1) and AGND to verify ref2_v")
whismanoid	22:c6812214a933	1457	/// @test group RES1KA0A1TOGND tinyTester.settle_time_msec = 1000 // default 250
whismanoid	22:c6812214a933	1458	/// @test group RES1KA0A1TOGND RegWrite(0x0C, 0xF1) expect 1 // *mux_ctrl1=0xf1 drives current source from AIN1
whismanoid	22:c6812214a933	1459	///
whismanoid	22:c6812214a933	1460	/// @test group RES1KA0A1TOGNDMORE RegWrite(0x0A, 0x03) expect 1 // *source=0x03 idac_mode=100uA, 1k resistor 0.1V
whismanoid	22:c6812214a933	1461	/// @test group RES1KA0A1TOGNDMORE tinyTester.print("idac_mode=100uA, 1k resistor 0.1V")
whismanoid	22:c6812214a933	1462	/// @test group RES1KA0A1TOGNDMORE tinyTester.Wait_Output_Settling()
whismanoid	22:c6812214a933	1463	/// @test group RES1KA0A1TOGND_BAD Measure_Voltage(0,10) // TODO1 #175 MAX11410 Self Test why does Measure_Voltage(0,10) without expect cause an mbed hard fault?
whismanoid	22:c6812214a933	1464	/// @test group RES1KA0A1TOGNDMORE Measure_Voltage(0,10) expect 0.1
whismanoid	22:c6812214a933	1465	/// @test group RES1KA0A1TOGNDMORE AINcode[0] expect (uint32_t)337731 within 33773 // idac_mode=100uA, 1k resistor 0.1V
whismanoid	22:c6812214a933	1466	///
whismanoid	22:c6812214a933	1467	/// @test group RES1KA0A1TOGNDMORE RegWrite(0x0A, 0x0D) expect 1 // *source=0x0d idac_mode=800uA, 1k resistor 0.8V
whismanoid	22:c6812214a933	1468	/// @test group RES1KA0A1TOGNDMORE tinyTester.print("idac_mode=800uA, 1k resistor 0.8V")
whismanoid	22:c6812214a933	1469	/// @test group RES1KA0A1TOGNDMORE tinyTester.Wait_Output_Settling()
whismanoid	22:c6812214a933	1470	/// @test group RES1KA0A1TOGND_BAD Measure_Voltage(0,10) // TODO1 #175 MAX11410 Self Test why does Measure_Voltage(0,10) without expect cause an mbed hard fault?
whismanoid	22:c6812214a933	1471	/// @test group RES1KA0A1TOGNDMORE Measure_Voltage(0,10) expect 0.8
whismanoid	22:c6812214a933	1472	/// @test group RES1KA0A1TOGNDMORE AINcode[0] expect (uint32_t)2724467 within 33773 // idac_mode=800uA, 1k resistor 0.8V
whismanoid	22:c6812214a933	1473	///
whismanoid	22:c6812214a933	1474	/// @test group RES1KA0A1TOGND RegWrite(0x0A, 0x0B) expect 1 // *source=0x0b idac_mode=400uA, 1k resistor 0.4V
whismanoid	22:c6812214a933	1475	/// @test group RES1KA0A1TOGNDMORE tinyTester.print("idac_mode=400uA, 1k resistor 0.4V")
whismanoid	22:c6812214a933	1476	/// @test group RES1KA0A1TOGND tinyTester.Wait_Output_Settling()
whismanoid	22:c6812214a933	1477	/// @test group RES1KA0A1TOGND_BAD Measure_Voltage(0,10) // TODO1 #175 MAX11410 Self Test why does Measure_Voltage(0,10) without expect cause an mbed hard fault?
whismanoid	22:c6812214a933	1478	/// @test group RES1KA0A1TOGND Measure_Voltage(0,10) expect 0.4
whismanoid	22:c6812214a933	1479	/// @test group RES1KA0A1TOGNDMORE AINcode[0] expect (uint32_t)1343163 within 33773 // idac_mode=400uA, 1k resistor 0.4V
whismanoid	20:fb7527415308	1480	///
whismanoid	20:fb7527415308	1481	///
whismanoid	20:fb7527415308	1482	///
whismanoid	19:50cf5da53d36	1483	/// @test tinyTester.print("check filter register is writeable")
whismanoid	19:50cf5da53d36	1484	/// @future test tinyTester.print("this is a real mess dealing with the custom types")
whismanoid	19:50cf5da53d36	1485	/// @test RegWrite(0x08, 0x34) expect 1
whismanoid	19:50cf5da53d36	1486	/// @future test tinyTester.print("error: no matching function for call to 'MaximTinyTester::FunctionCall_Expect(const char [18], uint8_t (&)(MAX11410::MAX11410_CMD_enum_t, uint32_t), MAX11410::MAX11410_CMD_enum_t, uint32_t, int)'")
whismanoid	19:50cf5da53d36	1487	/// @future test RegWrite(CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1
whismanoid	19:50cf5da53d36	1488	/// @future test RegWrite(MAX11410_CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1
whismanoid	19:50cf5da53d36	1489	/// @future test RegWrite(MAX11410::MAX11410_CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1
whismanoid	19:50cf5da53d36	1490	///
whismanoid	19:50cf5da53d36	1491	/// TODO1: #169 SelfTest support RegRead
whismanoid	19:50cf5da53d36	1492	/// @test tinyTester.print("check filter register is readable")
whismanoid	19:50cf5da53d36	1493	/// @test RegRead(0x08, buffer) expect 1 expect-buffer 0x34
whismanoid	19:50cf5da53d36	1494	/// @future test RegRead(MAX11410::MAX11410_CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, &buffer) expect 1 expect-buffer 0x34
whismanoid	19:50cf5da53d36	1495	///
whismanoid	19:50cf5da53d36	1496	/// @test tinyTester.settle_time_msec = 250 // default 250
whismanoid	19:50cf5da53d36	1497	/// @test tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid	19:50cf5da53d36	1498	/// @test tinyTester.input_timeout_time_msec = 250 // default 250
whismanoid	19:50cf5da53d36	1499	/// @test tinyTester.settle_time_msec = 20 // default 250
whismanoid	19:50cf5da53d36	1500	/// @test tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid	19:50cf5da53d36	1501	/// @test tinyTester.input_timeout_time_msec = 100 // default 250
whismanoid	19:50cf5da53d36	1502	///
whismanoid	19:50cf5da53d36	1503	/// @test tinyTester.Wait_Output_Settling()
whismanoid	19:50cf5da53d36	1504	///
whismanoid	19:50cf5da53d36	1505	/// @future test tinyTester.DigitalIn_Read_Expect_WarnOnly(DigitalIn& digitalInPin, const char* pinName, int expect_result, const char *expect_description)
whismanoid	19:50cf5da53d36	1506	///
whismanoid	19:50cf5da53d36	1507	/// TODO1: #169 SelfTest support tinyTester.max541.Set_Code
whismanoid	19:50cf5da53d36	1508	/// @future test tinyTester.max541.Set_Code(0x8000)
whismanoid	19:50cf5da53d36	1509	///
whismanoid	0:68e64068330f	1510	/// @return 1 on success; 0 on failure
whismanoid	0:68e64068330f	1511	uint8_t Init(void);
whismanoid	0:68e64068330f	1512
whismanoid	0:68e64068330f	1513	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1514	/// Return the physical voltage corresponding to conversion result,
whismanoid	1:d57c1a2cb83c	1515	/// for unipolar mode.
whismanoid	0:68e64068330f	1516	/// Does not perform any offset or gain correction.
whismanoid	0:68e64068330f	1517	///
whismanoid	1:d57c1a2cb83c	1518	/// @pre CTRL::U_BN = 1 -- Unipolar mode
whismanoid	1:d57c1a2cb83c	1519	/// @pre CTRL::FORMAT = x
whismanoid	1:d57c1a2cb83c	1520	/// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
whismanoid	1:d57c1a2cb83c	1521	/// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid	1:d57c1a2cb83c	1522	/// @return physical voltage corresponding to MAX11410 code.
whismanoid	14:b49eecf7e4d8	1523	///
whismanoid	21:847b2220e96e	1524	/// @test group UNIPOLAR // Verify function VoltageOfCode_Unipolar
whismanoid	21:847b2220e96e	1525	/// @test group UNIPOLAR tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid	21:847b2220e96e	1526	/// @test group UNIPOLAR Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V
whismanoid	21:847b2220e96e	1527	/// @test group UNIPOLAR Configure_PGA(0,0) expect 1 // These tests require PGA gain=1
whismanoid	19:50cf5da53d36	1528	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0xFFFFFF) expect 2.500 within 0.030 // Full Scale
whismanoid	19:50cf5da53d36	1529	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0xFFFFFE) expect 2.500 // Full Scale
whismanoid	19:50cf5da53d36	1530	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0xCCCCCC) expect 2.000 // Two Volts
whismanoid	19:50cf5da53d36	1531	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0xC00000) expect 1.875 // 75% Scale
whismanoid	19:50cf5da53d36	1532	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0x800000) expect 1.250 // Mid Scale
whismanoid	19:50cf5da53d36	1533	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0x666666) expect 1.000 // One Volt
whismanoid	19:50cf5da53d36	1534	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0x400000) expect 0.625 // 25% Scale
whismanoid	19:50cf5da53d36	1535	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0x0A3D70) expect 0.100 // 100mV
whismanoid	19:50cf5da53d36	1536	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0x000064) expect 0.000014901162 // 100 LSB
whismanoid	19:50cf5da53d36	1537	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0x00000A) expect 0.0000014901162 // Ten LSB
whismanoid	19:50cf5da53d36	1538	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0x000003) expect 0.00000044703483 // Three LSB
whismanoid	19:50cf5da53d36	1539	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0x000002) expect 0.00000029802326 // Two LSB
whismanoid	19:50cf5da53d36	1540	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0x000001) expect 0.00000014901162 // One LSB
whismanoid	19:50cf5da53d36	1541	/// @test group UNIPOLAR VoltageOfCode_Unipolar(0x000000) expect 0.0 // Zero Scale
whismanoid	21:847b2220e96e	1542	/// @test group UNIPOLAR tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid	1:d57c1a2cb83c	1543	///
whismanoid	1:d57c1a2cb83c	1544	double VoltageOfCode_Unipolar(uint32_t value_u24);
whismanoid	1:d57c1a2cb83c	1545
whismanoid	1:d57c1a2cb83c	1546	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1547	/// Return the physical voltage corresponding to conversion result,
whismanoid	1:d57c1a2cb83c	1548	/// when conversion format is Bipolar mode, offset binary.
whismanoid	1:d57c1a2cb83c	1549	/// Does not perform any offset or gain correction.
whismanoid	1:d57c1a2cb83c	1550	///
whismanoid	1:d57c1a2cb83c	1551	/// @pre CTRL::U_BN = 0 -- Bipolar mode
whismanoid	1:d57c1a2cb83c	1552	/// @pre CTRL::FORMAT = 1 -- offset binary
whismanoid	0:68e64068330f	1553	/// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
whismanoid	0:68e64068330f	1554	/// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid	0:68e64068330f	1555	/// @return physical voltage corresponding to MAX11410 code.
whismanoid	14:b49eecf7e4d8	1556	///
whismanoid	21:847b2220e96e	1557	/// @test group BIPOB // Verify function VoltageOfCode_Bipolar_OffsetBinary
whismanoid	21:847b2220e96e	1558	/// @test group BIPOB tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid	21:847b2220e96e	1559	/// @test group BIPOB Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V
whismanoid	21:847b2220e96e	1560	/// @test group BIPOB Configure_PGA(0,0) expect 1 // These tests require PGA gain=1
whismanoid	19:50cf5da53d36	1561	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xFFFFFF) expect 2.5 within 0.030 // Full Scale
whismanoid	19:50cf5da53d36	1562	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xFFFFFE) expect 2.5 // Full Scale
whismanoid	19:50cf5da53d36	1563	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xC00000) expect 1.25 // Mid Scale
whismanoid	19:50cf5da53d36	1564	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800003) expect 0.00000894069671 // Three LSB
whismanoid	19:50cf5da53d36	1565	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800002) expect 0.00000596046447 // Two LSB
whismanoid	19:50cf5da53d36	1566	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800001) expect 0.0000029802326 // One LSB
whismanoid	19:50cf5da53d36	1567	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800000) expect 0.0 // Zero Scale
whismanoid	19:50cf5da53d36	1568	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFF) expect -0.0000029802326 // Negative One LSB
whismanoid	19:50cf5da53d36	1569	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFE) expect -0.0000059604644 // Negative Two LSB
whismanoid	19:50cf5da53d36	1570	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFD) expect -0.0000089406967 // Negative Three LSB
whismanoid	19:50cf5da53d36	1571	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x400000) expect -1.25 // Negative Mid Scale
whismanoid	19:50cf5da53d36	1572	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x000001) expect -2.5 // Negative Full Scale
whismanoid	19:50cf5da53d36	1573	/// @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x000000) expect -2.5 // Negative Full Scale
whismanoid	21:847b2220e96e	1574	/// @test group BIPOB tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid	1:d57c1a2cb83c	1575	///
whismanoid	1:d57c1a2cb83c	1576	double VoltageOfCode_Bipolar_OffsetBinary(uint32_t value_u24);
whismanoid	1:d57c1a2cb83c	1577
whismanoid	1:d57c1a2cb83c	1578	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1579	/// Return the physical voltage corresponding to conversion result,
whismanoid	1:d57c1a2cb83c	1580	/// when conversion format is Bipolar mode, 2's complement.
whismanoid	1:d57c1a2cb83c	1581	/// Does not perform any offset or gain correction.
whismanoid	1:d57c1a2cb83c	1582	///
whismanoid	1:d57c1a2cb83c	1583	/// @pre CTRL::U_BN = 0 -- Bipolar mode
whismanoid	1:d57c1a2cb83c	1584	/// @pre CTRL::FORMAT = 0 -- 2's complement
whismanoid	1:d57c1a2cb83c	1585	/// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
whismanoid	1:d57c1a2cb83c	1586	/// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid	1:d57c1a2cb83c	1587	/// @return physical voltage corresponding to MAX11410 code.
whismanoid	14:b49eecf7e4d8	1588	///
whismanoid	21:847b2220e96e	1589	/// @test group BIP2C // Verify function VoltageOfCode_Bipolar_2sComplement
whismanoid	21:847b2220e96e	1590	/// @test group BIP2C tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid	21:847b2220e96e	1591	/// @test group BIP2C Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V
whismanoid	21:847b2220e96e	1592	/// @test group BIP2C Configure_PGA(0,0) expect 1 // These tests require PGA gain=1
whismanoid	19:50cf5da53d36	1593	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x7FFFFF) expect 2.500 within 0.030 // Full Scale
whismanoid	19:50cf5da53d36	1594	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x7FFFFE) expect 2.500 // Full Scale
whismanoid	19:50cf5da53d36	1595	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x666666) expect 2.000 // Two Volts
whismanoid	19:50cf5da53d36	1596	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x600000) expect 1.875 // 75% Scale
whismanoid	19:50cf5da53d36	1597	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x400000) expect 1.250 // Mid Scale
whismanoid	19:50cf5da53d36	1598	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x333333) expect 1.000 // One Volt
whismanoid	19:50cf5da53d36	1599	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x200000) expect 0.625 // 25% Scale
whismanoid	19:50cf5da53d36	1600	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x051eb8) expect 0.100 // 100mV
whismanoid	19:50cf5da53d36	1601	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000003) expect 0.00000894069671 // Three LSB
whismanoid	19:50cf5da53d36	1602	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000002) expect 0.00000596046447 // Two LSB
whismanoid	19:50cf5da53d36	1603	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000001) expect 0.0000029802326 // One LSB
whismanoid	19:50cf5da53d36	1604	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000000) expect 0.0 // Zero Scale
whismanoid	19:50cf5da53d36	1605	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFF) expect -0.0000029802326 // Negative One LSB
whismanoid	19:50cf5da53d36	1606	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFE) expect -0.0000059604644 // Negative Two LSB
whismanoid	19:50cf5da53d36	1607	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFD) expect -0.0000089406967 // Negative Three LSB
whismanoid	19:50cf5da53d36	1608	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFAE148) expect -0.100 // Negative 100mV
whismanoid	19:50cf5da53d36	1609	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xE00000) expect -0.625 // Negative 25% Scale
whismanoid	19:50cf5da53d36	1610	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xCCCCCD) expect -1.000 // Negative One Volt
whismanoid	19:50cf5da53d36	1611	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xC00000) expect -1.250 // Negative Mid Scale
whismanoid	19:50cf5da53d36	1612	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xA00000) expect -1.875 // Negative 75% Scale
whismanoid	19:50cf5da53d36	1613	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x99999A) expect -2.000 // Negative Two Volts
whismanoid	19:50cf5da53d36	1614	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x800001) expect -2.500 // Negative Full Scale
whismanoid	19:50cf5da53d36	1615	/// @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x800000) expect -2.500 // Negative Full Scale
whismanoid	21:847b2220e96e	1616	/// @test group BIP2C tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid	1:d57c1a2cb83c	1617	///
whismanoid	1:d57c1a2cb83c	1618	double VoltageOfCode_Bipolar_2sComplement(uint32_t value_u24);
whismanoid	1:d57c1a2cb83c	1619
whismanoid	1:d57c1a2cb83c	1620	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1621	/// Return the physical voltage corresponding to conversion result,
whismanoid	1:d57c1a2cb83c	1622	/// when conversion format is determined by the CTRL register.
whismanoid	1:d57c1a2cb83c	1623	/// Does not perform any offset or gain correction.
whismanoid	1:d57c1a2cb83c	1624	///
whismanoid	1:d57c1a2cb83c	1625	/// @pre CTRL::U_BN and CTRL::FORMAT = 0 select offset binary, 2's complement, or straight binary
whismanoid	1:d57c1a2cb83c	1626	/// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
whismanoid	1:d57c1a2cb83c	1627	/// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid	1:d57c1a2cb83c	1628	/// @return physical voltage corresponding to MAX11410 code.
whismanoid	1:d57c1a2cb83c	1629	double VoltageOfCode(uint32_t value_u24);
whismanoid	0:68e64068330f	1630
whismanoid	0:68e64068330f	1631	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	0:68e64068330f	1632	// CODE GENERATOR: looks like this is a 'write' register access function
whismanoid	0:68e64068330f	1633	//----------------------------------------
whismanoid	0:68e64068330f	1634	/// Write a MAX11410 register.
whismanoid	0:68e64068330f	1635	///
whismanoid	11:abde565b8497	1636	/// CMDOP_1aaa_aaaa_ReadRegister bit is cleared 0 indicating a write operation.
whismanoid	0:68e64068330f	1637	///
whismanoid	0:68e64068330f	1638	/// MAX11410 register length can be determined by function RegSize.
whismanoid	0:68e64068330f	1639	///
whismanoid	0:68e64068330f	1640	/// For 8-bit register size:
whismanoid	0:68e64068330f	1641	///
whismanoid	0:68e64068330f	1642	/// SPI 16-bit transfer
whismanoid	0:68e64068330f	1643	///
whismanoid	0:68e64068330f	1644	/// SPI MOSI = 0aaa_aaaa_dddd_dddd
whismanoid	0:68e64068330f	1645	///
whismanoid	0:68e64068330f	1646	/// SPI MISO = xxxx_xxxx_xxxx_xxxx
whismanoid	0:68e64068330f	1647	///
whismanoid	0:68e64068330f	1648	/// For 16-bit register size:
whismanoid	0:68e64068330f	1649	///
whismanoid	0:68e64068330f	1650	/// SPI 24-bit or 32-bit transfer
whismanoid	0:68e64068330f	1651	///
whismanoid	0:68e64068330f	1652	/// SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
whismanoid	0:68e64068330f	1653	///
whismanoid	0:68e64068330f	1654	/// SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid	0:68e64068330f	1655	///
whismanoid	0:68e64068330f	1656	/// For 24-bit register size:
whismanoid	0:68e64068330f	1657	///
whismanoid	0:68e64068330f	1658	/// SPI 32-bit transfer
whismanoid	0:68e64068330f	1659	///
whismanoid	0:68e64068330f	1660	/// SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid	0:68e64068330f	1661	///
whismanoid	0:68e64068330f	1662	/// SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid	0:68e64068330f	1663	///
whismanoid	0:68e64068330f	1664	/// @return 1 on success; 0 on failure
whismanoid	10:7adee48a7f82	1665	uint8_t RegWrite(MAX11410_CMD_enum_t commandByte, uint32_t regData);
whismanoid	0:68e64068330f	1666
whismanoid	0:68e64068330f	1667	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	0:68e64068330f	1668	// CODE GENERATOR: looks like this is a 'read' register access function
whismanoid	0:68e64068330f	1669	//----------------------------------------
whismanoid	0:68e64068330f	1670	/// Read an 8-bit MAX11410 register
whismanoid	0:68e64068330f	1671	///
whismanoid	11:abde565b8497	1672	/// CMDOP_1aaa_aaaa_ReadRegister bit is set 1 indicating a read operation.
whismanoid	0:68e64068330f	1673	///
whismanoid	0:68e64068330f	1674	/// MAX11410 register length can be determined by function RegSize.
whismanoid	0:68e64068330f	1675	///
whismanoid	0:68e64068330f	1676	/// For 8-bit register size:
whismanoid	0:68e64068330f	1677	///
whismanoid	0:68e64068330f	1678	/// SPI 16-bit transfer
whismanoid	0:68e64068330f	1679	///
whismanoid	0:68e64068330f	1680	/// SPI MOSI = 1aaa_aaaa_0000_0000
whismanoid	0:68e64068330f	1681	///
whismanoid	0:68e64068330f	1682	/// SPI MISO = xxxx_xxxx_dddd_dddd
whismanoid	0:68e64068330f	1683	///
whismanoid	0:68e64068330f	1684	/// For 16-bit register size:
whismanoid	0:68e64068330f	1685	///
whismanoid	0:68e64068330f	1686	/// SPI 24-bit or 32-bit transfer
whismanoid	0:68e64068330f	1687	///
whismanoid	0:68e64068330f	1688	/// SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000
whismanoid	0:68e64068330f	1689	///
whismanoid	0:68e64068330f	1690	/// SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
whismanoid	0:68e64068330f	1691	///
whismanoid	0:68e64068330f	1692	/// For 24-bit register size:
whismanoid	0:68e64068330f	1693	///
whismanoid	0:68e64068330f	1694	/// SPI 32-bit transfer
whismanoid	0:68e64068330f	1695	///
whismanoid	0:68e64068330f	1696	/// SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid	0:68e64068330f	1697	///
whismanoid	0:68e64068330f	1698	/// SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid	0:68e64068330f	1699	///
whismanoid	0:68e64068330f	1700	///
whismanoid	0:68e64068330f	1701	/// @return 1 on success; 0 on failure
whismanoid	10:7adee48a7f82	1702	uint8_t RegRead(MAX11410_CMD_enum_t commandByte, uint32_t* ptrRegData);
whismanoid	0:68e64068330f	1703
whismanoid	0:68e64068330f	1704	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	0:68e64068330f	1705	// CODE GENERATOR: looks like this is a 'size' register access function
whismanoid	0:68e64068330f	1706	//----------------------------------------
whismanoid	0:68e64068330f	1707	/// Return the size of a MAX11410 register
whismanoid	0:68e64068330f	1708	///
whismanoid	0:68e64068330f	1709	/// @return 8 for 8-bit, 16 for 16-bit, 24 for 24-bit, else 0 for undefined register size
whismanoid	10:7adee48a7f82	1710	uint8_t RegSize(MAX11410_CMD_enum_t commandByte);
whismanoid	10:7adee48a7f82	1711
whismanoid	10:7adee48a7f82	1712	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	10:7adee48a7f82	1713	//----------------------------------------
whismanoid	11:abde565b8497	1714	/// Decode operation from commandByte
whismanoid	11:abde565b8497	1715	///
whismanoid	11:abde565b8497	1716	/// @return operation such as idle, read register, write register, etc.
whismanoid	11:abde565b8497	1717	MAX11410::MAX11410_CMDOP_enum_t DecodeCommand(MAX11410_CMD_enum_t commandByte);
whismanoid	11:abde565b8497	1718
whismanoid	11:abde565b8497	1719	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	11:abde565b8497	1720	//----------------------------------------
whismanoid	10:7adee48a7f82	1721	/// Return the address field of a MAX11410 register
whismanoid	10:7adee48a7f82	1722	///
whismanoid	10:7adee48a7f82	1723	/// @return register address field as given in datasheet
whismanoid	10:7adee48a7f82	1724	uint8_t RegAddrOfCommand(MAX11410_CMD_enum_t commandByte);
whismanoid	10:7adee48a7f82	1725
whismanoid	10:7adee48a7f82	1726	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	10:7adee48a7f82	1727	// CODE GENERATOR: looks like this is a 'read' register access function
whismanoid	10:7adee48a7f82	1728	//----------------------------------------
whismanoid	10:7adee48a7f82	1729	/// Test whether a command byte is a register read command
whismanoid	10:7adee48a7f82	1730	///
whismanoid	10:7adee48a7f82	1731	/// @return true if command byte is a register read command
whismanoid	10:7adee48a7f82	1732	uint8_t IsRegReadCommand(MAX11410_CMD_enum_t commandByte);
whismanoid	0:68e64068330f	1733
whismanoid	0:68e64068330f	1734	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	0:68e64068330f	1735	// CODE GENERATOR: looks like this is a 'name' register access function
whismanoid	0:68e64068330f	1736	//----------------------------------------
whismanoid	0:68e64068330f	1737	/// Return the name of a MAX11410 register
whismanoid	0:68e64068330f	1738	///
whismanoid	0:68e64068330f	1739	/// @return null-terminated constant C string containing register name or empty string
whismanoid	10:7adee48a7f82	1740	const char* RegName(MAX11410_CMD_enum_t commandByte);
whismanoid	0:68e64068330f	1741
whismanoid	0:68e64068330f	1742	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1743	/// Menu item 'XF'
whismanoid	1:d57c1a2cb83c	1744	///
whismanoid	1:d57c1a2cb83c	1745	/// FILTER Select Filter and Rate.
whismanoid	1:d57c1a2cb83c	1746	/// Sets conversion rate based on RATE, LINEF, and CONV_TYPE value. See Table 9a through Table 9d for details.
whismanoid	1:d57c1a2cb83c	1747	/// For CONV_TYPE_01_Continuous, linef=LINEF_11_SINC4, rate=RATE_0100 selects output data rate 60SPS.
whismanoid	1:d57c1a2cb83c	1748	///
whismanoid	1:d57c1a2cb83c	1749	/// @param[in] linef = filter type, default=MAX11410::MAX11410_LINEF_enum_t::LINEF_11_SINC4
whismanoid	1:d57c1a2cb83c	1750	/// @param[in] rate = output data rate selection, default=MAX11410::MAX11410_RATE_enum_t::RATE_0100
whismanoid	1:d57c1a2cb83c	1751	///
whismanoid	1:d57c1a2cb83c	1752	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1753	uint8_t Configure_FILTER(uint8_t linef, uint8_t rate);
whismanoid	1:d57c1a2cb83c	1754
whismanoid	1:d57c1a2cb83c	1755	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1756	/// Menu item 'XP'
whismanoid	1:d57c1a2cb83c	1757	///
whismanoid	1:d57c1a2cb83c	1758	/// PGA Select Gain and Signal Path.
whismanoid	1:d57c1a2cb83c	1759	///
whismanoid	1:d57c1a2cb83c	1760	/// @param[in] sigpath = signal path, default=MAX11410::MAX11410_SIG_PATH_enum_t::SIG_PATH_00_BUFFERED
whismanoid	1:d57c1a2cb83c	1761	/// @param[in] gain = gain selection, default=MAX11410::MAX11410_GAIN_enum_t::GAIN_000_1
whismanoid	1:d57c1a2cb83c	1762	///
whismanoid	1:d57c1a2cb83c	1763	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1764	uint8_t Configure_PGA(uint8_t sigpath, uint8_t gain);
whismanoid	1:d57c1a2cb83c	1765
whismanoid	1:d57c1a2cb83c	1766	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1767	/// Menu item 'XC'
whismanoid	1:d57c1a2cb83c	1768	///
whismanoid	1:d57c1a2cb83c	1769	/// CTRL Select clock, format, and reference.
whismanoid	1:d57c1a2cb83c	1770	///
whismanoid	1:d57c1a2cb83c	1771	/// @param[in] extclk = external clock enable, default=0
whismanoid	1:d57c1a2cb83c	1772	/// @param[in] u_bn = unipolar input range enable, default=0
whismanoid	1:d57c1a2cb83c	1773	/// @param[in] format = offset binary format enable, default=0
whismanoid	1:d57c1a2cb83c	1774	/// @param[in] refbufp_en = REFP reference buffer enable, default=0
whismanoid	1:d57c1a2cb83c	1775	/// @param[in] refbufn_en = REFN reference buffer enable, default=0
whismanoid	1:d57c1a2cb83c	1776	/// @param[in] ref_sel = reference selection, default=MAX11410::MAX11410_REF_SEL_enum_t::REF_SEL_001_REF1P_REF1N
whismanoid	1:d57c1a2cb83c	1777	///
whismanoid	1:d57c1a2cb83c	1778	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1779	uint8_t Configure_CTRL(uint8_t extclk, uint8_t u_bn, uint8_t format, uint8_t refbufp_en, uint8_t refbufn_en, uint8_t ref_sel);
whismanoid	1:d57c1a2cb83c	1780
whismanoid	1:d57c1a2cb83c	1781	//----------------------------------------
whismanoid	14:b49eecf7e4d8	1782	/// Menu item 'XR'
whismanoid	14:b49eecf7e4d8	1783	///
whismanoid	14:b49eecf7e4d8	1784	/// CTRL select reference, without changing the other fields.
whismanoid	14:b49eecf7e4d8	1785	///
whismanoid	14:b49eecf7e4d8	1786	/// @pre ctrl = shadow of CTRL register
whismanoid	14:b49eecf7e4d8	1787	/// @param[in] ref_sel = reference selection, default=MAX11410::MAX11410_REF_SEL_enum_t::REF_SEL_001_REF1P_REF1N
whismanoid	14:b49eecf7e4d8	1788	///
whismanoid	14:b49eecf7e4d8	1789	/// @return 1 on success; 0 on failure
whismanoid	14:b49eecf7e4d8	1790	uint8_t Configure_CTRL_REF(uint8_t ref_sel);
whismanoid	14:b49eecf7e4d8	1791
whismanoid	14:b49eecf7e4d8	1792	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1793	/// Menu item 'XS'
whismanoid	1:d57c1a2cb83c	1794	///
whismanoid	1:d57c1a2cb83c	1795	/// SOURCE Configure voltage bias source, current source, burnout mode
whismanoid	1:d57c1a2cb83c	1796	///
whismanoid	1:d57c1a2cb83c	1797	/// @param[in] vbias_mode = _______, default=MAX11410::MAX11410_VBIAS_MODE_enum_t::VBIAS_MODE_00_Active
whismanoid	1:d57c1a2cb83c	1798	/// @param[in] brn_mode = _______, default=MAX11410::MAX11410_BRN_MODE_enum_t::BRN_MODE_00_disabled
whismanoid	1:d57c1a2cb83c	1799	/// @param[in] idac_mode = _______, default=MAX11410::MAX11410_IDAC_MODE_enum_t::IDAC_MODE_0000_10uA
whismanoid	1:d57c1a2cb83c	1800	///
whismanoid	1:d57c1a2cb83c	1801	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1802	uint8_t Configure_SOURCE(uint8_t vbias_mode, uint8_t brn_mode, uint8_t idac_mode);
whismanoid	1:d57c1a2cb83c	1803
whismanoid	1:d57c1a2cb83c	1804	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1805	/// Menu item 'XM'
whismanoid	1:d57c1a2cb83c	1806	///
whismanoid	1:d57c1a2cb83c	1807	/// MUX_CTRL0 Select pins for analog input AINP and AINN
whismanoid	1:d57c1a2cb83c	1808	///
whismanoid	1:d57c1a2cb83c	1809	/// @param[in] ainp = channel high side, default=MAX11410::MAX11410_AINP_SEL_enum_t::AINP_SEL_0000_AIN0
whismanoid	1:d57c1a2cb83c	1810	/// @param[in] ainn = channel low side, default=MAX11410::MAX11410_AINN_SEL_enum_t::AINN_SEL_1010_GND
whismanoid	1:d57c1a2cb83c	1811	///
whismanoid	1:d57c1a2cb83c	1812	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1813	uint8_t Configure_MUX_CTRL0(uint8_t ainp, uint8_t ainn);
whismanoid	1:d57c1a2cb83c	1814
whismanoid	1:d57c1a2cb83c	1815	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1816	/// Menu item 'XI'
whismanoid	1:d57c1a2cb83c	1817	///
whismanoid	1:d57c1a2cb83c	1818	/// MUX_CTRL1 Select pins for current source
whismanoid	1:d57c1a2cb83c	1819	///
whismanoid	1:d57c1a2cb83c	1820	/// @param[in] idac1_sel = channel high side, default=MAX11410::MAX11410_IDAC1_SEL_enum_t::IDAC1_SEL_1111_unconnected
whismanoid	1:d57c1a2cb83c	1821	/// @param[in] idac0_sel = channel low side, default=MAX11410::MAX11410_IDAC0_SEL_enum_t::IDAC0_SEL_1111_unconnected
whismanoid	1:d57c1a2cb83c	1822	///
whismanoid	1:d57c1a2cb83c	1823	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1824	uint8_t Configure_MUX_CTRL1(uint8_t idac1_sel, uint8_t idac0_sel);
whismanoid	1:d57c1a2cb83c	1825
whismanoid	1:d57c1a2cb83c	1826	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1827	/// Menu item 'XV'
whismanoid	1:d57c1a2cb83c	1828	///
whismanoid	1:d57c1a2cb83c	1829	/// MUX_CTRL2 Select pins for voltage bias source
whismanoid	1:d57c1a2cb83c	1830	///
whismanoid	1:d57c1a2cb83c	1831	/// @param[in] vbias_ain7_ain0_bitmap = bit map of AIN7..AIN0 enables for voltage bias, default=0
whismanoid	1:d57c1a2cb83c	1832	///
whismanoid	1:d57c1a2cb83c	1833	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1834	uint8_t Configure_MUX_CTRL2(uint8_t vbias_ain7_ain0_bitmap);
whismanoid	1:d57c1a2cb83c	1835
whismanoid	1:d57c1a2cb83c	1836	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1837	/// Menu item 'X0'
whismanoid	1:d57c1a2cb83c	1838	///
whismanoid	1:d57c1a2cb83c	1839	/// CAL_START Calibrate Self Offset and Gain.
whismanoid	1:d57c1a2cb83c	1840	///
whismanoid	1:d57c1a2cb83c	1841	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1842	uint8_t Calibrate_Self_Offset_Gain(void);
whismanoid	1:d57c1a2cb83c	1843
whismanoid	1:d57c1a2cb83c	1844	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1845	/// Menu item 'X1'
whismanoid	1:d57c1a2cb83c	1846	///
whismanoid	1:d57c1a2cb83c	1847	/// CAL_START Calibrate Selected PGA.
whismanoid	1:d57c1a2cb83c	1848	///
whismanoid	1:d57c1a2cb83c	1849	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1850	uint8_t Calibrate_PGA_Gain(void);
whismanoid	1:d57c1a2cb83c	1851
whismanoid	1:d57c1a2cb83c	1852	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1853	/// Menu item 'X4'
whismanoid	1:d57c1a2cb83c	1854	///
whismanoid	1:d57c1a2cb83c	1855	/// CAL_START Calibrate System Offset A.
whismanoid	1:d57c1a2cb83c	1856	///
whismanoid	1:d57c1a2cb83c	1857	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1858	uint8_t Calibrate_System_Offset_A(void);
whismanoid	1:d57c1a2cb83c	1859
whismanoid	1:d57c1a2cb83c	1860	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1861	/// Menu item 'X5'
whismanoid	1:d57c1a2cb83c	1862	///
whismanoid	1:d57c1a2cb83c	1863	/// X6 0x03 CAL_START 0x06 Calibrate System Offset B
whismanoid	1:d57c1a2cb83c	1864	/// X7 0x03 CAL_START 0x07 Calibrate System Gain B
whismanoid	1:d57c1a2cb83c	1865	/// CAL_START Calibrate System Gain A.
whismanoid	1:d57c1a2cb83c	1866	///
whismanoid	1:d57c1a2cb83c	1867	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1868	uint8_t Calibrate_System_Gain_A(void);
whismanoid	1:d57c1a2cb83c	1869
whismanoid	1:d57c1a2cb83c	1870	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1871	/// Menu item 'X6'
whismanoid	1:d57c1a2cb83c	1872	///
whismanoid	1:d57c1a2cb83c	1873	/// CAL_START Calibrate System Offset B.
whismanoid	1:d57c1a2cb83c	1874	///
whismanoid	1:d57c1a2cb83c	1875	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1876	uint8_t Calibrate_System_Offset_B(void);
whismanoid	1:d57c1a2cb83c	1877
whismanoid	1:d57c1a2cb83c	1878	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1879	/// Menu item 'X7'
whismanoid	1:d57c1a2cb83c	1880	///
whismanoid	1:d57c1a2cb83c	1881	/// CAL_START Calibrate System Gain B.
whismanoid	1:d57c1a2cb83c	1882	///
whismanoid	1:d57c1a2cb83c	1883	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1884	uint8_t Calibrate_System_Gain_B(void);
whismanoid	1:d57c1a2cb83c	1885
whismanoid	1:d57c1a2cb83c	1886	//----------------------------------------
whismanoid	0:68e64068330f	1887	/// Configure Measurement for voltage input.
whismanoid	0:68e64068330f	1888	///
whismanoid	0:68e64068330f	1889	/// Example code for typical voltage measurement.
whismanoid	0:68e64068330f	1890	///
whismanoid	0:68e64068330f	1891	/// SPI register write sequence test AIN0-AGND voltage input using REF2=2.5V
whismanoid	0:68e64068330f	1892	/// write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode)
whismanoid	0:68e64068330f	1893	/// write8 0x00 PD = 0x00 (NOP)
whismanoid	0:68e64068330f	1894	/// write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous )
whismanoid	0:68e64068330f	1895	/// write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND
whismanoid	0:68e64068330f	1896	/// write8 0x09 CTRL = 0x02 to select reference REF2P/REF2N; or CTRL = 0x1A to select reference REF2P/REF2N with reference input buffers enabled; Data Format = Bipolar 2's Complement
whismanoid	0:68e64068330f	1897	/// write8 0x0E PGA = 0x00 to select input path = Buffers, digital gain = 1V/V
whismanoid	0:68e64068330f	1898	/// write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid	0:68e64068330f	1899	/// read24 0x80\|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid	0:68e64068330f	1900	/// read24 0x80\|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid	0:68e64068330f	1901	///
whismanoid	1:d57c1a2cb83c	1902	/// @param[in] ainp = channel high side, default=MAX11410_AINP_SEL_enum_t::AINP_SEL_0000_AIN0
whismanoid	1:d57c1a2cb83c	1903	/// @param[in] ainn = channel low side, default=MAX11410_AINN_SEL_enum_t::AINN_SEL_1010_GND
whismanoid	0:68e64068330f	1904	///
whismanoid	0:68e64068330f	1905	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1906	uint8_t Configure_Voltage(MAX11410_AINP_SEL_enum_t ainp, MAX11410_AINN_SEL_enum_t ainn);
whismanoid	0:68e64068330f	1907
whismanoid	0:68e64068330f	1908	//----------------------------------------
whismanoid	13:df96a784cda6	1909	/// Menu item '$' -> AINcode[0], AINcode[1], AINcode[2], AINcode[3], AINcode[4], AINcode[5], AINcode[6], AINcode[7], AINcode[8], AINcode[9], AINcode[10]
whismanoid	17:0e9f2dfc2a30	1910	///
whismanoid	1:d57c1a2cb83c	1911	/// Measure all ADC channels in sequence.
whismanoid	17:0e9f2dfc2a30	1912	/// Diagnostic output pulse on GP0 for each channel's measurement.
whismanoid	17:0e9f2dfc2a30	1913	/// Diagnostic output pulse on GP1 for entire loop.
whismanoid	17:0e9f2dfc2a30	1914	///
whismanoid	8:3a9dfa2e8234	1915	/// @post AINcode[0..10]: measurement result LSB code
whismanoid	0:68e64068330f	1916	///
whismanoid	0:68e64068330f	1917	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1918	uint8_t Read_All_Voltages(void);
whismanoid	0:68e64068330f	1919
whismanoid	0:68e64068330f	1920	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1921	/// Menu item 'V'
whismanoid	0:68e64068330f	1922	/// Trigger Measurement for voltage input.
whismanoid	0:68e64068330f	1923	///
whismanoid	0:68e64068330f	1924	/// Example code for typical voltage measurement.
whismanoid	0:68e64068330f	1925	///
whismanoid	1:d57c1a2cb83c	1926	/// @pre external connection REF2P-REF2N is a reference voltage
whismanoid	1:d57c1a2cb83c	1927	/// @pre VRef = Voltage of REF input, in Volts
whismanoid	1:d57c1a2cb83c	1928	/// @param[in] ainp = channel high side, default=AINP_SEL_0000_AIN0
whismanoid	1:d57c1a2cb83c	1929	/// @param[in] ainn = channel low side, default=AINN_SEL_1010_GND
whismanoid	1:d57c1a2cb83c	1930	/// @post AINcode[ainp]: measurement result LSB code
whismanoid	0:68e64068330f	1931	///
whismanoid	1:d57c1a2cb83c	1932	/// @return ideal voltage calculated from raw LSB code and reference voltage
whismanoid	1:d57c1a2cb83c	1933	double Measure_Voltage(MAX11410_AINP_SEL_enum_t ainp, MAX11410_AINN_SEL_enum_t ainn);
whismanoid	0:68e64068330f	1934
whismanoid	0:68e64068330f	1935	//----------------------------------------
whismanoid	22:c6812214a933	1936	/// Menu item 'R' -> rtd_ohm, rtd_degc
whismanoid	0:68e64068330f	1937	/// Trigger Measurement for Resistive Temperature Device (RTD).
whismanoid	0:68e64068330f	1938	///
whismanoid	0:68e64068330f	1939	/// Example code for typical RTD measurement.
whismanoid	0:68e64068330f	1940	///
whismanoid	1:d57c1a2cb83c	1941	/// @pre external connection REF1P-REF1N is a reference resistor
whismanoid	22:c6812214a933	1942	/// @pre ref1_v = reference resistance in ohms, default=4999
whismanoid	1:d57c1a2cb83c	1943	/// @param[in] rtd_iout = channel RTD high side force, default=AINP_SEL_0111_AIN7
whismanoid	1:d57c1a2cb83c	1944	/// @param[in] rtd_ainp = channel RTD high side sense, default=AINP_SEL_1000_AIN8
whismanoid	1:d57c1a2cb83c	1945	/// @param[in] rtd_ainn = channel RTD low side, default=AINN_SEL_1001_AIN9
whismanoid	1:d57c1a2cb83c	1946	/// @post AINcode[rtd_ainp]: measurement result LSB code
whismanoid	22:c6812214a933	1947	/// @post rtd_ohm: measurement result resistance in Ohms
whismanoid	22:c6812214a933	1948	/// @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
whismanoid	0:68e64068330f	1949	///
whismanoid	3:658a93dfb2d8	1950	/// @return resistance calculated from raw LSB code and reference resistance
whismanoid	1:d57c1a2cb83c	1951	double Measure_RTD(MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn);
whismanoid	0:68e64068330f	1952
whismanoid	0:68e64068330f	1953	//----------------------------------------
whismanoid	3:658a93dfb2d8	1954	/// Return the physical temperature corresponding to measured resistance
whismanoid	3:658a93dfb2d8	1955	/// of a PT1000 type Resistive Temperature Device (RTD).
whismanoid	3:658a93dfb2d8	1956	///
whismanoid	22:c6812214a933	1957	/// @param[in] rtd_ohm = RTD resistance in ohms, default=1000
whismanoid	22:c6812214a933	1958	/// @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
whismanoid	3:658a93dfb2d8	1959	///
whismanoid	3:658a93dfb2d8	1960	/// @return ideal temperature in degrees C, calculated from RTD resistance in ohms
whismanoid	21:847b2220e96e	1961	/// @test group RTD_PT1000 // PT1000 type Resistive Temperature Device (RTD)
whismanoid	21:847b2220e96e	1962	/// @test group RTD_PT1000 tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid	19:50cf5da53d36	1963	/// @test group RTD_PT1000 TemperatureOfRTD_PT1000(842.94) expect -40.0 within 0.1 // PT-1000 RTD at -40C
whismanoid	19:50cf5da53d36	1964	/// @test group RTD_PT1000 TemperatureOfRTD_PT1000(1000.0) expect 0.0 within 0.1 // PT-1000 RTD at 0C
whismanoid	19:50cf5da53d36	1965	/// @test group RTD_PT1000 TemperatureOfRTD_PT1000(1097.3) expect 25.0 within 0.1 // PT-1000 RTD at 25C
whismanoid	19:50cf5da53d36	1966	/// @test group RTD_PT1000 TemperatureOfRTD_PT1000(1328.1) expect 85.0 within 0.1 // PT-1000 RTD at 85C
whismanoid	19:50cf5da53d36	1967	/// @test group RTD_PT1000 TemperatureOfRTD_PT1000(1479.5) expect 125.0 within 0.1 // PT-1000 RTD at 125C
whismanoid	21:847b2220e96e	1968	/// @test group RTD_PT1000 tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid	3:658a93dfb2d8	1969	///
whismanoid	22:c6812214a933	1970	double TemperatureOfRTD_PT1000(double rtd_ohm);
whismanoid	3:658a93dfb2d8	1971
whismanoid	3:658a93dfb2d8	1972	//----------------------------------------
whismanoid	16:00aa1e5a6843	1973	/// Return the physical temperature corresponding to measured resistance
whismanoid	16:00aa1e5a6843	1974	/// of a PT100 type Resistive Temperature Device (RTD).
whismanoid	16:00aa1e5a6843	1975	///
whismanoid	22:c6812214a933	1976	/// @param[in] rtd_ohm = RTD resistance in ohms, default=100
whismanoid	22:c6812214a933	1977	/// @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
whismanoid	16:00aa1e5a6843	1978	///
whismanoid	16:00aa1e5a6843	1979	/// @return ideal temperature in degrees C, calculated from RTD resistance in ohms
whismanoid	21:847b2220e96e	1980	/// @test group RTD_PT100 // PT100 type Resistive Temperature Device (RTD)
whismanoid	21:847b2220e96e	1981	/// @test group RTD_PT100 tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid	19:50cf5da53d36	1982	/// @test group RTD_PT100 TemperatureOfRTD_PT100(84.294) expect -40.0 within 0.1 // PT-100 RTD at -40C
whismanoid	19:50cf5da53d36	1983	/// @test group RTD_PT100 TemperatureOfRTD_PT100(100.00) expect 0.0 within 0.1 // PT-100 RTD at 0C
whismanoid	19:50cf5da53d36	1984	/// @test group RTD_PT100 TemperatureOfRTD_PT100(109.73) expect 25.0 within 0.1 // PT-100 RTD at 25C
whismanoid	19:50cf5da53d36	1985	/// @test group RTD_PT100 TemperatureOfRTD_PT100(132.81) expect 85.0 within 0.1 // PT-100 RTD at 85C
whismanoid	19:50cf5da53d36	1986	/// @test group RTD_PT100 TemperatureOfRTD_PT100(147.95) expect 125.0 within 0.1 // PT-100 RTD at 125C
whismanoid	21:847b2220e96e	1987	/// @test group RTD_PT100 tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid	16:00aa1e5a6843	1988	///
whismanoid	22:c6812214a933	1989	double TemperatureOfRTD_PT100(double rtd_ohm);
whismanoid	16:00aa1e5a6843	1990
whismanoid	16:00aa1e5a6843	1991	//----------------------------------------
whismanoid	16:00aa1e5a6843	1992	/// Return the physical temperature corresponding to measured resistance
whismanoid	16:00aa1e5a6843	1993	/// of a PT100 or PT1000 type Resistive Temperature Device (RTD).
whismanoid	16:00aa1e5a6843	1994	///
whismanoid	22:c6812214a933	1995	/// @param[in] rtd_ohm = RTD resistance in ohms, default=100
whismanoid	22:c6812214a933	1996	/// @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
whismanoid	16:00aa1e5a6843	1997	///
whismanoid	16:00aa1e5a6843	1998	/// @return ideal temperature in degrees C, calculated from RTD resistance in ohms
whismanoid	19:50cf5da53d36	1999	/// @test group RTD // Verify function TemperatureOfRTD
whismanoid	19:50cf5da53d36	2000	/// @test group RTD tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid	19:50cf5da53d36	2001	/// @test group RTD TemperatureOfRTD(84.294) expect -40.0 within 0.1 // PT-100 RTD at -40C
whismanoid	19:50cf5da53d36	2002	/// @test group RTD TemperatureOfRTD(100.00) expect 0.0 within 0.1 // PT-100 RTD at 0C
whismanoid	19:50cf5da53d36	2003	/// @test group RTD TemperatureOfRTD(109.73) expect 25.0 within 0.1 // PT-100 RTD at 25C
whismanoid	19:50cf5da53d36	2004	/// @test group RTD TemperatureOfRTD(132.81) expect 85.0 within 0.1 // PT-100 RTD at 85C
whismanoid	19:50cf5da53d36	2005	/// @test group RTD TemperatureOfRTD(147.95) expect 125.0 within 0.1 // PT-100 RTD at 125C
whismanoid	19:50cf5da53d36	2006	/// @test group RTD TemperatureOfRTD(842.94) expect -40.0 within 0.1 // PT-1000 RTD at -40C
whismanoid	19:50cf5da53d36	2007	/// @test group RTD TemperatureOfRTD(1000.0) expect 0.0 within 0.1 // PT-1000 RTD at 0C
whismanoid	19:50cf5da53d36	2008	/// @test group RTD TemperatureOfRTD(1097.3) expect 25.0 within 0.1 // PT-1000 RTD at 25C
whismanoid	19:50cf5da53d36	2009	/// @test group RTD TemperatureOfRTD(1328.1) expect 85.0 within 0.1 // PT-1000 RTD at 85C
whismanoid	19:50cf5da53d36	2010	/// @test group RTD TemperatureOfRTD(1479.5) expect 125.0 within 0.1 // PT-1000 RTD at 125C
whismanoid	21:847b2220e96e	2011	/// @test group RTD tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid	16:00aa1e5a6843	2012	///
whismanoid	22:c6812214a933	2013	double TemperatureOfRTD(double rtd_ohm);
whismanoid	16:00aa1e5a6843	2014
whismanoid	16:00aa1e5a6843	2015	//----------------------------------------
whismanoid	22:c6812214a933	2016	/// Menu item 'TM' -> tc_v, tc_delta_degc, tc_degc
whismanoid	0:68e64068330f	2017	/// Trigger Measurement for Thermocouple
whismanoid	0:68e64068330f	2018	///
whismanoid	0:68e64068330f	2019	/// Example code for typical Thermocouple measurement.
whismanoid	1:d57c1a2cb83c	2020	/// An RTD measures the "cold junction" where TC connects to the board,
whismanoid	1:d57c1a2cb83c	2021	/// and the TC measures the temperature difference above the cold junction.
whismanoid	0:68e64068330f	2022	///
whismanoid	1:d57c1a2cb83c	2023	/// @param[in] tc_ainp = channel of Thermocouple high side, default=AINP_SEL_0101_AIN5
whismanoid	1:d57c1a2cb83c	2024	/// @param[in] tc_ainn = channel of Thermocouple low side, default=AINN_SEL_0110_AIN6
whismanoid	1:d57c1a2cb83c	2025	/// @param[in] rtd_iout = channel RTD high side force, default=AINP_SEL_0111_AIN7
whismanoid	1:d57c1a2cb83c	2026	/// @param[in] rtd_ainp = channel RTD high side sense, default=AINP_SEL_1000_AIN8
whismanoid	1:d57c1a2cb83c	2027	/// @param[in] rtd_ainn = channel RTD low side, default=AINN_SEL_1001_AIN9
whismanoid	1:d57c1a2cb83c	2028	/// @post AINcode[tc_ainp]: measurement result LSB code
whismanoid	22:c6812214a933	2029	/// @post tc_v: raw thermocouple voltage in Volts
whismanoid	22:c6812214a933	2030	/// @post tc_delta_degc: temperature in degC above cold junction
whismanoid	22:c6812214a933	2031	/// @post tc_degc: temperature in degC
whismanoid	0:68e64068330f	2032	///
whismanoid	0:68e64068330f	2033	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	2034	double Measure_Thermocouple(MAX11410_AINP_SEL_enum_t tc_ainp, MAX11410_AINN_SEL_enum_t tc_ainn, MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn);
whismanoid	0:68e64068330f	2035
whismanoid	3:658a93dfb2d8	2036	//----------------------------------------
whismanoid	3:658a93dfb2d8	2037	/// Return the physical temperature corresponding to measured voltage
whismanoid	3:658a93dfb2d8	2038	/// of a type K Thermocouple (TC).
whismanoid	3:658a93dfb2d8	2039	///
whismanoid	22:c6812214a933	2040	/// @pre {0}.rtd_degc = cold junction temperature, in degrees C
whismanoid	22:c6812214a933	2041	/// @param[in] tc_v = Thermocouple voltage in volts, default=0.0254
whismanoid	3:658a93dfb2d8	2042	///
whismanoid	3:658a93dfb2d8	2043	/// @return ideal temperature in degrees C, calculated from RTD resistance in ohms
whismanoid	21:847b2220e96e	2044	/// @test group TC_1 // Verify Thermocouple function TemperatureOfTC_TypeK
whismanoid	21:847b2220e96e	2045	/// @test group TC_2 // Verify Thermocouple function TemperatureOfTC_TypeK in more detail
whismanoid	21:847b2220e96e	2046	/// @test group TC_1 tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid	19:50cf5da53d36	2047	/// @test group TC_1 TemperatureOfTC_TypeK(0.000e-3) expect 0.0 within 0.1 // TC_TypeK at 0C = 0.000mV
whismanoid	19:50cf5da53d36	2048	/// @test group TC_1 TemperatureOfTC_TypeK(0.039e-3) expect 1.0 within 0.1 // TC_TypeK at 1C = 0.039mV
whismanoid	19:50cf5da53d36	2049	/// @test group TC_1 TemperatureOfTC_TypeK(0.079e-3) expect 2.0 within 0.1 // TC_TypeK at 2C = 0.079mV
whismanoid	19:50cf5da53d36	2050	/// @test group TC_1 TemperatureOfTC_TypeK(0.119e-3) expect 3.0 within 0.1 // TC_TypeK at 3C = 0.119mV
whismanoid	19:50cf5da53d36	2051	/// @test group TC_2 TemperatureOfTC_TypeK(0.158e-3) expect 4.0 within 0.1 // TC_TypeK at 4C = 0.158mV
whismanoid	19:50cf5da53d36	2052	/// @test group TC_2 TemperatureOfTC_TypeK(0.198e-3) expect 5.0 within 0.1 // TC_TypeK at 5C = 0.198mV
whismanoid	19:50cf5da53d36	2053	/// @test group TC_2 TemperatureOfTC_TypeK(0.238e-3) expect 6.0 within 0.1 // TC_TypeK at 6C = 0.238mV
whismanoid	19:50cf5da53d36	2054	/// @test group TC_2 TemperatureOfTC_TypeK(0.2775e-3) expect 7.0 within 0.1 // TC_TypeK at 7C = 0.2775mV
whismanoid	19:50cf5da53d36	2055	/// @test group TC_2 TemperatureOfTC_TypeK(0.317e-3) expect 8.0 within 0.1 // TC_TypeK at 8C = 0.317mV
whismanoid	19:50cf5da53d36	2056	/// @test group TC_2 TemperatureOfTC_TypeK(0.357e-3) expect 9.0 within 0.1 // TC_TypeK at 9C = 0.357mV
whismanoid	19:50cf5da53d36	2057	/// @test group TC_1 TemperatureOfTC_TypeK(0.397e-3) expect 10.0 within 0.1 // TC_TypeK at 10C = 0.397mV
whismanoid	19:50cf5da53d36	2058	/// @test group TC_1 TemperatureOfTC_TypeK(0.798e-3) expect 20.0 within 0.1 // TC_TypeK at 20C = 0.798mV
whismanoid	19:50cf5da53d36	2059	/// @test group TC_1 TemperatureOfTC_TypeK(1.081e-3) expect 27.0 within 0.1 // TC_TypeK at 27C = 1.081mV
whismanoid	19:50cf5da53d36	2060	/// @test group TC_1 TemperatureOfTC_TypeK(1.203e-3) expect 30.0 within 0.1 // TC_TypeK at 30C = 1.203mV
whismanoid	19:50cf5da53d36	2061	/// @test group TC_1 TemperatureOfTC_TypeK(1.612e-3) expect 40.0 within 0.1 // TC_TypeK at 40C = 1.612mV
whismanoid	19:50cf5da53d36	2062	/// @test group TC_1 TemperatureOfTC_TypeK(2.023e-3) expect 50.0 within 0.1 // TC_TypeK at 50C = 2.023mV
whismanoid	19:50cf5da53d36	2063	/// @test group TC_1 TemperatureOfTC_TypeK(2.436e-3) expect 60.0 within 0.1 // TC_TypeK at 60C = 2.436mV
whismanoid	19:50cf5da53d36	2064	/// @test group TC_1 TemperatureOfTC_TypeK(2.851e-3) expect 70.0 within 0.1 // TC_TypeK at 70C = 2.851mV
whismanoid	19:50cf5da53d36	2065	/// @test group TC_1 TemperatureOfTC_TypeK(3.267e-3) expect 80.0 within 0.1 // TC_TypeK at 80C = 3.267mV
whismanoid	19:50cf5da53d36	2066	/// @test group TC_1 TemperatureOfTC_TypeK(3.682e-3) expect 90.0 within 0.1 // TC_TypeK at 90C = 3.682mV
whismanoid	19:50cf5da53d36	2067	/// @test group TC_1 TemperatureOfTC_TypeK(4.096e-3) expect 100.0 within 0.1 // TC_TypeK at 100C = 4.096mV
whismanoid	19:50cf5da53d36	2068	/// @test group TC_2 TemperatureOfTC_TypeK(4.509e-3) expect 110.0 within 0.1 // TC_TypeK at 110C = 4.509mV
whismanoid	19:50cf5da53d36	2069	/// @test group TC_2 TemperatureOfTC_TypeK(4.920e-3) expect 120.0 within 0.1 // TC_TypeK at 120C = 4.920mV
whismanoid	19:50cf5da53d36	2070	/// @test group TC_2 TemperatureOfTC_TypeK(5.328e-3) expect 130.0 within 0.1 // TC_TypeK at 130C = 5.328mV
whismanoid	19:50cf5da53d36	2071	/// @test group TC_2 TemperatureOfTC_TypeK(5.735e-3) expect 140.0 within 0.1 // TC_TypeK at 140C = 5.735mV
whismanoid	19:50cf5da53d36	2072	/// @test group TC_2 TemperatureOfTC_TypeK(6.138e-3) expect 150.0 within 0.1 // TC_TypeK at 150C = 6.138mV
whismanoid	19:50cf5da53d36	2073	/// @test group TC_2 TemperatureOfTC_TypeK(6.540e-3) expect 160.0 within 0.1 // TC_TypeK at 160C = 6.540mV
whismanoid	19:50cf5da53d36	2074	/// @test group TC_2 TemperatureOfTC_TypeK(6.941e-3) expect 170.0 within 0.1 // TC_TypeK at 170C = 6.941mV
whismanoid	19:50cf5da53d36	2075	/// @test group TC_2 TemperatureOfTC_TypeK(7.340e-3) expect 180.0 within 0.1 // TC_TypeK at 180C = 7.340mV
whismanoid	19:50cf5da53d36	2076	/// @test group TC_1 TemperatureOfTC_TypeK(7.739e-3) expect 190.0 within 0.1 // TC_TypeK at 190C = 7.739mV
whismanoid	19:50cf5da53d36	2077	/// @test group TC_1 TemperatureOfTC_TypeK(8.138e-3) expect 200.0 within 0.1 // TC_TypeK at 200C = 8.138mV
whismanoid	19:50cf5da53d36	2078	/// @test group TC_1 TemperatureOfTC_TypeK(8.539e-3) expect 210.0 within 0.1 // TC_TypeK at 210C = 8.539mV
whismanoid	19:50cf5da53d36	2079	/// @test group TC_1 TemperatureOfTC_TypeK(8.940e-3) expect 220.0 within 0.1 // TC_TypeK at 220C = 8.940mV
whismanoid	19:50cf5da53d36	2080	/// @test group TC_2 TemperatureOfTC_TypeK(9.343e-3) expect 230.0 within 0.1 // TC_TypeK at 230C = 9.343mV
whismanoid	19:50cf5da53d36	2081	/// @test group TC_2 TemperatureOfTC_TypeK(9.747e-3) expect 240.0 within 0.1 // TC_TypeK at 240C = 9.747mV
whismanoid	19:50cf5da53d36	2082	/// @test group TC_2 TemperatureOfTC_TypeK(10.153e-3) expect 250.0 within 0.1 // TC_TypeK at 250C = 10.153mV
whismanoid	19:50cf5da53d36	2083	/// @test group TC_2 TemperatureOfTC_TypeK(10.561e-3) expect 260.0 within 0.1 // TC_TypeK at 260C = 10.561mV
whismanoid	19:50cf5da53d36	2084	/// @test group TC_2 TemperatureOfTC_TypeK(10.971e-3) expect 270.0 within 0.1 // TC_TypeK at 270C = 10.971mV
whismanoid	19:50cf5da53d36	2085	/// @test group TC_2 TemperatureOfTC_TypeK(11.382e-3) expect 280.0 within 0.1 // TC_TypeK at 280C = 11.382mV
whismanoid	19:50cf5da53d36	2086	/// @test group TC_2 TemperatureOfTC_TypeK(11.795e-3) expect 290.0 within 0.1 // TC_TypeK at 290C = 11.795mV
whismanoid	19:50cf5da53d36	2087	/// @test group TC_1 TemperatureOfTC_TypeK(12.209e-3) expect 300.0 within 0.1 // TC_TypeK at 300C = 12.209mV
whismanoid	19:50cf5da53d36	2088	/// @test group TC_2 TemperatureOfTC_TypeK(14.293e-3) expect 350.0 within 0.1 // TC_TypeK at 350C = 14.293mV
whismanoid	19:50cf5da53d36	2089	/// @test group TC_1 TemperatureOfTC_TypeK(16.397e-3) expect 400.0 within 0.1 // TC_TypeK at 400C = 16.397mV
whismanoid	19:50cf5da53d36	2090	/// @test group TC_1 TemperatureOfTC_TypeK(18.516e-3) expect 450.0 within 0.1 // TC_TypeK at 450C = 18.516mV
whismanoid	19:50cf5da53d36	2091	/// @test group TC_1 TemperatureOfTC_TypeK(20.218e-3) expect 490.0 // TC_TypeK at 490C = 20.218mV
whismanoid	21:847b2220e96e	2092	/// @test group TC_1 tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid	3:658a93dfb2d8	2093	///
whismanoid	22:c6812214a933	2094	double TemperatureOfTC_TypeK(double tc_v);
whismanoid	3:658a93dfb2d8	2095
whismanoid	4:c169ba85d673	2096	//----------------------------------------
whismanoid	4:c169ba85d673	2097	/// Calculate temperature in degrees C from input voltage,
whismanoid	4:c169ba85d673	2098	/// using a given set of polynomial coefficients.
whismanoid	4:c169ba85d673	2099	/// For example:
whismanoid	4:c169ba85d673	2100	///
whismanoid	4:c169ba85d673	2101	/// t = coefficients[0] + coefficients[1] * DMMavg + coefficients[2] * DmMMavg**2
whismanoid	4:c169ba85d673	2102	///
whismanoid	4:c169ba85d673	2103	/// @param[in] thermocouple_voltage_uV = Thermocouple voltage in microvolts
whismanoid	4:c169ba85d673	2104	///
whismanoid	4:c169ba85d673	2105	/// @return ideal temperature in degrees C, calculated from polynomial coefficients
whismanoid	4:c169ba85d673	2106	///
whismanoid	4:c169ba85d673	2107	double temperatureDegC_polynomial(double thermocouple_voltage_uV, int num_coefficients, double coefficients[]);
whismanoid	4:c169ba85d673	2108
whismanoid	0:68e64068330f	2109	}; // end of class MAX11410
whismanoid	0:68e64068330f	2110
whismanoid	0:68e64068330f	2111	#endif // __MAX11410_H__
whismanoid	0:68e64068330f	2112
whismanoid	0:68e64068330f	2113	// End of file

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Type:	Library
Created:	18 Dec 2019
Imports:	14
Forks:	0
Commits:	36
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Followers:	109

The code in this repository is Apache licensed.

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