MAX11410 - MAX11410 high speed 24-bit Delta-Sigma ADC

Maxim Integrated » Code » MAX11410

MAX11410 high speed 24-bit Delta-Sigma ADC

Dependents: MAX11410BOB_24bit_ADC MAX11410BOB_Serial_Tester

MAX11410.h@1:d57c1a2cb83c, 2019-12-19 (annotated)

Committer:: whismanoid
Date:: Thu Dec 19 01:01:11 2019 +0000
Revision:: 1:d57c1a2cb83c
Parent:: 0:68e64068330f
Child:: 3:658a93dfb2d8

Measure_RTD, multiple Ref channels

Who changed what in which revision?

User	Revision	Line number	New contents of line
whismanoid	0:68e64068330f	1	// /*******************************************************************************
whismanoid	0:68e64068330f	2	// * Copyright (C) 2019 Maxim Integrated Products, Inc., All Rights Reserved.
whismanoid	0:68e64068330f	3	// *
whismanoid	0:68e64068330f	4	// * Permission is hereby granted, free of charge, to any person obtaining a
whismanoid	0:68e64068330f	5	// * copy of this software and associated documentation files (the "Software"),
whismanoid	0:68e64068330f	6	// * to deal in the Software without restriction, including without limitation
whismanoid	0:68e64068330f	7	// * the rights to use, copy, modify, merge, publish, distribute, sublicense,
whismanoid	0:68e64068330f	8	// * and/or sell copies of the Software, and to permit persons to whom the
whismanoid	0:68e64068330f	9	// * Software is furnished to do so, subject to the following conditions:
whismanoid	0:68e64068330f	10	// *
whismanoid	0:68e64068330f	11	// * The above copyright notice and this permission notice shall be included
whismanoid	0:68e64068330f	12	// * in all copies or substantial portions of the Software.
whismanoid	0:68e64068330f	13	// *
whismanoid	0:68e64068330f	14	// * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
whismanoid	0:68e64068330f	15	// * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
whismanoid	0:68e64068330f	16	// * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
whismanoid	0:68e64068330f	17	// * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
whismanoid	0:68e64068330f	18	// * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
whismanoid	0:68e64068330f	19	// * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
whismanoid	0:68e64068330f	20	// * OTHER DEALINGS IN THE SOFTWARE.
whismanoid	0:68e64068330f	21	// *
whismanoid	0:68e64068330f	22	// * Except as contained in this notice, the name of Maxim Integrated
whismanoid	0:68e64068330f	23	// * Products, Inc. shall not be used except as stated in the Maxim Integrated
whismanoid	0:68e64068330f	24	// * Products, Inc. Branding Policy.
whismanoid	0:68e64068330f	25	// *
whismanoid	0:68e64068330f	26	// * The mere transfer of this software does not imply any licenses
whismanoid	0:68e64068330f	27	// * of trade secrets, proprietary technology, copyrights, patents,
whismanoid	0:68e64068330f	28	// * trademarks, maskwork rights, or any other form of intellectual
whismanoid	0:68e64068330f	29	// * property whatsoever. Maxim Integrated Products, Inc. retains all
whismanoid	0:68e64068330f	30	// * ownership rights.
whismanoid	0:68e64068330f	31	// *******************************************************************************
whismanoid	0:68e64068330f	32	// */
whismanoid	0:68e64068330f	33	// *********************************************************************
whismanoid	0:68e64068330f	34	// @file MAX11410.h
whismanoid	0:68e64068330f	35	// *********************************************************************
whismanoid	0:68e64068330f	36	// Header file
whismanoid	0:68e64068330f	37	// DO NOT EDIT; except areas designated "CUSTOMIZE". Automatically generated file.
whismanoid	0:68e64068330f	38	// generated by XMLSystemOfDevicesToMBED.py
whismanoid	0:68e64068330f	39	// System Name = ExampleSystem
whismanoid	0:68e64068330f	40	// System Description = Device driver example
whismanoid	0:68e64068330f	41	// Device Name = MAX11410
whismanoid	0:68e64068330f	42	// Device Description = 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC
whismanoid	0:68e64068330f	43	// Device DeviceBriefDescription = 24-bit 1.9ksps Delta-Sigma ADC
whismanoid	0:68e64068330f	44	// Device Manufacturer = Maxim Integrated
whismanoid	0:68e64068330f	45	// Device PartNumber = MAX11410ATI+
whismanoid	0:68e64068330f	46	// Device RegValue_Width = DataWidth16bit_HL
whismanoid	0:68e64068330f	47	//
whismanoid	0:68e64068330f	48	// ADC MaxOutputDataRate = 1.9ksps
whismanoid	0:68e64068330f	49	// ADC NumChannels = 10
whismanoid	0:68e64068330f	50	// ADC ResolutionBits = 24
whismanoid	0:68e64068330f	51	//
whismanoid	0:68e64068330f	52	// SPI CS = ActiveLow
whismanoid	0:68e64068330f	53	// SPI FrameStart = CS
whismanoid	0:68e64068330f	54	// SPI CPOL = 0
whismanoid	0:68e64068330f	55	// SPI CPHA = 0
whismanoid	0:68e64068330f	56	// SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid	0:68e64068330f	57	// SPI SCLK Idle Low
whismanoid	0:68e64068330f	58	// SPI SCLKMaxMHz = 8
whismanoid	0:68e64068330f	59	// SPI SCLKMinMHz = 0
whismanoid	0:68e64068330f	60	//
whismanoid	0:68e64068330f	61
whismanoid	0:68e64068330f	62
whismanoid	0:68e64068330f	63	// Prevent multiple declaration
whismanoid	0:68e64068330f	64	#ifndef __MAX11410_H__
whismanoid	0:68e64068330f	65	#define __MAX11410_H__
whismanoid	0:68e64068330f	66
whismanoid	0:68e64068330f	67	// standard include for target platform -- Platform_Include_Boilerplate
whismanoid	0:68e64068330f	68	#include "mbed.h"
whismanoid	0:68e64068330f	69	// Platforms:
whismanoid	0:68e64068330f	70	// - MAX32625MBED
whismanoid	0:68e64068330f	71	// - supports mbed-os-5.11, requires USBDevice library
whismanoid	0:68e64068330f	72	// - add https://developer.mbed.org/teams/MaximIntegrated/code/USBDevice/
whismanoid	0:68e64068330f	73	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	74	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	75	// - MAX32600MBED
whismanoid	0:68e64068330f	76	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	77	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	78	// - Windows 10 note: Don't connect HDK until you are ready to load new firmware into the board.
whismanoid	0:68e64068330f	79	// - NUCLEO_F446RE
whismanoid	0:68e64068330f	80	// - remove USBDevice library
whismanoid	0:68e64068330f	81	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	82	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	83	// - NUCLEO_F401RE
whismanoid	0:68e64068330f	84	// - remove USBDevice library
whismanoid	0:68e64068330f	85	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	86	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	87	// - MAX32630FTHR
whismanoid	0:68e64068330f	88	// - #include "max32630fthr.h"
whismanoid	0:68e64068330f	89	// - add http://os.mbed.org/teams/MaximIntegrated/code/max32630fthr/
whismanoid	0:68e64068330f	90	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	91	// - MAX32620FTHR
whismanoid	0:68e64068330f	92	// - #include "MAX32620FTHR.h"
whismanoid	0:68e64068330f	93	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	94	// - add https://os.mbed.com/teams/MaximIntegrated/code/MAX32620FTHR/
whismanoid	0:68e64068330f	95	// - not tested yet
whismanoid	0:68e64068330f	96	// - MAX32625PICO
whismanoid	0:68e64068330f	97	// - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	98	// - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	99	// - not tested yet
whismanoid	0:68e64068330f	100	//
whismanoid	0:68e64068330f	101	// end Platform_Include_Boilerplate
whismanoid	0:68e64068330f	102
whismanoid	0:68e64068330f	103	// CODE GENERATOR: conditional defines
whismanoid	0:68e64068330f	104	// CODE GENERATOR: class declaration and docstrings
whismanoid	0:68e64068330f	105	/**
whismanoid	0:68e64068330f	106	* @brief MAX11410 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC
whismanoid	0:68e64068330f	107	*
whismanoid	0:68e64068330f	108	*
whismanoid	0:68e64068330f	109	*
whismanoid	0:68e64068330f	110	* Datasheet: https://www.maximintegrated.com/MAX11410
whismanoid	0:68e64068330f	111	*
whismanoid	0:68e64068330f	112	*
whismanoid	0:68e64068330f	113	*
whismanoid	0:68e64068330f	114	* //---------- CODE GENERATOR: helloCppCodeList
whismanoid	0:68e64068330f	115	* @code
whismanoid	0:68e64068330f	116	* // CODE GENERATOR: example code includes
whismanoid	0:68e64068330f	117	*
whismanoid	0:68e64068330f	118	* // example code includes
whismanoid	0:68e64068330f	119	* // standard include for target platform -- Platform_Include_Boilerplate
whismanoid	0:68e64068330f	120	* #include "mbed.h"
whismanoid	0:68e64068330f	121	* // Platforms:
whismanoid	0:68e64068330f	122	* // - MAX32625MBED
whismanoid	0:68e64068330f	123	* // - supports mbed-os-5.11, requires USBDevice library
whismanoid	0:68e64068330f	124	* // - add https://developer.mbed.org/teams/MaximIntegrated/code/USBDevice/
whismanoid	0:68e64068330f	125	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	126	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	127	* // - MAX32600MBED
whismanoid	0:68e64068330f	128	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	129	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	130	* // - Windows 10 note: Don't connect HDK until you are ready to load new firmware into the board.
whismanoid	0:68e64068330f	131	* // - NUCLEO_F446RE
whismanoid	0:68e64068330f	132	* // - remove USBDevice library
whismanoid	0:68e64068330f	133	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	134	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	135	* // - NUCLEO_F401RE
whismanoid	0:68e64068330f	136	* // - remove USBDevice library
whismanoid	0:68e64068330f	137	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	138	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	139	* // - MAX32630FTHR
whismanoid	0:68e64068330f	140	* // - #include "max32630fthr.h"
whismanoid	0:68e64068330f	141	* // - add http://os.mbed.org/teams/MaximIntegrated/code/max32630fthr/
whismanoid	0:68e64068330f	142	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	143	* // - MAX32620FTHR
whismanoid	0:68e64068330f	144	* // - #include "MAX32620FTHR.h"
whismanoid	0:68e64068330f	145	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	146	* // - add https://os.mbed.com/teams/MaximIntegrated/code/MAX32620FTHR/
whismanoid	0:68e64068330f	147	* // - not tested yet
whismanoid	0:68e64068330f	148	* // - MAX32625PICO
whismanoid	0:68e64068330f	149	* // - remove max32630fthr library (if present)
whismanoid	0:68e64068330f	150	* // - remove MAX32620FTHR library (if present)
whismanoid	0:68e64068330f	151	* // - not tested yet
whismanoid	0:68e64068330f	152	* //
whismanoid	0:68e64068330f	153	* // end Platform_Include_Boilerplate
whismanoid	0:68e64068330f	154	* #include "MAX11410.h"
whismanoid	0:68e64068330f	155	*
whismanoid	0:68e64068330f	156	* // example code board support
whismanoid	0:68e64068330f	157	* //MAX32630FTHR pegasus(MAX32630FTHR::VIO_3V3);
whismanoid	0:68e64068330f	158	* //DigitalOut rLED(LED1);
whismanoid	0:68e64068330f	159	* //DigitalOut gLED(LED2);
whismanoid	0:68e64068330f	160	* //DigitalOut bLED(LED3);
whismanoid	0:68e64068330f	161	* //
whismanoid	0:68e64068330f	162	* // Arduino "shield" connector port definitions (MAX32625MBED shown)
whismanoid	0:68e64068330f	163	* #if defined(TARGET_MAX32625MBED)
whismanoid	0:68e64068330f	164	* #define A0 AIN_0
whismanoid	0:68e64068330f	165	* #define A1 AIN_1
whismanoid	0:68e64068330f	166	* #define A2 AIN_2
whismanoid	0:68e64068330f	167	* #define A3 AIN_3
whismanoid	0:68e64068330f	168	* #define D0 P0_0
whismanoid	0:68e64068330f	169	* #define D1 P0_1
whismanoid	0:68e64068330f	170	* #define D2 P0_2
whismanoid	0:68e64068330f	171	* #define D3 P0_3
whismanoid	0:68e64068330f	172	* #define D4 P0_4
whismanoid	0:68e64068330f	173	* #define D5 P0_5
whismanoid	0:68e64068330f	174	* #define D6 P0_6
whismanoid	0:68e64068330f	175	* #define D7 P0_7
whismanoid	0:68e64068330f	176	* #define D8 P1_4
whismanoid	0:68e64068330f	177	* #define D9 P1_5
whismanoid	0:68e64068330f	178	* #define D10 P1_3
whismanoid	0:68e64068330f	179	* #define D11 P1_1
whismanoid	0:68e64068330f	180	* #define D12 P1_2
whismanoid	0:68e64068330f	181	* #define D13 P1_0
whismanoid	0:68e64068330f	182	* #endif
whismanoid	0:68e64068330f	183	*
whismanoid	0:68e64068330f	184	* // example code declare SPI interface
whismanoid	0:68e64068330f	185	* #if defined(TARGET_MAX32625MBED)
whismanoid	0:68e64068330f	186	* SPI spi(SPI1_MOSI, SPI1_MISO, SPI1_SCK); // mosi, miso, sclk spi1 TARGET_MAX32625MBED: P1_1 P1_2 P1_0 Arduino 10-pin header D11 D12 D13
whismanoid	0:68e64068330f	187	* DigitalOut spi_cs(SPI1_SS); // TARGET_MAX32625MBED: P1_3 Arduino 10-pin header D10
whismanoid	0:68e64068330f	188	* #elif defined(TARGET_MAX32600MBED)
whismanoid	0:68e64068330f	189	* SPI spi(SPI2_MOSI, SPI2_MISO, SPI2_SCK); // mosi, miso, sclk spi1 TARGET_MAX32600MBED: Arduino 10-pin header D11 D12 D13
whismanoid	0:68e64068330f	190	* DigitalOut spi_cs(SPI2_SS); // Generic: Arduino 10-pin header D10
whismanoid	0:68e64068330f	191	* #else
whismanoid	0:68e64068330f	192	* SPI spi(D11, D12, D13); // mosi, miso, sclk spi1 TARGET_MAX32600MBED: Arduino 10-pin header D11 D12 D13
whismanoid	0:68e64068330f	193	* DigitalOut spi_cs(D10); // Generic: Arduino 10-pin header D10
whismanoid	0:68e64068330f	194	* #endif
whismanoid	0:68e64068330f	195	*
whismanoid	0:68e64068330f	196	* // example code declare GPIO interface pins
whismanoid	0:68e64068330f	197	* // example code declare device instance
whismanoid	0:68e64068330f	198	* MAX11410 g_MAX11410_device(spi, spi_cs, MAX11410::MAX11410_IC);
whismanoid	0:68e64068330f	199	*
whismanoid	0:68e64068330f	200	* // CODE GENERATOR: example code for ADC: serial port declaration
whismanoid	0:68e64068330f	201	* //--------------------------------------------------
whismanoid	0:68e64068330f	202	* // Declare the Serial driver
whismanoid	0:68e64068330f	203	* // default baud rate settings are 9600 8N1
whismanoid	0:68e64068330f	204	* // install device driver from http://developer.mbed.org/media/downloads/drivers/mbedWinSerial_16466.exe
whismanoid	0:68e64068330f	205	* // see docs https://docs.mbed.com/docs/mbed-os-handbook/en/5.5/getting_started/what_need/
whismanoid	0:68e64068330f	206	* #if defined(TARGET_MAX32630)
whismanoid	0:68e64068330f	207	* #include "USBSerial.h"
whismanoid	0:68e64068330f	208	* // Hardware serial port over DAPLink
whismanoid	0:68e64068330f	209	* // The default baud rate for the DapLink UART is 9600
whismanoid	0:68e64068330f	210	* //Serial DAPLINKserial(P2_1, P2_0); // tx, rx
whismanoid	0:68e64068330f	211	* // #define HAS_DAPLINK_SERIAL 1
whismanoid	0:68e64068330f	212	* // Virtual serial port over USB
whismanoid	0:68e64068330f	213	* // The baud rate does not affect the virtual USBSerial UART.
whismanoid	0:68e64068330f	214	* USBSerial serial;
whismanoid	0:68e64068330f	215	* //--------------------------------------------------
whismanoid	0:68e64068330f	216	* #elif defined(TARGET_MAX32625MBED)
whismanoid	0:68e64068330f	217	* #include "USBSerial.h"
whismanoid	0:68e64068330f	218	* // Hardware serial port over DAPLink
whismanoid	0:68e64068330f	219	* // The default baud rate for the DapLink UART is 9600
whismanoid	0:68e64068330f	220	* //Serial DAPLINKserial(P2_1, P2_0); // tx, rx
whismanoid	0:68e64068330f	221	* // #define HAS_DAPLINK_SERIAL 1
whismanoid	0:68e64068330f	222	* // Virtual serial port over USB
whismanoid	0:68e64068330f	223	* // The baud rate does not affect the virtual USBSerial UART.
whismanoid	0:68e64068330f	224	* USBSerial serial;
whismanoid	0:68e64068330f	225	* //--------------------------------------------------
whismanoid	0:68e64068330f	226	* #elif defined(TARGET_MAX32600)
whismanoid	0:68e64068330f	227	* #include "USBSerial.h"
whismanoid	0:68e64068330f	228	* // Hardware serial port over DAPLink
whismanoid	0:68e64068330f	229	* // The default baud rate for the DapLink UART is 9600
whismanoid	0:68e64068330f	230	* Serial DAPLINKserial(P1_1, P1_0); // tx, rx
whismanoid	0:68e64068330f	231	* #define HAS_DAPLINK_SERIAL 1
whismanoid	0:68e64068330f	232	* // Virtual serial port over USB
whismanoid	0:68e64068330f	233	* // The baud rate does not affect the virtual USBSerial UART.
whismanoid	0:68e64068330f	234	* USBSerial serial;
whismanoid	0:68e64068330f	235	* //--------------------------------------------------
whismanoid	0:68e64068330f	236	* #elif defined(TARGET_NUCLEO_F446RE) \|\| defined(TARGET_NUCLEO_F401RE)
whismanoid	0:68e64068330f	237	* Serial serial(SERIAL_TX, SERIAL_RX); // tx, rx
whismanoid	0:68e64068330f	238	* //--------------------------------------------------
whismanoid	0:68e64068330f	239	* #else
whismanoid	0:68e64068330f	240	* #if defined(SERIAL_TX)
whismanoid	0:68e64068330f	241	* #warning "target not previously tested; guess serial pins are SERIAL_TX, SERIAL_RX..."
whismanoid	0:68e64068330f	242	* Serial serial(SERIAL_TX, SERIAL_RX); // tx, rx
whismanoid	0:68e64068330f	243	* #elif defined(USBTX)
whismanoid	0:68e64068330f	244	* #warning "target not previously tested; guess serial pins are USBTX, USBRX..."
whismanoid	0:68e64068330f	245	* Serial serial(USBTX, USBRX); // tx, rx
whismanoid	0:68e64068330f	246	* #elif defined(UART_TX)
whismanoid	0:68e64068330f	247	* #warning "target not previously tested; guess serial pins are UART_TX, UART_RX..."
whismanoid	0:68e64068330f	248	* Serial serial(UART_TX, UART_RX); // tx, rx
whismanoid	0:68e64068330f	249	* #else
whismanoid	0:68e64068330f	250	* #warning "target not previously tested; need to define serial pins..."
whismanoid	0:68e64068330f	251	* #endif
whismanoid	0:68e64068330f	252	* #endif
whismanoid	0:68e64068330f	253	* //
whismanoid	0:68e64068330f	254	* #include "CmdLine.h"
whismanoid	0:68e64068330f	255	* CmdLine cmdLine(serial, "serial");
whismanoid	0:68e64068330f	256	*
whismanoid	0:68e64068330f	257	* // example code main function
whismanoid	0:68e64068330f	258	* int main()
whismanoid	0:68e64068330f	259	* {
whismanoid	0:68e64068330f	260	* // CODE GENERATOR: example code: member function Init
whismanoid	0:68e64068330f	261	* g_MAX11410_device.Init();
whismanoid	0:68e64068330f	262	*
whismanoid	0:68e64068330f	263	* while (1)
whismanoid	0:68e64068330f	264	* {
whismanoid	0:68e64068330f	265	* // CODE GENERATOR: example code: has no member function REF
whismanoid	0:68e64068330f	266	* // CODE GENERATOR: example code for ADC: repeat-forever convert and print conversion result, one record per line
whismanoid	0:68e64068330f	267	* // CODE GENERATOR: ResolutionBits = 24
whismanoid	0:68e64068330f	268	* // CODE GENERATOR: FScode = None
whismanoid	0:68e64068330f	269	* // CODE GENERATOR: NumChannels = 10
whismanoid	0:68e64068330f	270	* while(1) { // this code repeats forever
whismanoid	0:68e64068330f	271	* // this code repeats forever
whismanoid	0:68e64068330f	272	* // CODE GENERATOR: example code: has no member function ScanStandardExternalClock
whismanoid	0:68e64068330f	273	* // CODE GENERATOR: example code: has no member function ReadAINcode
whismanoid	1:d57c1a2cb83c	274	* // CODE GENERATOR: example code: member function Read_All_Voltages
whismanoid	0:68e64068330f	275	* // Measure ADC channels in sequence from AIN0 to channelNumber_0_9.
whismanoid	0:68e64068330f	276	* // @param[in] g_MAX11410_device.channelNumber_0_15: AIN Channel Number
whismanoid	0:68e64068330f	277	* // @param[in] g_MAX11410_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	0:68e64068330f	278	* // @param[in] g_MAX11410_device.chan_id_0_1: ADC_MODE_CONTROL.CHAN_ID
whismanoid	0:68e64068330f	279	* int channelId_0_9 = 9;
whismanoid	0:68e64068330f	280	* //g_MAX11410_device.channelNumber_0_15 = channelId_0_9;
whismanoid	0:68e64068330f	281	* //g_MAX11410_device.PowerManagement_0_2 = 0;
whismanoid	0:68e64068330f	282	* //g_MAX11410_device.chan_id_0_1 = 1;
whismanoid	1:d57c1a2cb83c	283	* g_MAX11410_device.NumWords = g_MAX11410_device.Read_All_Voltages();
whismanoid	0:68e64068330f	284	*
whismanoid	0:68e64068330f	285	* // wait(3.0);
whismanoid	0:68e64068330f	286	* // CODE GENERATOR: print conversion result
whismanoid	0:68e64068330f	287	* // Use Arduino Serial Plotter to view output: Tools \| Serial Plotter
whismanoid	0:68e64068330f	288	* cmdLine.serial().printf("%d", g_MAX11410_device.AINcode[0]);
whismanoid	0:68e64068330f	289	* for (int index = 1; index <= channelId_0_9; index++) {
whismanoid	0:68e64068330f	290	* cmdLine.serial().printf(",%d", g_MAX11410_device.AINcode[index]);
whismanoid	0:68e64068330f	291	* }
whismanoid	0:68e64068330f	292	* cmdLine.serial().printf("\r\n");
whismanoid	0:68e64068330f	293	*
whismanoid	0:68e64068330f	294	* } // this code repeats forever
whismanoid	0:68e64068330f	295	* }
whismanoid	0:68e64068330f	296	* }
whismanoid	0:68e64068330f	297	* @endcode
whismanoid	0:68e64068330f	298	* //---------- CODE GENERATOR: end helloCppCodeList
whismanoid	0:68e64068330f	299	*/
whismanoid	0:68e64068330f	300	class MAX11410 {
whismanoid	0:68e64068330f	301	public:
whismanoid	0:68e64068330f	302	// CODE GENERATOR: TypedefEnum EnumItem declarations
whismanoid	0:68e64068330f	303	// CODE GENERATOR: TypedefEnum MAX11410_CMD_enum_t
whismanoid	0:68e64068330f	304	//----------------------------------------
whismanoid	0:68e64068330f	305	/// Register Addresses
whismanoid	0:68e64068330f	306	///
whismanoid	0:68e64068330f	307	/// Naming convention is CMD_bitstream_FUNCTION_NAME
whismanoid	0:68e64068330f	308	/// - r = read/write bit (1=read, 0=write)
whismanoid	0:68e64068330f	309	/// - xaaa_aaaa = 7-bit register address field
whismanoid	0:68e64068330f	310	/// - dddd_dddd = 8-bit register data field
whismanoid	0:68e64068330f	311	/// - dddd_dddd_dddd_dddd = 16-bit register data field
whismanoid	0:68e64068330f	312	/// - dddd_dddd_dddd_dddd_dddd_dddd = 24-bit register data field
whismanoid	0:68e64068330f	313	/// - xxxx = don't care
whismanoid	0:68e64068330f	314	typedef enum MAX11410_CMD_enum_t {
whismanoid	0:68e64068330f	315	CMD_r000_0000_xxxx_xxdd_PD = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	316	CMD_r000_0001_xddd_xxdd_CONV_START = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	317	CMD_r000_0010_xddd_dddd_SEQ_START = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	318	CMD_r000_0011_xxxx_xddd_CAL_START = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	319	CMD_r000_0100_dddd_xddd_GP0_CTRL = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	320	CMD_r000_0101_dddd_xddd_GP1_CTRL = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	321	CMD_r000_0110_xddd_xxdd_GP_CONV = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	322	CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	323	CMD_r000_1000_x0dd_dddd_FILTER = 0x08, //!< 8'b00001000
whismanoid	0:68e64068330f	324	CMD_r000_1001_dddd_dddd_CTRL = 0x09, //!< 8'b00001001
whismanoid	0:68e64068330f	325	CMD_r000_1010_dddd_dddd_SOURCE = 0x0a, //!< 8'b00001010
whismanoid	0:68e64068330f	326	CMD_r000_1011_dddd_dddd_MUX_CTRL0 = 0x0b, //!< 8'b00001011
whismanoid	0:68e64068330f	327	CMD_r000_1100_dddd_dddd_MUX_CTRL1 = 0x0c, //!< 8'b00001100
whismanoid	0:68e64068330f	328	CMD_r000_1101_dddd_dddd_MUX_CTRL2 = 0x0d, //!< 8'b00001101
whismanoid	0:68e64068330f	329	CMD_r000_1110_xxdd_xddd_PGA = 0x0e, //!< 8'b00001110
whismanoid	0:68e64068330f	330	CMD_r000_1111_dddd_dddd_WAIT_EXT = 0x0f, //!< 8'b00001111
whismanoid	0:68e64068330f	331	CMD_r001_0000_xxxx_xxxx_WAIT_START = 0x10, //!< 8'b00010000
whismanoid	0:68e64068330f	332	CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID = 0x11, //!< 8'b00010001
whismanoid	0:68e64068330f	333	CMD_r001_0010_xxxx_xxxx_dddd_xxdd_dddd_dddd_SYSC_SEL = 0x12, //!< 8'b00010010
whismanoid	0:68e64068330f	334	CMD_r001_0011_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_A = 0x13, //!< 8'b00010011
whismanoid	0:68e64068330f	335	CMD_r001_0100_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_B = 0x14, //!< 8'b00010100
whismanoid	0:68e64068330f	336	CMD_r001_0101_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_A = 0x15, //!< 8'b00010101
whismanoid	0:68e64068330f	337	CMD_r001_0110_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_B = 0x16, //!< 8'b00010110
whismanoid	0:68e64068330f	338	CMD_r001_0111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_OFF = 0x17, //!< 8'b00010111
whismanoid	0:68e64068330f	339	CMD_r001_1000_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_1 = 0x18, //!< 8'b00011000
whismanoid	0:68e64068330f	340	CMD_r001_1001_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_2 = 0x19, //!< 8'b00011001
whismanoid	0:68e64068330f	341	CMD_r001_1010_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_4 = 0x1a, //!< 8'b00011010
whismanoid	0:68e64068330f	342	CMD_r001_1011_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_8 = 0x1b, //!< 8'b00011011
whismanoid	0:68e64068330f	343	CMD_r001_1100_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_16 = 0x1c, //!< 8'b00011100
whismanoid	0:68e64068330f	344	CMD_r001_1101_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_32 = 0x1d, //!< 8'b00011101
whismanoid	0:68e64068330f	345	CMD_r001_1110_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_64 = 0x1e, //!< 8'b00011110
whismanoid	0:68e64068330f	346	CMD_r001_1111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_128 = 0x1f, //!< 8'b00011111
whismanoid	0:68e64068330f	347	CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0 = 0x20, //!< 8'b00100000
whismanoid	0:68e64068330f	348	CMD_r010_0001_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH1 = 0x21, //!< 8'b00100001
whismanoid	0:68e64068330f	349	CMD_r010_0010_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH2 = 0x22, //!< 8'b00100010
whismanoid	0:68e64068330f	350	CMD_r010_0011_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH3 = 0x23, //!< 8'b00100011
whismanoid	0:68e64068330f	351	CMD_r010_0100_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH4 = 0x24, //!< 8'b00100100
whismanoid	0:68e64068330f	352	CMD_r010_0101_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH5 = 0x25, //!< 8'b00100101
whismanoid	0:68e64068330f	353	CMD_r010_0110_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH6 = 0x26, //!< 8'b00100110
whismanoid	0:68e64068330f	354	CMD_r010_0111_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH7 = 0x27, //!< 8'b00100111
whismanoid	0:68e64068330f	355	CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0 = 0x28, //!< 8'b00101000
whismanoid	0:68e64068330f	356	CMD_r010_1001_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH1 = 0x29, //!< 8'b00101001
whismanoid	0:68e64068330f	357	CMD_r010_1010_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH2 = 0x2a, //!< 8'b00101010
whismanoid	0:68e64068330f	358	CMD_r010_1011_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH3 = 0x2b, //!< 8'b00101011
whismanoid	0:68e64068330f	359	CMD_r010_1100_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH4 = 0x2c, //!< 8'b00101100
whismanoid	0:68e64068330f	360	CMD_r010_1101_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH5 = 0x2d, //!< 8'b00101101
whismanoid	0:68e64068330f	361	CMD_r010_1110_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH6 = 0x2e, //!< 8'b00101110
whismanoid	0:68e64068330f	362	CMD_r010_1111_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH7 = 0x2f, //!< 8'b00101111
whismanoid	0:68e64068330f	363	CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0 = 0x30, //!< 8'b00110000
whismanoid	0:68e64068330f	364	CMD_r011_0001_dddd_dddd_dddd_dddd_dddd_dddd_DATA1 = 0x31, //!< 8'b00110001
whismanoid	0:68e64068330f	365	CMD_r011_0010_dddd_dddd_dddd_dddd_dddd_dddd_DATA2 = 0x32, //!< 8'b00110010
whismanoid	0:68e64068330f	366	CMD_r011_0011_dddd_dddd_dddd_dddd_dddd_dddd_DATA3 = 0x33, //!< 8'b00110011
whismanoid	0:68e64068330f	367	CMD_r011_0100_dddd_dddd_dddd_dddd_dddd_dddd_DATA4 = 0x34, //!< 8'b00110100
whismanoid	0:68e64068330f	368	CMD_r011_0101_dddd_dddd_dddd_dddd_dddd_dddd_DATA5 = 0x35, //!< 8'b00110101
whismanoid	0:68e64068330f	369	CMD_r011_0110_dddd_dddd_dddd_dddd_dddd_dddd_DATA6 = 0x36, //!< 8'b00110110
whismanoid	0:68e64068330f	370	CMD_r011_0111_dddd_dddd_dddd_dddd_dddd_dddd_DATA7 = 0x37, //!< 8'b00110111
whismanoid	0:68e64068330f	371	CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS = 0x38, //!< 8'b00111000
whismanoid	0:68e64068330f	372	CMD_r011_1001_dddd_dddd_dddd_dddd_dxxd_dddd_STATUS_IE = 0x39, //!< 8'b00111001
whismanoid	0:68e64068330f	373	CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0 = 0x3a, //!< 8'b00111010
whismanoid	0:68e64068330f	374	CMD_r011_1011_xaaa_aaaa_dddd_dddd_UC_1 = 0x3b, //!< 8'b00111011
whismanoid	0:68e64068330f	375	CMD_r011_1100_xaaa_aaaa_dddd_dddd_UC_2 = 0x3c, //!< 8'b00111100
whismanoid	0:68e64068330f	376	CMD_r011_1101_xaaa_aaaa_dddd_dddd_UC_3 = 0x3d, //!< 8'b00111101
whismanoid	0:68e64068330f	377	CMD_r011_1110_xaaa_aaaa_dddd_dddd_UC_4 = 0x3e, //!< 8'b00111110
whismanoid	0:68e64068330f	378	CMD_r011_1111_xaaa_aaaa_dddd_dddd_UC_5 = 0x3f, //!< 8'b00111111
whismanoid	0:68e64068330f	379	CMD_r100_0000_xaaa_aaaa_dddd_dddd_UC_6 = 0x40, //!< 8'b01000000
whismanoid	0:68e64068330f	380	CMD_r100_0001_xaaa_aaaa_dddd_dddd_UC_7 = 0x41, //!< 8'b01000001
whismanoid	0:68e64068330f	381	CMD_r100_0010_xaaa_aaaa_dddd_dddd_UC_8 = 0x42, //!< 8'b01000010
whismanoid	0:68e64068330f	382	CMD_r100_0011_xaaa_aaaa_dddd_dddd_UC_9 = 0x43, //!< 8'b01000011
whismanoid	0:68e64068330f	383	CMD_r100_0100_xaaa_aaaa_dddd_dddd_UC_10 = 0x44, //!< 8'b01000100
whismanoid	0:68e64068330f	384	CMD_r100_0101_xaaa_aaaa_dddd_dddd_UC_11 = 0x45, //!< 8'b01000101
whismanoid	0:68e64068330f	385	CMD_r100_0110_xaaa_aaaa_dddd_dddd_UC_12 = 0x46, //!< 8'b01000110
whismanoid	0:68e64068330f	386	CMD_r100_0111_xaaa_aaaa_dddd_dddd_UC_13 = 0x47, //!< 8'b01000111
whismanoid	0:68e64068330f	387	CMD_r100_1000_xaaa_aaaa_dddd_dddd_UC_14 = 0x48, //!< 8'b01001000
whismanoid	0:68e64068330f	388	CMD_r100_1001_xaaa_aaaa_dddd_dddd_UC_15 = 0x49, //!< 8'b01001001
whismanoid	0:68e64068330f	389	CMD_r100_1010_xaaa_aaaa_dddd_dddd_UC_16 = 0x4a, //!< 8'b01001010
whismanoid	0:68e64068330f	390	CMD_r100_1011_xaaa_aaaa_dddd_dddd_UC_17 = 0x4b, //!< 8'b01001011
whismanoid	0:68e64068330f	391	CMD_r100_1100_xaaa_aaaa_dddd_dddd_UC_18 = 0x4c, //!< 8'b01001100
whismanoid	0:68e64068330f	392	CMD_r100_1101_xaaa_aaaa_dddd_dddd_UC_19 = 0x4d, //!< 8'b01001101
whismanoid	0:68e64068330f	393	CMD_r100_1110_xaaa_aaaa_dddd_dddd_UC_20 = 0x4e, //!< 8'b01001110
whismanoid	0:68e64068330f	394	CMD_r100_1111_xaaa_aaaa_dddd_dddd_UC_21 = 0x4f, //!< 8'b01001111
whismanoid	0:68e64068330f	395	CMD_r101_0000_xaaa_aaaa_dddd_dddd_UC_22 = 0x50, //!< 8'b01010000
whismanoid	0:68e64068330f	396	CMD_r101_0001_xaaa_aaaa_dddd_dddd_UC_23 = 0x51, //!< 8'b01010001
whismanoid	0:68e64068330f	397	CMD_r101_0010_xaaa_aaaa_dddd_dddd_UC_24 = 0x52, //!< 8'b01010010
whismanoid	0:68e64068330f	398	CMD_r101_0011_xaaa_aaaa_dddd_dddd_UC_25 = 0x53, //!< 8'b01010011
whismanoid	0:68e64068330f	399	CMD_r101_0100_xaaa_aaaa_dddd_dddd_UC_26 = 0x54, //!< 8'b01010100
whismanoid	0:68e64068330f	400	CMD_r101_0101_xaaa_aaaa_dddd_dddd_UC_27 = 0x55, //!< 8'b01010101
whismanoid	0:68e64068330f	401	CMD_r101_0110_xaaa_aaaa_dddd_dddd_UC_28 = 0x56, //!< 8'b01010110
whismanoid	0:68e64068330f	402	CMD_r101_0111_xaaa_aaaa_dddd_dddd_UC_29 = 0x57, //!< 8'b01010111
whismanoid	0:68e64068330f	403	CMD_r101_1000_xaaa_aaaa_dddd_dddd_UC_30 = 0x58, //!< 8'b01011000
whismanoid	0:68e64068330f	404	CMD_r101_1001_xaaa_aaaa_dddd_dddd_UC_31 = 0x59, //!< 8'b01011001
whismanoid	0:68e64068330f	405	CMD_r101_1010_xaaa_aaaa_dddd_dddd_UC_32 = 0x5a, //!< 8'b01011010
whismanoid	0:68e64068330f	406	CMD_r101_1011_xaaa_aaaa_dddd_dddd_UC_33 = 0x5b, //!< 8'b01011011
whismanoid	0:68e64068330f	407	CMD_r101_1100_xaaa_aaaa_dddd_dddd_UC_34 = 0x5c, //!< 8'b01011100
whismanoid	0:68e64068330f	408	CMD_r101_1101_xaaa_aaaa_dddd_dddd_UC_35 = 0x5d, //!< 8'b01011101
whismanoid	0:68e64068330f	409	CMD_r101_1110_xaaa_aaaa_dddd_dddd_UC_36 = 0x5e, //!< 8'b01011110
whismanoid	0:68e64068330f	410	CMD_r101_1111_xaaa_aaaa_dddd_dddd_UC_37 = 0x5f, //!< 8'b01011111
whismanoid	0:68e64068330f	411	CMD_r110_0000_xaaa_aaaa_dddd_dddd_UC_38 = 0x60, //!< 8'b01100000
whismanoid	0:68e64068330f	412	CMD_r110_0001_xaaa_aaaa_dddd_dddd_UC_39 = 0x61, //!< 8'b01100001
whismanoid	0:68e64068330f	413	CMD_r110_0010_xaaa_aaaa_dddd_dddd_UC_40 = 0x62, //!< 8'b01100010
whismanoid	0:68e64068330f	414	CMD_r110_0011_xaaa_aaaa_dddd_dddd_UC_41 = 0x63, //!< 8'b01100011
whismanoid	0:68e64068330f	415	CMD_r110_0100_xaaa_aaaa_dddd_dddd_UC_42 = 0x64, //!< 8'b01100100
whismanoid	0:68e64068330f	416	CMD_r110_0101_xaaa_aaaa_dddd_dddd_UC_43 = 0x65, //!< 8'b01100101
whismanoid	0:68e64068330f	417	CMD_r110_0110_xaaa_aaaa_dddd_dddd_UC_44 = 0x66, //!< 8'b01100110
whismanoid	0:68e64068330f	418	CMD_r110_0111_xaaa_aaaa_dddd_dddd_UC_45 = 0x67, //!< 8'b01100111
whismanoid	0:68e64068330f	419	CMD_r110_1000_xaaa_aaaa_dddd_dddd_UC_46 = 0x68, //!< 8'b01101000
whismanoid	0:68e64068330f	420	CMD_r110_1001_xaaa_aaaa_dddd_dddd_UC_47 = 0x69, //!< 8'b01101001
whismanoid	0:68e64068330f	421	CMD_r110_1010_xaaa_aaaa_dddd_dddd_UC_48 = 0x6a, //!< 8'b01101010
whismanoid	0:68e64068330f	422	CMD_r110_1011_xaaa_aaaa_dddd_dddd_UC_49 = 0x6b, //!< 8'b01101011
whismanoid	0:68e64068330f	423	CMD_r110_1100_xaaa_aaaa_dddd_dddd_UC_50 = 0x6c, //!< 8'b01101100
whismanoid	0:68e64068330f	424	CMD_r110_1101_xaaa_aaaa_dddd_dddd_UC_51 = 0x6d, //!< 8'b01101101
whismanoid	0:68e64068330f	425	CMD_r110_1110_xaaa_aaaa_dddd_dddd_UC_52 = 0x6e, //!< 8'b01101110
whismanoid	0:68e64068330f	426	CMD_r110_1111_xxxx_xxxx_xaaa_aaaa_UCADDR = 0x6f, //!< 8'b01101111
whismanoid	0:68e64068330f	427	CMD_1aaa_aaaa_REGISTER_READ = 0x80, //!< 8'b10000000
whismanoid	0:68e64068330f	428	} MAX11410_CMD_enum_t;
whismanoid	0:68e64068330f	429
whismanoid	0:68e64068330f	430	// CODE GENERATOR: TypedefEnum MAX11410_SEQ_ADDR_enum_t
whismanoid	0:68e64068330f	431	//----------------------------------------
whismanoid	0:68e64068330f	432	/// Microcode Sequencer Addresses.
whismanoid	0:68e64068330f	433	/// CMD_r000_0010_xddd_dddd_SEQ_START
whismanoid	0:68e64068330f	434	/// CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR
whismanoid	0:68e64068330f	435	///
whismanoid	0:68e64068330f	436	/// Naming convention is CMD_bitstream_FUNCTION_NAME
whismanoid	0:68e64068330f	437	/// - xaaa_aaaa = 7-bit register address field
whismanoid	0:68e64068330f	438	/// - dddd_dddd = 8-bit register data field
whismanoid	0:68e64068330f	439	/// - xxxx = don't care
whismanoid	0:68e64068330f	440	typedef enum MAX11410_SEQ_ADDR_enum_t {
whismanoid	0:68e64068330f	441	SEQ_ADDR_r011_1010_xaaa_aaaa_dddd_dddd_UC_0 = 0x3a, //!< 8'b00111010
whismanoid	0:68e64068330f	442	SEQ_ADDR_r011_1011_xaaa_aaaa_dddd_dddd_UC_1 = 0x3b, //!< 8'b00111011
whismanoid	0:68e64068330f	443	SEQ_ADDR_r011_1100_xaaa_aaaa_dddd_dddd_UC_2 = 0x3c, //!< 8'b00111100
whismanoid	0:68e64068330f	444	SEQ_ADDR_r011_1101_xaaa_aaaa_dddd_dddd_UC_3 = 0x3d, //!< 8'b00111101
whismanoid	0:68e64068330f	445	SEQ_ADDR_r011_1110_xaaa_aaaa_dddd_dddd_UC_4 = 0x3e, //!< 8'b00111110
whismanoid	0:68e64068330f	446	SEQ_ADDR_r011_1111_xaaa_aaaa_dddd_dddd_UC_5 = 0x3f, //!< 8'b00111111
whismanoid	0:68e64068330f	447	SEQ_ADDR_r100_0000_xaaa_aaaa_dddd_dddd_UC_6 = 0x40, //!< 8'b01000000
whismanoid	0:68e64068330f	448	SEQ_ADDR_r100_0001_xaaa_aaaa_dddd_dddd_UC_7 = 0x41, //!< 8'b01000001
whismanoid	0:68e64068330f	449	SEQ_ADDR_r100_0010_xaaa_aaaa_dddd_dddd_UC_8 = 0x42, //!< 8'b01000010
whismanoid	0:68e64068330f	450	SEQ_ADDR_r100_0011_xaaa_aaaa_dddd_dddd_UC_9 = 0x43, //!< 8'b01000011
whismanoid	0:68e64068330f	451	SEQ_ADDR_r100_0100_xaaa_aaaa_dddd_dddd_UC_10 = 0x44, //!< 8'b01000100
whismanoid	0:68e64068330f	452	SEQ_ADDR_r100_0101_xaaa_aaaa_dddd_dddd_UC_11 = 0x45, //!< 8'b01000101
whismanoid	0:68e64068330f	453	SEQ_ADDR_r100_0110_xaaa_aaaa_dddd_dddd_UC_12 = 0x46, //!< 8'b01000110
whismanoid	0:68e64068330f	454	SEQ_ADDR_r100_0111_xaaa_aaaa_dddd_dddd_UC_13 = 0x47, //!< 8'b01000111
whismanoid	0:68e64068330f	455	SEQ_ADDR_r100_1000_xaaa_aaaa_dddd_dddd_UC_14 = 0x48, //!< 8'b01001000
whismanoid	0:68e64068330f	456	SEQ_ADDR_r100_1001_xaaa_aaaa_dddd_dddd_UC_15 = 0x49, //!< 8'b01001001
whismanoid	0:68e64068330f	457	SEQ_ADDR_r100_1010_xaaa_aaaa_dddd_dddd_UC_16 = 0x4a, //!< 8'b01001010
whismanoid	0:68e64068330f	458	SEQ_ADDR_r100_1011_xaaa_aaaa_dddd_dddd_UC_17 = 0x4b, //!< 8'b01001011
whismanoid	0:68e64068330f	459	SEQ_ADDR_r100_1100_xaaa_aaaa_dddd_dddd_UC_18 = 0x4c, //!< 8'b01001100
whismanoid	0:68e64068330f	460	SEQ_ADDR_r100_1101_xaaa_aaaa_dddd_dddd_UC_19 = 0x4d, //!< 8'b01001101
whismanoid	0:68e64068330f	461	SEQ_ADDR_r100_1110_xaaa_aaaa_dddd_dddd_UC_20 = 0x4e, //!< 8'b01001110
whismanoid	0:68e64068330f	462	SEQ_ADDR_r100_1111_xaaa_aaaa_dddd_dddd_UC_21 = 0x4f, //!< 8'b01001111
whismanoid	0:68e64068330f	463	SEQ_ADDR_r101_0000_xaaa_aaaa_dddd_dddd_UC_22 = 0x50, //!< 8'b01010000
whismanoid	0:68e64068330f	464	SEQ_ADDR_r101_0001_xaaa_aaaa_dddd_dddd_UC_23 = 0x51, //!< 8'b01010001
whismanoid	0:68e64068330f	465	SEQ_ADDR_r101_0010_xaaa_aaaa_dddd_dddd_UC_24 = 0x52, //!< 8'b01010010
whismanoid	0:68e64068330f	466	SEQ_ADDR_r101_0011_xaaa_aaaa_dddd_dddd_UC_25 = 0x53, //!< 8'b01010011
whismanoid	0:68e64068330f	467	SEQ_ADDR_r101_0100_xaaa_aaaa_dddd_dddd_UC_26 = 0x54, //!< 8'b01010100
whismanoid	0:68e64068330f	468	SEQ_ADDR_r101_0101_xaaa_aaaa_dddd_dddd_UC_27 = 0x55, //!< 8'b01010101
whismanoid	0:68e64068330f	469	SEQ_ADDR_r101_0110_xaaa_aaaa_dddd_dddd_UC_28 = 0x56, //!< 8'b01010110
whismanoid	0:68e64068330f	470	SEQ_ADDR_r101_0111_xaaa_aaaa_dddd_dddd_UC_29 = 0x57, //!< 8'b01010111
whismanoid	0:68e64068330f	471	SEQ_ADDR_r101_1000_xaaa_aaaa_dddd_dddd_UC_30 = 0x58, //!< 8'b01011000
whismanoid	0:68e64068330f	472	SEQ_ADDR_r101_1001_xaaa_aaaa_dddd_dddd_UC_31 = 0x59, //!< 8'b01011001
whismanoid	0:68e64068330f	473	SEQ_ADDR_r101_1010_xaaa_aaaa_dddd_dddd_UC_32 = 0x5a, //!< 8'b01011010
whismanoid	0:68e64068330f	474	SEQ_ADDR_r101_1011_xaaa_aaaa_dddd_dddd_UC_33 = 0x5b, //!< 8'b01011011
whismanoid	0:68e64068330f	475	SEQ_ADDR_r101_1100_xaaa_aaaa_dddd_dddd_UC_34 = 0x5c, //!< 8'b01011100
whismanoid	0:68e64068330f	476	SEQ_ADDR_r101_1101_xaaa_aaaa_dddd_dddd_UC_35 = 0x5d, //!< 8'b01011101
whismanoid	0:68e64068330f	477	SEQ_ADDR_r101_1110_xaaa_aaaa_dddd_dddd_UC_36 = 0x5e, //!< 8'b01011110
whismanoid	0:68e64068330f	478	SEQ_ADDR_r101_1111_xaaa_aaaa_dddd_dddd_UC_37 = 0x5f, //!< 8'b01011111
whismanoid	0:68e64068330f	479	SEQ_ADDR_r110_0000_xaaa_aaaa_dddd_dddd_UC_38 = 0x60, //!< 8'b01100000
whismanoid	0:68e64068330f	480	SEQ_ADDR_r110_0001_xaaa_aaaa_dddd_dddd_UC_39 = 0x61, //!< 8'b01100001
whismanoid	0:68e64068330f	481	SEQ_ADDR_r110_0010_xaaa_aaaa_dddd_dddd_UC_40 = 0x62, //!< 8'b01100010
whismanoid	0:68e64068330f	482	SEQ_ADDR_r110_0011_xaaa_aaaa_dddd_dddd_UC_41 = 0x63, //!< 8'b01100011
whismanoid	0:68e64068330f	483	SEQ_ADDR_r110_0100_xaaa_aaaa_dddd_dddd_UC_42 = 0x64, //!< 8'b01100100
whismanoid	0:68e64068330f	484	SEQ_ADDR_r110_0101_xaaa_aaaa_dddd_dddd_UC_43 = 0x65, //!< 8'b01100101
whismanoid	0:68e64068330f	485	SEQ_ADDR_r110_0110_xaaa_aaaa_dddd_dddd_UC_44 = 0x66, //!< 8'b01100110
whismanoid	0:68e64068330f	486	SEQ_ADDR_r110_0111_xaaa_aaaa_dddd_dddd_UC_45 = 0x67, //!< 8'b01100111
whismanoid	0:68e64068330f	487	SEQ_ADDR_r110_1000_xaaa_aaaa_dddd_dddd_UC_46 = 0x68, //!< 8'b01101000
whismanoid	0:68e64068330f	488	SEQ_ADDR_r110_1001_xaaa_aaaa_dddd_dddd_UC_47 = 0x69, //!< 8'b01101001
whismanoid	0:68e64068330f	489	SEQ_ADDR_r110_1010_xaaa_aaaa_dddd_dddd_UC_48 = 0x6a, //!< 8'b01101010
whismanoid	0:68e64068330f	490	SEQ_ADDR_r110_1011_xaaa_aaaa_dddd_dddd_UC_49 = 0x6b, //!< 8'b01101011
whismanoid	0:68e64068330f	491	SEQ_ADDR_r110_1100_xaaa_aaaa_dddd_dddd_UC_50 = 0x6c, //!< 8'b01101100
whismanoid	0:68e64068330f	492	SEQ_ADDR_r110_1101_xaaa_aaaa_dddd_dddd_UC_51 = 0x6d, //!< 8'b01101101
whismanoid	0:68e64068330f	493	SEQ_ADDR_r110_1110_xaaa_aaaa_dddd_dddd_UC_52 = 0x6e, //!< 8'b01101110
whismanoid	0:68e64068330f	494	} MAX11410_SEQ_ADDR_enum_t;
whismanoid	0:68e64068330f	495
whismanoid	0:68e64068330f	496	// CODE GENERATOR: TypedefEnum MAX11410_PD_enum_t
whismanoid	0:68e64068330f	497	//----------------------------------------
whismanoid	0:68e64068330f	498	/// Power-down state command
whismanoid	0:68e64068330f	499	/// CMD_r000_0000_xxxx_xxdd_PD PD[1:0] field
whismanoid	0:68e64068330f	500	///
whismanoid	0:68e64068330f	501	/// - 00: Normal mode
whismanoid	0:68e64068330f	502	/// - 01: Standby mode -- Powers down all analog circuity, but not the internal voltage regulator
whismanoid	0:68e64068330f	503	/// - 10: Sleep mode -- Powers down all analog circuitry including the internal voltage regulator
whismanoid	0:68e64068330f	504	/// - 11: Reset -- all registers reset to POR state (Self Clearing to 01 Standby mode)
whismanoid	0:68e64068330f	505	typedef enum MAX11410_PD_enum_t {
whismanoid	0:68e64068330f	506	PD_00_Normal = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	507	PD_01_Standby = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	508	PD_10_Sleep = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	509	PD_11_Reset = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	510	} MAX11410_PD_enum_t;
whismanoid	0:68e64068330f	511
whismanoid	0:68e64068330f	512	// CODE GENERATOR: TypedefEnum MAX11410_DEST_enum_t
whismanoid	0:68e64068330f	513	//----------------------------------------
whismanoid	0:68e64068330f	514	/// Conversion / seqeuncer start command
whismanoid	0:68e64068330f	515	/// CMD_r000_0001_xddd_xxdd_CONV_START DEST[2:0] field.
whismanoid	0:68e64068330f	516	/// CMD_r000_0110_xddd_xxdd_GP_CONV GP_DEST[2:0] field.
whismanoid	0:68e64068330f	517	///
whismanoid	0:68e64068330f	518	/// - 000: Store result in DATA0
whismanoid	0:68e64068330f	519	/// - 001: Store result in DATA1
whismanoid	0:68e64068330f	520	/// - 010: Store result in DATA2
whismanoid	0:68e64068330f	521	/// - 011: Store result in DATA3
whismanoid	0:68e64068330f	522	/// - 100: Store result in DATA4
whismanoid	0:68e64068330f	523	/// - 101: Store result in DATA5
whismanoid	0:68e64068330f	524	/// - 110: Store result in DATA6
whismanoid	0:68e64068330f	525	/// - 111: Store result in DATA7
whismanoid	0:68e64068330f	526	typedef enum MAX11410_DEST_enum_t {
whismanoid	0:68e64068330f	527	DEST_000_DATA0 = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	528	DEST_001_DATA1 = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	529	DEST_010_DATA2 = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	530	DEST_011_DATA3 = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	531	DEST_100_DATA4 = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	532	DEST_101_DATA5 = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	533	DEST_110_DATA6 = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	534	DEST_111_DATA7 = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	535	} MAX11410_DEST_enum_t;
whismanoid	0:68e64068330f	536
whismanoid	0:68e64068330f	537	// CODE GENERATOR: TypedefEnum MAX11410_CONV_TYPE_enum_t
whismanoid	0:68e64068330f	538	//----------------------------------------
whismanoid	0:68e64068330f	539	/// Conversion / seqeuncer start command
whismanoid	0:68e64068330f	540	/// CMD_r000_0001_xddd_xxdd_CONV_START CONV_TYPE[1:0] field.
whismanoid	0:68e64068330f	541	/// CMD_r000_0110_xddd_xxdd_GP_CONV GP_CONV_TYPE[2:0] field.
whismanoid	0:68e64068330f	542	///
whismanoid	0:68e64068330f	543	/// - 00: Single conversion
whismanoid	0:68e64068330f	544	/// - 01: Continuous conversions
whismanoid	0:68e64068330f	545	/// - 10, 11: 1:4 Duty cycled conversions (modulator low-power mode)
whismanoid	0:68e64068330f	546	typedef enum MAX11410_CONV_TYPE_enum_t {
whismanoid	0:68e64068330f	547	CONV_TYPE_00_Single = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	548	CONV_TYPE_01_Continuous = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	549	CONV_TYPE_10_DutyCycle_1_4 = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	550	CONV_TYPE_11_DutyCycle_1_4 = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	551	} MAX11410_CONV_TYPE_enum_t;
whismanoid	0:68e64068330f	552
whismanoid	0:68e64068330f	553	// CODE GENERATOR: TypedefEnum MAX11410_CAL_TYPE_enum_t
whismanoid	0:68e64068330f	554	//----------------------------------------
whismanoid	0:68e64068330f	555	/// Calbration command
whismanoid	0:68e64068330f	556	/// CMD_r000_0011_xxxx_xddd_CAL_START CAL_TYPE[2:0] field
whismanoid	0:68e64068330f	557	///
whismanoid	0:68e64068330f	558	/// - 000: Performs a self-calibration. Resulting offset calibration value is stored in the SELF_OFF register, and the 1x gain calibration value is stored in the SELF_GAIN_1 register.
whismanoid	0:68e64068330f	559	/// - 001: Performs a PGA gain calibration at the currently programmed PGA gain. A 'No Op' will result if PGA Gain calibration is executed with the PGA disabled via the SIG_PATH register, or with the GAIN register set to 1x.The resulting gain calibration value is stored in the SELF_GAIN_[2-128] register corresponding to the currently programmed PGA GAIN setting.
whismanoid	0:68e64068330f	560	/// - 010: Reserved
whismanoid	0:68e64068330f	561	/// - 011: Reserved
whismanoid	0:68e64068330f	562	/// - 100: Performs a system offset calibration. The resulting calibration value is stored in the SYS_OFF_A register.
whismanoid	0:68e64068330f	563	/// - 101: Performs a system gain calibration. The resulting calibration value is stored in the SYS_GAIN_A register.
whismanoid	0:68e64068330f	564	/// - 110: Performs a system offset calibration. The resulting calibration value is stored in the SYS_OFF_B register.
whismanoid	0:68e64068330f	565	/// - 111: Performs a system gain calibration. The resulting calibration value is stored in the SYS_GAIN_B register.
whismanoid	0:68e64068330f	566	typedef enum MAX11410_CAL_TYPE_enum_t {
whismanoid	0:68e64068330f	567	CAL_TYPE_000_SELF_CAL = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	568	CAL_TYPE_001_PGA_GAIN = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	569	CAL_TYPE_010_reserved = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	570	CAL_TYPE_011_reserved = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	571	CAL_TYPE_100_SYS_OFF_A = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	572	CAL_TYPE_101_SYS_GAIN_A = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	573	CAL_TYPE_110_SYS_OFF_B = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	574	CAL_TYPE_111_SYS_GAIN_B = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	575	} MAX11410_CAL_TYPE_enum_t;
whismanoid	0:68e64068330f	576
whismanoid	0:68e64068330f	577	// CODE GENERATOR: TypedefEnum MAX11410_GP0_DIR_enum_t
whismanoid	0:68e64068330f	578	//----------------------------------------
whismanoid	0:68e64068330f	579	/// GPIO0 pin command
whismanoid	0:68e64068330f	580	/// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_DIR[1:0] field
whismanoid	0:68e64068330f	581	///
whismanoid	0:68e64068330f	582	/// - 00: Input mode, reference to VDDIO (default)
whismanoid	0:68e64068330f	583	/// - 01: Reserved
whismanoid	0:68e64068330f	584	/// - 10: Output mode, open-drain output
whismanoid	0:68e64068330f	585	/// - 11: Output mode, CMOS output
whismanoid	0:68e64068330f	586	typedef enum MAX11410_GP0_DIR_enum_t {
whismanoid	0:68e64068330f	587	GP0_DIR_000_Input = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	588	GP0_DIR_001_reserved = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	589	GP0_DIR_010_OutputOpenDrain = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	590	GP0_DIR_011_Output = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	591	} MAX11410_GP0_DIR_enum_t;
whismanoid	0:68e64068330f	592
whismanoid	0:68e64068330f	593	// CODE GENERATOR: TypedefEnum MAX11410_GP0_ISEL_enum_t
whismanoid	0:68e64068330f	594	//----------------------------------------
whismanoid	0:68e64068330f	595	/// GPIO0 pin command
whismanoid	0:68e64068330f	596	/// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_ISEL[1:0] field
whismanoid	0:68e64068330f	597	///
whismanoid	0:68e64068330f	598	/// - 00: GPIO_0 input disabled (default)
whismanoid	0:68e64068330f	599	/// - 01: GPIO_0 input configured as rising-edge-triggered conversion start
whismanoid	0:68e64068330f	600	/// - 10: GPIO_0 input configured as rising-edge-triggered sequence start from GP_SEQ_ADDR
whismanoid	0:68e64068330f	601	/// - 11: Reserved
whismanoid	0:68e64068330f	602	typedef enum MAX11410_GP0_ISEL_enum_t {
whismanoid	0:68e64068330f	603	GP0_ISEL_000_disabled = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	604	GP0_ISEL_001_TRIGGER_CONV_START = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	605	GP0_ISEL_010_TRIGGER_SEQ_START = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	606	GP0_ISEL_011_reserved = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	607	} MAX11410_GP0_ISEL_enum_t;
whismanoid	0:68e64068330f	608
whismanoid	0:68e64068330f	609	// CODE GENERATOR: TypedefEnum MAX11410_GP0_OSEL_enum_t
whismanoid	0:68e64068330f	610	//----------------------------------------
whismanoid	0:68e64068330f	611	/// GPIO0 pin command
whismanoid	0:68e64068330f	612	/// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_OSEL[2:0] field
whismanoid	0:68e64068330f	613	///
whismanoid	0:68e64068330f	614	/// - 000: GPIO_0 output disabled, high Z (default)
whismanoid	0:68e64068330f	615	/// - 001: GPIO_0 output is configured as INTRB (active low)
whismanoid	0:68e64068330f	616	/// - 010: GPIO_0 output is configured as INTR (active high)
whismanoid	0:68e64068330f	617	/// - 011: GPIO_0 output is configured as state Logic 0
whismanoid	0:68e64068330f	618	/// - 100: GPIO_0 output is configured as state Logic 1
whismanoid	0:68e64068330f	619	/// - 101: GPIO_0 output is configured as automatic low-side switch operation (CMOS output mode overridden)
whismanoid	0:68e64068330f	620	/// - 110: GPIO_0 output is configured as modulator active status
whismanoid	0:68e64068330f	621	/// - 111: GPIO_0 output is configured as system clock (2.456Mhz Nominal)
whismanoid	0:68e64068330f	622	typedef enum MAX11410_GP0_OSEL_enum_t {
whismanoid	0:68e64068330f	623	GP0_OSEL_000_disabled = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	624	GP0_OSEL_001_INTRB = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	625	GP0_OSEL_010_INTR = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	626	GP0_OSEL_011_LOGIC_0 = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	627	GP0_OSEL_100_LOGIC_1 = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	628	GP0_OSEL_101_AUTO_LOWSIDE_SWITCH = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	629	GP0_OSEL_110_MODULATOR_ACTIVE_STATUS = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	630	GP0_OSEL_111_CLOCK_2M456 = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	631	} MAX11410_GP0_OSEL_enum_t;
whismanoid	0:68e64068330f	632
whismanoid	0:68e64068330f	633	// CODE GENERATOR: TypedefEnum MAX11410_GP1_DIR_enum_t
whismanoid	0:68e64068330f	634	//----------------------------------------
whismanoid	0:68e64068330f	635	/// GPIO1 pin command
whismanoid	0:68e64068330f	636	/// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_DIR[1:0] field
whismanoid	0:68e64068330f	637	///
whismanoid	0:68e64068330f	638	/// - 00: Input mode, reference to VDDIO (default)
whismanoid	0:68e64068330f	639	/// - 01: Reserved
whismanoid	0:68e64068330f	640	/// - 10: Output mode, open-drain output
whismanoid	0:68e64068330f	641	/// - 11: Output mode, CMOS output
whismanoid	0:68e64068330f	642	typedef enum MAX11410_GP1_DIR_enum_t {
whismanoid	0:68e64068330f	643	GP1_DIR_000_Input = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	644	GP1_DIR_001_reserved = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	645	GP1_DIR_010_OutputOpenDrain = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	646	GP1_DIR_011_Output = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	647	} MAX11410_GP1_DIR_enum_t;
whismanoid	0:68e64068330f	648
whismanoid	0:68e64068330f	649	// CODE GENERATOR: TypedefEnum MAX11410_GP1_ISEL_enum_t
whismanoid	0:68e64068330f	650	//----------------------------------------
whismanoid	0:68e64068330f	651	/// GPIO1 pin command
whismanoid	0:68e64068330f	652	/// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_ISEL[1:0] field
whismanoid	0:68e64068330f	653	///
whismanoid	0:68e64068330f	654	/// - 00: GPIO_1 input disabled (default)
whismanoid	0:68e64068330f	655	/// - 01: GPIO_1 input configured as rising-edge-triggered conversion start
whismanoid	0:68e64068330f	656	/// - 10: GPIO_1 input configured as rising-edge-triggered sequence start from GP_SEQ_ADDR
whismanoid	0:68e64068330f	657	/// - 11: Reserved
whismanoid	0:68e64068330f	658	typedef enum MAX11410_GP1_ISEL_enum_t {
whismanoid	0:68e64068330f	659	GP1_ISEL_000_disabled = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	660	GP1_ISEL_001_TRIGGER_CONV_START = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	661	GP1_ISEL_010_TRIGGER_SEQ_START = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	662	GP1_ISEL_011_reserved = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	663	} MAX11410_GP1_ISEL_enum_t;
whismanoid	0:68e64068330f	664
whismanoid	0:68e64068330f	665	// CODE GENERATOR: TypedefEnum MAX11410_GP1_OSEL_enum_t
whismanoid	0:68e64068330f	666	//----------------------------------------
whismanoid	0:68e64068330f	667	/// GPIO1 pin command
whismanoid	0:68e64068330f	668	/// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_OSEL[2:0] field
whismanoid	0:68e64068330f	669	///
whismanoid	0:68e64068330f	670	/// - 000: GPIO_1 output disabled, high Z (default)
whismanoid	0:68e64068330f	671	/// - 001: GPIO_1 output is configured as INTRB (active low)
whismanoid	0:68e64068330f	672	/// - 010: GPIO_1 output is configured as INTR (active high)
whismanoid	0:68e64068330f	673	/// - 011: GPIO_1 output is configured as state Logic 0
whismanoid	0:68e64068330f	674	/// - 100: GPIO_1 output is configured as state Logic 1
whismanoid	0:68e64068330f	675	/// - 101: GPIO_1 output is configured as system clock (2.456Mhz Nominal)
whismanoid	0:68e64068330f	676	/// - 110: GPIO_1 output is configured as modulator active status
whismanoid	0:68e64068330f	677	/// - 111: GPIO_1 output is configured as automatic low-side switch operation (CMOS output mode overridden)
whismanoid	0:68e64068330f	678	typedef enum MAX11410_GP1_OSEL_enum_t {
whismanoid	0:68e64068330f	679	GP1_OSEL_000_disabled = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	680	GP1_OSEL_001_INTRB = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	681	GP1_OSEL_010_INTR = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	682	GP1_OSEL_011_LOGIC_0 = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	683	GP1_OSEL_100_LOGIC_1 = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	684	GP1_OSEL_101_AUTO_LOWSIDE_SWITCH = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	685	GP1_OSEL_110_MODULATOR_ACTIVE_STATUS = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	686	GP1_OSEL_111_CLOCK_2M456 = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	687	} MAX11410_GP1_OSEL_enum_t;
whismanoid	0:68e64068330f	688
whismanoid	0:68e64068330f	689	// CODE GENERATOR: TypedefEnum MAX11410_LINEF_enum_t
whismanoid	0:68e64068330f	690	//----------------------------------------
whismanoid	0:68e64068330f	691	/// Filter command
whismanoid	0:68e64068330f	692	/// CMD_r000_1000_x0dd_dddd_FILTER LINEF[1:0] field
whismanoid	0:68e64068330f	693	///
whismanoid	0:68e64068330f	694	/// - 00: Simultaneous 50/60Hz FIR rejection (default)
whismanoid	0:68e64068330f	695	/// - 01: 50Hz FIR rejection
whismanoid	0:68e64068330f	696	/// - 10: 60Hz FIR rejection
whismanoid	0:68e64068330f	697	/// - 11: SINC4
whismanoid	0:68e64068330f	698	typedef enum MAX11410_LINEF_enum_t {
whismanoid	0:68e64068330f	699	LINEF_00_50Hz_60Hz_FIR = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	700	LINEF_01_50Hz_FIR = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	701	LINEF_10_60Hz_FIR = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	702	LINEF_11_SINC4 = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	703	} MAX11410_LINEF_enum_t;
whismanoid	0:68e64068330f	704
whismanoid	0:68e64068330f	705	// CODE GENERATOR: TypedefEnum MAX11410_RATE_enum_t
whismanoid	0:68e64068330f	706	//----------------------------------------
whismanoid	0:68e64068330f	707	/// Filter command
whismanoid	0:68e64068330f	708	/// CMD_r000_1000_x0dd_dddd_FILTER RATE[3:0] field
whismanoid	0:68e64068330f	709	///
whismanoid	0:68e64068330f	710	/// Sets conversion rate based on LINEF value. See Table 9a through Table 9d for details.
whismanoid	0:68e64068330f	711	///
whismanoid	0:68e64068330f	712	/// Table 9a. LINEF = 00 Data Rate and Filter Rejection Settings
whismanoid	0:68e64068330f	713	///
whismanoid	0:68e64068330f	714	/// Rate \| LINEF \| CONV_TYPE \| Rate
whismanoid	0:68e64068330f	715	/// -----------\|------------------------\|----------------------------\|----------
whismanoid	0:68e64068330f	716	/// RATE_0000 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_00_Single \| 1.0SPS
whismanoid	0:68e64068330f	717	/// RATE_0001 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_00_Single \| 2.0SPS
whismanoid	0:68e64068330f	718	/// RATE_0010 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_00_Single \| 4.0SPS
whismanoid	0:68e64068330f	719	/// RATE_0011 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_00_Single \| 8.0SPS
whismanoid	0:68e64068330f	720	/// RATE_0100 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_00_Single \| 16.0SPS
whismanoid	0:68e64068330f	721	/// RATE_0000 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_01_Continuous \| 1.1SPS
whismanoid	0:68e64068330f	722	/// RATE_0001 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_01_Continuous \| 2.1SPS
whismanoid	0:68e64068330f	723	/// RATE_0010 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_01_Continuous \| 4.2SPS
whismanoid	0:68e64068330f	724	/// RATE_0011 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_01_Continuous \| 8.4SPS
whismanoid	0:68e64068330f	725	/// RATE_0100 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_01_Continuous \| 16.8SPS
whismanoid	0:68e64068330f	726	/// RATE_0000 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.3SPS
whismanoid	0:68e64068330f	727	/// RATE_0001 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.5SPS
whismanoid	0:68e64068330f	728	/// RATE_0010 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 1.1SPS
whismanoid	0:68e64068330f	729	/// RATE_0011 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 2.1SPS
whismanoid	0:68e64068330f	730	/// RATE_0100 \| LINEF_00_50Hz_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 4.2SPS
whismanoid	0:68e64068330f	731	///
whismanoid	0:68e64068330f	732	/// Table 9b. LINEF = 01 Data Rate and Filter Rejection Settings
whismanoid	0:68e64068330f	733	///
whismanoid	0:68e64068330f	734	/// Rate \| LINEF \| CONV_TYPE \| Rate
whismanoid	0:68e64068330f	735	/// ----------\|------------------------\|----------------------------\|----------
whismanoid	0:68e64068330f	736	/// RATE_0000 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 1.3SPS
whismanoid	0:68e64068330f	737	/// RATE_0001 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 2.5SPS
whismanoid	0:68e64068330f	738	/// RATE_0010 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 5.0SPS
whismanoid	0:68e64068330f	739	/// RATE_0011 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 10.0SPS
whismanoid	0:68e64068330f	740	/// RATE_0100 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 20.0SPS
whismanoid	0:68e64068330f	741	/// RATE_0101 \| LINEF_01_50Hz_FIR \| CONV_TYPE_00_Single \| 35.6SPS
whismanoid	0:68e64068330f	742	/// RATE_0000 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 1.3SPS
whismanoid	0:68e64068330f	743	/// RATE_0001 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 2.7SPS
whismanoid	0:68e64068330f	744	/// RATE_0010 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 5.3SPS
whismanoid	0:68e64068330f	745	/// RATE_0011 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 10.7SPS
whismanoid	0:68e64068330f	746	/// RATE_0100 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 21.3SPS
whismanoid	0:68e64068330f	747	/// RATE_0101 \| LINEF_01_50Hz_FIR \| CONV_TYPE_01_Continuous \| 40.0SPS
whismanoid	0:68e64068330f	748	/// RATE_0000 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.3SPS
whismanoid	0:68e64068330f	749	/// RATE_0001 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.7SPS
whismanoid	0:68e64068330f	750	/// RATE_0010 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 1.3SPS
whismanoid	0:68e64068330f	751	/// RATE_0011 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 2.7SPS
whismanoid	0:68e64068330f	752	/// RATE_0100 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 5.3SPS
whismanoid	0:68e64068330f	753	/// RATE_0101 \| LINEF_01_50Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 10.0SPS
whismanoid	0:68e64068330f	754	///
whismanoid	0:68e64068330f	755	/// Table 9c. LINEF = 10 Data Rate and Filter Rejection Settings
whismanoid	0:68e64068330f	756	///
whismanoid	0:68e64068330f	757	/// Rate \| LINEF \| CONV_TYPE \| Rate
whismanoid	0:68e64068330f	758	/// ----------\|------------------------\|----------------------------\|----------
whismanoid	0:68e64068330f	759	/// RATE_0000 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 1.3SPS
whismanoid	0:68e64068330f	760	/// RATE_0001 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 2.5SPS
whismanoid	0:68e64068330f	761	/// RATE_0010 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 5.0SPS
whismanoid	0:68e64068330f	762	/// RATE_0011 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 10.0SPS
whismanoid	0:68e64068330f	763	/// RATE_0100 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 20.0SPS
whismanoid	0:68e64068330f	764	/// RATE_0101 \| LINEF_10_60Hz_FIR \| CONV_TYPE_00_Single \| 35.6SPS
whismanoid	0:68e64068330f	765	/// RATE_0000 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 1.3SPS
whismanoid	0:68e64068330f	766	/// RATE_0001 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 2.7SPS
whismanoid	0:68e64068330f	767	/// RATE_0010 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 5.3SPS
whismanoid	0:68e64068330f	768	/// RATE_0011 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 10.7SPS
whismanoid	0:68e64068330f	769	/// RATE_0100 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 21.3SPS
whismanoid	0:68e64068330f	770	/// RATE_0101 \| LINEF_10_60Hz_FIR \| CONV_TYPE_01_Continuous \| 40.0SPS
whismanoid	0:68e64068330f	771	/// RATE_0000 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.3SPS
whismanoid	0:68e64068330f	772	/// RATE_0001 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 0.7SPS
whismanoid	0:68e64068330f	773	/// RATE_0010 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 1.3SPS
whismanoid	0:68e64068330f	774	/// RATE_0011 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 2.7SPS
whismanoid	0:68e64068330f	775	/// RATE_0100 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 5.3SPS
whismanoid	0:68e64068330f	776	/// RATE_0101 \| LINEF_10_60Hz_FIR \| CONV_TYPE_10_DutyCycle_1_4 \| 10.0SPS
whismanoid	0:68e64068330f	777	///
whismanoid	0:68e64068330f	778	/// Table 9d. LINEF = 11 Data Rate and Filter Rejection Settings
whismanoid	0:68e64068330f	779	///
whismanoid	0:68e64068330f	780	/// Rate \| LINEF \| CONV_TYPE \| Rate
whismanoid	0:68e64068330f	781	/// ----------\|------------------------\|----------------------------\|----------
whismanoid	0:68e64068330f	782	/// RATE_0000 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 1SPS
whismanoid	0:68e64068330f	783	/// RATE_0001 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 2.5SPS
whismanoid	0:68e64068330f	784	/// RATE_0010 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 5SPS
whismanoid	0:68e64068330f	785	/// RATE_0011 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 10SPS
whismanoid	0:68e64068330f	786	/// RATE_0100 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 15SPS
whismanoid	0:68e64068330f	787	/// RATE_0101 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 30SPS
whismanoid	0:68e64068330f	788	/// RATE_0110 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 60SPS
whismanoid	0:68e64068330f	789	/// RATE_0111 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 120SPS
whismanoid	0:68e64068330f	790	/// RATE_1000 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 240SPS
whismanoid	0:68e64068330f	791	/// RATE_1001 \| LINEF_11_SINC4 \| CONV_TYPE_00_Single \| 480SPS
whismanoid	0:68e64068330f	792	/// RATE_0000 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 4SPS
whismanoid	0:68e64068330f	793	/// RATE_0001 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 10SPS
whismanoid	0:68e64068330f	794	/// RATE_0010 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 20SPS
whismanoid	0:68e64068330f	795	/// RATE_0011 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 40SPS
whismanoid	0:68e64068330f	796	/// RATE_0100 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 60SPS
whismanoid	0:68e64068330f	797	/// RATE_0101 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 120SPS
whismanoid	0:68e64068330f	798	/// RATE_0110 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 240SPS
whismanoid	0:68e64068330f	799	/// RATE_0111 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 480SPS
whismanoid	0:68e64068330f	800	/// RATE_1000 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 960SPS
whismanoid	0:68e64068330f	801	/// RATE_1001 \| LINEF_11_SINC4 \| CONV_TYPE_01_Continuous \| 1920SPS
whismanoid	0:68e64068330f	802	/// RATE_0000 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 1SPS
whismanoid	0:68e64068330f	803	/// RATE_0001 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 2.5SPS
whismanoid	0:68e64068330f	804	/// RATE_0010 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 5SPS
whismanoid	0:68e64068330f	805	/// RATE_0011 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 10SPS
whismanoid	0:68e64068330f	806	/// RATE_0100 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 15SPS
whismanoid	0:68e64068330f	807	/// RATE_0101 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 30SPS
whismanoid	0:68e64068330f	808	/// RATE_0110 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 60SPS
whismanoid	0:68e64068330f	809	/// RATE_0111 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 120SPS
whismanoid	0:68e64068330f	810	/// RATE_1000 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 240SPS
whismanoid	0:68e64068330f	811	/// RATE_1001 \| LINEF_11_SINC4 \| CONV_TYPE_10_DutyCycle_1_4 \| 480SPS
whismanoid	0:68e64068330f	812	///
whismanoid	0:68e64068330f	813	typedef enum MAX11410_RATE_enum_t {
whismanoid	0:68e64068330f	814	RATE_0000 = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	815	RATE_0001 = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	816	RATE_0010 = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	817	RATE_0011 = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	818	RATE_0100 = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	819	RATE_0101 = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	820	RATE_0110 = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	821	RATE_0111 = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	822	RATE_1000 = 0x08, //!< 8'b00001000
whismanoid	0:68e64068330f	823	RATE_1001 = 0x09, //!< 8'b00001001
whismanoid	0:68e64068330f	824	RATE_1010 = 0x0a, //!< 8'b00001010
whismanoid	0:68e64068330f	825	RATE_1011 = 0x0b, //!< 8'b00001011
whismanoid	0:68e64068330f	826	RATE_1100 = 0x0c, //!< 8'b00001100
whismanoid	0:68e64068330f	827	RATE_1101 = 0x0d, //!< 8'b00001101
whismanoid	0:68e64068330f	828	RATE_1110 = 0x0e, //!< 8'b00001110
whismanoid	0:68e64068330f	829	RATE_1111 = 0x0f, //!< 8'b00001111
whismanoid	0:68e64068330f	830	} MAX11410_RATE_enum_t;
whismanoid	0:68e64068330f	831
whismanoid	0:68e64068330f	832	// CODE GENERATOR: TypedefEnum MAX11410_REF_SEL_enum_t
whismanoid	0:68e64068330f	833	//----------------------------------------
whismanoid	0:68e64068330f	834	/// Filter command
whismanoid	0:68e64068330f	835	/// CMD_r000_1001_dddd_dddd_CTRL REF_SEL[2:0] field
whismanoid	0:68e64068330f	836	///
whismanoid	0:68e64068330f	837	/// - 000: AIN0(REF0P)/AIN1(REF0N)
whismanoid	0:68e64068330f	838	/// - 001: REF1P/REF1N (default)
whismanoid	0:68e64068330f	839	/// - 010: REF2P/REF2N
whismanoid	0:68e64068330f	840	/// - 011: AVDD/AGND
whismanoid	0:68e64068330f	841	/// - 100: AIN0(REF0P)/AGND (single-ended mode)
whismanoid	0:68e64068330f	842	/// - 101: REF1P/AGND (single-ended mode)
whismanoid	0:68e64068330f	843	/// - 110: REF2P/AGND (single-ended mode)
whismanoid	0:68e64068330f	844	/// - 111: AVDD/AGND
whismanoid	0:68e64068330f	845	typedef enum MAX11410_REF_SEL_enum_t {
whismanoid	0:68e64068330f	846	REF_SEL_000_AIN0_AIN1 = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	847	REF_SEL_001_REF1P_REF1N = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	848	REF_SEL_010_REF2P_REF2N = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	849	REF_SEL_011_AVDD_AGND = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	850	REF_SEL_100_AIN0_AGND = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	851	REF_SEL_101_REF1P_AGND = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	852	REF_SEL_110_REF2P_AGND = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	853	REF_SEL_111_AVDD_AGND = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	854	} MAX11410_REF_SEL_enum_t;
whismanoid	0:68e64068330f	855
whismanoid	0:68e64068330f	856	// CODE GENERATOR: TypedefEnum MAX11410_VBIAS_MODE_enum_t
whismanoid	0:68e64068330f	857	//----------------------------------------
whismanoid	0:68e64068330f	858	/// Source command
whismanoid	0:68e64068330f	859	/// CMD_r000_1010_dddd_dddd_SOURCE VBIAS_MODE[1:0] field
whismanoid	0:68e64068330f	860	///
whismanoid	0:68e64068330f	861	/// - 00: Active mode (default)
whismanoid	0:68e64068330f	862	/// - 01: High impedance; 125kOhm output impedance
whismanoid	0:68e64068330f	863	/// - 10: Low impedance; 20kOhm output impedance
whismanoid	0:68e64068330f	864	/// - 11: Low impedance; 20kOhm output impedance
whismanoid	0:68e64068330f	865	typedef enum MAX11410_VBIAS_MODE_enum_t {
whismanoid	0:68e64068330f	866	VBIAS_MODE_00_Active = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	867	VBIAS_MODE_01_125kOhm = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	868	VBIAS_MODE_10_20kOhm = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	869	VBIAS_MODE_11_20kOhm = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	870	} MAX11410_VBIAS_MODE_enum_t;
whismanoid	0:68e64068330f	871
whismanoid	0:68e64068330f	872	// CODE GENERATOR: TypedefEnum MAX11410_BRN_MODE_enum_t
whismanoid	0:68e64068330f	873	//----------------------------------------
whismanoid	0:68e64068330f	874	/// Source command
whismanoid	0:68e64068330f	875	/// CMD_r000_1010_dddd_dddd_SOURCE BRN_MODE[1:0] field
whismanoid	0:68e64068330f	876	///
whismanoid	0:68e64068330f	877	/// - 00: Powered down, burnout sources disabled (default)
whismanoid	0:68e64068330f	878	/// - 01: 0.5uA burnout current sources enabled
whismanoid	0:68e64068330f	879	/// - 10: 1uA burnout current sources enabled
whismanoid	0:68e64068330f	880	/// - 11: 10uA burnout current sources enabled
whismanoid	0:68e64068330f	881	typedef enum MAX11410_BRN_MODE_enum_t {
whismanoid	0:68e64068330f	882	BRN_MODE_00_disabled = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	883	BRN_MODE_01_0u5A = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	884	BRN_MODE_10_1uA = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	885	BRN_MODE_11_10uA = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	886	} MAX11410_BRN_MODE_enum_t;
whismanoid	0:68e64068330f	887
whismanoid	0:68e64068330f	888	// CODE GENERATOR: TypedefEnum MAX11410_IDAC_MODE_enum_t
whismanoid	0:68e64068330f	889	//----------------------------------------
whismanoid	0:68e64068330f	890	/// Source command
whismanoid	0:68e64068330f	891	/// CMD_r000_1010_dddd_dddd_SOURCE IDAC_MODE[3:0] field
whismanoid	0:68e64068330f	892	///
whismanoid	0:68e64068330f	893	/// - 0000: 10uA (default)
whismanoid	0:68e64068330f	894	/// - 0001: 50uA
whismanoid	0:68e64068330f	895	/// - 0010: 75uA
whismanoid	0:68e64068330f	896	/// - 0011: 100uA
whismanoid	0:68e64068330f	897	/// - 0100: 125uA
whismanoid	0:68e64068330f	898	/// - 0101: 150uA
whismanoid	0:68e64068330f	899	/// - 0110: 175uA
whismanoid	0:68e64068330f	900	/// - 0111: 200uA
whismanoid	0:68e64068330f	901	/// - 1000: 225uA
whismanoid	0:68e64068330f	902	/// - 1001: 250uA
whismanoid	0:68e64068330f	903	/// - 1010: 300uA
whismanoid	0:68e64068330f	904	/// - 1011: 400uA
whismanoid	0:68e64068330f	905	/// - 1100: 600uA
whismanoid	0:68e64068330f	906	/// - 1101: 800uA
whismanoid	0:68e64068330f	907	/// - 1110: 1200uA
whismanoid	0:68e64068330f	908	/// - 1111: 1600uA
whismanoid	0:68e64068330f	909	typedef enum MAX11410_IDAC_MODE_enum_t {
whismanoid	0:68e64068330f	910	IDAC_MODE_0000_10uA = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	911	IDAC_MODE_0001_50uA = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	912	IDAC_MODE_0010_75uA = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	913	IDAC_MODE_0011_100uA = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	914	IDAC_MODE_0100_125uA = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	915	IDAC_MODE_0101_150uA = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	916	IDAC_MODE_0110_175uA = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	917	IDAC_MODE_0111_200uA = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	918	IDAC_MODE_1000_225uA = 0x08, //!< 8'b00001000
whismanoid	0:68e64068330f	919	IDAC_MODE_1001_250uA = 0x09, //!< 8'b00001001
whismanoid	0:68e64068330f	920	IDAC_MODE_1010_300uA = 0x0a, //!< 8'b00001010
whismanoid	0:68e64068330f	921	IDAC_MODE_1011_400uA = 0x0b, //!< 8'b00001011
whismanoid	0:68e64068330f	922	IDAC_MODE_1100_600uA = 0x0c, //!< 8'b00001100
whismanoid	0:68e64068330f	923	IDAC_MODE_1101_800uA = 0x0d, //!< 8'b00001101
whismanoid	0:68e64068330f	924	IDAC_MODE_1110_1200uA = 0x0e, //!< 8'b00001110
whismanoid	0:68e64068330f	925	IDAC_MODE_1111_1600uA = 0x0f, //!< 8'b00001111
whismanoid	0:68e64068330f	926	} MAX11410_IDAC_MODE_enum_t;
whismanoid	0:68e64068330f	927
whismanoid	0:68e64068330f	928	// CODE GENERATOR: TypedefEnum MAX11410_AINP_SEL_enum_t
whismanoid	0:68e64068330f	929	//----------------------------------------
whismanoid	0:68e64068330f	930	/// Input multiplexer channel selection
whismanoid	0:68e64068330f	931	/// CMD_r000_1011_dddd_dddd_MUX_CTRL0 field AINP_SEL[3:0]
whismanoid	0:68e64068330f	932	///
whismanoid	0:68e64068330f	933	/// - 0000: AINP = AIN0
whismanoid	0:68e64068330f	934	/// - 0001: AINP = AIN1
whismanoid	0:68e64068330f	935	/// - 0010: AINP = AIN2
whismanoid	0:68e64068330f	936	/// - 0011: AINP = AIN3
whismanoid	0:68e64068330f	937	/// - 0100: AINP = AIN4
whismanoid	0:68e64068330f	938	/// - 0101: AINP = AIN5
whismanoid	0:68e64068330f	939	/// - 0110: AINP = AIN6
whismanoid	0:68e64068330f	940	/// - 0111: AINP = AIN7
whismanoid	0:68e64068330f	941	/// - 1000: AINP = AIN8
whismanoid	0:68e64068330f	942	/// - 1001: AINP = AIN9
whismanoid	0:68e64068330f	943	/// - 1010: AINP = AVDD
whismanoid	0:68e64068330f	944	/// - 1011: AINN = Unconnected
whismanoid	0:68e64068330f	945	/// - 1100: AINN = Unconnected
whismanoid	0:68e64068330f	946	/// - 1101: AINN = Unconnected
whismanoid	0:68e64068330f	947	/// - 1110: AINN = Unconnected
whismanoid	0:68e64068330f	948	/// - 1111: AINN = Unconnected (default)
whismanoid	0:68e64068330f	949	typedef enum MAX11410_AINP_SEL_enum_t {
whismanoid	0:68e64068330f	950	AINP_SEL_0000_AIN0 = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	951	AINP_SEL_0001_AIN1 = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	952	AINP_SEL_0010_AIN2 = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	953	AINP_SEL_0011_AIN3 = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	954	AINP_SEL_0100_AIN4 = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	955	AINP_SEL_0101_AIN5 = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	956	AINP_SEL_0110_AIN6 = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	957	AINP_SEL_0111_AIN7 = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	958	AINP_SEL_1000_AIN8 = 0x08, //!< 8'b00001000
whismanoid	0:68e64068330f	959	AINP_SEL_1001_AIN9 = 0x09, //!< 8'b00001001
whismanoid	0:68e64068330f	960	AINP_SEL_1010_AVDD = 0x0a, //!< 8'b00001010
whismanoid	0:68e64068330f	961	AINP_SEL_1011_unconnected = 0x0b, //!< 8'b00001011
whismanoid	0:68e64068330f	962	AINP_SEL_1100_unconnected = 0x0c, //!< 8'b00001100
whismanoid	0:68e64068330f	963	AINP_SEL_1101_unconnected = 0x0d, //!< 8'b00001101
whismanoid	0:68e64068330f	964	AINP_SEL_1110_unconnected = 0x0e, //!< 8'b00001110
whismanoid	0:68e64068330f	965	AINP_SEL_1111_unconnected = 0x0f, //!< 8'b00001111
whismanoid	0:68e64068330f	966	} MAX11410_AINP_SEL_enum_t;
whismanoid	0:68e64068330f	967
whismanoid	0:68e64068330f	968	// CODE GENERATOR: TypedefEnum MAX11410_AINN_SEL_enum_t
whismanoid	0:68e64068330f	969	//----------------------------------------
whismanoid	0:68e64068330f	970	/// Input multiplexer channel selection
whismanoid	1:d57c1a2cb83c	971	/// CMD_r000_1011_dddd_dddd_MUX_CTRL0 field AINN_SEL[3:0]
whismanoid	0:68e64068330f	972	///
whismanoid	0:68e64068330f	973	/// - 0000: AINN = AIN0
whismanoid	0:68e64068330f	974	/// - 0001: AINN = AIN1
whismanoid	0:68e64068330f	975	/// - 0010: AINN = AIN2
whismanoid	0:68e64068330f	976	/// - 0011: AINN = AIN3
whismanoid	0:68e64068330f	977	/// - 0100: AINN = AIN4
whismanoid	0:68e64068330f	978	/// - 0101: AINN = AIN5
whismanoid	0:68e64068330f	979	/// - 0110: AINN = AIN6
whismanoid	0:68e64068330f	980	/// - 0111: AINN = AIN7
whismanoid	0:68e64068330f	981	/// - 1000: AINN = AIN8
whismanoid	0:68e64068330f	982	/// - 1001: AINN = AIN9
whismanoid	0:68e64068330f	983	/// - 1010: AINN = GND
whismanoid	0:68e64068330f	984	/// - 1011: AINN = Unconnected
whismanoid	0:68e64068330f	985	/// - 1100: AINN = Unconnected
whismanoid	0:68e64068330f	986	/// - 1101: AINN = Unconnected
whismanoid	0:68e64068330f	987	/// - 1110: AINN = Unconnected
whismanoid	0:68e64068330f	988	/// - 1111: AINN = Unconnected (default)
whismanoid	0:68e64068330f	989	typedef enum MAX11410_AINN_SEL_enum_t {
whismanoid	0:68e64068330f	990	AINN_SEL_0000_AIN0 = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	991	AINN_SEL_0001_AIN1 = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	992	AINN_SEL_0010_AIN2 = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	993	AINN_SEL_0011_AIN3 = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	994	AINN_SEL_0100_AIN4 = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	995	AINN_SEL_0101_AIN5 = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	996	AINN_SEL_0110_AIN6 = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	997	AINN_SEL_0111_AIN7 = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	998	AINN_SEL_1000_AIN8 = 0x08, //!< 8'b00001000
whismanoid	0:68e64068330f	999	AINN_SEL_1001_AIN9 = 0x09, //!< 8'b00001001
whismanoid	0:68e64068330f	1000	AINN_SEL_1010_GND = 0x0a, //!< 8'b00001010
whismanoid	0:68e64068330f	1001	AINN_SEL_1011_unconnected = 0x0b, //!< 8'b00001011
whismanoid	0:68e64068330f	1002	AINN_SEL_1100_unconnected = 0x0c, //!< 8'b00001100
whismanoid	0:68e64068330f	1003	AINN_SEL_1101_unconnected = 0x0d, //!< 8'b00001101
whismanoid	0:68e64068330f	1004	AINN_SEL_1110_unconnected = 0x0e, //!< 8'b00001110
whismanoid	0:68e64068330f	1005	AINN_SEL_1111_unconnected = 0x0f, //!< 8'b00001111
whismanoid	0:68e64068330f	1006	} MAX11410_AINN_SEL_enum_t;
whismanoid	0:68e64068330f	1007
whismanoid	0:68e64068330f	1008	// CODE GENERATOR: TypedefEnum MAX11410_IDAC1_SEL_enum_t
whismanoid	0:68e64068330f	1009	//----------------------------------------
whismanoid	0:68e64068330f	1010	/// Input multiplexer channel selection
whismanoid	0:68e64068330f	1011	/// CMD_r000_1100_dddd_dddd_MUX_CTRL1 field IDAC1_SEL[3:0]
whismanoid	0:68e64068330f	1012	///
whismanoid	0:68e64068330f	1013	/// - 0000: AIN0
whismanoid	0:68e64068330f	1014	/// - 0001: AIN1
whismanoid	0:68e64068330f	1015	/// - 0010: AIN2
whismanoid	0:68e64068330f	1016	/// - 0011: AIN3
whismanoid	0:68e64068330f	1017	/// - 0100: AIN4
whismanoid	0:68e64068330f	1018	/// - 0101: AIN5
whismanoid	0:68e64068330f	1019	/// - 0110: AIN6
whismanoid	0:68e64068330f	1020	/// - 0111: AIN7
whismanoid	0:68e64068330f	1021	/// - 1000: AIN8
whismanoid	0:68e64068330f	1022	/// - 1001: AIN9
whismanoid	0:68e64068330f	1023	/// - 1010: Unconnected; IDAC1 powered down.
whismanoid	0:68e64068330f	1024	/// - 1011: Unconnected; IDAC1 powered down.
whismanoid	0:68e64068330f	1025	/// - 1100: Unconnected; IDAC1 powered down.
whismanoid	0:68e64068330f	1026	/// - 1101: Unconnected; IDAC1 powered down.
whismanoid	0:68e64068330f	1027	/// - 1110: Unconnected; IDAC1 powered down.
whismanoid	0:68e64068330f	1028	/// - 1111: Unconnected; IDAC1 powered down.(Default)
whismanoid	0:68e64068330f	1029	typedef enum MAX11410_IDAC1_SEL_enum_t {
whismanoid	0:68e64068330f	1030	IDAC1_SEL_0000_AIN0 = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	1031	IDAC1_SEL_0001_AIN1 = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	1032	IDAC1_SEL_0010_AIN2 = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	1033	IDAC1_SEL_0011_AIN3 = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	1034	IDAC1_SEL_0100_AIN4 = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	1035	IDAC1_SEL_0101_AIN5 = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	1036	IDAC1_SEL_0110_AIN6 = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	1037	IDAC1_SEL_0111_AIN7 = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	1038	IDAC1_SEL_1000_AIN8 = 0x08, //!< 8'b00001000
whismanoid	0:68e64068330f	1039	IDAC1_SEL_1001_AIN9 = 0x09, //!< 8'b00001001
whismanoid	0:68e64068330f	1040	IDAC1_SEL_1010_unconnected = 0x0a, //!< 8'b00001010
whismanoid	0:68e64068330f	1041	IDAC1_SEL_1011_unconnected = 0x0b, //!< 8'b00001011
whismanoid	0:68e64068330f	1042	IDAC1_SEL_1100_unconnected = 0x0c, //!< 8'b00001100
whismanoid	0:68e64068330f	1043	IDAC1_SEL_1101_unconnected = 0x0d, //!< 8'b00001101
whismanoid	0:68e64068330f	1044	IDAC1_SEL_1110_unconnected = 0x0e, //!< 8'b00001110
whismanoid	0:68e64068330f	1045	IDAC1_SEL_1111_unconnected = 0x0f, //!< 8'b00001111
whismanoid	0:68e64068330f	1046	} MAX11410_IDAC1_SEL_enum_t;
whismanoid	0:68e64068330f	1047
whismanoid	0:68e64068330f	1048	// CODE GENERATOR: TypedefEnum MAX11410_IDAC0_SEL_enum_t
whismanoid	0:68e64068330f	1049	//----------------------------------------
whismanoid	0:68e64068330f	1050	/// Input multiplexer channel selection
whismanoid	0:68e64068330f	1051	/// CMD_r000_1100_dddd_dddd_MUX_CTRL1 field IDAC0_SEL[3:0]
whismanoid	0:68e64068330f	1052	///
whismanoid	0:68e64068330f	1053	/// - 0000: AIN0
whismanoid	0:68e64068330f	1054	/// - 0001: AIN1
whismanoid	0:68e64068330f	1055	/// - 0010: AIN2
whismanoid	0:68e64068330f	1056	/// - 0011: AIN3
whismanoid	0:68e64068330f	1057	/// - 0100: AIN4
whismanoid	0:68e64068330f	1058	/// - 0101: AIN5
whismanoid	0:68e64068330f	1059	/// - 0110: AIN6
whismanoid	0:68e64068330f	1060	/// - 0111: AIN7
whismanoid	0:68e64068330f	1061	/// - 1000: AIN8
whismanoid	0:68e64068330f	1062	/// - 1001: AIN9
whismanoid	0:68e64068330f	1063	/// - 1010: Unconnected; IDAC0 powered down.
whismanoid	0:68e64068330f	1064	/// - 1011: Unconnected; IDAC0 powered down.
whismanoid	0:68e64068330f	1065	/// - 1100: Unconnected; IDAC0 powered down.
whismanoid	0:68e64068330f	1066	/// - 1101: Unconnected; IDAC0 powered down.
whismanoid	0:68e64068330f	1067	/// - 1110: Unconnected; IDAC0 powered down.
whismanoid	0:68e64068330f	1068	/// - 1111: Unconnected; IDAC0 powered down.(Default)
whismanoid	0:68e64068330f	1069	typedef enum MAX11410_IDAC0_SEL_enum_t {
whismanoid	0:68e64068330f	1070	IDAC0_SEL_0000_AIN0 = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	1071	IDAC0_SEL_0001_AIN1 = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	1072	IDAC0_SEL_0010_AIN2 = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	1073	IDAC0_SEL_0011_AIN3 = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	1074	IDAC0_SEL_0100_AIN4 = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	1075	IDAC0_SEL_0101_AIN5 = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	1076	IDAC0_SEL_0110_AIN6 = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	1077	IDAC0_SEL_0111_AIN7 = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	1078	IDAC0_SEL_1000_AIN8 = 0x08, //!< 8'b00001000
whismanoid	0:68e64068330f	1079	IDAC0_SEL_1001_AIN9 = 0x09, //!< 8'b00001001
whismanoid	0:68e64068330f	1080	IDAC0_SEL_1010_unconnected = 0x0a, //!< 8'b00001010
whismanoid	0:68e64068330f	1081	IDAC0_SEL_1011_unconnected = 0x0b, //!< 8'b00001011
whismanoid	0:68e64068330f	1082	IDAC0_SEL_1100_unconnected = 0x0c, //!< 8'b00001100
whismanoid	0:68e64068330f	1083	IDAC0_SEL_1101_unconnected = 0x0d, //!< 8'b00001101
whismanoid	0:68e64068330f	1084	IDAC0_SEL_1110_unconnected = 0x0e, //!< 8'b00001110
whismanoid	0:68e64068330f	1085	IDAC0_SEL_1111_unconnected = 0x0f, //!< 8'b00001111
whismanoid	0:68e64068330f	1086	} MAX11410_IDAC0_SEL_enum_t;
whismanoid	0:68e64068330f	1087
whismanoid	0:68e64068330f	1088	// CODE GENERATOR: TypedefEnum MAX11410_SIG_PATH_enum_t
whismanoid	0:68e64068330f	1089	//----------------------------------------
whismanoid	0:68e64068330f	1090	/// Input multiplexer channel selection
whismanoid	0:68e64068330f	1091	/// CMD_r000_1110_xxdd_xddd_PGA field SIG_PATH[1:0]
whismanoid	0:68e64068330f	1092	///
whismanoid	0:68e64068330f	1093	/// - 00: Buffered, low-power, unity-gain path (PGA disabled, digital gain) [default]
whismanoid	0:68e64068330f	1094	/// - 01: Bypass path (signal buffer disabled,PGA disabled, digital gain)
whismanoid	0:68e64068330f	1095	/// - 10: PGA path (signal buffer disabled, analog gain)
whismanoid	0:68e64068330f	1096	/// - 11: Reserved
whismanoid	0:68e64068330f	1097	typedef enum MAX11410_SIG_PATH_enum_t {
whismanoid	0:68e64068330f	1098	SIG_PATH_00_BUFFERED = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	1099	SIG_PATH_01_BYPASS = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	1100	SIG_PATH_10_PGA = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	1101	SIG_PATH_11_reserved = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	1102	} MAX11410_SIG_PATH_enum_t;
whismanoid	0:68e64068330f	1103
whismanoid	0:68e64068330f	1104	// CODE GENERATOR: TypedefEnum MAX11410_GAIN_enum_t
whismanoid	0:68e64068330f	1105	//----------------------------------------
whismanoid	0:68e64068330f	1106	/// Input multiplexer channel selection
whismanoid	0:68e64068330f	1107	/// CMD_r000_1110_xxdd_xddd_PGA field GAIN[2:0]
whismanoid	0:68e64068330f	1108	///
whismanoid	0:68e64068330f	1109	/// - 000: 1 (default)
whismanoid	0:68e64068330f	1110	/// - 001: 2
whismanoid	0:68e64068330f	1111	/// - 010: 4
whismanoid	0:68e64068330f	1112	/// - 011: 8
whismanoid	0:68e64068330f	1113	/// - 100: 16
whismanoid	0:68e64068330f	1114	/// - 101: 32
whismanoid	0:68e64068330f	1115	/// - 110: 64
whismanoid	0:68e64068330f	1116	/// - 111: 128
whismanoid	0:68e64068330f	1117	typedef enum MAX11410_GAIN_enum_t {
whismanoid	0:68e64068330f	1118	GAIN_000_1 = 0x00, //!< 8'b00000000
whismanoid	0:68e64068330f	1119	GAIN_001_2 = 0x01, //!< 8'b00000001
whismanoid	0:68e64068330f	1120	GAIN_010_4 = 0x02, //!< 8'b00000010
whismanoid	0:68e64068330f	1121	GAIN_011_8 = 0x03, //!< 8'b00000011
whismanoid	0:68e64068330f	1122	GAIN_100_16 = 0x04, //!< 8'b00000100
whismanoid	0:68e64068330f	1123	GAIN_101_32 = 0x05, //!< 8'b00000101
whismanoid	0:68e64068330f	1124	GAIN_110_64 = 0x06, //!< 8'b00000110
whismanoid	0:68e64068330f	1125	GAIN_111_128 = 0x07, //!< 8'b00000111
whismanoid	0:68e64068330f	1126	} MAX11410_GAIN_enum_t;
whismanoid	0:68e64068330f	1127
whismanoid	0:68e64068330f	1128	// TODO1: CODE GENERATOR: ic_variant -- IC's supported with this driver
whismanoid	0:68e64068330f	1129	/**
whismanoid	0:68e64068330f	1130	* @brief IC's supported with this driver
whismanoid	0:68e64068330f	1131	* @details MAX11410
whismanoid	0:68e64068330f	1132	*/
whismanoid	0:68e64068330f	1133	typedef enum
whismanoid	0:68e64068330f	1134	{
whismanoid	0:68e64068330f	1135	MAX11410_IC = 0,
whismanoid	0:68e64068330f	1136	//MAX11410_IC = 1
whismanoid	0:68e64068330f	1137	} MAX11410_ic_t;
whismanoid	0:68e64068330f	1138
whismanoid	0:68e64068330f	1139	// TODO1: CODE GENERATOR: class constructor declaration
whismanoid	0:68e64068330f	1140	/********************************************************//
whismanoid	0:68e64068330f	1141	* @brief Constructor for MAX11410 Class.
whismanoid	0:68e64068330f	1142	*
whismanoid	0:68e64068330f	1143	* @details Requires an existing SPI object as well as a DigitalOut object.
whismanoid	0:68e64068330f	1144	* The DigitalOut object is used for a chip enable signal
whismanoid	0:68e64068330f	1145	*
whismanoid	0:68e64068330f	1146	* On Entry:
whismanoid	0:68e64068330f	1147	* @param[in] spi - pointer to existing SPI object
whismanoid	0:68e64068330f	1148	* @param[in] cs_pin - pointer to a DigitalOut pin object
whismanoid	0:68e64068330f	1149	* CODE GENERATOR: class constructor docstrings gpio InputPin pins
whismanoid	0:68e64068330f	1150	* CODE GENERATOR: class constructor docstrings gpio OutputPin pins
whismanoid	0:68e64068330f	1151	* @param[in] ic_variant - which type of MAX11410 is used
whismanoid	0:68e64068330f	1152	*
whismanoid	0:68e64068330f	1153	* On Exit:
whismanoid	0:68e64068330f	1154	*
whismanoid	0:68e64068330f	1155	* @return None
whismanoid	0:68e64068330f	1156	**************************************************************/
whismanoid	0:68e64068330f	1157	MAX11410(SPI &spi, DigitalOut &cs_pin, // SPI interface
whismanoid	0:68e64068330f	1158	// CODE GENERATOR: class constructor declaration gpio InputPin pins
whismanoid	0:68e64068330f	1159	// CODE GENERATOR: class constructor declaration gpio OutputPin pins
whismanoid	0:68e64068330f	1160	MAX11410_ic_t ic_variant);
whismanoid	0:68e64068330f	1161
whismanoid	0:68e64068330f	1162	// CODE GENERATOR: class destructor declaration
whismanoid	0:68e64068330f	1163	/************************************************************
whismanoid	0:68e64068330f	1164	* @brief Default destructor for MAX11410 Class.
whismanoid	0:68e64068330f	1165	*
whismanoid	0:68e64068330f	1166	* @details Destroys SPI object if owner
whismanoid	0:68e64068330f	1167	*
whismanoid	0:68e64068330f	1168	* On Entry:
whismanoid	0:68e64068330f	1169	*
whismanoid	0:68e64068330f	1170	* On Exit:
whismanoid	0:68e64068330f	1171	*
whismanoid	0:68e64068330f	1172	* @return None
whismanoid	0:68e64068330f	1173	**************************************************************/
whismanoid	0:68e64068330f	1174	~MAX11410();
whismanoid	0:68e64068330f	1175
whismanoid	0:68e64068330f	1176	// CODE GENERATOR: Declare SPI diagnostic function pointer void onSPIprint()
whismanoid	0:68e64068330f	1177	/// Function pointer void f(size_t byteCount, uint8_t mosiData[], uint8_t misoData[])
whismanoid	0:68e64068330f	1178	Callback<void(size_t, uint8_t, uint8_t)> onSPIprint; //!< optional @ref onSPIprint SPI diagnostic function
whismanoid	0:68e64068330f	1179
whismanoid	0:68e64068330f	1180	// CODE GENERATOR: spi_frequency setter declaration
whismanoid	0:68e64068330f	1181	/// set SPI SCLK frequency
whismanoid	0:68e64068330f	1182	void spi_frequency(int spi_sclk_Hz);
whismanoid	0:68e64068330f	1183
whismanoid	1:d57c1a2cb83c	1184	// CODE GENERATOR: spi_frequency getter declaration and definition
whismanoid	1:d57c1a2cb83c	1185	/// get SPI SCLK frequency
whismanoid	1:d57c1a2cb83c	1186	int get_spi_frequency() const { return m_SPI_SCLK_Hz; }
whismanoid	1:d57c1a2cb83c	1187
whismanoid	1:d57c1a2cb83c	1188	// CODE GENERATOR: spi_dataMode getter declaration and definition
whismanoid	1:d57c1a2cb83c	1189	/// get SPI mode
whismanoid	1:d57c1a2cb83c	1190	int get_spi_dataMode() const { return m_SPI_dataMode; }
whismanoid	1:d57c1a2cb83c	1191
whismanoid	0:68e64068330f	1192	//----------------------------------------
whismanoid	0:68e64068330f	1193	// CODE GENERATOR: omit typedef enum MAX11410_device_t, class members instead of global device object
whismanoid	0:68e64068330f	1194	public:
whismanoid	0:68e64068330f	1195
whismanoid	1:d57c1a2cb83c	1196	/// AIN0-AIN1 reference voltage, in Volts
whismanoid	1:d57c1a2cb83c	1197	double VRef_REF0;
whismanoid	1:d57c1a2cb83c	1198
whismanoid	1:d57c1a2cb83c	1199	/// REF1P-REF1N reference voltage, in Volts
whismanoid	1:d57c1a2cb83c	1200	double VRef_REF1;
whismanoid	1:d57c1a2cb83c	1201
whismanoid	1:d57c1a2cb83c	1202	/// REF2P-REF2N reference voltage, in Volts
whismanoid	1:d57c1a2cb83c	1203	double VRef_REF2;
whismanoid	1:d57c1a2cb83c	1204
whismanoid	1:d57c1a2cb83c	1205	/// AVDD-AGND reference voltage, in Volts
whismanoid	1:d57c1a2cb83c	1206	double VRef_AVDD;
whismanoid	1:d57c1a2cb83c	1207
whismanoid	1:d57c1a2cb83c	1208	/// shadow of register ctrl CMD_r000_1001_dddd_dddd_CTRL
whismanoid	1:d57c1a2cb83c	1209	uint32_t ctrl;
whismanoid	1:d57c1a2cb83c	1210
whismanoid	1:d57c1a2cb83c	1211	/// read-only pga gain 1, 2, 4, 8, 16, 32, 64, or 128 set by Configure_PGA gain index register pga CMD_r000_1110_xxdd_xddd_PGA
whismanoid	1:d57c1a2cb83c	1212	uint8_t pgaGain;
whismanoid	0:68e64068330f	1213
whismanoid	0:68e64068330f	1214	/// shadow of register status CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS
whismanoid	0:68e64068330f	1215	uint32_t status;
whismanoid	0:68e64068330f	1216
whismanoid	0:68e64068330f	1217	/// shadow of register data0 CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0
whismanoid	0:68e64068330f	1218	uint32_t data0;
whismanoid	0:68e64068330f	1219
whismanoid	1:d57c1a2cb83c	1220	/// Each channel's most recent value in LSBs.
whismanoid	1:d57c1a2cb83c	1221	/// Updated by Measure_Voltage function.
whismanoid	1:d57c1a2cb83c	1222	/// Use VoltageOfCode function to convert LSBs to physical voltage.
whismanoid	1:d57c1a2cb83c	1223	uint32_t AINcode[10];
whismanoid	1:d57c1a2cb83c	1224
whismanoid	0:68e64068330f	1225	// CODE GENERATOR: omit global g_MAX11410_device
whismanoid	0:68e64068330f	1226
whismanoid	0:68e64068330f	1227	// CODE GENERATOR: extern function declarations
whismanoid	0:68e64068330f	1228	// CODE GENERATOR: extern function declaration SPIoutputCS
whismanoid	0:68e64068330f	1229	//----------------------------------------
whismanoid	0:68e64068330f	1230	// Assert SPI Chip Select
whismanoid	0:68e64068330f	1231	// SPI chip-select for MAX11410
whismanoid	0:68e64068330f	1232	//
whismanoid	0:68e64068330f	1233	void SPIoutputCS(int isLogicHigh);
whismanoid	0:68e64068330f	1234
whismanoid	0:68e64068330f	1235	// CODE GENERATOR: extern function declaration SPIwrite16bits
whismanoid	0:68e64068330f	1236	//----------------------------------------
whismanoid	0:68e64068330f	1237	// SPI write 16 bits
whismanoid	0:68e64068330f	1238	// SPI interface to MAX11410 shift 16 bits mosiData into MAX11410 DIN
whismanoid	0:68e64068330f	1239	//
whismanoid	0:68e64068330f	1240	void SPIwrite16bits(int16_t mosiData16);
whismanoid	0:68e64068330f	1241
whismanoid	0:68e64068330f	1242	// CODE GENERATOR: extern function declaration SPIreadWrite16bits
whismanoid	0:68e64068330f	1243	//----------------------------------------
whismanoid	0:68e64068330f	1244	// SPI read and write 16 bits
whismanoid	0:68e64068330f	1245	// SPI interface to MAX11410 shift 16 bits mosiData16 into MAX11410 DIN
whismanoid	0:68e64068330f	1246	// while simultaneously capturing 16 bits miso data from MAX11410 DOUT
whismanoid	0:68e64068330f	1247	//
whismanoid	0:68e64068330f	1248	int16_t SPIreadWrite16bits(int16_t mosiData16);
whismanoid	0:68e64068330f	1249
whismanoid	0:68e64068330f	1250	// CODE GENERATOR: extern function declaration SPIreadWrite32bits
whismanoid	0:68e64068330f	1251	//----------------------------------------
whismanoid	0:68e64068330f	1252	// SPI read and write 32 bits
whismanoid	0:68e64068330f	1253	// SPI interface to MAX11410 shift 32 bits mosiData into MAX11410 DIN
whismanoid	0:68e64068330f	1254	// while simultaneously capturing 32 bits miso data from MAX11410 DOUT
whismanoid	0:68e64068330f	1255	//
whismanoid	0:68e64068330f	1256	int32_t SPIreadWrite32bits(int32_t mosiData32);
whismanoid	0:68e64068330f	1257
whismanoid	0:68e64068330f	1258	// CODE GENERATOR: class member data
whismanoid	0:68e64068330f	1259	private:
whismanoid	0:68e64068330f	1260	// CODE GENERATOR: class member data for SPI interface
whismanoid	0:68e64068330f	1261	// SPI object
whismanoid	0:68e64068330f	1262	SPI &m_spi;
whismanoid	0:68e64068330f	1263	int m_SPI_SCLK_Hz;
whismanoid	0:68e64068330f	1264	int m_SPI_dataMode;
whismanoid	0:68e64068330f	1265	int m_SPI_cs_state;
whismanoid	0:68e64068330f	1266
whismanoid	0:68e64068330f	1267	// Selector pin object
whismanoid	0:68e64068330f	1268	DigitalOut &m_cs_pin;
whismanoid	0:68e64068330f	1269
whismanoid	0:68e64068330f	1270	// CODE GENERATOR: class member data for gpio InputPin pins
whismanoid	0:68e64068330f	1271	// CODE GENERATOR: class member data for gpio OutputPin pins
whismanoid	0:68e64068330f	1272
whismanoid	0:68e64068330f	1273	// Identifies which IC variant is being used
whismanoid	0:68e64068330f	1274	MAX11410_ic_t m_ic_variant;
whismanoid	0:68e64068330f	1275
whismanoid	0:68e64068330f	1276	public:
whismanoid	0:68e64068330f	1277
whismanoid	0:68e64068330f	1278	// CODE GENERATOR: class member function declarations
whismanoid	0:68e64068330f	1279	//----------------------------------------
whismanoid	0:68e64068330f	1280	/// Menu item '!'
whismanoid	0:68e64068330f	1281	/// Initialize device
whismanoid	0:68e64068330f	1282	/// @return 1 on success; 0 on failure
whismanoid	0:68e64068330f	1283	uint8_t Init(void);
whismanoid	0:68e64068330f	1284
whismanoid	0:68e64068330f	1285	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1286	/// Return the physical voltage corresponding to conversion result,
whismanoid	1:d57c1a2cb83c	1287	/// for unipolar mode.
whismanoid	0:68e64068330f	1288	/// Does not perform any offset or gain correction.
whismanoid	0:68e64068330f	1289	///
whismanoid	1:d57c1a2cb83c	1290	/// @pre CTRL::U_BN = 1 -- Unipolar mode
whismanoid	1:d57c1a2cb83c	1291	/// @pre CTRL::FORMAT = x
whismanoid	1:d57c1a2cb83c	1292	/// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
whismanoid	1:d57c1a2cb83c	1293	/// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid	1:d57c1a2cb83c	1294	/// @return physical voltage corresponding to MAX11410 code.
whismanoid	1:d57c1a2cb83c	1295	/// @test VoltageOfCode_Unipolar(0xFFFFFF) expect 2.500 Full Scale
whismanoid	1:d57c1a2cb83c	1296	/// @test VoltageOfCode_Unipolar(0xFFFFFE) expect 2.500 Full Scale
whismanoid	1:d57c1a2cb83c	1297	/// @test VoltageOfCode_Unipolar(0xCCCCCC) expect 2.000 Two Volts
whismanoid	1:d57c1a2cb83c	1298	/// @test VoltageOfCode_Unipolar(0xC00000) expect 1.875 75% Scale
whismanoid	1:d57c1a2cb83c	1299	/// @test VoltageOfCode_Unipolar(0x800000) expect 1.250 Mid Scale
whismanoid	1:d57c1a2cb83c	1300	/// @test VoltageOfCode_Unipolar(0x666666) expect 1.000 One Volt
whismanoid	1:d57c1a2cb83c	1301	/// @test VoltageOfCode_Unipolar(0x400000) expect 0.625 25% Scale
whismanoid	1:d57c1a2cb83c	1302	/// @test VoltageOfCode_Unipolar(0x0A3D70) expect 0.100 100mV
whismanoid	1:d57c1a2cb83c	1303	/// @test VoltageOfCode_Unipolar(0x000064) expect 0.000014901162 100 LSB
whismanoid	1:d57c1a2cb83c	1304	/// @test VoltageOfCode_Unipolar(0x00000A) expect 0.0000014901162 Ten LSB
whismanoid	1:d57c1a2cb83c	1305	/// @test VoltageOfCode_Unipolar(0x000003) expect 0.00000044703483 Three LSB
whismanoid	1:d57c1a2cb83c	1306	/// @test VoltageOfCode_Unipolar(0x000002) expect 0.00000029802326 Two LSB
whismanoid	1:d57c1a2cb83c	1307	/// @test VoltageOfCode_Unipolar(0x000001) expect 0.00000014901162 One LSB
whismanoid	1:d57c1a2cb83c	1308	/// @test VoltageOfCode_Unipolar(0x000000) expect 0.0 Zero Scale
whismanoid	1:d57c1a2cb83c	1309	///
whismanoid	1:d57c1a2cb83c	1310	double VoltageOfCode_Unipolar(uint32_t value_u24);
whismanoid	1:d57c1a2cb83c	1311
whismanoid	1:d57c1a2cb83c	1312	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1313	/// Return the physical voltage corresponding to conversion result,
whismanoid	1:d57c1a2cb83c	1314	/// when conversion format is Bipolar mode, offset binary.
whismanoid	1:d57c1a2cb83c	1315	/// Does not perform any offset or gain correction.
whismanoid	1:d57c1a2cb83c	1316	///
whismanoid	1:d57c1a2cb83c	1317	/// @pre CTRL::U_BN = 0 -- Bipolar mode
whismanoid	1:d57c1a2cb83c	1318	/// @pre CTRL::FORMAT = 1 -- offset binary
whismanoid	0:68e64068330f	1319	/// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
whismanoid	0:68e64068330f	1320	/// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid	0:68e64068330f	1321	/// @return physical voltage corresponding to MAX11410 code.
whismanoid	1:d57c1a2cb83c	1322	/// @test VoltageOfCode_Bipolar_OffsetBinary(0xFFFFFF) expect 2.5 Full Scale
whismanoid	1:d57c1a2cb83c	1323	/// @test VoltageOfCode_Bipolar_OffsetBinary(0xFFFFFE) expect 2.5 Full Scale
whismanoid	1:d57c1a2cb83c	1324	/// @test VoltageOfCode_Bipolar_OffsetBinary(0xC00000) expect 1.25 Mid Scale
whismanoid	1:d57c1a2cb83c	1325	/// @test VoltageOfCode_Bipolar_OffsetBinary(0x800003) expect 0.00000894069671 Three LSB
whismanoid	1:d57c1a2cb83c	1326	/// @test VoltageOfCode_Bipolar_OffsetBinary(0x800002) expect 0.00000596046447 Two LSB
whismanoid	1:d57c1a2cb83c	1327	/// @test VoltageOfCode_Bipolar_OffsetBinary(0x800001) expect 0.0000029802326 One LSB
whismanoid	1:d57c1a2cb83c	1328	/// @test VoltageOfCode_Bipolar_OffsetBinary(0x800000) expect 0.0 Zero Scale
whismanoid	1:d57c1a2cb83c	1329	/// @test VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFF) expect -0.0000029802326 Negative One LSB
whismanoid	1:d57c1a2cb83c	1330	/// @test VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFE) expect -0.0000059604644 Negative Two LSB
whismanoid	1:d57c1a2cb83c	1331	/// @test VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFD) expect -0.0000089406967 Negative Three LSB
whismanoid	1:d57c1a2cb83c	1332	/// @test VoltageOfCode_Bipolar_OffsetBinary(0x400000) expect -1.25 Negative Mid Scale
whismanoid	1:d57c1a2cb83c	1333	/// @test VoltageOfCode_Bipolar_OffsetBinary(0x000001) expect -2.5 Negative Full Scale
whismanoid	1:d57c1a2cb83c	1334	/// @test VoltageOfCode_Bipolar_OffsetBinary(0x000000) expect -2.5 Negative Full Scale
whismanoid	1:d57c1a2cb83c	1335	///
whismanoid	1:d57c1a2cb83c	1336	double VoltageOfCode_Bipolar_OffsetBinary(uint32_t value_u24);
whismanoid	1:d57c1a2cb83c	1337
whismanoid	1:d57c1a2cb83c	1338	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1339	/// Return the physical voltage corresponding to conversion result,
whismanoid	1:d57c1a2cb83c	1340	/// when conversion format is Bipolar mode, 2's complement.
whismanoid	1:d57c1a2cb83c	1341	/// Does not perform any offset or gain correction.
whismanoid	1:d57c1a2cb83c	1342	///
whismanoid	1:d57c1a2cb83c	1343	/// @pre CTRL::U_BN = 0 -- Bipolar mode
whismanoid	1:d57c1a2cb83c	1344	/// @pre CTRL::FORMAT = 0 -- 2's complement
whismanoid	1:d57c1a2cb83c	1345	/// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
whismanoid	1:d57c1a2cb83c	1346	/// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid	1:d57c1a2cb83c	1347	/// @return physical voltage corresponding to MAX11410 code.
whismanoid	1:d57c1a2cb83c	1348	/// @test VoltageOfCode_Bipolar_2sComplement(0x7FFFFF) expect 2.500 Full Scale
whismanoid	1:d57c1a2cb83c	1349	/// @test VoltageOfCode_Bipolar_2sComplement(0x7FFFFE) expect 2.500 Full Scale
whismanoid	1:d57c1a2cb83c	1350	/// @test VoltageOfCode_Bipolar_2sComplement(0x666666) expect 2.000 Two Volts
whismanoid	1:d57c1a2cb83c	1351	/// @test VoltageOfCode_Bipolar_2sComplement(0x600000) expect 1.875 75% Scale
whismanoid	1:d57c1a2cb83c	1352	/// @test VoltageOfCode_Bipolar_2sComplement(0x400000) expect 1.250 Mid Scale
whismanoid	1:d57c1a2cb83c	1353	/// @test VoltageOfCode_Bipolar_2sComplement(0x333333) expect 1.000 One Volt
whismanoid	1:d57c1a2cb83c	1354	/// @test VoltageOfCode_Bipolar_2sComplement(0x200000) expect 0.625 25% Scale
whismanoid	1:d57c1a2cb83c	1355	/// @test VoltageOfCode_Bipolar_2sComplement(0x051eb8) expect 0.100 100mV
whismanoid	1:d57c1a2cb83c	1356	/// @test VoltageOfCode_Bipolar_2sComplement(0x000003) expect 0.00000894069671 Three LSB
whismanoid	1:d57c1a2cb83c	1357	/// @test VoltageOfCode_Bipolar_2sComplement(0x000002) expect 0.00000596046447 Two LSB
whismanoid	1:d57c1a2cb83c	1358	/// @test VoltageOfCode_Bipolar_2sComplement(0x000001) expect 0.0000029802326 One LSB
whismanoid	1:d57c1a2cb83c	1359	/// @test VoltageOfCode_Bipolar_2sComplement(0x000000) expect 0.0 Zero Scale
whismanoid	1:d57c1a2cb83c	1360	/// @test VoltageOfCode_Bipolar_2sComplement(0xFFFFFF) expect -0.0000029802326 Negative One LSB
whismanoid	1:d57c1a2cb83c	1361	/// @test VoltageOfCode_Bipolar_2sComplement(0xFFFFFE) expect -0.0000059604644 Negative Two LSB
whismanoid	1:d57c1a2cb83c	1362	/// @test VoltageOfCode_Bipolar_2sComplement(0xFFFFFD) expect -0.0000089406967 Negative Three LSB
whismanoid	1:d57c1a2cb83c	1363	/// @test VoltageOfCode_Bipolar_2sComplement(0xFAE148) expect -0.100 Negative 100mV
whismanoid	1:d57c1a2cb83c	1364	/// @test VoltageOfCode_Bipolar_2sComplement(0xE00000) expect -0.625 Negative 25% Scale
whismanoid	1:d57c1a2cb83c	1365	/// @test VoltageOfCode_Bipolar_2sComplement(0xCCCCCD) expect -1.000 Negative One Volt
whismanoid	1:d57c1a2cb83c	1366	/// @test VoltageOfCode_Bipolar_2sComplement(0xC00000) expect -1.250 Negative Mid Scale
whismanoid	1:d57c1a2cb83c	1367	/// @test VoltageOfCode_Bipolar_2sComplement(0xA00000) expect -1.875 Negative 75% Scale
whismanoid	1:d57c1a2cb83c	1368	/// @test VoltageOfCode_Bipolar_2sComplement(0x99999A) expect -2.000 Negative Two Volts
whismanoid	1:d57c1a2cb83c	1369	/// @test VoltageOfCode_Bipolar_2sComplement(0x800001) expect -2.500 Negative Full Scale
whismanoid	1:d57c1a2cb83c	1370	/// @test VoltageOfCode_Bipolar_2sComplement(0x800000) expect -2.500 Negative Full Scale
whismanoid	1:d57c1a2cb83c	1371	///
whismanoid	1:d57c1a2cb83c	1372	double VoltageOfCode_Bipolar_2sComplement(uint32_t value_u24);
whismanoid	1:d57c1a2cb83c	1373
whismanoid	1:d57c1a2cb83c	1374	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1375	/// Return the physical voltage corresponding to conversion result,
whismanoid	1:d57c1a2cb83c	1376	/// when conversion format is determined by the CTRL register.
whismanoid	1:d57c1a2cb83c	1377	/// Does not perform any offset or gain correction.
whismanoid	1:d57c1a2cb83c	1378	///
whismanoid	1:d57c1a2cb83c	1379	/// @pre CTRL::U_BN and CTRL::FORMAT = 0 select offset binary, 2's complement, or straight binary
whismanoid	1:d57c1a2cb83c	1380	/// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
whismanoid	1:d57c1a2cb83c	1381	/// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid	1:d57c1a2cb83c	1382	/// @return physical voltage corresponding to MAX11410 code.
whismanoid	1:d57c1a2cb83c	1383	double VoltageOfCode(uint32_t value_u24);
whismanoid	0:68e64068330f	1384
whismanoid	0:68e64068330f	1385	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	0:68e64068330f	1386	// CODE GENERATOR: looks like this is a 'write' register access function
whismanoid	0:68e64068330f	1387	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	0:68e64068330f	1388	// CODE GENERATOR: looks like this is a 'write' register access function: omit this function from test menu
whismanoid	0:68e64068330f	1389	//----------------------------------------
whismanoid	0:68e64068330f	1390	/// Write a MAX11410 register.
whismanoid	0:68e64068330f	1391	///
whismanoid	0:68e64068330f	1392	/// CMD_1aaa_aaaa_REGISTER_READ bit is cleared 0 indicating a write operation.
whismanoid	0:68e64068330f	1393	///
whismanoid	0:68e64068330f	1394	/// MAX11410 register length can be determined by function RegSize.
whismanoid	0:68e64068330f	1395	///
whismanoid	0:68e64068330f	1396	/// For 8-bit register size:
whismanoid	0:68e64068330f	1397	///
whismanoid	0:68e64068330f	1398	/// SPI 16-bit transfer
whismanoid	0:68e64068330f	1399	///
whismanoid	0:68e64068330f	1400	/// SPI MOSI = 0aaa_aaaa_dddd_dddd
whismanoid	0:68e64068330f	1401	///
whismanoid	0:68e64068330f	1402	/// SPI MISO = xxxx_xxxx_xxxx_xxxx
whismanoid	0:68e64068330f	1403	///
whismanoid	0:68e64068330f	1404	/// For 16-bit register size:
whismanoid	0:68e64068330f	1405	///
whismanoid	0:68e64068330f	1406	/// SPI 24-bit or 32-bit transfer
whismanoid	0:68e64068330f	1407	///
whismanoid	0:68e64068330f	1408	/// SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
whismanoid	0:68e64068330f	1409	///
whismanoid	0:68e64068330f	1410	/// SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid	0:68e64068330f	1411	///
whismanoid	0:68e64068330f	1412	/// For 24-bit register size:
whismanoid	0:68e64068330f	1413	///
whismanoid	0:68e64068330f	1414	/// SPI 32-bit transfer
whismanoid	0:68e64068330f	1415	///
whismanoid	0:68e64068330f	1416	/// SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid	0:68e64068330f	1417	///
whismanoid	0:68e64068330f	1418	/// SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid	0:68e64068330f	1419	///
whismanoid	0:68e64068330f	1420	/// @return 1 on success; 0 on failure
whismanoid	0:68e64068330f	1421	uint8_t RegWrite(MAX11410_CMD_enum_t regAddress, uint32_t regData);
whismanoid	0:68e64068330f	1422
whismanoid	0:68e64068330f	1423	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	0:68e64068330f	1424	// CODE GENERATOR: looks like this is a 'read' register access function
whismanoid	0:68e64068330f	1425	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	0:68e64068330f	1426	// CODE GENERATOR: looks like this is a 'read' register access function: omit this function from test menu
whismanoid	0:68e64068330f	1427	//----------------------------------------
whismanoid	0:68e64068330f	1428	/// Read an 8-bit MAX11410 register
whismanoid	0:68e64068330f	1429	///
whismanoid	0:68e64068330f	1430	/// CMD_1aaa_aaaa_REGISTER_READ bit is set 1 indicating a read operation.
whismanoid	0:68e64068330f	1431	///
whismanoid	0:68e64068330f	1432	/// MAX11410 register length can be determined by function RegSize.
whismanoid	0:68e64068330f	1433	///
whismanoid	0:68e64068330f	1434	/// For 8-bit register size:
whismanoid	0:68e64068330f	1435	///
whismanoid	0:68e64068330f	1436	/// SPI 16-bit transfer
whismanoid	0:68e64068330f	1437	///
whismanoid	0:68e64068330f	1438	/// SPI MOSI = 1aaa_aaaa_0000_0000
whismanoid	0:68e64068330f	1439	///
whismanoid	0:68e64068330f	1440	/// SPI MISO = xxxx_xxxx_dddd_dddd
whismanoid	0:68e64068330f	1441	///
whismanoid	0:68e64068330f	1442	/// For 16-bit register size:
whismanoid	0:68e64068330f	1443	///
whismanoid	0:68e64068330f	1444	/// SPI 24-bit or 32-bit transfer
whismanoid	0:68e64068330f	1445	///
whismanoid	0:68e64068330f	1446	/// SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000
whismanoid	0:68e64068330f	1447	///
whismanoid	0:68e64068330f	1448	/// SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
whismanoid	0:68e64068330f	1449	///
whismanoid	0:68e64068330f	1450	/// For 24-bit register size:
whismanoid	0:68e64068330f	1451	///
whismanoid	0:68e64068330f	1452	/// SPI 32-bit transfer
whismanoid	0:68e64068330f	1453	///
whismanoid	0:68e64068330f	1454	/// SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid	0:68e64068330f	1455	///
whismanoid	0:68e64068330f	1456	/// SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid	0:68e64068330f	1457	///
whismanoid	0:68e64068330f	1458	///
whismanoid	0:68e64068330f	1459	/// @return 1 on success; 0 on failure
whismanoid	0:68e64068330f	1460	uint8_t RegRead(MAX11410_CMD_enum_t regAddress, uint32_t* ptrRegData);
whismanoid	0:68e64068330f	1461
whismanoid	0:68e64068330f	1462	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	0:68e64068330f	1463	// CODE GENERATOR: looks like this is a 'size' register access function
whismanoid	0:68e64068330f	1464	//----------------------------------------
whismanoid	0:68e64068330f	1465	/// Return the size of a MAX11410 register
whismanoid	0:68e64068330f	1466	///
whismanoid	0:68e64068330f	1467	/// @return 8 for 8-bit, 16 for 16-bit, 24 for 24-bit, else 0 for undefined register size
whismanoid	0:68e64068330f	1468	uint8_t RegSize(MAX11410_CMD_enum_t regAddress);
whismanoid	0:68e64068330f	1469
whismanoid	0:68e64068330f	1470	// CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid	0:68e64068330f	1471	// CODE GENERATOR: looks like this is a 'name' register access function
whismanoid	0:68e64068330f	1472	//----------------------------------------
whismanoid	0:68e64068330f	1473	/// Return the name of a MAX11410 register
whismanoid	0:68e64068330f	1474	///
whismanoid	0:68e64068330f	1475	/// @return null-terminated constant C string containing register name or empty string
whismanoid	0:68e64068330f	1476	const char* RegName(MAX11410_CMD_enum_t regAddress);
whismanoid	0:68e64068330f	1477
whismanoid	0:68e64068330f	1478	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1479	/// Menu item 'XF'
whismanoid	1:d57c1a2cb83c	1480	///
whismanoid	1:d57c1a2cb83c	1481	/// FILTER Select Filter and Rate.
whismanoid	1:d57c1a2cb83c	1482	/// Sets conversion rate based on RATE, LINEF, and CONV_TYPE value. See Table 9a through Table 9d for details.
whismanoid	1:d57c1a2cb83c	1483	/// For CONV_TYPE_01_Continuous, linef=LINEF_11_SINC4, rate=RATE_0100 selects output data rate 60SPS.
whismanoid	1:d57c1a2cb83c	1484	///
whismanoid	1:d57c1a2cb83c	1485	/// @param[in] linef = filter type, default=MAX11410::MAX11410_LINEF_enum_t::LINEF_11_SINC4
whismanoid	1:d57c1a2cb83c	1486	/// @param[in] rate = output data rate selection, default=MAX11410::MAX11410_RATE_enum_t::RATE_0100
whismanoid	1:d57c1a2cb83c	1487	///
whismanoid	1:d57c1a2cb83c	1488	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1489	uint8_t Configure_FILTER(uint8_t linef, uint8_t rate);
whismanoid	1:d57c1a2cb83c	1490
whismanoid	1:d57c1a2cb83c	1491	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1492	/// Menu item 'XP'
whismanoid	1:d57c1a2cb83c	1493	///
whismanoid	1:d57c1a2cb83c	1494	/// PGA Select Gain and Signal Path.
whismanoid	1:d57c1a2cb83c	1495	///
whismanoid	1:d57c1a2cb83c	1496	/// @param[in] sigpath = signal path, default=MAX11410::MAX11410_SIG_PATH_enum_t::SIG_PATH_00_BUFFERED
whismanoid	1:d57c1a2cb83c	1497	/// @param[in] gain = gain selection, default=MAX11410::MAX11410_GAIN_enum_t::GAIN_000_1
whismanoid	1:d57c1a2cb83c	1498	///
whismanoid	1:d57c1a2cb83c	1499	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1500	uint8_t Configure_PGA(uint8_t sigpath, uint8_t gain);
whismanoid	1:d57c1a2cb83c	1501
whismanoid	1:d57c1a2cb83c	1502	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1503	/// Menu item 'XC'
whismanoid	1:d57c1a2cb83c	1504	///
whismanoid	1:d57c1a2cb83c	1505	/// CTRL Select clock, format, and reference.
whismanoid	1:d57c1a2cb83c	1506	///
whismanoid	1:d57c1a2cb83c	1507	/// @param[in] extclk = external clock enable, default=0
whismanoid	1:d57c1a2cb83c	1508	/// @param[in] u_bn = unipolar input range enable, default=0
whismanoid	1:d57c1a2cb83c	1509	/// @param[in] format = offset binary format enable, default=0
whismanoid	1:d57c1a2cb83c	1510	/// @param[in] refbufp_en = REFP reference buffer enable, default=0
whismanoid	1:d57c1a2cb83c	1511	/// @param[in] refbufn_en = REFN reference buffer enable, default=0
whismanoid	1:d57c1a2cb83c	1512	/// @param[in] ref_sel = reference selection, default=MAX11410::MAX11410_REF_SEL_enum_t::REF_SEL_001_REF1P_REF1N
whismanoid	1:d57c1a2cb83c	1513	///
whismanoid	1:d57c1a2cb83c	1514	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1515	uint8_t Configure_CTRL(uint8_t extclk, uint8_t u_bn, uint8_t format, uint8_t refbufp_en, uint8_t refbufn_en, uint8_t ref_sel);
whismanoid	1:d57c1a2cb83c	1516
whismanoid	1:d57c1a2cb83c	1517	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1518	/// Menu item 'XS'
whismanoid	1:d57c1a2cb83c	1519	///
whismanoid	1:d57c1a2cb83c	1520	/// SOURCE Configure voltage bias source, current source, burnout mode
whismanoid	1:d57c1a2cb83c	1521	///
whismanoid	1:d57c1a2cb83c	1522	/// @param[in] vbias_mode = _______, default=MAX11410::MAX11410_VBIAS_MODE_enum_t::VBIAS_MODE_00_Active
whismanoid	1:d57c1a2cb83c	1523	/// @param[in] brn_mode = _______, default=MAX11410::MAX11410_BRN_MODE_enum_t::BRN_MODE_00_disabled
whismanoid	1:d57c1a2cb83c	1524	/// @param[in] idac_mode = _______, default=MAX11410::MAX11410_IDAC_MODE_enum_t::IDAC_MODE_0000_10uA
whismanoid	1:d57c1a2cb83c	1525	///
whismanoid	1:d57c1a2cb83c	1526	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1527	uint8_t Configure_SOURCE(uint8_t vbias_mode, uint8_t brn_mode, uint8_t idac_mode);
whismanoid	1:d57c1a2cb83c	1528
whismanoid	1:d57c1a2cb83c	1529	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1530	/// Menu item 'XM'
whismanoid	1:d57c1a2cb83c	1531	///
whismanoid	1:d57c1a2cb83c	1532	/// MUX_CTRL0 Select pins for analog input AINP and AINN
whismanoid	1:d57c1a2cb83c	1533	///
whismanoid	1:d57c1a2cb83c	1534	/// @param[in] ainp = channel high side, default=MAX11410::MAX11410_AINP_SEL_enum_t::AINP_SEL_0000_AIN0
whismanoid	1:d57c1a2cb83c	1535	/// @param[in] ainn = channel low side, default=MAX11410::MAX11410_AINN_SEL_enum_t::AINN_SEL_1010_GND
whismanoid	1:d57c1a2cb83c	1536	///
whismanoid	1:d57c1a2cb83c	1537	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1538	uint8_t Configure_MUX_CTRL0(uint8_t ainp, uint8_t ainn);
whismanoid	1:d57c1a2cb83c	1539
whismanoid	1:d57c1a2cb83c	1540	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1541	/// Menu item 'XI'
whismanoid	1:d57c1a2cb83c	1542	///
whismanoid	1:d57c1a2cb83c	1543	/// MUX_CTRL1 Select pins for current source
whismanoid	1:d57c1a2cb83c	1544	///
whismanoid	1:d57c1a2cb83c	1545	/// @param[in] idac1_sel = channel high side, default=MAX11410::MAX11410_IDAC1_SEL_enum_t::IDAC1_SEL_1111_unconnected
whismanoid	1:d57c1a2cb83c	1546	/// @param[in] idac0_sel = channel low side, default=MAX11410::MAX11410_IDAC0_SEL_enum_t::IDAC0_SEL_1111_unconnected
whismanoid	1:d57c1a2cb83c	1547	///
whismanoid	1:d57c1a2cb83c	1548	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1549	uint8_t Configure_MUX_CTRL1(uint8_t idac1_sel, uint8_t idac0_sel);
whismanoid	1:d57c1a2cb83c	1550
whismanoid	1:d57c1a2cb83c	1551	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1552	/// Menu item 'XV'
whismanoid	1:d57c1a2cb83c	1553	///
whismanoid	1:d57c1a2cb83c	1554	/// MUX_CTRL2 Select pins for voltage bias source
whismanoid	1:d57c1a2cb83c	1555	///
whismanoid	1:d57c1a2cb83c	1556	/// @param[in] vbias_ain7_ain0_bitmap = bit map of AIN7..AIN0 enables for voltage bias, default=0
whismanoid	1:d57c1a2cb83c	1557	///
whismanoid	1:d57c1a2cb83c	1558	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1559	uint8_t Configure_MUX_CTRL2(uint8_t vbias_ain7_ain0_bitmap);
whismanoid	1:d57c1a2cb83c	1560
whismanoid	1:d57c1a2cb83c	1561	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1562	/// Menu item 'X0'
whismanoid	1:d57c1a2cb83c	1563	///
whismanoid	1:d57c1a2cb83c	1564	/// CAL_START Calibrate Self Offset and Gain.
whismanoid	1:d57c1a2cb83c	1565	///
whismanoid	1:d57c1a2cb83c	1566	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1567	uint8_t Calibrate_Self_Offset_Gain(void);
whismanoid	1:d57c1a2cb83c	1568
whismanoid	1:d57c1a2cb83c	1569	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1570	/// Menu item 'X1'
whismanoid	1:d57c1a2cb83c	1571	///
whismanoid	1:d57c1a2cb83c	1572	/// CAL_START Calibrate Selected PGA.
whismanoid	1:d57c1a2cb83c	1573	///
whismanoid	1:d57c1a2cb83c	1574	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1575	uint8_t Calibrate_PGA_Gain(void);
whismanoid	1:d57c1a2cb83c	1576
whismanoid	1:d57c1a2cb83c	1577	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1578	/// Menu item 'X4'
whismanoid	1:d57c1a2cb83c	1579	///
whismanoid	1:d57c1a2cb83c	1580	/// CAL_START Calibrate System Offset A.
whismanoid	1:d57c1a2cb83c	1581	///
whismanoid	1:d57c1a2cb83c	1582	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1583	uint8_t Calibrate_System_Offset_A(void);
whismanoid	1:d57c1a2cb83c	1584
whismanoid	1:d57c1a2cb83c	1585	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1586	/// Menu item 'X5'
whismanoid	1:d57c1a2cb83c	1587	///
whismanoid	1:d57c1a2cb83c	1588	/// X6 0x03 CAL_START 0x06 Calibrate System Offset B
whismanoid	1:d57c1a2cb83c	1589	/// X7 0x03 CAL_START 0x07 Calibrate System Gain B
whismanoid	1:d57c1a2cb83c	1590	/// CAL_START Calibrate System Gain A.
whismanoid	1:d57c1a2cb83c	1591	///
whismanoid	1:d57c1a2cb83c	1592	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1593	uint8_t Calibrate_System_Gain_A(void);
whismanoid	1:d57c1a2cb83c	1594
whismanoid	1:d57c1a2cb83c	1595	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1596	/// Menu item 'X6'
whismanoid	1:d57c1a2cb83c	1597	///
whismanoid	1:d57c1a2cb83c	1598	/// CAL_START Calibrate System Offset B.
whismanoid	1:d57c1a2cb83c	1599	///
whismanoid	1:d57c1a2cb83c	1600	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1601	uint8_t Calibrate_System_Offset_B(void);
whismanoid	1:d57c1a2cb83c	1602
whismanoid	1:d57c1a2cb83c	1603	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1604	/// Menu item 'X7'
whismanoid	1:d57c1a2cb83c	1605	///
whismanoid	1:d57c1a2cb83c	1606	/// CAL_START Calibrate System Gain B.
whismanoid	1:d57c1a2cb83c	1607	///
whismanoid	1:d57c1a2cb83c	1608	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1609	uint8_t Calibrate_System_Gain_B(void);
whismanoid	1:d57c1a2cb83c	1610
whismanoid	1:d57c1a2cb83c	1611	//----------------------------------------
whismanoid	0:68e64068330f	1612	/// Configure Measurement for voltage input.
whismanoid	0:68e64068330f	1613	///
whismanoid	0:68e64068330f	1614	/// Example code for typical voltage measurement.
whismanoid	0:68e64068330f	1615	///
whismanoid	0:68e64068330f	1616	/// SPI register write sequence test AIN0-AGND voltage input using REF2=2.5V
whismanoid	0:68e64068330f	1617	/// write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode)
whismanoid	0:68e64068330f	1618	/// write8 0x00 PD = 0x00 (NOP)
whismanoid	0:68e64068330f	1619	/// write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous )
whismanoid	0:68e64068330f	1620	/// write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND
whismanoid	0:68e64068330f	1621	/// write8 0x09 CTRL = 0x02 to select reference REF2P/REF2N; or CTRL = 0x1A to select reference REF2P/REF2N with reference input buffers enabled; Data Format = Bipolar 2's Complement
whismanoid	0:68e64068330f	1622	/// write8 0x0E PGA = 0x00 to select input path = Buffers, digital gain = 1V/V
whismanoid	0:68e64068330f	1623	/// write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid	0:68e64068330f	1624	/// read24 0x80\|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid	0:68e64068330f	1625	/// read24 0x80\|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid	0:68e64068330f	1626	///
whismanoid	1:d57c1a2cb83c	1627	/// @param[in] ainp = channel high side, default=MAX11410_AINP_SEL_enum_t::AINP_SEL_0000_AIN0
whismanoid	1:d57c1a2cb83c	1628	/// @param[in] ainn = channel low side, default=MAX11410_AINN_SEL_enum_t::AINN_SEL_1010_GND
whismanoid	0:68e64068330f	1629	///
whismanoid	0:68e64068330f	1630	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1631	uint8_t Configure_Voltage(MAX11410_AINP_SEL_enum_t ainp, MAX11410_AINN_SEL_enum_t ainn);
whismanoid	0:68e64068330f	1632
whismanoid	0:68e64068330f	1633	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1634	/// Menu item '$'
whismanoid	1:d57c1a2cb83c	1635	/// Measure all ADC channels in sequence.
whismanoid	1:d57c1a2cb83c	1636	/// @post AINcode[0..9]: measurement result LSB code
whismanoid	0:68e64068330f	1637	///
whismanoid	0:68e64068330f	1638	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1639	uint8_t Read_All_Voltages(void);
whismanoid	0:68e64068330f	1640
whismanoid	0:68e64068330f	1641	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1642	/// Menu item 'V'
whismanoid	0:68e64068330f	1643	/// Trigger Measurement for voltage input.
whismanoid	0:68e64068330f	1644	///
whismanoid	0:68e64068330f	1645	/// Example code for typical voltage measurement.
whismanoid	0:68e64068330f	1646	///
whismanoid	1:d57c1a2cb83c	1647	/// @pre external connection REF2P-REF2N is a reference voltage
whismanoid	1:d57c1a2cb83c	1648	/// @pre VRef = Voltage of REF input, in Volts
whismanoid	1:d57c1a2cb83c	1649	/// @param[in] ainp = channel high side, default=AINP_SEL_0000_AIN0
whismanoid	1:d57c1a2cb83c	1650	/// @param[in] ainn = channel low side, default=AINN_SEL_1010_GND
whismanoid	1:d57c1a2cb83c	1651	/// @post AINcode[ainp]: measurement result LSB code
whismanoid	0:68e64068330f	1652	///
whismanoid	1:d57c1a2cb83c	1653	/// @return ideal voltage calculated from raw LSB code and reference voltage
whismanoid	1:d57c1a2cb83c	1654	double Measure_Voltage(MAX11410_AINP_SEL_enum_t ainp, MAX11410_AINN_SEL_enum_t ainn);
whismanoid	0:68e64068330f	1655
whismanoid	0:68e64068330f	1656	//----------------------------------------
whismanoid	0:68e64068330f	1657	/// Configure Measurement for Resistive Temperature Device (RTD).
whismanoid	0:68e64068330f	1658	///
whismanoid	0:68e64068330f	1659	/// Example code for typical RTD measurement.
whismanoid	0:68e64068330f	1660	///
whismanoid	1:d57c1a2cb83c	1661	/// @pre external connection REF1P-REF1N is a reference resistor
whismanoid	1:d57c1a2cb83c	1662	/// @param[in] rtd_iout = channel RTD high side force, default=MAX11410::MAX11410_IDAC0_SEL_enum_t::IDAC0_SEL_0111_AIN7
whismanoid	1:d57c1a2cb83c	1663	/// @param[in] rtd_ainp = channel RTD high side sense, default=MAX11410::MAX11410_AINP_SEL_enum_t::AINP_SEL_1000_AIN8
whismanoid	1:d57c1a2cb83c	1664	/// @param[in] rtd_ainn = channel RTD low side, default=MAX11410::MAX11410_AINN_SEL_enum_t::AINN_SEL_1001_AIN9
whismanoid	1:d57c1a2cb83c	1665	/// @post AINcode[rtd_ainp]: measurement result LSB code
whismanoid	0:68e64068330f	1666	///
whismanoid	0:68e64068330f	1667	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1668	uint8_t Configure_RTD(MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn);
whismanoid	0:68e64068330f	1669
whismanoid	0:68e64068330f	1670	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1671	/// Menu item 'R'
whismanoid	0:68e64068330f	1672	/// Trigger Measurement for Resistive Temperature Device (RTD).
whismanoid	0:68e64068330f	1673	///
whismanoid	0:68e64068330f	1674	/// Example code for typical RTD measurement.
whismanoid	0:68e64068330f	1675	///
whismanoid	1:d57c1a2cb83c	1676	/// @pre external connection REF1P-REF1N is a reference resistor
whismanoid	1:d57c1a2cb83c	1677	/// @pre VRef_REF1 = reference resistance in ohms, default=4999
whismanoid	1:d57c1a2cb83c	1678	/// @param[in] rtd_iout = channel RTD high side force, default=AINP_SEL_0111_AIN7
whismanoid	1:d57c1a2cb83c	1679	/// @param[in] rtd_ainp = channel RTD high side sense, default=AINP_SEL_1000_AIN8
whismanoid	1:d57c1a2cb83c	1680	/// @param[in] rtd_ainn = channel RTD low side, default=AINN_SEL_1001_AIN9
whismanoid	1:d57c1a2cb83c	1681	/// @post AINcode[rtd_ainp]: measurement result LSB code
whismanoid	0:68e64068330f	1682	///
whismanoid	1:d57c1a2cb83c	1683	/// @return ideal voltage calculated from raw LSB code and reference voltage
whismanoid	1:d57c1a2cb83c	1684	double Measure_RTD(MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn);
whismanoid	0:68e64068330f	1685
whismanoid	0:68e64068330f	1686	//----------------------------------------
whismanoid	0:68e64068330f	1687	/// Configure Measurement for Thermocouple
whismanoid	0:68e64068330f	1688	///
whismanoid	0:68e64068330f	1689	/// Example code for typical Thermocouple measurement.
whismanoid	0:68e64068330f	1690	///
whismanoid	1:d57c1a2cb83c	1691	/// @param[in] tc_ainp = channel of Thermocouple high side, default=AINP_SEL_0101_AIN5
whismanoid	1:d57c1a2cb83c	1692	/// @param[in] tc_ainn = channel of Thermocouple low side, default=AINN_SEL_0110_AIN6
whismanoid	1:d57c1a2cb83c	1693	/// @param[in] rtd_iout = channel RTD high side force, default=AINP_SEL_0111_AIN7
whismanoid	1:d57c1a2cb83c	1694	/// @param[in] rtd_ainp = channel RTD high side sense, default=AINP_SEL_1000_AIN8
whismanoid	1:d57c1a2cb83c	1695	/// @param[in] rtd_ainn = channel RTD low side, default=AINN_SEL_1001_AIN9
whismanoid	1:d57c1a2cb83c	1696	/// @post AINcode[tc_ainp]: measurement result LSB code
whismanoid	0:68e64068330f	1697	///
whismanoid	0:68e64068330f	1698	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1699	uint8_t Configure_Thermocouple(MAX11410_AINP_SEL_enum_t tc_ainp, MAX11410_AINN_SEL_enum_t tc_ainn, MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn);
whismanoid	0:68e64068330f	1700
whismanoid	0:68e64068330f	1701	//----------------------------------------
whismanoid	1:d57c1a2cb83c	1702	/// Menu item 'T'
whismanoid	0:68e64068330f	1703	/// Trigger Measurement for Thermocouple
whismanoid	0:68e64068330f	1704	///
whismanoid	0:68e64068330f	1705	/// Example code for typical Thermocouple measurement.
whismanoid	1:d57c1a2cb83c	1706	/// An RTD measures the "cold junction" where TC connects to the board,
whismanoid	1:d57c1a2cb83c	1707	/// and the TC measures the temperature difference above the cold junction.
whismanoid	0:68e64068330f	1708	///
whismanoid	1:d57c1a2cb83c	1709	/// @param[in] tc_ainp = channel of Thermocouple high side, default=AINP_SEL_0101_AIN5
whismanoid	1:d57c1a2cb83c	1710	/// @param[in] tc_ainn = channel of Thermocouple low side, default=AINN_SEL_0110_AIN6
whismanoid	1:d57c1a2cb83c	1711	/// @param[in] rtd_iout = channel RTD high side force, default=AINP_SEL_0111_AIN7
whismanoid	1:d57c1a2cb83c	1712	/// @param[in] rtd_ainp = channel RTD high side sense, default=AINP_SEL_1000_AIN8
whismanoid	1:d57c1a2cb83c	1713	/// @param[in] rtd_ainn = channel RTD low side, default=AINN_SEL_1001_AIN9
whismanoid	1:d57c1a2cb83c	1714	/// @post AINcode[tc_ainp]: measurement result LSB code
whismanoid	0:68e64068330f	1715	///
whismanoid	0:68e64068330f	1716	/// @return 1 on success; 0 on failure
whismanoid	1:d57c1a2cb83c	1717	double Measure_Thermocouple(MAX11410_AINP_SEL_enum_t tc_ainp, MAX11410_AINN_SEL_enum_t tc_ainn, MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn);
whismanoid	0:68e64068330f	1718
whismanoid	0:68e64068330f	1719	}; // end of class MAX11410
whismanoid	0:68e64068330f	1720
whismanoid	0:68e64068330f	1721	#endif // __MAX11410_H__
whismanoid	0:68e64068330f	1722
whismanoid	0:68e64068330f	1723	// End of file

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Type:	Library
Created:	18 Dec 2019
Imports:	14
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Commits:	36
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Followers:	110

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MAX11410BOB

MAX11410.h@1:d57c1a2cb83c, 2019-12-19 (annotated)

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