Maxim Integrated / MAX113XX_Pixi

Library for the MAX11300

Dependents:   MAX_IOT_KIT MAX_IOT_KIT

Fork of MAX11300 by Maxim Integrated

The MAX11300/01/11/12 are configurable mixed signal integrated circuits. The MAX11300/11 offer a SPI interface while the MAX11301/12 offer an I2C interface. The MAX11300/01 are 20 port devices while the MAX11311/12 are 12 port devices.

This library supports the family of parts by providing member functions that can manipulate the GPIO, ADC, DAC, and analog switches of the device, after it has been configured. For configuration of the device, this library requires a header file that can be generated by the MAX11300/01/11/12 Configuration Software. The configuration software can be found at the following link.

https://www.maximintegrated.com/en/products/analog/data-converters/analog-to-digital-converters/MAX11300.html/tb_tab2

Include the generated MAX113XXHex.h file into your project and update the #include in MAX113XX_Pixi.h.

MAX113XX_Pixi.cpp@11:31e7ca030b8f, 2017-05-08 (annotated)

Committer:
j3
Date:
Mon May 08 19:24:55 2017 +0000
Revision:
11:31e7ca030b8f
Parent:
10:6efe114ef882
Child:
12:8054ee101bad
Added init for SPI devices

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 7:8669a53acd0d 1 /**********************************************************************
j3 7:8669a53acd0d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 7:8669a53acd0d 3 *
j3 7:8669a53acd0d 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 7:8669a53acd0d 5 * copy of this software and associated documentation files (the "Software"),
j3 7:8669a53acd0d 6 * to deal in the Software without restriction, including without limitation
j3 7:8669a53acd0d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 7:8669a53acd0d 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 7:8669a53acd0d 9 * Software is furnished to do so, subject to the following conditions:
j3 7:8669a53acd0d 10 *
j3 7:8669a53acd0d 11 * The above copyright notice and this permission notice shall be included
j3 7:8669a53acd0d 12 * in all copies or substantial portions of the Software.
j3 7:8669a53acd0d 13 *
j3 7:8669a53acd0d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 7:8669a53acd0d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 7:8669a53acd0d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 7:8669a53acd0d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 7:8669a53acd0d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 7:8669a53acd0d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 7:8669a53acd0d 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 7:8669a53acd0d 21 *
j3 7:8669a53acd0d 22 * Except as contained in this notice, the name of Maxim Integrated
j3 7:8669a53acd0d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 7:8669a53acd0d 24 * Products, Inc. Branding Policy.
j3 7:8669a53acd0d 25 *
j3 7:8669a53acd0d 26 * The mere transfer of this software does not imply any licenses
j3 7:8669a53acd0d 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 7:8669a53acd0d 28 * trademarks, maskwork rights, or any other form of intellectual
j3 7:8669a53acd0d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 7:8669a53acd0d 30 * ownership rights.
j3 7:8669a53acd0d 31 **********************************************************************/
j3 7:8669a53acd0d 32
j3 9:094df3de3616 33
j3 7:8669a53acd0d 34 #include "MAX113XX_Pixi.h"
j3 7:8669a53acd0d 35
j3 9:094df3de3616 36
j3 9:094df3de3616 37 //20 port devices
j3 9:094df3de3616 38 #if defined(_MAX11300_DESIGNVALUE_H_) || defined(_MAX11301_DESIGNVALUE_H_)
j3 9:094df3de3616 39 static const uint16_t portConfigDesignVals[20] = {
j3 7:8669a53acd0d 40 port_cfg_00_DESIGNVALUE,
j3 7:8669a53acd0d 41 port_cfg_01_DESIGNVALUE,
j3 7:8669a53acd0d 42 port_cfg_02_DESIGNVALUE,
j3 7:8669a53acd0d 43 port_cfg_03_DESIGNVALUE,
j3 7:8669a53acd0d 44 port_cfg_04_DESIGNVALUE,
j3 7:8669a53acd0d 45 port_cfg_05_DESIGNVALUE,
j3 7:8669a53acd0d 46 port_cfg_06_DESIGNVALUE,
j3 7:8669a53acd0d 47 port_cfg_07_DESIGNVALUE,
j3 7:8669a53acd0d 48 port_cfg_08_DESIGNVALUE,
j3 7:8669a53acd0d 49 port_cfg_09_DESIGNVALUE,
j3 7:8669a53acd0d 50 port_cfg_10_DESIGNVALUE,
j3 7:8669a53acd0d 51 port_cfg_11_DESIGNVALUE,
j3 7:8669a53acd0d 52 port_cfg_12_DESIGNVALUE,
j3 7:8669a53acd0d 53 port_cfg_13_DESIGNVALUE,
j3 7:8669a53acd0d 54 port_cfg_14_DESIGNVALUE,
j3 7:8669a53acd0d 55 port_cfg_15_DESIGNVALUE,
j3 7:8669a53acd0d 56 port_cfg_16_DESIGNVALUE,
j3 7:8669a53acd0d 57 port_cfg_17_DESIGNVALUE,
j3 7:8669a53acd0d 58 port_cfg_18_DESIGNVALUE,
j3 7:8669a53acd0d 59 port_cfg_19_DESIGNVALUE};
j3 11:31e7ca030b8f 60
j3 11:31e7ca030b8f 61 static const uint16_t deviceDesignVals[15] = {
j3 11:31e7ca030b8f 62 device_control_DESIGNVALUE,
j3 11:31e7ca030b8f 63 interrupt_mask_DESIGNVALUE,
j3 11:31e7ca030b8f 64 gpi_irqmode_7_to_0_DESIGNVALUE,
j3 11:31e7ca030b8f 65 gpi_irqmode_15_to_8_DESIGNVALUE,
j3 11:31e7ca030b8f 66 gpi_irqmode_19_to_16_DESIGNVALUE,
j3 11:31e7ca030b8f 67 0, //reserved
j3 11:31e7ca030b8f 68 dac_preset_data_1_DESIGNVALUE,
j3 11:31e7ca030b8f 69 dac_preset_data_2_DESIGNVALUE,
j3 11:31e7ca030b8f 70 tmp_mon_cfg_DESIGNVALUE,
j3 11:31e7ca030b8f 71 tmp_mon_int_hi_thresh_DESIGNVALUE,
j3 11:31e7ca030b8f 72 tmp_mon_int_lo_thresh_DESIGNVALUE,
j3 11:31e7ca030b8f 73 tmp_mon_ext1_hi_thresh_DESIGNVALUE,
j3 11:31e7ca030b8f 74 tmp_mon_ext1_lo_thresh_DESIGNVALUE,
j3 11:31e7ca030b8f 75 tmp_mon_ext2_hi_thresh_DESIGNVALUE,
j3 11:31e7ca030b8f 76 tmp_mon_ext2_lo_thresh_DESIGNVALUE};
j3 9:094df3de3616 77 #endif
j3 9:094df3de3616 78
j3 9:094df3de3616 79 //12 port devices...
j3 9:094df3de3616 80 #if defined(_MAX11311_DESIGNVALUE_H_) || defined(_MAX11312_DESIGNVALUE_H_)
j3 9:094df3de3616 81 static const uint16_t portConfigDesignVals[12] = {
j3 9:094df3de3616 82 port_cfg_p0_DESIGNVALUE,
j3 9:094df3de3616 83 port_cfg_p1_DESIGNVALUE,
j3 9:094df3de3616 84 port_cfg_p2_DESIGNVALUE,
j3 9:094df3de3616 85 port_cfg_p3_DESIGNVALUE,
j3 9:094df3de3616 86 port_cfg_p4_DESIGNVALUE,
j3 9:094df3de3616 87 port_cfg_p5_DESIGNVALUE,
j3 9:094df3de3616 88 port_cfg_p6_DESIGNVALUE,
j3 9:094df3de3616 89 port_cfg_p7_DESIGNVALUE,
j3 9:094df3de3616 90 port_cfg_p8_DESIGNVALUE,
j3 9:094df3de3616 91 port_cfg_p9_DESIGNVALUE,
j3 9:094df3de3616 92 port_cfg_p10_DESIGNVALUE,
j3 9:094df3de3616 93 port_cfg_p11_DESIGNVALUE};
j3 9:094df3de3616 94 #endif
j3 9:094df3de3616 95
j3 7:8669a53acd0d 96
j3 7:8669a53acd0d 97 //************************** Base Class member fxs *****************************
j3 9:094df3de3616 98 MAX113XX_Pixi::MAX113XX_Pixi(Device_e device, PinName cnvt):
j3 9:094df3de3616 99 m_device(device), m_cnvt(cnvt, 1)
j3 7:8669a53acd0d 100 {
j3 11:31e7ca030b8f 101 }
j3 11:31e7ca030b8f 102
j3 7:8669a53acd0d 103
j3 7:8669a53acd0d 104 //*********************************************************************
j3 9:094df3de3616 105 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioWrite(Ports_e port,
j3 9:094df3de3616 106 const uint8_t state)
j3 7:8669a53acd0d 107 {
j3 10:6efe114ef882 108 uint16_t temp;
j3 10:6efe114ef882 109 uint16_t port_mask;
j3 10:6efe114ef882 110
j3 7:8669a53acd0d 111 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 9:094df3de3616 112
j3 10:6efe114ef882 113 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 114 {
j3 10:6efe114ef882 115 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_3)
j3 10:6efe114ef882 116 {
j3 10:6efe114ef882 117 if(port < MAX113XX_Pixi::PORT16)
j3 10:6efe114ef882 118 {
j3 10:6efe114ef882 119 port_mask = (1 << port);
j3 10:6efe114ef882 120 temp = readRegister(gpo_data_15_to_0);
j3 10:6efe114ef882 121 if(state & 0x01)
j3 10:6efe114ef882 122 {
j3 10:6efe114ef882 123 temp |= port_mask;
j3 10:6efe114ef882 124 }
j3 10:6efe114ef882 125 else
j3 10:6efe114ef882 126 {
j3 10:6efe114ef882 127 temp &= ~port_mask;
j3 10:6efe114ef882 128 }
j3 10:6efe114ef882 129 writeRegister(gpo_data_15_to_0, temp);
j3 10:6efe114ef882 130 }
j3 10:6efe114ef882 131 else
j3 10:6efe114ef882 132 {
j3 10:6efe114ef882 133 port_mask = (1 << (port - MAX113XX_Pixi::PORT16));
j3 10:6efe114ef882 134 temp = readRegister(gpo_data_19_to_16);
j3 10:6efe114ef882 135 if(state & 0x01)
j3 10:6efe114ef882 136 {
j3 10:6efe114ef882 137 temp |= port_mask;
j3 10:6efe114ef882 138 }
j3 10:6efe114ef882 139 else
j3 10:6efe114ef882 140 {
j3 10:6efe114ef882 141 temp &= ~port_mask;
j3 10:6efe114ef882 142 }
j3 10:6efe114ef882 143 writeRegister(gpo_data_19_to_16, temp);
j3 10:6efe114ef882 144 }
j3 10:6efe114ef882 145
j3 10:6efe114ef882 146 result = MAX113XX_Pixi::Success;
j3 10:6efe114ef882 147 }
j3 9:094df3de3616 148 }
j3 9:094df3de3616 149 else //12 port device
j3 9:094df3de3616 150 {
j3 9:094df3de3616 151 }
j3 7:8669a53acd0d 152
j3 7:8669a53acd0d 153 return result;
j3 7:8669a53acd0d 154 }
j3 7:8669a53acd0d 155
j3 7:8669a53acd0d 156 //*********************************************************************
j3 9:094df3de3616 157 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioRead(Ports_e port, uint8_t &state)
j3 7:8669a53acd0d 158 {
j3 7:8669a53acd0d 159 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 160
j3 10:6efe114ef882 161 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 162 {
j3 10:6efe114ef882 163 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_1)
j3 10:6efe114ef882 164 {
j3 10:6efe114ef882 165 if(port < MAX113XX_Pixi::PORT16)
j3 10:6efe114ef882 166 {
j3 10:6efe114ef882 167 state = (readRegister(gpi_data_15_to_0) >> port);
j3 10:6efe114ef882 168 }
j3 10:6efe114ef882 169 else
j3 10:6efe114ef882 170 {
j3 10:6efe114ef882 171 state = (readRegister(gpi_data_19_to_16) >> (port - MAX113XX_Pixi::PORT16));
j3 10:6efe114ef882 172 }
j3 10:6efe114ef882 173
j3 10:6efe114ef882 174 result = MAX113XX_Pixi::Success;
j3 10:6efe114ef882 175 }
j3 9:094df3de3616 176 }
j3 9:094df3de3616 177 else //12 port device
j3 9:094df3de3616 178 {
j3 9:094df3de3616 179 }
j3 9:094df3de3616 180
j3 7:8669a53acd0d 181 return result;
j3 7:8669a53acd0d 182 }
j3 7:8669a53acd0d 183
j3 7:8669a53acd0d 184 //*********************************************************************
j3 9:094df3de3616 185 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::singleEndedADCRead(Ports_e port, uint16_t &data)
j3 7:8669a53acd0d 186 {
j3 7:8669a53acd0d 187 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 188
j3 10:6efe114ef882 189 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 190 {
j3 10:6efe114ef882 191 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_7)
j3 10:6efe114ef882 192 {
j3 10:6efe114ef882 193 uint8_t num_samples = ((portConfigDesignVals[port] & port_cfg_00_funcprm_nsamples) >> 5);
j3 10:6efe114ef882 194 num_samples = (1 << num_samples);
j3 10:6efe114ef882 195
j3 10:6efe114ef882 196 while(num_samples--)
j3 10:6efe114ef882 197 {
j3 10:6efe114ef882 198 m_cnvt = 0;
j3 10:6efe114ef882 199 wait_us(1);
j3 10:6efe114ef882 200 m_cnvt = 1;
j3 10:6efe114ef882 201 wait_us(100);
j3 10:6efe114ef882 202 }
j3 10:6efe114ef882 203 data = readRegister((adc_data_port_00 + port));
j3 10:6efe114ef882 204
j3 10:6efe114ef882 205 result = MAX113XX_Pixi::Success;
j3 10:6efe114ef882 206 }
j3 9:094df3de3616 207 }
j3 9:094df3de3616 208 else //12 port device
j3 9:094df3de3616 209 {
j3 9:094df3de3616 210 }
j3 9:094df3de3616 211
j3 7:8669a53acd0d 212 return result;
j3 7:8669a53acd0d 213 }
j3 7:8669a53acd0d 214
j3 7:8669a53acd0d 215 //*********************************************************************
j3 9:094df3de3616 216 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::singleEndedDACWrite(Ports_e port,
j3 7:8669a53acd0d 217 const uint16_t data)
j3 7:8669a53acd0d 218 {
j3 7:8669a53acd0d 219 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 220
j3 10:6efe114ef882 221 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 222 {
j3 10:6efe114ef882 223 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_5)
j3 10:6efe114ef882 224 {
j3 10:6efe114ef882 225 writeRegister((dac_data_port_00 + port) , data);
j3 10:6efe114ef882 226 result = MAX113XX_Pixi::Success;
j3 10:6efe114ef882 227 }
j3 9:094df3de3616 228 }
j3 9:094df3de3616 229 else //12 port device
j3 9:094df3de3616 230 {
j3 9:094df3de3616 231 }
j3 9:094df3de3616 232
j3 7:8669a53acd0d 233 return result;
j3 7:8669a53acd0d 234 }
j3 7:8669a53acd0d 235
j3 7:8669a53acd0d 236 //*********************************************************************
j3 7:8669a53acd0d 237 void MAX113XX_Pixi::dumpPixiMemory(Serial &ser, MAX113XX_Pixi &pixi)
j3 7:8669a53acd0d 238 {
j3 10:6efe114ef882 239 uint16_t mem[0x74];
j3 7:8669a53acd0d 240
j3 7:8669a53acd0d 241 pixi.blockRead(dev_id, mem, 0x74);
j3 7:8669a53acd0d 242 for(uint8_t idx = 0; idx < 0x74; idx++)
j3 7:8669a53acd0d 243 {
j3 7:8669a53acd0d 244 ser.printf("Register 0x%2x = 0x%4x\r\n", idx, mem[idx]);
j3 7:8669a53acd0d 245 }
j3 7:8669a53acd0d 246 ser.printf("\r\n");
j3 7:8669a53acd0d 247 }
j3 7:8669a53acd0d 248
j3 7:8669a53acd0d 249
j3 9:094df3de3616 250 /// SPI first byte when writing MAX11300/11
j3 9:094df3de3616 251 //(7-bit address in bits 0x7E; LSB=0 for write)
j3 9:094df3de3616 252 #define MAX113XXAddr_SPI_Write(RegAddr) ( (RegAddr << 1) )
j3 9:094df3de3616 253
j3 9:094df3de3616 254 /// SPI first byte when reading MAX11300/11
j3 9:094df3de3616 255 //(7-bit address in bits 0x7E; LSB=1 for read)
j3 9:094df3de3616 256 #define MAX113XXAddr_SPI_Read(RegAddr) ( (RegAddr << 1) | 1 )
j3 9:094df3de3616 257
j3 7:8669a53acd0d 258 //*************************** SPI Implementation ******************************
j3 9:094df3de3616 259 MAX113XX_SPI::MAX113XX_SPI(SPI & spiBus, PinName cs,
j3 9:094df3de3616 260 MAX113XX_Pixi::Device_e device, PinName cnvt):
j3 9:094df3de3616 261 MAX113XX_Pixi(device, cnvt), m_spiBus(spiBus), m_cs(cs, 1)
j3 7:8669a53acd0d 262 {
j3 11:31e7ca030b8f 263 if((m_device == MAX11300) || (m_device == MAX11301)) //20 port device
j3 11:31e7ca030b8f 264 {
j3 11:31e7ca030b8f 265 blockWrite(device_control, deviceDesignVals, 15);
j3 11:31e7ca030b8f 266 blockWrite(port_cfg_00, portConfigDesignVals, 20);
j3 11:31e7ca030b8f 267 wait(0.1);
j3 11:31e7ca030b8f 268 }
j3 11:31e7ca030b8f 269 else //12 port device
j3 11:31e7ca030b8f 270 {
j3 11:31e7ca030b8f 271 }
j3 7:8669a53acd0d 272 }
j3 7:8669a53acd0d 273
j3 7:8669a53acd0d 274 //*********************************************************************
j3 7:8669a53acd0d 275 MAX113XX_SPI::~MAX113XX_SPI()
j3 7:8669a53acd0d 276 {
j3 7:8669a53acd0d 277 //empty block
j3 7:8669a53acd0d 278 }
j3 7:8669a53acd0d 279
j3 7:8669a53acd0d 280 //*********************************************************************
j3 9:094df3de3616 281 void MAX113XX_SPI::writeRegister(uint8_t reg, const uint16_t data)
j3 7:8669a53acd0d 282 {
j3 7:8669a53acd0d 283 m_cs = 0;
j3 9:094df3de3616 284 m_spiBus.write(MAX113XXAddr_SPI_Write(reg));
j3 7:8669a53acd0d 285 m_spiBus.write(((0xFF00 & data) >> 8));
j3 7:8669a53acd0d 286 m_spiBus.write((0x00FF & data));
j3 7:8669a53acd0d 287 m_cs = 1;
j3 7:8669a53acd0d 288 }
j3 7:8669a53acd0d 289
j3 7:8669a53acd0d 290 //*********************************************************************
j3 9:094df3de3616 291 uint16_t MAX113XX_SPI::readRegister(uint8_t reg)
j3 7:8669a53acd0d 292 {
j3 7:8669a53acd0d 293 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 294
j3 7:8669a53acd0d 295 m_cs = 0;
j3 9:094df3de3616 296 m_spiBus.write(MAX113XXAddr_SPI_Read(reg));
j3 7:8669a53acd0d 297 rtn_val |= (m_spiBus.write(0xFF) << 8);
j3 7:8669a53acd0d 298 rtn_val |= m_spiBus.write(0xFF);
j3 7:8669a53acd0d 299 m_cs = 1;
j3 7:8669a53acd0d 300
j3 7:8669a53acd0d 301 return rtn_val;
j3 7:8669a53acd0d 302 }
j3 7:8669a53acd0d 303
j3 7:8669a53acd0d 304 //*********************************************************************
j3 9:094df3de3616 305 void MAX113XX_SPI::blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 306 const uint8_t num_reg)
j3 7:8669a53acd0d 307 {
j3 11:31e7ca030b8f 308 m_cs = 0;
j3 11:31e7ca030b8f 309 m_spiBus.write(MAX113XXAddr_SPI_Write(reg));
j3 7:8669a53acd0d 310 for(uint8_t idx = 0; idx < num_reg; idx++)
j3 7:8669a53acd0d 311 {
j3 11:31e7ca030b8f 312 m_spiBus.write(((0xFF00 & data[idx]) >> 8));
j3 11:31e7ca030b8f 313 m_spiBus.write((0x00FF & data[idx]));
j3 7:8669a53acd0d 314 }
j3 11:31e7ca030b8f 315 m_cs = 1;
j3 7:8669a53acd0d 316 }
j3 7:8669a53acd0d 317
j3 7:8669a53acd0d 318 //*********************************************************************
j3 9:094df3de3616 319 void MAX113XX_SPI::blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg)
j3 7:8669a53acd0d 320 {
j3 11:31e7ca030b8f 321 uint16_t temp;
j3 11:31e7ca030b8f 322 m_cs = 0;
j3 11:31e7ca030b8f 323 m_spiBus.write(MAX113XXAddr_SPI_Read(reg));
j3 11:31e7ca030b8f 324 for(uint8_t idx = 0; idx < num_reg; idx ++)
j3 7:8669a53acd0d 325 {
j3 11:31e7ca030b8f 326 temp = 0;
j3 11:31e7ca030b8f 327 temp |= (m_spiBus.write(0xFF) << 8);
j3 11:31e7ca030b8f 328 temp |= m_spiBus.write(0xFF);
j3 11:31e7ca030b8f 329 data[idx] = temp;
j3 7:8669a53acd0d 330 }
j3 11:31e7ca030b8f 331 m_cs = 1;
j3 7:8669a53acd0d 332 }
j3 7:8669a53acd0d 333
j3 7:8669a53acd0d 334
j3 7:8669a53acd0d 335 //*************************** I2C Implementation ******************************
j3 9:094df3de3616 336 MAX113XX_I2C::MAX113XX_I2C(I2C &i2cBus, MAX113XX_Pixi::Device_e device, PinName cnvt):
j3 9:094df3de3616 337 MAX113XX_Pixi(device, cnvt), m_i2cBus(i2cBus)
j3 7:8669a53acd0d 338 {
j3 11:31e7ca030b8f 339 if((m_device == MAX11300) || (m_device == MAX11301)) //20 port device
j3 11:31e7ca030b8f 340 {
j3 11:31e7ca030b8f 341 blockWrite(device_control, deviceDesignVals, 15);
j3 11:31e7ca030b8f 342 blockWrite(port_cfg_00, portConfigDesignVals, 20);
j3 11:31e7ca030b8f 343 wait(0.1);
j3 11:31e7ca030b8f 344 }
j3 11:31e7ca030b8f 345 else //12 port device
j3 11:31e7ca030b8f 346 {
j3 11:31e7ca030b8f 347 }
j3 7:8669a53acd0d 348 }
j3 7:8669a53acd0d 349
j3 7:8669a53acd0d 350 //*********************************************************************
j3 7:8669a53acd0d 351 MAX113XX_I2C::~MAX113XX_I2C()
j3 7:8669a53acd0d 352 {
j3 7:8669a53acd0d 353 //empty block
j3 7:8669a53acd0d 354 }
j3 7:8669a53acd0d 355
j3 7:8669a53acd0d 356 //*********************************************************************
j3 9:094df3de3616 357 void MAX113XX_I2C::writeRegister(uint8_t reg, const uint16_t data)
j3 7:8669a53acd0d 358 {
j3 7:8669a53acd0d 359
j3 7:8669a53acd0d 360 }
j3 7:8669a53acd0d 361
j3 7:8669a53acd0d 362 //*********************************************************************
j3 9:094df3de3616 363 uint16_t MAX113XX_I2C::readRegister(uint8_t reg)
j3 7:8669a53acd0d 364 {
j3 7:8669a53acd0d 365 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 366
j3 7:8669a53acd0d 367 return rtn_val;
j3 7:8669a53acd0d 368 }
j3 7:8669a53acd0d 369
j3 7:8669a53acd0d 370 //*********************************************************************
j3 9:094df3de3616 371 void MAX113XX_I2C::blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 372 const uint8_t num_reg)
j3 7:8669a53acd0d 373 {
j3 7:8669a53acd0d 374
j3 7:8669a53acd0d 375 }
j3 7:8669a53acd0d 376
j3 7:8669a53acd0d 377 //*********************************************************************
j3 9:094df3de3616 378 void MAX113XX_I2C::blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg)
j3 7:8669a53acd0d 379 {
j3 7:8669a53acd0d 380
j3 7:8669a53acd0d 381 }