1-Wire® library for mbed. Complete 1-Wire library that supports our silicon masters along with a bit-bang master on the MAX32600MBED platform with one common interface for mbed. Slave support has also been included and more slaves will be added as time permits.

Dependents:   MAXREFDES131_Qt_Demo MAX32630FTHR_iButton_uSD_Logger MAX32630FTHR_DS18B20_uSD_Logger MAXREFDES130_131_Demo ... more

Superseded by MaximInterface.

Committer:
j3
Date:
Tue Jun 07 23:06:56 2016 +0000
Revision:
84:708b7be59fb2
Parent:
79:7f22823a5a2d
Child:
91:e80108bc870a
DS248x and DS2480B require existing I2C and Serial objects to be passed to them now

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 1:91e52f8ab8bf 1 /******************************************************************//**
j3 1:91e52f8ab8bf 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 1:91e52f8ab8bf 3 *
j3 1:91e52f8ab8bf 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 1:91e52f8ab8bf 5 * copy of this software and associated documentation files (the "Software"),
j3 1:91e52f8ab8bf 6 * to deal in the Software without restriction, including without limitation
j3 1:91e52f8ab8bf 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 1:91e52f8ab8bf 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 1:91e52f8ab8bf 9 * Software is furnished to do so, subject to the following conditions:
j3 1:91e52f8ab8bf 10 *
j3 1:91e52f8ab8bf 11 * The above copyright notice and this permission notice shall be included
j3 1:91e52f8ab8bf 12 * in all copies or substantial portions of the Software.
j3 1:91e52f8ab8bf 13 *
j3 1:91e52f8ab8bf 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 1:91e52f8ab8bf 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 1:91e52f8ab8bf 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 1:91e52f8ab8bf 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 1:91e52f8ab8bf 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 1:91e52f8ab8bf 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 1:91e52f8ab8bf 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 1:91e52f8ab8bf 21 *
j3 1:91e52f8ab8bf 22 * Except as contained in this notice, the name of Maxim Integrated
j3 1:91e52f8ab8bf 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 1:91e52f8ab8bf 24 * Products, Inc. Branding Policy.
j3 1:91e52f8ab8bf 25 *
j3 1:91e52f8ab8bf 26 * The mere transfer of this software does not imply any licenses
j3 1:91e52f8ab8bf 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 1:91e52f8ab8bf 28 * trademarks, maskwork rights, or any other form of intellectual
j3 1:91e52f8ab8bf 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 1:91e52f8ab8bf 30 * ownership rights.
j3 1:91e52f8ab8bf 31 **********************************************************************/
j3 1:91e52f8ab8bf 32
IanBenzMaxim 73:2cecc1372acc 33 #include "DS248x.h"
IanBenzMaxim 73:2cecc1372acc 34 #include "I2C.h"
j3 1:91e52f8ab8bf 35
IanBenzMaxim 76:84e6c4994e29 36 using OneWire::OneWireMaster;
IanBenzMaxim 76:84e6c4994e29 37 using OneWire::DS248x;
j3 1:91e52f8ab8bf 38
IanBenzMaxim 78:0cbbac7f2016 39 /// DS248x Status Bits
IanBenzMaxim 78:0cbbac7f2016 40 enum StatusBit
IanBenzMaxim 69:f915c4c59a69 41 {
IanBenzMaxim 78:0cbbac7f2016 42 Status_1WB = 0x01,
IanBenzMaxim 78:0cbbac7f2016 43 Status_PPD = 0x02,
IanBenzMaxim 78:0cbbac7f2016 44 Status_SD = 0x04,
IanBenzMaxim 78:0cbbac7f2016 45 Status_LL = 0x08,
IanBenzMaxim 78:0cbbac7f2016 46 Status_RST = 0x10,
IanBenzMaxim 78:0cbbac7f2016 47 Status_SBR = 0x20,
IanBenzMaxim 78:0cbbac7f2016 48 Status_TSB = 0x40,
IanBenzMaxim 78:0cbbac7f2016 49 Status_DIR = 0x80
IanBenzMaxim 69:f915c4c59a69 50 };
IanBenzMaxim 69:f915c4c59a69 51
IanBenzMaxim 69:f915c4c59a69 52 static const int I2C_WRITE_OK = 0;
IanBenzMaxim 69:f915c4c59a69 53 static const int I2C_READ_OK = 0;
IanBenzMaxim 69:f915c4c59a69 54
IanBenzMaxim 73:2cecc1372acc 55 uint8_t DS248x::Config::readByte() const
IanBenzMaxim 69:f915c4c59a69 56 {
IanBenzMaxim 74:23be10c32fa3 57 uint8_t config = 0;
IanBenzMaxim 74:23be10c32fa3 58 if (get1WS())
IanBenzMaxim 74:23be10c32fa3 59 {
IanBenzMaxim 74:23be10c32fa3 60 config |= 0x08;
IanBenzMaxim 74:23be10c32fa3 61 }
IanBenzMaxim 74:23be10c32fa3 62 if (getSPU())
IanBenzMaxim 74:23be10c32fa3 63 {
IanBenzMaxim 74:23be10c32fa3 64 config |= 0x04;
IanBenzMaxim 74:23be10c32fa3 65 }
IanBenzMaxim 74:23be10c32fa3 66 if (getPDN())
IanBenzMaxim 74:23be10c32fa3 67 {
IanBenzMaxim 74:23be10c32fa3 68 config |= 0x02;
IanBenzMaxim 74:23be10c32fa3 69 }
IanBenzMaxim 74:23be10c32fa3 70 if (getAPU())
IanBenzMaxim 74:23be10c32fa3 71 {
IanBenzMaxim 74:23be10c32fa3 72 config |= 0x01;
IanBenzMaxim 74:23be10c32fa3 73 }
IanBenzMaxim 74:23be10c32fa3 74 return config;
IanBenzMaxim 69:f915c4c59a69 75 }
IanBenzMaxim 69:f915c4c59a69 76
IanBenzMaxim 73:2cecc1372acc 77 uint8_t DS248x::Config::writeByte() const
IanBenzMaxim 69:f915c4c59a69 78 {
IanBenzMaxim 74:23be10c32fa3 79 uint8_t config = readByte();
IanBenzMaxim 74:23be10c32fa3 80 return ((~config << 4) | config);
IanBenzMaxim 69:f915c4c59a69 81 }
IanBenzMaxim 69:f915c4c59a69 82
IanBenzMaxim 73:2cecc1372acc 83 void DS248x::Config::reset()
IanBenzMaxim 69:f915c4c59a69 84 {
IanBenzMaxim 74:23be10c32fa3 85 set1WS(false);
IanBenzMaxim 74:23be10c32fa3 86 setSPU(false);
IanBenzMaxim 74:23be10c32fa3 87 setPDN(false);
IanBenzMaxim 74:23be10c32fa3 88 setAPU(true);
IanBenzMaxim 69:f915c4c59a69 89 }
IanBenzMaxim 69:f915c4c59a69 90
IanBenzMaxim 73:2cecc1372acc 91 DS248x::DS248x(mbed::I2C & i2c_bus, uint8_t adrs)
IanBenzMaxim 75:8b627804927c 92 :m_p_i2c_bus(&i2c_bus), m_adrs(adrs), m_i2c_owner(false)
IanBenzMaxim 73:2cecc1372acc 93 {
IanBenzMaxim 69:f915c4c59a69 94
j3 1:91e52f8ab8bf 95 }
j3 1:91e52f8ab8bf 96
j3 1:91e52f8ab8bf 97
IanBenzMaxim 73:2cecc1372acc 98 DS248x::~DS248x()
j3 1:91e52f8ab8bf 99 {
IanBenzMaxim 75:8b627804927c 100 if (m_i2c_owner)
j3 1:91e52f8ab8bf 101 {
IanBenzMaxim 75:8b627804927c 102 delete m_p_i2c_bus;
j3 1:91e52f8ab8bf 103 }
j3 1:91e52f8ab8bf 104 }
j3 1:91e52f8ab8bf 105
IanBenzMaxim 73:2cecc1372acc 106 OneWireMaster::CmdResult DS248x::OWInitMaster(void)
j3 14:7b2886a50321 107 {
IanBenzMaxim 69:f915c4c59a69 108 OneWireMaster::CmdResult result;
j3 14:7b2886a50321 109
IanBenzMaxim 69:f915c4c59a69 110 // reset DS2465
j3 17:b646b1e3970b 111 result = reset();
IanBenzMaxim 69:f915c4c59a69 112 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 113 {
IanBenzMaxim 74:23be10c32fa3 114 return result;
IanBenzMaxim 74:23be10c32fa3 115 }
IanBenzMaxim 69:f915c4c59a69 116
IanBenzMaxim 69:f915c4c59a69 117 // write the default configuration setup
IanBenzMaxim 69:f915c4c59a69 118 Config defaultConfig;
IanBenzMaxim 69:f915c4c59a69 119 result = writeConfig(defaultConfig, true);
j3 17:b646b1e3970b 120 return result;
j3 2:02d228c25fd4 121 }
j3 2:02d228c25fd4 122
IanBenzMaxim 73:2cecc1372acc 123 OneWireMaster::CmdResult DS248x::reset(void)
IanBenzMaxim 74:23be10c32fa3 124 {
j3 2:02d228c25fd4 125 // Device Reset
j3 2:02d228c25fd4 126 // S AD,0 [A] DRST [A] Sr AD,1 [A] [SS] A\ P
j3 2:02d228c25fd4 127 // [] indicates from slave
j3 2:02d228c25fd4 128 // SS status byte to read to verify state
IanBenzMaxim 74:23be10c32fa3 129
IanBenzMaxim 74:23be10c32fa3 130 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 131 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 132
IanBenzMaxim 75:8b627804927c 133 result = sendCommand(DeviceResetCmd);
IanBenzMaxim 74:23be10c32fa3 134
IanBenzMaxim 74:23be10c32fa3 135 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 136 {
IanBenzMaxim 74:23be10c32fa3 137 result = readRegister(StatusReg, buf, true);
IanBenzMaxim 74:23be10c32fa3 138 }
IanBenzMaxim 69:f915c4c59a69 139
IanBenzMaxim 74:23be10c32fa3 140 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 141 {
IanBenzMaxim 74:23be10c32fa3 142 if ((buf & 0xF7) != 0x10)
IanBenzMaxim 74:23be10c32fa3 143 {
IanBenzMaxim 74:23be10c32fa3 144 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 145 }
IanBenzMaxim 74:23be10c32fa3 146 }
IanBenzMaxim 69:f915c4c59a69 147
IanBenzMaxim 74:23be10c32fa3 148 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 149 {
IanBenzMaxim 74:23be10c32fa3 150 OWReset(); // do a command to get 1-Wire master reset out of holding state
IanBenzMaxim 74:23be10c32fa3 151 }
IanBenzMaxim 74:23be10c32fa3 152
IanBenzMaxim 74:23be10c32fa3 153 return result;
j3 2:02d228c25fd4 154 }
j3 2:02d228c25fd4 155
IanBenzMaxim 73:2cecc1372acc 156 OneWireMaster::CmdResult DS248x::selectChannel(uint8_t channel)
j3 2:02d228c25fd4 157 {
j3 23:e8e403d61359 158 OneWireMaster::CmdResult result;
IanBenzMaxim 69:f915c4c59a69 159 uint8_t ch, ch_read;
IanBenzMaxim 74:23be10c32fa3 160
j3 2:02d228c25fd4 161 // Channel Select (Case A)
j3 2:02d228c25fd4 162 // S AD,0 [A] CHSL [A] CC [A] Sr AD,1 [A] [RR] A\ P
j3 2:02d228c25fd4 163 // [] indicates from slave
j3 2:02d228c25fd4 164 // CC channel value
j3 2:02d228c25fd4 165 // RR channel read back
IanBenzMaxim 74:23be10c32fa3 166
j3 2:02d228c25fd4 167 switch (channel)
j3 2:02d228c25fd4 168 {
IanBenzMaxim 74:23be10c32fa3 169 default:
IanBenzMaxim 74:23be10c32fa3 170 case 0:
IanBenzMaxim 74:23be10c32fa3 171 ch = 0xF0;
IanBenzMaxim 74:23be10c32fa3 172 ch_read = 0xB8;
IanBenzMaxim 74:23be10c32fa3 173 break;
IanBenzMaxim 74:23be10c32fa3 174 case 1:
IanBenzMaxim 74:23be10c32fa3 175 ch = 0xE1;
IanBenzMaxim 74:23be10c32fa3 176 ch_read = 0xB1;
IanBenzMaxim 74:23be10c32fa3 177 break;
IanBenzMaxim 74:23be10c32fa3 178 case 2:
IanBenzMaxim 74:23be10c32fa3 179 ch = 0xD2;
IanBenzMaxim 74:23be10c32fa3 180 ch_read = 0xAA;
IanBenzMaxim 74:23be10c32fa3 181 break;
IanBenzMaxim 74:23be10c32fa3 182 case 3:
IanBenzMaxim 74:23be10c32fa3 183 ch = 0xC3;
IanBenzMaxim 74:23be10c32fa3 184 ch_read = 0xA3;
IanBenzMaxim 74:23be10c32fa3 185 break;
IanBenzMaxim 74:23be10c32fa3 186 case 4:
IanBenzMaxim 74:23be10c32fa3 187 ch = 0xB4;
IanBenzMaxim 74:23be10c32fa3 188 ch_read = 0x9C;
IanBenzMaxim 74:23be10c32fa3 189 break;
IanBenzMaxim 74:23be10c32fa3 190 case 5:
IanBenzMaxim 74:23be10c32fa3 191 ch = 0xA5;
IanBenzMaxim 74:23be10c32fa3 192 ch_read = 0x95;
IanBenzMaxim 74:23be10c32fa3 193 break;
IanBenzMaxim 74:23be10c32fa3 194 case 6:
IanBenzMaxim 74:23be10c32fa3 195 ch = 0x96;
IanBenzMaxim 74:23be10c32fa3 196 ch_read = 0x8E;
IanBenzMaxim 74:23be10c32fa3 197 break;
IanBenzMaxim 74:23be10c32fa3 198 case 7:
IanBenzMaxim 74:23be10c32fa3 199 ch = 0x87;
IanBenzMaxim 74:23be10c32fa3 200 ch_read = 0x87;
IanBenzMaxim 74:23be10c32fa3 201 break;
j3 2:02d228c25fd4 202 };
IanBenzMaxim 74:23be10c32fa3 203
IanBenzMaxim 75:8b627804927c 204 result = sendCommand(ChannelSelectCmd, ch);
IanBenzMaxim 69:f915c4c59a69 205 if (result == OneWireMaster::Success)
j3 17:b646b1e3970b 206 {
IanBenzMaxim 73:2cecc1372acc 207 result = readRegister(ChannelSelectReg, ch, true);
IanBenzMaxim 69:f915c4c59a69 208 if (result == OneWireMaster::Success)
j3 17:b646b1e3970b 209 {
j3 17:b646b1e3970b 210 // check for failure due to incorrect read back of channel
IanBenzMaxim 69:f915c4c59a69 211 if (ch != ch_read)
j3 17:b646b1e3970b 212 {
j3 23:e8e403d61359 213 result = OneWireMaster::OperationFailure;
j3 17:b646b1e3970b 214 }
j3 2:02d228c25fd4 215 }
j3 2:02d228c25fd4 216 }
IanBenzMaxim 74:23be10c32fa3 217
j3 17:b646b1e3970b 218 return result;
j3 1:91e52f8ab8bf 219 }
j3 1:91e52f8ab8bf 220
IanBenzMaxim 73:2cecc1372acc 221 OneWireMaster::CmdResult DS248x::adjustOwPort(OwAdjustParam param, uint8_t val)
j3 1:91e52f8ab8bf 222 {
j3 23:e8e403d61359 223 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 224
IanBenzMaxim 69:f915c4c59a69 225 uint8_t read_port_config;
IanBenzMaxim 69:f915c4c59a69 226 uint8_t control_byte;
IanBenzMaxim 69:f915c4c59a69 227
IanBenzMaxim 69:f915c4c59a69 228 control_byte = (((param & 0x0F) << 4) | (val & 0x0F));
IanBenzMaxim 74:23be10c32fa3 229
IanBenzMaxim 75:8b627804927c 230 result = sendCommand(AdjustOwPortCmd, control_byte);
IanBenzMaxim 69:f915c4c59a69 231 if (result != Success)
IanBenzMaxim 74:23be10c32fa3 232 {
IanBenzMaxim 26:a361e3f42ba5 233 return result;
IanBenzMaxim 74:23be10c32fa3 234 }
IanBenzMaxim 74:23be10c32fa3 235
IanBenzMaxim 73:2cecc1372acc 236 result = readRegister(PortConfigReg, read_port_config, true);
IanBenzMaxim 69:f915c4c59a69 237 if (result != Success)
IanBenzMaxim 74:23be10c32fa3 238 {
IanBenzMaxim 69:f915c4c59a69 239 return result;
IanBenzMaxim 74:23be10c32fa3 240 }
IanBenzMaxim 74:23be10c32fa3 241
IanBenzMaxim 74:23be10c32fa3 242 if ((control_byte & 0x0F) != read_port_config)
IanBenzMaxim 74:23be10c32fa3 243 {
IanBenzMaxim 69:f915c4c59a69 244 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 245 }
IanBenzMaxim 74:23be10c32fa3 246
IanBenzMaxim 69:f915c4c59a69 247 return result;
IanBenzMaxim 69:f915c4c59a69 248 }
IanBenzMaxim 69:f915c4c59a69 249
IanBenzMaxim 75:8b627804927c 250 OneWireMaster::CmdResult DS248x::OWTriplet(SearchDirection & searchDirection, uint8_t & sbr, uint8_t & tsb)
IanBenzMaxim 69:f915c4c59a69 251 {
IanBenzMaxim 69:f915c4c59a69 252 // 1-Wire Triplet (Case B)
IanBenzMaxim 69:f915c4c59a69 253 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 69:f915c4c59a69 254 // \--------/
IanBenzMaxim 69:f915c4c59a69 255 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 69:f915c4c59a69 256 // [] indicates from slave
IanBenzMaxim 69:f915c4c59a69 257 // SS indicates byte containing search direction bit value in msbit
IanBenzMaxim 69:f915c4c59a69 258
IanBenzMaxim 74:23be10c32fa3 259 OneWireMaster::CmdResult result;
IanBenzMaxim 75:8b627804927c 260 result = sendCommand(OwTripletCmd, (uint8_t)((searchDirection == WriteOne) ? 0x80 : 0x00));
IanBenzMaxim 69:f915c4c59a69 261 if (result == OneWireMaster::Success)
IanBenzMaxim 69:f915c4c59a69 262 {
IanBenzMaxim 74:23be10c32fa3 263 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 264 result = pollBusy(&status);
IanBenzMaxim 74:23be10c32fa3 265 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 266 {
IanBenzMaxim 74:23be10c32fa3 267 // check bit results in status byte
IanBenzMaxim 78:0cbbac7f2016 268 sbr = ((status & Status_SBR) == Status_SBR);
IanBenzMaxim 78:0cbbac7f2016 269 tsb = ((status & Status_TSB) == Status_TSB);
IanBenzMaxim 78:0cbbac7f2016 270 searchDirection = ((status & Status_DIR) == Status_DIR) ? WriteOne : WriteZero;
IanBenzMaxim 74:23be10c32fa3 271 }
IanBenzMaxim 69:f915c4c59a69 272 }
IanBenzMaxim 74:23be10c32fa3 273 return result;
IanBenzMaxim 69:f915c4c59a69 274 }
IanBenzMaxim 69:f915c4c59a69 275
IanBenzMaxim 75:8b627804927c 276 OneWireMaster::CmdResult DS248x::OWReset()
IanBenzMaxim 69:f915c4c59a69 277 {
IanBenzMaxim 69:f915c4c59a69 278 // 1-Wire reset (Case B)
IanBenzMaxim 69:f915c4c59a69 279 // S AD,0 [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 69:f915c4c59a69 280 // \--------/
IanBenzMaxim 69:f915c4c59a69 281 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 69:f915c4c59a69 282 // [] indicates from slave
IanBenzMaxim 69:f915c4c59a69 283
IanBenzMaxim 74:23be10c32fa3 284 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 285 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 286
IanBenzMaxim 75:8b627804927c 287 result = sendCommand(OwResetCmd);
IanBenzMaxim 74:23be10c32fa3 288
IanBenzMaxim 74:23be10c32fa3 289 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 290 {
IanBenzMaxim 74:23be10c32fa3 291 result = pollBusy(&buf);
IanBenzMaxim 74:23be10c32fa3 292 }
IanBenzMaxim 69:f915c4c59a69 293
IanBenzMaxim 74:23be10c32fa3 294 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 295 {
IanBenzMaxim 74:23be10c32fa3 296 // check for presence detect
IanBenzMaxim 78:0cbbac7f2016 297 if ((buf & Status_PPD) != Status_PPD)
IanBenzMaxim 74:23be10c32fa3 298 {
IanBenzMaxim 74:23be10c32fa3 299 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 300 }
IanBenzMaxim 74:23be10c32fa3 301 }
IanBenzMaxim 69:f915c4c59a69 302
IanBenzMaxim 74:23be10c32fa3 303 return result;
IanBenzMaxim 69:f915c4c59a69 304 }
IanBenzMaxim 69:f915c4c59a69 305
IanBenzMaxim 75:8b627804927c 306 OneWireMaster::CmdResult DS248x::OWTouchBitSetLevel(uint8_t & sendRecvBit, OWLevel afterLevel)
IanBenzMaxim 69:f915c4c59a69 307 {
j3 2:02d228c25fd4 308 // 1-Wire bit (Case B)
j3 2:02d228c25fd4 309 // S AD,0 [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
j3 2:02d228c25fd4 310 // \--------/
j3 2:02d228c25fd4 311 // Repeat until 1WB bit has changed to 0
j3 2:02d228c25fd4 312 // [] indicates from slave
j3 2:02d228c25fd4 313 // BB indicates byte containing bit value in msbit
j3 2:02d228c25fd4 314
IanBenzMaxim 74:23be10c32fa3 315 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 316
IanBenzMaxim 75:8b627804927c 317 result = configureLevel(afterLevel);
IanBenzMaxim 74:23be10c32fa3 318 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 319 {
IanBenzMaxim 74:23be10c32fa3 320 return result;
IanBenzMaxim 74:23be10c32fa3 321 }
IanBenzMaxim 74:23be10c32fa3 322
IanBenzMaxim 74:23be10c32fa3 323 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 324
IanBenzMaxim 75:8b627804927c 325 result = sendCommand(OwSingleBitCmd, (uint8_t)(sendRecvBit ? 0x80 : 0x00));
IanBenzMaxim 74:23be10c32fa3 326
IanBenzMaxim 74:23be10c32fa3 327 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 328 {
IanBenzMaxim 74:23be10c32fa3 329 result = pollBusy(&status);
IanBenzMaxim 74:23be10c32fa3 330 }
IanBenzMaxim 74:23be10c32fa3 331
IanBenzMaxim 74:23be10c32fa3 332 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 333 {
IanBenzMaxim 78:0cbbac7f2016 334 sendRecvBit = (status & Status_SBR);
IanBenzMaxim 74:23be10c32fa3 335 }
IanBenzMaxim 74:23be10c32fa3 336
IanBenzMaxim 69:f915c4c59a69 337 return result;
j3 1:91e52f8ab8bf 338 }
j3 1:91e52f8ab8bf 339
IanBenzMaxim 75:8b627804927c 340 OneWireMaster::CmdResult DS248x::OWWriteByteSetLevel(uint8_t sendByte, OWLevel afterLevel)
j3 1:91e52f8ab8bf 341 {
j3 2:02d228c25fd4 342 // 1-Wire Write Byte (Case B)
j3 2:02d228c25fd4 343 // S AD,0 [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
j3 2:02d228c25fd4 344 // \--------/
j3 2:02d228c25fd4 345 // Repeat until 1WB bit has changed to 0
j3 2:02d228c25fd4 346 // [] indicates from slave
j3 2:02d228c25fd4 347 // DD data to write
j3 2:02d228c25fd4 348
IanBenzMaxim 74:23be10c32fa3 349 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 350
IanBenzMaxim 75:8b627804927c 351 result = configureLevel(afterLevel);
IanBenzMaxim 74:23be10c32fa3 352 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 353 {
IanBenzMaxim 74:23be10c32fa3 354 return result;
IanBenzMaxim 74:23be10c32fa3 355 }
IanBenzMaxim 74:23be10c32fa3 356
IanBenzMaxim 75:8b627804927c 357 result = sendCommand(OwWriteByteCmd, sendByte);
IanBenzMaxim 74:23be10c32fa3 358 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 359 {
IanBenzMaxim 74:23be10c32fa3 360 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 361 }
IanBenzMaxim 74:23be10c32fa3 362
IanBenzMaxim 69:f915c4c59a69 363 return result;
j3 1:91e52f8ab8bf 364 }
j3 1:91e52f8ab8bf 365
IanBenzMaxim 75:8b627804927c 366 OneWireMaster::CmdResult DS248x::OWReadByteSetLevel(uint8_t & recvByte, OWLevel afterLevel)
j3 1:91e52f8ab8bf 367 {
IanBenzMaxim 69:f915c4c59a69 368 // 1-Wire Read Bytes (Case C)
IanBenzMaxim 69:f915c4c59a69 369 // S AD,0 [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A\
IanBenzMaxim 69:f915c4c59a69 370 // \--------/
IanBenzMaxim 69:f915c4c59a69 371 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 69:f915c4c59a69 372 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
IanBenzMaxim 69:f915c4c59a69 373 //
IanBenzMaxim 69:f915c4c59a69 374 // [] indicates from slave
IanBenzMaxim 69:f915c4c59a69 375 // DD data read
IanBenzMaxim 26:a361e3f42ba5 376
IanBenzMaxim 74:23be10c32fa3 377 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 378 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 379
IanBenzMaxim 75:8b627804927c 380 result = configureLevel(afterLevel);
IanBenzMaxim 74:23be10c32fa3 381 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 382 {
IanBenzMaxim 74:23be10c32fa3 383 return result;
IanBenzMaxim 74:23be10c32fa3 384 }
IanBenzMaxim 74:23be10c32fa3 385
IanBenzMaxim 75:8b627804927c 386 result = sendCommand(OwReadByteCmd);
IanBenzMaxim 69:f915c4c59a69 387
IanBenzMaxim 74:23be10c32fa3 388 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 389 {
IanBenzMaxim 74:23be10c32fa3 390 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 391 }
IanBenzMaxim 69:f915c4c59a69 392
IanBenzMaxim 74:23be10c32fa3 393 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 394 {
IanBenzMaxim 74:23be10c32fa3 395 result = readRegister(ReadDataReg, buf);
IanBenzMaxim 74:23be10c32fa3 396 }
IanBenzMaxim 74:23be10c32fa3 397
IanBenzMaxim 74:23be10c32fa3 398 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 399 {
IanBenzMaxim 75:8b627804927c 400 recvByte = buf;
IanBenzMaxim 74:23be10c32fa3 401 }
IanBenzMaxim 74:23be10c32fa3 402
IanBenzMaxim 74:23be10c32fa3 403 return result;
j3 17:b646b1e3970b 404 }
j3 17:b646b1e3970b 405
IanBenzMaxim 75:8b627804927c 406 OneWireMaster::CmdResult DS248x::OWSetSpeed(OWSpeed newSpeed)
j3 1:91e52f8ab8bf 407 {
IanBenzMaxim 74:23be10c32fa3 408 // Requested speed is already set
IanBenzMaxim 75:8b627804927c 409 if (m_curConfig.get1WS() == (newSpeed == OverdriveSpeed))
IanBenzMaxim 74:23be10c32fa3 410 {
IanBenzMaxim 74:23be10c32fa3 411 return OneWireMaster::Success;
IanBenzMaxim 74:23be10c32fa3 412 }
j3 2:02d228c25fd4 413
IanBenzMaxim 74:23be10c32fa3 414 // set the speed
IanBenzMaxim 74:23be10c32fa3 415 Config newConfig = m_curConfig;
IanBenzMaxim 75:8b627804927c 416 newConfig.set1WS(newSpeed == OverdriveSpeed);
IanBenzMaxim 74:23be10c32fa3 417
IanBenzMaxim 74:23be10c32fa3 418 // write the new config
IanBenzMaxim 74:23be10c32fa3 419 return writeConfig(newConfig, true);
j3 1:91e52f8ab8bf 420 }
j3 1:91e52f8ab8bf 421
IanBenzMaxim 75:8b627804927c 422 OneWireMaster::CmdResult DS248x::OWSetLevel(OWLevel newLevel)
j3 1:91e52f8ab8bf 423 {
IanBenzMaxim 75:8b627804927c 424 if (newLevel == StrongLevel)
IanBenzMaxim 73:2cecc1372acc 425 {
IanBenzMaxim 69:f915c4c59a69 426 return OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 427 }
IanBenzMaxim 74:23be10c32fa3 428
IanBenzMaxim 75:8b627804927c 429 return configureLevel(newLevel);
IanBenzMaxim 21:00c94aeb533e 430 }
IanBenzMaxim 21:00c94aeb533e 431
IanBenzMaxim 73:2cecc1372acc 432 OneWireMaster::CmdResult DS248x::writeConfig(const Config & config, bool verify)
j3 6:1faafa0b3cd7 433 {
IanBenzMaxim 74:23be10c32fa3 434 uint8_t configBuf;
IanBenzMaxim 74:23be10c32fa3 435 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 436
IanBenzMaxim 74:23be10c32fa3 437 configBuf = config.writeByte();
IanBenzMaxim 75:8b627804927c 438 result = sendCommand(WriteDeviceConfigCmd, configBuf);
IanBenzMaxim 74:23be10c32fa3 439 if (verify)
IanBenzMaxim 74:23be10c32fa3 440 {
IanBenzMaxim 74:23be10c32fa3 441 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 442 {
IanBenzMaxim 74:23be10c32fa3 443 result = readRegister(ConfigReg, configBuf);
IanBenzMaxim 74:23be10c32fa3 444 }
IanBenzMaxim 74:23be10c32fa3 445 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 446 {
IanBenzMaxim 74:23be10c32fa3 447 if (configBuf != config.readByte())
IanBenzMaxim 74:23be10c32fa3 448 {
IanBenzMaxim 74:23be10c32fa3 449 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 450 }
IanBenzMaxim 74:23be10c32fa3 451 }
IanBenzMaxim 74:23be10c32fa3 452 }
IanBenzMaxim 74:23be10c32fa3 453
IanBenzMaxim 69:f915c4c59a69 454 if (result == OneWireMaster::Success)
IanBenzMaxim 69:f915c4c59a69 455 {
IanBenzMaxim 74:23be10c32fa3 456 m_curConfig = config;
IanBenzMaxim 69:f915c4c59a69 457 }
IanBenzMaxim 69:f915c4c59a69 458
IanBenzMaxim 74:23be10c32fa3 459 return result;
IanBenzMaxim 69:f915c4c59a69 460 }
IanBenzMaxim 69:f915c4c59a69 461
IanBenzMaxim 73:2cecc1372acc 462 OneWireMaster::CmdResult DS248x::readRegister(Register reg, uint8_t & buf, bool skipSetPointer) const
IanBenzMaxim 69:f915c4c59a69 463 {
IanBenzMaxim 69:f915c4c59a69 464 CmdResult result;
IanBenzMaxim 75:8b627804927c 465 result = sendCommand(SetReadPointerCmd, reg);
IanBenzMaxim 69:f915c4c59a69 466 if (result == Success)
IanBenzMaxim 69:f915c4c59a69 467 {
IanBenzMaxim 75:8b627804927c 468 if (m_p_i2c_bus->read(m_adrs, reinterpret_cast<char *>(&buf), 1) != I2C_READ_OK)
IanBenzMaxim 73:2cecc1372acc 469 {
IanBenzMaxim 69:f915c4c59a69 470 result = CommunicationReadError;
IanBenzMaxim 74:23be10c32fa3 471 }
IanBenzMaxim 69:f915c4c59a69 472 }
IanBenzMaxim 69:f915c4c59a69 473 return result;
IanBenzMaxim 69:f915c4c59a69 474 }
IanBenzMaxim 69:f915c4c59a69 475
IanBenzMaxim 73:2cecc1372acc 476 OneWireMaster::CmdResult DS248x::pollBusy(uint8_t * pStatus)
IanBenzMaxim 69:f915c4c59a69 477 {
IanBenzMaxim 74:23be10c32fa3 478 const unsigned int pollLimit = 200;
IanBenzMaxim 74:23be10c32fa3 479
IanBenzMaxim 74:23be10c32fa3 480 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 481 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 482 unsigned int pollCount = 0;
IanBenzMaxim 69:f915c4c59a69 483
IanBenzMaxim 74:23be10c32fa3 484 do
IanBenzMaxim 74:23be10c32fa3 485 {
IanBenzMaxim 74:23be10c32fa3 486 result = readRegister(StatusReg, status, true);
IanBenzMaxim 74:23be10c32fa3 487 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 488 {
IanBenzMaxim 74:23be10c32fa3 489 return result;
IanBenzMaxim 74:23be10c32fa3 490 }
IanBenzMaxim 74:23be10c32fa3 491 if (pStatus != NULL)
IanBenzMaxim 74:23be10c32fa3 492 {
IanBenzMaxim 74:23be10c32fa3 493 *pStatus = status;
IanBenzMaxim 74:23be10c32fa3 494 }
IanBenzMaxim 74:23be10c32fa3 495 if (pollCount++ >= pollLimit)
IanBenzMaxim 74:23be10c32fa3 496 {
IanBenzMaxim 74:23be10c32fa3 497 return OneWireMaster::TimeoutError;
IanBenzMaxim 74:23be10c32fa3 498 }
IanBenzMaxim 78:0cbbac7f2016 499 } while (status & Status_1WB);
IanBenzMaxim 69:f915c4c59a69 500
IanBenzMaxim 74:23be10c32fa3 501 return OneWireMaster::Success;
IanBenzMaxim 69:f915c4c59a69 502 }
IanBenzMaxim 69:f915c4c59a69 503
IanBenzMaxim 73:2cecc1372acc 504 OneWireMaster::CmdResult DS248x::configureLevel(OWLevel level)
IanBenzMaxim 69:f915c4c59a69 505 {
IanBenzMaxim 69:f915c4c59a69 506 OneWireMaster::CmdResult result;
IanBenzMaxim 75:8b627804927c 507 if (m_curConfig.getSPU() != (level == StrongLevel))
IanBenzMaxim 69:f915c4c59a69 508 {
IanBenzMaxim 69:f915c4c59a69 509 Config newConfig = m_curConfig;
IanBenzMaxim 75:8b627804927c 510 newConfig.setSPU(level == StrongLevel);
IanBenzMaxim 69:f915c4c59a69 511 result = writeConfig(newConfig, true);
IanBenzMaxim 69:f915c4c59a69 512 }
IanBenzMaxim 69:f915c4c59a69 513 else
IanBenzMaxim 69:f915c4c59a69 514 {
IanBenzMaxim 69:f915c4c59a69 515 result = OneWireMaster::Success;
IanBenzMaxim 69:f915c4c59a69 516 }
IanBenzMaxim 69:f915c4c59a69 517 return result;
IanBenzMaxim 69:f915c4c59a69 518 }
IanBenzMaxim 69:f915c4c59a69 519
IanBenzMaxim 75:8b627804927c 520 OneWireMaster::CmdResult DS248x::sendCommand(Command cmd) const
IanBenzMaxim 69:f915c4c59a69 521 {
IanBenzMaxim 69:f915c4c59a69 522 CmdResult result;
IanBenzMaxim 75:8b627804927c 523 if (m_p_i2c_bus->write(m_adrs, reinterpret_cast<const char *>(&cmd), 1) == I2C_WRITE_OK)
IanBenzMaxim 73:2cecc1372acc 524 {
IanBenzMaxim 69:f915c4c59a69 525 result = Success;
IanBenzMaxim 74:23be10c32fa3 526 }
IanBenzMaxim 69:f915c4c59a69 527 else
IanBenzMaxim 73:2cecc1372acc 528 {
IanBenzMaxim 69:f915c4c59a69 529 result = CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 530 }
IanBenzMaxim 69:f915c4c59a69 531 return result;
IanBenzMaxim 69:f915c4c59a69 532 }
IanBenzMaxim 69:f915c4c59a69 533
IanBenzMaxim 75:8b627804927c 534 OneWireMaster::CmdResult DS248x::sendCommand(Command cmd, uint8_t param) const
IanBenzMaxim 69:f915c4c59a69 535 {
IanBenzMaxim 69:f915c4c59a69 536 CmdResult result;
IanBenzMaxim 79:7f22823a5a2d 537 uint8_t buf[2] = { cmd, param };
IanBenzMaxim 79:7f22823a5a2d 538 if (m_p_i2c_bus->write(m_adrs, reinterpret_cast<const char *>(buf), 2) == I2C_WRITE_OK)
IanBenzMaxim 73:2cecc1372acc 539 {
IanBenzMaxim 69:f915c4c59a69 540 result = Success;
IanBenzMaxim 74:23be10c32fa3 541 }
IanBenzMaxim 69:f915c4c59a69 542 else
IanBenzMaxim 73:2cecc1372acc 543 {
IanBenzMaxim 69:f915c4c59a69 544 result = CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 545 }
IanBenzMaxim 69:f915c4c59a69 546 return result;
IanBenzMaxim 69:f915c4c59a69 547 }