Device interface library for multiple platforms including Mbed.

Dependents:   DeepCover Embedded Security in IoT MaximInterface MAXREFDES155#

Maxim Interface is a library framework focused on providing flexible and expressive hardware interfaces. Both communication interfaces such as I2C and 1-Wire and device interfaces such as DS18B20 are supported. Modern C++ concepts are used extensively while keeping compatibility with C++98/C++03 and requiring no external dependencies. The embedded-friendly design does not depend on exceptions or RTTI.

The full version of the project is hosted on GitLab: https://gitlab.com/iabenz/MaximInterface

MaximInterfaceCore/I2CMaster.hpp

Committer:
IanBenzMaxim
Date:
2020-05-29
Revision:
12:7eb41621ba22
Parent:
8:5ea891c7d1a1

File content as of revision 12:7eb41621ba22:

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#ifndef MaximInterfaceCore_I2CMaster_hpp
#define MaximInterfaceCore_I2CMaster_hpp

#include <stdint.h>
#include "Config.hpp"
#include "Result.hpp"
#include "span.hpp"
#include "system_error.hpp"

namespace MaximInterfaceCore {

/// I2C master interface.
class I2CMaster {
public:
  enum ErrorValue {
    NackError = 1 ///< Transaction stopped due to a NACK from the slave device.
  };

  enum DoAck { Ack, Nack };

  enum DoStop { Stop, StopOnError, NoStop };

  virtual ~I2CMaster() {}

  /// @brief Send start condition and address on the bus.
  /// @param address Address with R/W bit.
  virtual Result<void> start(uint_least8_t address) = 0;

  /// Send stop condition on the bus.
  virtual Result<void> stop() = 0;

  /// Write data byte to the bus.
  virtual Result<void> writeByte(uint_least8_t data) = 0;

  /// Write data block to the bus.
  MaximInterfaceCore_EXPORT virtual Result<void>
  writeBlock(span<const uint_least8_t> data);

  /// @brief Perform a complete write transaction on the bus.
  /// @param address Address in 8-bit format.
  /// @param data Data to write to the bus.
  /// @param doStop
  /// Determines whether to do a stop condition or set up a repeated start.
  MaximInterfaceCore_EXPORT virtual Result<void>
  writePacket(uint_least8_t address, span<const uint_least8_t> data,
              DoStop doStop);

  /// @brief Read data byte from the bus.
  /// @param doAck Determines whether an ACK or NACK is done after reading.
  /// @returns data Data read from the bus if successful.
  virtual Result<uint_least8_t> readByte(DoAck doAck) = 0;

  /// @brief Read data block from the bus.
  /// @param[out] data Data read from the bus if successful.
  /// @param doAck Determines whether an ACK or NACK is done after reading.
  MaximInterfaceCore_EXPORT virtual Result<void>
  readBlock(span<uint_least8_t> data, DoAck doAck);

  /// @brief Perform a complete read transaction on the bus.
  /// @param address Address in 8-bit format.
  /// @param[out] data Data read from the bus if successful.
  /// @param doStop
  /// Determines whether to do a stop condition or set up a repeated start.
  MaximInterfaceCore_EXPORT virtual Result<void>
  readPacket(uint_least8_t address, span<uint_least8_t> data, DoStop doStop);

  MaximInterfaceCore_EXPORT static const error_category & errorCategory();
};

template <> struct is_error_code_enum<I2CMaster::ErrorValue> : true_type {};

inline error_code make_error_code(I2CMaster::ErrorValue e) {
  return error_code(e, I2CMaster::errorCategory());
}

inline error_condition make_error_condition(I2CMaster::ErrorValue e) {
  return error_condition(e, I2CMaster::errorCategory());
}

} // namespace MaximInterfaceCore

#endif