Maxim Integrated / Mbed 2 deprecated MAXREFDES130_Demo

Simple demo for exercising the board

Dependencies:   MAX11300 MAX4822 OneWire Terminal ds3231 mbed

MAX11300Hex.h@12:97bc95dbfc64, 2017-03-06 (annotated)

Committer:
j3
Date:
Mon Mar 06 23:47:46 2017 +0000
Revision:
12:97bc95dbfc64
Parent:
4:2a25a4e00541 
Removed Timer object since not used

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 0:24b8a6f0a563 1 /*******************************************************************************
j3 0:24b8a6f0a563 2 * Copyright (C) 2014 Maxim Integrated Products, Inc., All Rights Reserved.
j3 0:24b8a6f0a563 3 *
j3 0:24b8a6f0a563 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 0:24b8a6f0a563 5 * copy of this software and associated documentation files (the "Software"),
j3 0:24b8a6f0a563 6 * to deal in the Software without restriction, including without limitation
j3 0:24b8a6f0a563 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 0:24b8a6f0a563 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 0:24b8a6f0a563 9 * Software is furnished to do so, subject to the following conditions:
j3 0:24b8a6f0a563 10 *
j3 0:24b8a6f0a563 11 * The above copyright notice and this permission notice shall be included
j3 0:24b8a6f0a563 12 * in all copies or substantial portions of the Software.
j3 0:24b8a6f0a563 13 *
j3 0:24b8a6f0a563 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 0:24b8a6f0a563 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 0:24b8a6f0a563 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 0:24b8a6f0a563 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 0:24b8a6f0a563 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 0:24b8a6f0a563 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 0:24b8a6f0a563 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 0:24b8a6f0a563 21 *
j3 0:24b8a6f0a563 22 * Except as contained in this notice, the name of Maxim Integrated
j3 0:24b8a6f0a563 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 0:24b8a6f0a563 24 * Products, Inc. Branding Policy.
j3 0:24b8a6f0a563 25 *
j3 0:24b8a6f0a563 26 * The mere transfer of this software does not imply any licenses
j3 0:24b8a6f0a563 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 0:24b8a6f0a563 28 * trademarks, maskwork rights, or any other form of intellectual
j3 0:24b8a6f0a563 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 0:24b8a6f0a563 30 * ownership rights.
j3 0:24b8a6f0a563 31 *******************************************************************************
j3 0:24b8a6f0a563 32 */
j3 4:2a25a4e00541 33 /// Generated by: MAX11300/1 Configuration Software (Ver. 1.1.0.4) 31/07/2016 13:08
j3 0:24b8a6f0a563 34 /// Description: MAXREFDES130#
j3 0:24b8a6f0a563 35 /// Port P0: DAC
j3 0:24b8a6f0a563 36 /// Port P1: DAC
j3 0:24b8a6f0a563 37 /// Port P2: DAC
j3 0:24b8a6f0a563 38 /// Port P3: DAC
j3 0:24b8a6f0a563 39 /// Port P4: DAC
j3 0:24b8a6f0a563 40 /// Port P5: DAC
j3 0:24b8a6f0a563 41 /// Port P6: DAC
j3 0:24b8a6f0a563 42 /// Port P7: DAC
j3 0:24b8a6f0a563 43 /// Port P8: DAC
j3 0:24b8a6f0a563 44 /// Port P9: GPO
j3 0:24b8a6f0a563 45 /// Port P10: GPO
j3 0:24b8a6f0a563 46 /// Port P11: GPO
j3 0:24b8a6f0a563 47 /// Port P12: Single Ended ADC
j3 0:24b8a6f0a563 48 /// Port P13: N.C.
j3 0:24b8a6f0a563 49 /// Port P14: N.C.
j3 0:24b8a6f0a563 50 /// Port P15: N.C.
j3 1:03c04017a728 51 /// Port P16: N.C.
j3 1:03c04017a728 52 /// Port P17: N.C.
j3 0:24b8a6f0a563 53 /// Port P18: N.C.
j3 0:24b8a6f0a563 54 /// Port P19: N.C.
j3 0:24b8a6f0a563 55 /// Notes: Header file for MAX11300 configuration used in MAXREFDES130#
j3 0:24b8a6f0a563 56 #ifndef _MAX11300_DESIGNVALUE_H_
j3 0:24b8a6f0a563 57 #define _MAX11300_DESIGNVALUE_H_
j3 0:24b8a6f0a563 58
j3 0:24b8a6f0a563 59 /// SPI first byte when writing MAX11300 (7-bit address in bits 0x7E; LSB=0 for write)
j3 0:24b8a6f0a563 60 #define MAX11300Addr_SPI_Write(RegAddr) ( (RegAddr << 1) )
j3 0:24b8a6f0a563 61
j3 0:24b8a6f0a563 62 /// SPI first byte when reading MAX11300 (7-bit address in bits 0x7E; LSB=1 for read)
j3 0:24b8a6f0a563 63 #define MAX11300Addr_SPI_Read(RegAddr) ( (RegAddr << 1) | 1 )
j3 0:24b8a6f0a563 64
j3 0:24b8a6f0a563 65 /// MAX11300EVKIT Register Addresses
j3 0:24b8a6f0a563 66 typedef enum MAX11300RegAddressEnum {
j3 0:24b8a6f0a563 67
j3 0:24b8a6f0a563 68 /// 0x00 r/o dev_id Device Identification
j3 0:24b8a6f0a563 69 dev_id = 0x00,
j3 0:24b8a6f0a563 70
j3 0:24b8a6f0a563 71 /// 0x01 r/o interrupt_flag Interrupt flags
j3 0:24b8a6f0a563 72 interrupt_flag = 0x01,
j3 0:24b8a6f0a563 73
j3 0:24b8a6f0a563 74 /// 0x02 r/o adc_status_15_to_0 new ADC data available
j3 0:24b8a6f0a563 75 adc_status_15_to_0 = 0x02,
j3 0:24b8a6f0a563 76
j3 0:24b8a6f0a563 77 /// 0x03 r/o adc_status_19_to_16 new ADC data available
j3 0:24b8a6f0a563 78 adc_status_19_to_16 = 0x03,
j3 0:24b8a6f0a563 79
j3 0:24b8a6f0a563 80 /// 0x04 r/o dac_oi_status_15_to_0 DAC Overcurrent Interrupt
j3 0:24b8a6f0a563 81 dac_oi_status_15_to_0 = 0x04,
j3 0:24b8a6f0a563 82
j3 0:24b8a6f0a563 83 /// 0x05 r/o dac_oi_status_19_to_16 DAC Overcurrent Interrupt
j3 0:24b8a6f0a563 84 dac_oi_status_19_to_16 = 0x05,
j3 0:24b8a6f0a563 85
j3 0:24b8a6f0a563 86 /// 0x06 r/o gpi_status_15_to_0 GPI event ready
j3 0:24b8a6f0a563 87 gpi_status_15_to_0 = 0x06,
j3 0:24b8a6f0a563 88
j3 0:24b8a6f0a563 89 /// 0x07 r/o gpi_status_19_to_16 GPI event ready
j3 0:24b8a6f0a563 90 gpi_status_19_to_16 = 0x07,
j3 0:24b8a6f0a563 91
j3 0:24b8a6f0a563 92 /// 0x08 r/o tmp_int_data Internal Temeprature
j3 0:24b8a6f0a563 93 tmp_int_data = 0x08,
j3 0:24b8a6f0a563 94
j3 0:24b8a6f0a563 95 /// 0x09 r/o tmp_ext1_data External Temperature D0P/D0N
j3 0:24b8a6f0a563 96 tmp_ext1_data = 0x09,
j3 0:24b8a6f0a563 97
j3 0:24b8a6f0a563 98 /// 0x0a r/o tmp_ext2_data External Temperature D1P/D1N
j3 0:24b8a6f0a563 99 tmp_ext2_data = 0x0a,
j3 0:24b8a6f0a563 100
j3 0:24b8a6f0a563 101 /// 0x0b r/o gpi_data_15_to_0 GPI input ports data
j3 0:24b8a6f0a563 102 gpi_data_15_to_0 = 0x0b,
j3 0:24b8a6f0a563 103
j3 0:24b8a6f0a563 104 /// 0x0c r/o gpi_data_19_to_16 GPI input ports data
j3 0:24b8a6f0a563 105 gpi_data_19_to_16 = 0x0c,
j3 0:24b8a6f0a563 106
j3 0:24b8a6f0a563 107 /// 0x0d r/w gpo_data_15_to_0 GPO output ports data
j3 0:24b8a6f0a563 108 gpo_data_15_to_0 = 0x0d,
j3 0:24b8a6f0a563 109
j3 0:24b8a6f0a563 110 /// 0x0e r/w gpo_data_19_to_16 GPO output ports data
j3 0:24b8a6f0a563 111 gpo_data_19_to_16 = 0x0e,
j3 0:24b8a6f0a563 112
j3 0:24b8a6f0a563 113 /// 0x0f r/o reserved_0F reserved
j3 0:24b8a6f0a563 114 reserved_0F = 0x0f,
j3 0:24b8a6f0a563 115
j3 0:24b8a6f0a563 116 /// 0x10 r/w device_control Global device control register
j3 0:24b8a6f0a563 117 device_control = 0x10,
j3 0:24b8a6f0a563 118
j3 0:24b8a6f0a563 119 /// 0x11 r/w interrupt_mask interrupt mask (1 = disable interrupt source)
j3 0:24b8a6f0a563 120 interrupt_mask = 0x11,
j3 0:24b8a6f0a563 121
j3 0:24b8a6f0a563 122 /// 0x12 r/w gpi_irqmode_7_to_0 xxxxxx
j3 0:24b8a6f0a563 123 gpi_irqmode_7_to_0 = 0x12,
j3 0:24b8a6f0a563 124
j3 0:24b8a6f0a563 125 /// 0x13 r/w gpi_irqmode_15_to_8 xxxxxx
j3 0:24b8a6f0a563 126 gpi_irqmode_15_to_8 = 0x13,
j3 0:24b8a6f0a563 127
j3 0:24b8a6f0a563 128 /// 0x14 r/w gpi_irqmode_19_to_16 xxxxxx
j3 0:24b8a6f0a563 129 gpi_irqmode_19_to_16 = 0x14,
j3 0:24b8a6f0a563 130
j3 0:24b8a6f0a563 131 /// 0x15 r/w gpi_irqmode_31_to_24 xxxxxx
j3 0:24b8a6f0a563 132 gpi_irqmode_31_to_24 = 0x15,
j3 0:24b8a6f0a563 133
j3 0:24b8a6f0a563 134 /// 0x16 r/w dac_preset_data_1 DAC preset activated by <see cref="device_control"/>
j3 0:24b8a6f0a563 135 dac_preset_data_1 = 0x16,
j3 0:24b8a6f0a563 136
j3 0:24b8a6f0a563 137 /// 0x17 r/w dac_preset_data_2 DAC preset activated by <see cref="device_control"/>
j3 0:24b8a6f0a563 138 dac_preset_data_2 = 0x17,
j3 0:24b8a6f0a563 139
j3 0:24b8a6f0a563 140 /// 0x18 r/w tmp_mon_cfg Temperautre Monitor Configuration
j3 0:24b8a6f0a563 141 tmp_mon_cfg = 0x18,
j3 0:24b8a6f0a563 142
j3 0:24b8a6f0a563 143 /// 0x19 r/w tmp_mon_int_hi_thresh Internal Temeprature Hot Threshold
j3 0:24b8a6f0a563 144 tmp_mon_int_hi_thresh = 0x19,
j3 0:24b8a6f0a563 145
j3 0:24b8a6f0a563 146 /// 0x1a r/w tmp_mon_int_lo_thresh Internal Temeprature Cold Threshold
j3 0:24b8a6f0a563 147 tmp_mon_int_lo_thresh = 0x1a,
j3 0:24b8a6f0a563 148
j3 0:24b8a6f0a563 149 /// 0x1b r/w tmp_mon_ext1_hi_thresh External Temperature D0P/D0N Hot Threshold
j3 0:24b8a6f0a563 150 tmp_mon_ext1_hi_thresh = 0x1b,
j3 0:24b8a6f0a563 151
j3 0:24b8a6f0a563 152 /// 0x1c r/w tmp_mon_ext1_lo_thresh External Temperature D0P/D0N Cold Threshold
j3 0:24b8a6f0a563 153 tmp_mon_ext1_lo_thresh = 0x1c,
j3 0:24b8a6f0a563 154
j3 0:24b8a6f0a563 155 /// 0x1d r/w tmp_mon_ext2_hi_thresh External Temperature D1P/D1N Hot Threshold
j3 0:24b8a6f0a563 156 tmp_mon_ext2_hi_thresh = 0x1d,
j3 0:24b8a6f0a563 157
j3 0:24b8a6f0a563 158 /// 0x1e r/w tmp_mon_ext2_lo_thresh External Temperature D1P/D1N Cold Threshold
j3 0:24b8a6f0a563 159 tmp_mon_ext2_lo_thresh = 0x1e,
j3 0:24b8a6f0a563 160
j3 0:24b8a6f0a563 161 /// 0x1f r/w reserved_1F reserved
j3 0:24b8a6f0a563 162 reserved_1F = 0x1f,
j3 0:24b8a6f0a563 163
j3 0:24b8a6f0a563 164 /// 0x20 r/w port_cfg_00 PIXI Port 0 configuration register
j3 0:24b8a6f0a563 165 port_cfg_00 = 0x20,
j3 0:24b8a6f0a563 166
j3 0:24b8a6f0a563 167 /// 0x21 r/w port_cfg_01 PIXI Port 1 configuration register
j3 0:24b8a6f0a563 168 port_cfg_01 = 0x21,
j3 0:24b8a6f0a563 169
j3 0:24b8a6f0a563 170 /// 0x22 r/w port_cfg_02 PIXI Port 2 configuration register
j3 0:24b8a6f0a563 171 port_cfg_02 = 0x22,
j3 0:24b8a6f0a563 172
j3 0:24b8a6f0a563 173 /// 0x23 r/w port_cfg_03 PIXI Port 3 configuration register
j3 0:24b8a6f0a563 174 port_cfg_03 = 0x23,
j3 0:24b8a6f0a563 175
j3 0:24b8a6f0a563 176 /// 0x24 r/w port_cfg_04 PIXI Port 4 configuration register
j3 0:24b8a6f0a563 177 port_cfg_04 = 0x24,
j3 0:24b8a6f0a563 178
j3 0:24b8a6f0a563 179 /// 0x25 r/w port_cfg_05 PIXI Port 5 configuration register
j3 0:24b8a6f0a563 180 port_cfg_05 = 0x25,
j3 0:24b8a6f0a563 181
j3 0:24b8a6f0a563 182 /// 0x26 r/w port_cfg_06 PIXI Port 6 configuration register
j3 0:24b8a6f0a563 183 port_cfg_06 = 0x26,
j3 0:24b8a6f0a563 184
j3 0:24b8a6f0a563 185 /// 0x27 r/w port_cfg_07 PIXI Port 7 configuration register
j3 0:24b8a6f0a563 186 port_cfg_07 = 0x27,
j3 0:24b8a6f0a563 187
j3 0:24b8a6f0a563 188 /// 0x28 r/w port_cfg_08 PIXI Port 8 configuration register
j3 0:24b8a6f0a563 189 port_cfg_08 = 0x28,
j3 0:24b8a6f0a563 190
j3 0:24b8a6f0a563 191 /// 0x29 r/w port_cfg_09 PIXI Port 9 configuration register
j3 0:24b8a6f0a563 192 port_cfg_09 = 0x29,
j3 0:24b8a6f0a563 193
j3 0:24b8a6f0a563 194 /// 0x2a r/w port_cfg_10 PIXI Port 10 configuration register
j3 0:24b8a6f0a563 195 port_cfg_10 = 0x2a,
j3 0:24b8a6f0a563 196
j3 0:24b8a6f0a563 197 /// 0x2b r/w port_cfg_11 PIXI Port 11 configuration register
j3 0:24b8a6f0a563 198 port_cfg_11 = 0x2b,
j3 0:24b8a6f0a563 199
j3 0:24b8a6f0a563 200 /// 0x2c r/w port_cfg_12 PIXI Port 12 configuration register
j3 0:24b8a6f0a563 201 port_cfg_12 = 0x2c,
j3 0:24b8a6f0a563 202
j3 0:24b8a6f0a563 203 /// 0x2d r/w port_cfg_13 PIXI Port 13 configuration register
j3 0:24b8a6f0a563 204 port_cfg_13 = 0x2d,
j3 0:24b8a6f0a563 205
j3 0:24b8a6f0a563 206 /// 0x2e r/w port_cfg_14 PIXI Port 14 configuration register
j3 0:24b8a6f0a563 207 port_cfg_14 = 0x2e,
j3 0:24b8a6f0a563 208
j3 0:24b8a6f0a563 209 /// 0x2f r/w port_cfg_15 PIXI Port 15 configuration register
j3 0:24b8a6f0a563 210 port_cfg_15 = 0x2f,
j3 0:24b8a6f0a563 211
j3 0:24b8a6f0a563 212 /// 0x30 r/w port_cfg_16 PIXI Port 16 configuration register
j3 0:24b8a6f0a563 213 port_cfg_16 = 0x30,
j3 0:24b8a6f0a563 214
j3 0:24b8a6f0a563 215 /// 0x31 r/w port_cfg_17 PIXI Port 17 configuration register
j3 0:24b8a6f0a563 216 port_cfg_17 = 0x31,
j3 0:24b8a6f0a563 217
j3 0:24b8a6f0a563 218 /// 0x32 r/w port_cfg_18 PIXI Port 18 configuration register
j3 0:24b8a6f0a563 219 port_cfg_18 = 0x32,
j3 0:24b8a6f0a563 220
j3 0:24b8a6f0a563 221 /// 0x33 r/w port_cfg_19 PIXI Port 19 configuration register
j3 0:24b8a6f0a563 222 port_cfg_19 = 0x33,
j3 0:24b8a6f0a563 223
j3 0:24b8a6f0a563 224 /// 0x40 r/o adc_data_port_00 PIXI Port 0 Analog to Digital Converter register
j3 0:24b8a6f0a563 225 adc_data_port_00 = 0x40,
j3 0:24b8a6f0a563 226
j3 0:24b8a6f0a563 227 /// 0x41 r/o adc_data_port_01 PIXI Port 1 Analog to Digital Converter register
j3 0:24b8a6f0a563 228 adc_data_port_01 = 0x41,
j3 0:24b8a6f0a563 229
j3 0:24b8a6f0a563 230 /// 0x42 r/o adc_data_port_02 PIXI Port 2 Analog to Digital Converter register
j3 0:24b8a6f0a563 231 adc_data_port_02 = 0x42,
j3 0:24b8a6f0a563 232
j3 0:24b8a6f0a563 233 /// 0x43 r/o adc_data_port_03 PIXI Port 3 Analog to Digital Converter register
j3 0:24b8a6f0a563 234 adc_data_port_03 = 0x43,
j3 0:24b8a6f0a563 235
j3 0:24b8a6f0a563 236 /// 0x44 r/o adc_data_port_04 PIXI Port 4 Analog to Digital Converter register
j3 0:24b8a6f0a563 237 adc_data_port_04 = 0x44,
j3 0:24b8a6f0a563 238
j3 0:24b8a6f0a563 239 /// 0x45 r/o adc_data_port_05 PIXI Port 5 Analog to Digital Converter register
j3 0:24b8a6f0a563 240 adc_data_port_05 = 0x45,
j3 0:24b8a6f0a563 241
j3 0:24b8a6f0a563 242 /// 0x46 r/o adc_data_port_06 PIXI Port 6 Analog to Digital Converter register
j3 0:24b8a6f0a563 243 adc_data_port_06 = 0x46,
j3 0:24b8a6f0a563 244
j3 0:24b8a6f0a563 245 /// 0x47 r/o adc_data_port_07 PIXI Port 7 Analog to Digital Converter register
j3 0:24b8a6f0a563 246 adc_data_port_07 = 0x47,
j3 0:24b8a6f0a563 247
j3 0:24b8a6f0a563 248 /// 0x48 r/o adc_data_port_08 PIXI Port 8 Analog to Digital Converter register
j3 0:24b8a6f0a563 249 adc_data_port_08 = 0x48,
j3 0:24b8a6f0a563 250
j3 0:24b8a6f0a563 251 /// 0x49 r/o adc_data_port_09 PIXI Port 9 Analog to Digital Converter register
j3 0:24b8a6f0a563 252 adc_data_port_09 = 0x49,
j3 0:24b8a6f0a563 253
j3 0:24b8a6f0a563 254 /// 0x4a r/o adc_data_port_10 PIXI Port 10 Analog to Digital Converter register
j3 0:24b8a6f0a563 255 adc_data_port_10 = 0x4a,
j3 0:24b8a6f0a563 256
j3 0:24b8a6f0a563 257 /// 0x4b r/o adc_data_port_11 PIXI Port 11 Analog to Digital Converter register
j3 0:24b8a6f0a563 258 adc_data_port_11 = 0x4b,
j3 0:24b8a6f0a563 259
j3 0:24b8a6f0a563 260 /// 0x4c r/o adc_data_port_12 PIXI Port 12 Analog to Digital Converter register
j3 0:24b8a6f0a563 261 adc_data_port_12 = 0x4c,
j3 0:24b8a6f0a563 262
j3 0:24b8a6f0a563 263 /// 0x4d r/o adc_data_port_13 PIXI Port 13 Analog to Digital Converter register
j3 0:24b8a6f0a563 264 adc_data_port_13 = 0x4d,
j3 0:24b8a6f0a563 265
j3 0:24b8a6f0a563 266 /// 0x4e r/o adc_data_port_14 PIXI Port 14 Analog to Digital Converter register
j3 0:24b8a6f0a563 267 adc_data_port_14 = 0x4e,
j3 0:24b8a6f0a563 268
j3 0:24b8a6f0a563 269 /// 0x4f r/o adc_data_port_15 PIXI Port 15 Analog to Digital Converter register
j3 0:24b8a6f0a563 270 adc_data_port_15 = 0x4f,
j3 0:24b8a6f0a563 271
j3 0:24b8a6f0a563 272 /// 0x50 r/o adc_data_port_16 PIXI Port 16 Analog to Digital Converter register
j3 0:24b8a6f0a563 273 adc_data_port_16 = 0x50,
j3 0:24b8a6f0a563 274
j3 0:24b8a6f0a563 275 /// 0x51 r/o adc_data_port_17 PIXI Port 17 Analog to Digital Converter register
j3 0:24b8a6f0a563 276 adc_data_port_17 = 0x51,
j3 0:24b8a6f0a563 277
j3 0:24b8a6f0a563 278 /// 0x52 r/o adc_data_port_18 PIXI Port 18 Analog to Digital Converter register
j3 0:24b8a6f0a563 279 adc_data_port_18 = 0x52,
j3 0:24b8a6f0a563 280
j3 0:24b8a6f0a563 281 /// 0x53 r/o adc_data_port_19 PIXI Port 19 Analog to Digital Converter register
j3 0:24b8a6f0a563 282 adc_data_port_19 = 0x53,
j3 0:24b8a6f0a563 283
j3 0:24b8a6f0a563 284 /// 0x60 r/w dac_data_port_00 PIXI Port 0 Digital to Analog Converter register
j3 0:24b8a6f0a563 285 dac_data_port_00 = 0x60,
j3 0:24b8a6f0a563 286
j3 0:24b8a6f0a563 287 /// 0x61 r/w dac_data_port_01 PIXI Port 1 Digital to Analog Converter register
j3 0:24b8a6f0a563 288 dac_data_port_01 = 0x61,
j3 0:24b8a6f0a563 289
j3 0:24b8a6f0a563 290 /// 0x62 r/w dac_data_port_02 PIXI Port 2 Digital to Analog Converter register
j3 0:24b8a6f0a563 291 dac_data_port_02 = 0x62,
j3 0:24b8a6f0a563 292
j3 0:24b8a6f0a563 293 /// 0x63 r/w dac_data_port_03 PIXI Port 3 Digital to Analog Converter register
j3 0:24b8a6f0a563 294 dac_data_port_03 = 0x63,
j3 0:24b8a6f0a563 295
j3 0:24b8a6f0a563 296 /// 0x64 r/w dac_data_port_04 PIXI Port 4 Digital to Analog Converter register
j3 0:24b8a6f0a563 297 dac_data_port_04 = 0x64,
j3 0:24b8a6f0a563 298
j3 0:24b8a6f0a563 299 /// 0x65 r/w dac_data_port_05 PIXI Port 5 Digital to Analog Converter register
j3 0:24b8a6f0a563 300 dac_data_port_05 = 0x65,
j3 0:24b8a6f0a563 301
j3 0:24b8a6f0a563 302 /// 0x66 r/w dac_data_port_06 PIXI Port 6 Digital to Analog Converter register
j3 0:24b8a6f0a563 303 dac_data_port_06 = 0x66,
j3 0:24b8a6f0a563 304
j3 0:24b8a6f0a563 305 /// 0x67 r/w dac_data_port_07 PIXI Port 7 Digital to Analog Converter register
j3 0:24b8a6f0a563 306 dac_data_port_07 = 0x67,
j3 0:24b8a6f0a563 307
j3 0:24b8a6f0a563 308 /// 0x68 r/w dac_data_port_08 PIXI Port 8 Digital to Analog Converter register
j3 0:24b8a6f0a563 309 dac_data_port_08 = 0x68,
j3 0:24b8a6f0a563 310
j3 0:24b8a6f0a563 311 /// 0x69 r/w dac_data_port_09 PIXI Port 9 Digital to Analog Converter register
j3 0:24b8a6f0a563 312 dac_data_port_09 = 0x69,
j3 0:24b8a6f0a563 313
j3 0:24b8a6f0a563 314 /// 0x6a r/w dac_data_port_10 PIXI Port 10 Digital to Analog Converter register
j3 0:24b8a6f0a563 315 dac_data_port_10 = 0x6a,
j3 0:24b8a6f0a563 316
j3 0:24b8a6f0a563 317 /// 0x6b r/w dac_data_port_11 PIXI Port 11 Digital to Analog Converter register
j3 0:24b8a6f0a563 318 dac_data_port_11 = 0x6b,
j3 0:24b8a6f0a563 319
j3 0:24b8a6f0a563 320 /// 0x6c r/w dac_data_port_12 PIXI Port 12 Digital to Analog Converter register
j3 0:24b8a6f0a563 321 dac_data_port_12 = 0x6c,
j3 0:24b8a6f0a563 322
j3 0:24b8a6f0a563 323 /// 0x6d r/w dac_data_port_13 PIXI Port 13 Digital to Analog Converter register
j3 0:24b8a6f0a563 324 dac_data_port_13 = 0x6d,
j3 0:24b8a6f0a563 325
j3 0:24b8a6f0a563 326 /// 0x6e r/w dac_data_port_14 PIXI Port 14 Digital to Analog Converter register
j3 0:24b8a6f0a563 327 dac_data_port_14 = 0x6e,
j3 0:24b8a6f0a563 328
j3 0:24b8a6f0a563 329 /// 0x6f r/w dac_data_port_15 PIXI Port 15 Digital to Analog Converter register
j3 0:24b8a6f0a563 330 dac_data_port_15 = 0x6f,
j3 0:24b8a6f0a563 331
j3 0:24b8a6f0a563 332 /// 0x70 r/w dac_data_port_16 PIXI Port 16 Digital to Analog Converter register
j3 0:24b8a6f0a563 333 dac_data_port_16 = 0x70,
j3 0:24b8a6f0a563 334
j3 0:24b8a6f0a563 335 /// 0x71 r/w dac_data_port_17 PIXI Port 17 Digital to Analog Converter register
j3 0:24b8a6f0a563 336 dac_data_port_17 = 0x71,
j3 0:24b8a6f0a563 337
j3 0:24b8a6f0a563 338 /// 0x72 r/w dac_data_port_18 PIXI Port 18 Digital to Analog Converter register
j3 0:24b8a6f0a563 339 dac_data_port_18 = 0x72,
j3 0:24b8a6f0a563 340
j3 0:24b8a6f0a563 341 /// 0x73 r/w dac_data_port_19 PIXI Port 19 Digital to Analog Converter register
j3 0:24b8a6f0a563 342 dac_data_port_19 = 0x73,
j3 0:24b8a6f0a563 343
j3 0:24b8a6f0a563 344 } MAX11300RegAddress_t;
j3 0:24b8a6f0a563 345
j3 0:24b8a6f0a563 346 /// 0x00 r/o dev_id Device Identification
j3 0:24b8a6f0a563 347 /// <code>1111xxxxxxxxxxxx</code> PART Part field
j3 0:24b8a6f0a563 348 /// <code>xxxx11xxxxxxxxxx</code> REV Revision
j3 0:24b8a6f0a563 349 /// <code>xxxxxx11xxxxxxxx</code> IFMODE Inteface Mode
j3 0:24b8a6f0a563 350 /// <code>xxxxxxxx11xxxxxx</code> IFSP Inteface Speed
j3 0:24b8a6f0a563 351 /// <code>xxxxxxxxxx11xxxx</code> NBRPRTS Number of ports
j3 0:24b8a6f0a563 352 /// <code>xxxxxxxxxxxx11xx</code> RES Resolution
j3 0:24b8a6f0a563 353 /// <code>xxxxxxxxxxxxxx11</code> VRNG Voltage Range
j3 0:24b8a6f0a563 354 #define dev_id_PART 0xf000
j3 0:24b8a6f0a563 355 #define dev_id_REV 0x0c00
j3 0:24b8a6f0a563 356 #define dev_id_IFMODE 0x0300
j3 0:24b8a6f0a563 357 #define dev_id_IFSP 0x00c0
j3 0:24b8a6f0a563 358 #define dev_id_NBRPRTS 0x0030
j3 0:24b8a6f0a563 359 #define dev_id_RES 0x000c
j3 0:24b8a6f0a563 360 #define dev_id_VRNG 0x0003
j3 0:24b8a6f0a563 361
j3 0:24b8a6f0a563 362 /// 0x01 r/o interrupt_flag Interrupt flags
j3 0:24b8a6f0a563 363 /// <code>1xxxxxxxxxxxxxxx</code> VMON High Voltage Supply Monitor
j3 0:24b8a6f0a563 364 /// <code>x1xxxxxxxxxxxxxx</code> TMPEXT2HOT External Temperature D1P/D1N Hot
j3 0:24b8a6f0a563 365 /// <code>xx1xxxxxxxxxxxxx</code> TMPEXT2COLD External Temperature D1P/D1N Cold
j3 0:24b8a6f0a563 366 /// <code>xxx1xxxxxxxxxxxx</code> TMPEXT2NEW External Temperature D1P/D1N New
j3 0:24b8a6f0a563 367 /// <code>xxxx1xxxxxxxxxxx</code> TMPEXT1HOT External Temperature D0P/D0N Hot
j3 0:24b8a6f0a563 368 /// <code>xxxxx1xxxxxxxxxx</code> TMPEXT1COLD External Temperature D0P/D0N Cold
j3 0:24b8a6f0a563 369 /// <code>xxxxxx1xxxxxxxxx</code> TMPEXT1NEW External Temperature D0P/D0N New
j3 0:24b8a6f0a563 370 /// <code>xxxxxxx1xxxxxxxx</code> TMPINTHOT Internal Temeprature Hot
j3 0:24b8a6f0a563 371 /// <code>xxxxxxxx1xxxxxxx</code> TMPINTCOLD Internal Temeprature Cold
j3 0:24b8a6f0a563 372 /// <code>xxxxxxxxx1xxxxxx</code> TMPINTNEW Internal Temeprature New
j3 0:24b8a6f0a563 373 /// <code>xxxxxxxxxx1xxxxx</code> DACOI DAC over-current
j3 0:24b8a6f0a563 374 /// <code>xxxxxxxxxxx1xxxx</code> GPIDM GPI event missed
j3 0:24b8a6f0a563 375 /// <code>xxxxxxxxxxxx1xxx</code> GPIDR GPI event ready
j3 0:24b8a6f0a563 376 /// <code>xxxxxxxxxxxxx1xx</code> ADCDM ADC data missed
j3 0:24b8a6f0a563 377 /// <code>xxxxxxxxxxxxxx1x</code> ADCDR ADC data ready
j3 0:24b8a6f0a563 378 /// <code>xxxxxxxxxxxxxxx1</code> ADCFLAG ADC conversion/sweep complete
j3 0:24b8a6f0a563 379 #define interrupt_flag_VMON 0x8000
j3 0:24b8a6f0a563 380 #define interrupt_flag_TMPEXT2HOT 0x4000
j3 0:24b8a6f0a563 381 #define interrupt_flag_TMPEXT2COLD 0x2000
j3 0:24b8a6f0a563 382 #define interrupt_flag_TMPEXT2NEW 0x1000
j3 0:24b8a6f0a563 383 #define interrupt_flag_TMPEXT1HOT 0x0800
j3 0:24b8a6f0a563 384 #define interrupt_flag_TMPEXT1COLD 0x0400
j3 0:24b8a6f0a563 385 #define interrupt_flag_TMPEXT1NEW 0x0200
j3 0:24b8a6f0a563 386 #define interrupt_flag_TMPINTHOT 0x0100
j3 0:24b8a6f0a563 387 #define interrupt_flag_TMPINTCOLD 0x0080
j3 0:24b8a6f0a563 388 #define interrupt_flag_TMPINTNEW 0x0040
j3 0:24b8a6f0a563 389 #define interrupt_flag_DACOI 0x0020
j3 0:24b8a6f0a563 390 #define interrupt_flag_GPIDM 0x0010
j3 0:24b8a6f0a563 391 #define interrupt_flag_GPIDR 0x0008
j3 0:24b8a6f0a563 392 #define interrupt_flag_ADCDM 0x0004
j3 0:24b8a6f0a563 393 #define interrupt_flag_ADCDR 0x0002
j3 0:24b8a6f0a563 394 #define interrupt_flag_ADCFLAG 0x0001
j3 0:24b8a6f0a563 395
j3 0:24b8a6f0a563 396 /// 0x02 r/o adc_status_15_to_0 new ADC data available
j3 0:24b8a6f0a563 397 /// <code>1xxxxxxxxxxxxxxx</code> ADCST15 ADCST[15] new <see cref="adc_data_port_15"/>
j3 0:24b8a6f0a563 398 /// <code>x1xxxxxxxxxxxxxx</code> ADCST14 ADCST[14] new <see cref="adc_data_port_14"/>
j3 0:24b8a6f0a563 399 /// <code>xx1xxxxxxxxxxxxx</code> ADCST13 ADCST[13] new <see cref="adc_data_port_13"/>
j3 0:24b8a6f0a563 400 /// <code>xxx1xxxxxxxxxxxx</code> ADCST12 ADCST[12] new <see cref="adc_data_port_12"/>
j3 0:24b8a6f0a563 401 /// <code>xxxx1xxxxxxxxxxx</code> ADCST11 ADCST[11] new <see cref="adc_data_port_11"/>
j3 0:24b8a6f0a563 402 /// <code>xxxxx1xxxxxxxxxx</code> ADCST10 ADCST[10] new <see cref="adc_data_port_10"/>
j3 0:24b8a6f0a563 403 /// <code>xxxxxx1xxxxxxxxx</code> ADCST09 ADCST[9] new <see cref="adc_data_port_09"/>
j3 0:24b8a6f0a563 404 /// <code>xxxxxxx1xxxxxxxx</code> ADCST08 ADCST[8] new <see cref="adc_data_port_08"/>
j3 0:24b8a6f0a563 405 /// <code>xxxxxxxx1xxxxxxx</code> ADCST07 ADCST[7] new <see cref="adc_data_port_07"/>
j3 0:24b8a6f0a563 406 /// <code>xxxxxxxxx1xxxxxx</code> ADCST06 ADCST[6] new <see cref="adc_data_port_06"/>
j3 0:24b8a6f0a563 407 /// <code>xxxxxxxxxx1xxxxx</code> ADCST05 ADCST[5] new <see cref="adc_data_port_05"/>
j3 0:24b8a6f0a563 408 /// <code>xxxxxxxxxxx1xxxx</code> ADCST04 ADCST[4] new <see cref="adc_data_port_04"/>
j3 0:24b8a6f0a563 409 /// <code>xxxxxxxxxxxx1xxx</code> ADCST03 ADCST[3] new <see cref="adc_data_port_03"/>
j3 0:24b8a6f0a563 410 /// <code>xxxxxxxxxxxxx1xx</code> ADCST02 ADCST[2] new <see cref="adc_data_port_02"/>
j3 0:24b8a6f0a563 411 /// <code>xxxxxxxxxxxxxx1x</code> ADCST01 ADCST[1] new <see cref="adc_data_port_01"/>
j3 0:24b8a6f0a563 412 /// <code>xxxxxxxxxxxxxxx1</code> ADCST00 ADCST[0] new <see cref="adc_data_port_00"/>
j3 0:24b8a6f0a563 413 #define adc_status_15_to_0_ADCST15 0x8000
j3 0:24b8a6f0a563 414 #define adc_status_15_to_0_ADCST14 0x4000
j3 0:24b8a6f0a563 415 #define adc_status_15_to_0_ADCST13 0x2000
j3 0:24b8a6f0a563 416 #define adc_status_15_to_0_ADCST12 0x1000
j3 0:24b8a6f0a563 417 #define adc_status_15_to_0_ADCST11 0x0800
j3 0:24b8a6f0a563 418 #define adc_status_15_to_0_ADCST10 0x0400
j3 0:24b8a6f0a563 419 #define adc_status_15_to_0_ADCST09 0x0200
j3 0:24b8a6f0a563 420 #define adc_status_15_to_0_ADCST08 0x0100
j3 0:24b8a6f0a563 421 #define adc_status_15_to_0_ADCST07 0x0080
j3 0:24b8a6f0a563 422 #define adc_status_15_to_0_ADCST06 0x0040
j3 0:24b8a6f0a563 423 #define adc_status_15_to_0_ADCST05 0x0020
j3 0:24b8a6f0a563 424 #define adc_status_15_to_0_ADCST04 0x0010
j3 0:24b8a6f0a563 425 #define adc_status_15_to_0_ADCST03 0x0008
j3 0:24b8a6f0a563 426 #define adc_status_15_to_0_ADCST02 0x0004
j3 0:24b8a6f0a563 427 #define adc_status_15_to_0_ADCST01 0x0002
j3 0:24b8a6f0a563 428 #define adc_status_15_to_0_ADCST00 0x0001
j3 0:24b8a6f0a563 429
j3 0:24b8a6f0a563 430 /// 0x03 r/o adc_status_19_to_16 new ADC data available
j3 0:24b8a6f0a563 431 /// <code>1xxxxxxxxxxxxxxx</code> ADCST31 ADCST[31] new <see cref="adc_data_port_31"/>
j3 0:24b8a6f0a563 432 /// <code>x1xxxxxxxxxxxxxx</code> ADCST30 ADCST[30] new <see cref="adc_data_port_30"/>
j3 0:24b8a6f0a563 433 /// <code>xx1xxxxxxxxxxxxx</code> ADCST29 ADCST[29] new <see cref="adc_data_port_29"/>
j3 0:24b8a6f0a563 434 /// <code>xxx1xxxxxxxxxxxx</code> ADCST28 ADCST[28] new <see cref="adc_data_port_28"/>
j3 0:24b8a6f0a563 435 /// <code>xxxx1xxxxxxxxxxx</code> ADCST27 ADCST[27] new <see cref="adc_data_port_27"/>
j3 0:24b8a6f0a563 436 /// <code>xxxxx1xxxxxxxxxx</code> ADCST26 ADCST[26] new <see cref="adc_data_port_26"/>
j3 0:24b8a6f0a563 437 /// <code>xxxxxx1xxxxxxxxx</code> ADCST25 ADCST[25] new <see cref="adc_data_port_25"/>
j3 0:24b8a6f0a563 438 /// <code>xxxxxxx1xxxxxxxx</code> ADCST24 ADCST[24] new <see cref="adc_data_port_24"/>
j3 0:24b8a6f0a563 439 /// <code>xxxxxxxx1xxxxxxx</code> ADCST23 ADCST[23] new <see cref="adc_data_port_23"/>
j3 0:24b8a6f0a563 440 /// <code>xxxxxxxxx1xxxxxx</code> ADCST22 ADCST[22] new <see cref="adc_data_port_22"/>
j3 0:24b8a6f0a563 441 /// <code>xxxxxxxxxx1xxxxx</code> ADCST21 ADCST[21] new <see cref="adc_data_port_21"/>
j3 0:24b8a6f0a563 442 /// <code>xxxxxxxxxxx1xxxx</code> ADCST20 ADCST[20] new <see cref="adc_data_port_20"/>
j3 0:24b8a6f0a563 443 /// <code>xxxxxxxxxxxx1xxx</code> ADCST19 ADCST[19] new <see cref="adc_data_port_19"/>
j3 0:24b8a6f0a563 444 /// <code>xxxxxxxxxxxxx1xx</code> ADCST18 ADCST[18] new <see cref="adc_data_port_18"/>
j3 0:24b8a6f0a563 445 /// <code>xxxxxxxxxxxxxx1x</code> ADCST17 ADCST[17] new <see cref="adc_data_port_17"/>
j3 0:24b8a6f0a563 446 /// <code>xxxxxxxxxxxxxxx1</code> ADCST16 ADCST[16] new <see cref="adc_data_port_16"/>
j3 0:24b8a6f0a563 447 #define adc_status_19_to_16_ADCST31 0x8000
j3 0:24b8a6f0a563 448 #define adc_status_19_to_16_ADCST30 0x4000
j3 0:24b8a6f0a563 449 #define adc_status_19_to_16_ADCST29 0x2000
j3 0:24b8a6f0a563 450 #define adc_status_19_to_16_ADCST28 0x1000
j3 0:24b8a6f0a563 451 #define adc_status_19_to_16_ADCST27 0x0800
j3 0:24b8a6f0a563 452 #define adc_status_19_to_16_ADCST26 0x0400
j3 0:24b8a6f0a563 453 #define adc_status_19_to_16_ADCST25 0x0200
j3 0:24b8a6f0a563 454 #define adc_status_19_to_16_ADCST24 0x0100
j3 0:24b8a6f0a563 455 #define adc_status_19_to_16_ADCST23 0x0080
j3 0:24b8a6f0a563 456 #define adc_status_19_to_16_ADCST22 0x0040
j3 0:24b8a6f0a563 457 #define adc_status_19_to_16_ADCST21 0x0020
j3 0:24b8a6f0a563 458 #define adc_status_19_to_16_ADCST20 0x0010
j3 0:24b8a6f0a563 459 #define adc_status_19_to_16_ADCST19 0x0008
j3 0:24b8a6f0a563 460 #define adc_status_19_to_16_ADCST18 0x0004
j3 0:24b8a6f0a563 461 #define adc_status_19_to_16_ADCST17 0x0002
j3 0:24b8a6f0a563 462 #define adc_status_19_to_16_ADCST16 0x0001
j3 0:24b8a6f0a563 463
j3 0:24b8a6f0a563 464 /// 0x04 r/o dac_oi_status_15_to_0 DAC Overcurrent Interrupt
j3 0:24b8a6f0a563 465 /// <code>1xxxxxxxxxxxxxxx</code> DACOIST15 DACOIST[15] new <see cref="dac_data_port_15"/>
j3 0:24b8a6f0a563 466 /// <code>x1xxxxxxxxxxxxxx</code> DACOIST14 DACOIST[14] new <see cref="dac_data_port_14"/>
j3 0:24b8a6f0a563 467 /// <code>xx1xxxxxxxxxxxxx</code> DACOIST13 DACOIST[13] new <see cref="dac_data_port_13"/>
j3 0:24b8a6f0a563 468 /// <code>xxx1xxxxxxxxxxxx</code> DACOIST12 DACOIST[12] new <see cref="dac_data_port_12"/>
j3 0:24b8a6f0a563 469 /// <code>xxxx1xxxxxxxxxxx</code> DACOIST11 DACOIST[11] new <see cref="dac_data_port_11"/>
j3 0:24b8a6f0a563 470 /// <code>xxxxx1xxxxxxxxxx</code> DACOIST10 DACOIST[10] new <see cref="dac_data_port_10"/>
j3 0:24b8a6f0a563 471 /// <code>xxxxxx1xxxxxxxxx</code> DACOIST09 DACOIST[9] new <see cref="dac_data_port_09"/>
j3 0:24b8a6f0a563 472 /// <code>xxxxxxx1xxxxxxxx</code> DACOIST08 DACOIST[8] new <see cref="dac_data_port_08"/>
j3 0:24b8a6f0a563 473 /// <code>xxxxxxxx1xxxxxxx</code> DACOIST07 DACOIST[7] new <see cref="dac_data_port_07"/>
j3 0:24b8a6f0a563 474 /// <code>xxxxxxxxx1xxxxxx</code> DACOIST06 DACOIST[6] new <see cref="dac_data_port_06"/>
j3 0:24b8a6f0a563 475 /// <code>xxxxxxxxxx1xxxxx</code> DACOIST05 DACOIST[5] new <see cref="dac_data_port_05"/>
j3 0:24b8a6f0a563 476 /// <code>xxxxxxxxxxx1xxxx</code> DACOIST04 DACOIST[4] new <see cref="dac_data_port_04"/>
j3 0:24b8a6f0a563 477 /// <code>xxxxxxxxxxxx1xxx</code> DACOIST03 DACOIST[3] new <see cref="dac_data_port_03"/>
j3 0:24b8a6f0a563 478 /// <code>xxxxxxxxxxxxx1xx</code> DACOIST02 DACOIST[2] new <see cref="dac_data_port_02"/>
j3 0:24b8a6f0a563 479 /// <code>xxxxxxxxxxxxxx1x</code> DACOIST01 DACOIST[1] new <see cref="dac_data_port_01"/>
j3 0:24b8a6f0a563 480 /// <code>xxxxxxxxxxxxxxx1</code> DACOIST00 DACOIST[0] new <see cref="dac_data_port_00"/>
j3 0:24b8a6f0a563 481 #define dac_oi_status_15_to_0_DACOIST15 0x8000
j3 0:24b8a6f0a563 482 #define dac_oi_status_15_to_0_DACOIST14 0x4000
j3 0:24b8a6f0a563 483 #define dac_oi_status_15_to_0_DACOIST13 0x2000
j3 0:24b8a6f0a563 484 #define dac_oi_status_15_to_0_DACOIST12 0x1000
j3 0:24b8a6f0a563 485 #define dac_oi_status_15_to_0_DACOIST11 0x0800
j3 0:24b8a6f0a563 486 #define dac_oi_status_15_to_0_DACOIST10 0x0400
j3 0:24b8a6f0a563 487 #define dac_oi_status_15_to_0_DACOIST09 0x0200
j3 0:24b8a6f0a563 488 #define dac_oi_status_15_to_0_DACOIST08 0x0100
j3 0:24b8a6f0a563 489 #define dac_oi_status_15_to_0_DACOIST07 0x0080
j3 0:24b8a6f0a563 490 #define dac_oi_status_15_to_0_DACOIST06 0x0040
j3 0:24b8a6f0a563 491 #define dac_oi_status_15_to_0_DACOIST05 0x0020
j3 0:24b8a6f0a563 492 #define dac_oi_status_15_to_0_DACOIST04 0x0010
j3 0:24b8a6f0a563 493 #define dac_oi_status_15_to_0_DACOIST03 0x0008
j3 0:24b8a6f0a563 494 #define dac_oi_status_15_to_0_DACOIST02 0x0004
j3 0:24b8a6f0a563 495 #define dac_oi_status_15_to_0_DACOIST01 0x0002
j3 0:24b8a6f0a563 496 #define dac_oi_status_15_to_0_DACOIST00 0x0001
j3 0:24b8a6f0a563 497
j3 0:24b8a6f0a563 498 /// 0x05 r/o dac_oi_status_19_to_16 DAC Overcurrent Interrupt
j3 0:24b8a6f0a563 499 /// <code>1xxxxxxxxxxxxxxx</code> DACOIST31 DACOIST[31] new <see cref="dac_data_port_31"/>
j3 0:24b8a6f0a563 500 /// <code>x1xxxxxxxxxxxxxx</code> DACOIST30 DACOIST[30] new <see cref="dac_data_port_30"/>
j3 0:24b8a6f0a563 501 /// <code>xx1xxxxxxxxxxxxx</code> DACOIST29 DACOIST[29] new <see cref="dac_data_port_29"/>
j3 0:24b8a6f0a563 502 /// <code>xxx1xxxxxxxxxxxx</code> DACOIST28 DACOIST[28] new <see cref="dac_data_port_28"/>
j3 0:24b8a6f0a563 503 /// <code>xxxx1xxxxxxxxxxx</code> DACOIST27 DACOIST[27] new <see cref="dac_data_port_27"/>
j3 0:24b8a6f0a563 504 /// <code>xxxxx1xxxxxxxxxx</code> DACOIST26 DACOIST[26] new <see cref="dac_data_port_26"/>
j3 0:24b8a6f0a563 505 /// <code>xxxxxx1xxxxxxxxx</code> DACOIST25 DACOIST[25] new <see cref="dac_data_port_25"/>
j3 0:24b8a6f0a563 506 /// <code>xxxxxxx1xxxxxxxx</code> DACOIST24 DACOIST[24] new <see cref="dac_data_port_24"/>
j3 0:24b8a6f0a563 507 /// <code>xxxxxxxx1xxxxxxx</code> DACOIST23 DACOIST[23] new <see cref="dac_data_port_23"/>
j3 0:24b8a6f0a563 508 /// <code>xxxxxxxxx1xxxxxx</code> DACOIST22 DACOIST[22] new <see cref="dac_data_port_22"/>
j3 0:24b8a6f0a563 509 /// <code>xxxxxxxxxx1xxxxx</code> DACOIST21 DACOIST[21] new <see cref="dac_data_port_21"/>
j3 0:24b8a6f0a563 510 /// <code>xxxxxxxxxxx1xxxx</code> DACOIST20 DACOIST[20] new <see cref="dac_data_port_20"/>
j3 0:24b8a6f0a563 511 /// <code>xxxxxxxxxxxx1xxx</code> DACOIST19 DACOIST[19] new <see cref="dac_data_port_19"/>
j3 0:24b8a6f0a563 512 /// <code>xxxxxxxxxxxxx1xx</code> DACOIST18 DACOIST[18] new <see cref="dac_data_port_18"/>
j3 0:24b8a6f0a563 513 /// <code>xxxxxxxxxxxxxx1x</code> DACOIST17 DACOIST[17] new <see cref="dac_data_port_17"/>
j3 0:24b8a6f0a563 514 /// <code>xxxxxxxxxxxxxxx1</code> DACOIST16 DACOIST[16] new <see cref="dac_data_port_16"/>
j3 0:24b8a6f0a563 515 #define dac_oi_status_19_to_16_DACOIST31 0x8000
j3 0:24b8a6f0a563 516 #define dac_oi_status_19_to_16_DACOIST30 0x4000
j3 0:24b8a6f0a563 517 #define dac_oi_status_19_to_16_DACOIST29 0x2000
j3 0:24b8a6f0a563 518 #define dac_oi_status_19_to_16_DACOIST28 0x1000
j3 0:24b8a6f0a563 519 #define dac_oi_status_19_to_16_DACOIST27 0x0800
j3 0:24b8a6f0a563 520 #define dac_oi_status_19_to_16_DACOIST26 0x0400
j3 0:24b8a6f0a563 521 #define dac_oi_status_19_to_16_DACOIST25 0x0200
j3 0:24b8a6f0a563 522 #define dac_oi_status_19_to_16_DACOIST24 0x0100
j3 0:24b8a6f0a563 523 #define dac_oi_status_19_to_16_DACOIST23 0x0080
j3 0:24b8a6f0a563 524 #define dac_oi_status_19_to_16_DACOIST22 0x0040
j3 0:24b8a6f0a563 525 #define dac_oi_status_19_to_16_DACOIST21 0x0020
j3 0:24b8a6f0a563 526 #define dac_oi_status_19_to_16_DACOIST20 0x0010
j3 0:24b8a6f0a563 527 #define dac_oi_status_19_to_16_DACOIST19 0x0008
j3 0:24b8a6f0a563 528 #define dac_oi_status_19_to_16_DACOIST18 0x0004
j3 0:24b8a6f0a563 529 #define dac_oi_status_19_to_16_DACOIST17 0x0002
j3 0:24b8a6f0a563 530 #define dac_oi_status_19_to_16_DACOIST16 0x0001
j3 0:24b8a6f0a563 531
j3 0:24b8a6f0a563 532 /// 0x06 r/o gpi_status_15_to_0 GPI event ready
j3 0:24b8a6f0a563 533 /// <code>1xxxxxxxxxxxxxxx</code> GPIST15 GPIST[15]
j3 0:24b8a6f0a563 534 /// <code>x1xxxxxxxxxxxxxx</code> GPIST14 GPIST[14]
j3 0:24b8a6f0a563 535 /// <code>xx1xxxxxxxxxxxxx</code> GPIST13 GPIST[13]
j3 0:24b8a6f0a563 536 /// <code>xxx1xxxxxxxxxxxx</code> GPIST12 GPIST[12]
j3 0:24b8a6f0a563 537 /// <code>xxxx1xxxxxxxxxxx</code> GPIST11 GPIST[11]
j3 0:24b8a6f0a563 538 /// <code>xxxxx1xxxxxxxxxx</code> GPIST10 GPIST[10]
j3 0:24b8a6f0a563 539 /// <code>xxxxxx1xxxxxxxxx</code> GPIST09 GPIST[9]
j3 0:24b8a6f0a563 540 /// <code>xxxxxxx1xxxxxxxx</code> GPIST08 GPIST[8]
j3 0:24b8a6f0a563 541 /// <code>xxxxxxxx1xxxxxxx</code> GPIST07 GPIST[7]
j3 0:24b8a6f0a563 542 /// <code>xxxxxxxxx1xxxxxx</code> GPIST06 GPIST[6]
j3 0:24b8a6f0a563 543 /// <code>xxxxxxxxxx1xxxxx</code> GPIST05 GPIST[5]
j3 0:24b8a6f0a563 544 /// <code>xxxxxxxxxxx1xxxx</code> GPIST04 GPIST[4]
j3 0:24b8a6f0a563 545 /// <code>xxxxxxxxxxxx1xxx</code> GPIST03 GPIST[3]
j3 0:24b8a6f0a563 546 /// <code>xxxxxxxxxxxxx1xx</code> GPIST02 GPIST[2]
j3 0:24b8a6f0a563 547 /// <code>xxxxxxxxxxxxxx1x</code> GPIST01 GPIST[1]
j3 0:24b8a6f0a563 548 /// <code>xxxxxxxxxxxxxxx1</code> GPIST00 GPIST[0]
j3 0:24b8a6f0a563 549 #define gpi_status_15_to_0_GPIST15 0x8000
j3 0:24b8a6f0a563 550 #define gpi_status_15_to_0_GPIST14 0x4000
j3 0:24b8a6f0a563 551 #define gpi_status_15_to_0_GPIST13 0x2000
j3 0:24b8a6f0a563 552 #define gpi_status_15_to_0_GPIST12 0x1000
j3 0:24b8a6f0a563 553 #define gpi_status_15_to_0_GPIST11 0x0800
j3 0:24b8a6f0a563 554 #define gpi_status_15_to_0_GPIST10 0x0400
j3 0:24b8a6f0a563 555 #define gpi_status_15_to_0_GPIST09 0x0200
j3 0:24b8a6f0a563 556 #define gpi_status_15_to_0_GPIST08 0x0100
j3 0:24b8a6f0a563 557 #define gpi_status_15_to_0_GPIST07 0x0080
j3 0:24b8a6f0a563 558 #define gpi_status_15_to_0_GPIST06 0x0040
j3 0:24b8a6f0a563 559 #define gpi_status_15_to_0_GPIST05 0x0020
j3 0:24b8a6f0a563 560 #define gpi_status_15_to_0_GPIST04 0x0010
j3 0:24b8a6f0a563 561 #define gpi_status_15_to_0_GPIST03 0x0008
j3 0:24b8a6f0a563 562 #define gpi_status_15_to_0_GPIST02 0x0004
j3 0:24b8a6f0a563 563 #define gpi_status_15_to_0_GPIST01 0x0002
j3 0:24b8a6f0a563 564 #define gpi_status_15_to_0_GPIST00 0x0001
j3 0:24b8a6f0a563 565
j3 0:24b8a6f0a563 566 /// 0x07 r/o gpi_status_19_to_16 GPI event ready
j3 0:24b8a6f0a563 567 /// <code>1xxxxxxxxxxxxxxx</code> GPIST31 GPIST[31]
j3 0:24b8a6f0a563 568 /// <code>x1xxxxxxxxxxxxxx</code> GPIST30 GPIST[30]
j3 0:24b8a6f0a563 569 /// <code>xx1xxxxxxxxxxxxx</code> GPIST29 GPIST[29]
j3 0:24b8a6f0a563 570 /// <code>xxx1xxxxxxxxxxxx</code> GPIST28 GPIST[28]
j3 0:24b8a6f0a563 571 /// <code>xxxx1xxxxxxxxxxx</code> GPIST27 GPIST[27]
j3 0:24b8a6f0a563 572 /// <code>xxxxx1xxxxxxxxxx</code> GPIST26 GPIST[26]
j3 0:24b8a6f0a563 573 /// <code>xxxxxx1xxxxxxxxx</code> GPIST25 GPIST[25]
j3 0:24b8a6f0a563 574 /// <code>xxxxxxx1xxxxxxxx</code> GPIST24 GPIST[24]
j3 0:24b8a6f0a563 575 /// <code>xxxxxxxx1xxxxxxx</code> GPIST23 GPIST[23]
j3 0:24b8a6f0a563 576 /// <code>xxxxxxxxx1xxxxxx</code> GPIST22 GPIST[22]
j3 0:24b8a6f0a563 577 /// <code>xxxxxxxxxx1xxxxx</code> GPIST21 GPIST[21]
j3 0:24b8a6f0a563 578 /// <code>xxxxxxxxxxx1xxxx</code> GPIST20 GPIST[20]
j3 0:24b8a6f0a563 579 /// <code>xxxxxxxxxxxx1xxx</code> GPIST19 GPIST[19]
j3 0:24b8a6f0a563 580 /// <code>xxxxxxxxxxxxx1xx</code> GPIST18 GPIST[18]
j3 0:24b8a6f0a563 581 /// <code>xxxxxxxxxxxxxx1x</code> GPIST17 GPIST[17]
j3 0:24b8a6f0a563 582 /// <code>xxxxxxxxxxxxxxx1</code> GPIST16 GPIST[16]
j3 0:24b8a6f0a563 583 #define gpi_status_19_to_16_GPIST31 0x8000
j3 0:24b8a6f0a563 584 #define gpi_status_19_to_16_GPIST30 0x4000
j3 0:24b8a6f0a563 585 #define gpi_status_19_to_16_GPIST29 0x2000
j3 0:24b8a6f0a563 586 #define gpi_status_19_to_16_GPIST28 0x1000
j3 0:24b8a6f0a563 587 #define gpi_status_19_to_16_GPIST27 0x0800
j3 0:24b8a6f0a563 588 #define gpi_status_19_to_16_GPIST26 0x0400
j3 0:24b8a6f0a563 589 #define gpi_status_19_to_16_GPIST25 0x0200
j3 0:24b8a6f0a563 590 #define gpi_status_19_to_16_GPIST24 0x0100
j3 0:24b8a6f0a563 591 #define gpi_status_19_to_16_GPIST23 0x0080
j3 0:24b8a6f0a563 592 #define gpi_status_19_to_16_GPIST22 0x0040
j3 0:24b8a6f0a563 593 #define gpi_status_19_to_16_GPIST21 0x0020
j3 0:24b8a6f0a563 594 #define gpi_status_19_to_16_GPIST20 0x0010
j3 0:24b8a6f0a563 595 #define gpi_status_19_to_16_GPIST19 0x0008
j3 0:24b8a6f0a563 596 #define gpi_status_19_to_16_GPIST18 0x0004
j3 0:24b8a6f0a563 597 #define gpi_status_19_to_16_GPIST17 0x0002
j3 0:24b8a6f0a563 598 #define gpi_status_19_to_16_GPIST16 0x0001
j3 0:24b8a6f0a563 599
j3 0:24b8a6f0a563 600 /// 0x08 r/o tmp_int_data Internal Temeprature
j3 0:24b8a6f0a563 601 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement
j3 0:24b8a6f0a563 602 #define tmp_int_data_tempcode 0x0fff
j3 0:24b8a6f0a563 603
j3 0:24b8a6f0a563 604 /// 0x09 r/o tmp_ext1_data External Temperature D0P/D0N
j3 0:24b8a6f0a563 605 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement
j3 0:24b8a6f0a563 606 #define tmp_ext1_data_tempcode 0x0fff
j3 0:24b8a6f0a563 607
j3 0:24b8a6f0a563 608 /// 0x0a r/o tmp_ext2_data External Temperature D1P/D1N
j3 0:24b8a6f0a563 609 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement
j3 0:24b8a6f0a563 610 #define tmp_ext2_data_tempcode 0x0fff
j3 0:24b8a6f0a563 611
j3 0:24b8a6f0a563 612 /// 0x0b r/o gpi_data_15_to_0 GPI input ports data
j3 0:24b8a6f0a563 613 /// <code>1xxxxxxxxxxxxxxx</code> GPIDAT15 GPIDAT[15]
j3 0:24b8a6f0a563 614 /// <code>x1xxxxxxxxxxxxxx</code> GPIDAT14 GPIDAT[14]
j3 0:24b8a6f0a563 615 /// <code>xx1xxxxxxxxxxxxx</code> GPIDAT13 GPIDAT[13]
j3 0:24b8a6f0a563 616 /// <code>xxx1xxxxxxxxxxxx</code> GPIDAT12 GPIDAT[12]
j3 0:24b8a6f0a563 617 /// <code>xxxx1xxxxxxxxxxx</code> GPIDAT11 GPIDAT[11]
j3 0:24b8a6f0a563 618 /// <code>xxxxx1xxxxxxxxxx</code> GPIDAT10 GPIDAT[10]
j3 0:24b8a6f0a563 619 /// <code>xxxxxx1xxxxxxxxx</code> GPIDAT09 GPIDAT[9]
j3 0:24b8a6f0a563 620 /// <code>xxxxxxx1xxxxxxxx</code> GPIDAT08 GPIDAT[8]
j3 0:24b8a6f0a563 621 /// <code>xxxxxxxx1xxxxxxx</code> GPIDAT07 GPIDAT[7]
j3 0:24b8a6f0a563 622 /// <code>xxxxxxxxx1xxxxxx</code> GPIDAT06 GPIDAT[6]
j3 0:24b8a6f0a563 623 /// <code>xxxxxxxxxx1xxxxx</code> GPIDAT05 GPIDAT[5]
j3 0:24b8a6f0a563 624 /// <code>xxxxxxxxxxx1xxxx</code> GPIDAT04 GPIDAT[4]
j3 0:24b8a6f0a563 625 /// <code>xxxxxxxxxxxx1xxx</code> GPIDAT03 GPIDAT[3]
j3 0:24b8a6f0a563 626 /// <code>xxxxxxxxxxxxx1xx</code> GPIDAT02 GPIDAT[2]
j3 0:24b8a6f0a563 627 /// <code>xxxxxxxxxxxxxx1x</code> GPIDAT01 GPIDAT[1]
j3 0:24b8a6f0a563 628 /// <code>xxxxxxxxxxxxxxx1</code> GPIDAT00 GPIDAT[0]
j3 0:24b8a6f0a563 629 #define gpi_data_15_to_0_GPIDAT15 0x8000
j3 0:24b8a6f0a563 630 #define gpi_data_15_to_0_GPIDAT14 0x4000
j3 0:24b8a6f0a563 631 #define gpi_data_15_to_0_GPIDAT13 0x2000
j3 0:24b8a6f0a563 632 #define gpi_data_15_to_0_GPIDAT12 0x1000
j3 0:24b8a6f0a563 633 #define gpi_data_15_to_0_GPIDAT11 0x0800
j3 0:24b8a6f0a563 634 #define gpi_data_15_to_0_GPIDAT10 0x0400
j3 0:24b8a6f0a563 635 #define gpi_data_15_to_0_GPIDAT09 0x0200
j3 0:24b8a6f0a563 636 #define gpi_data_15_to_0_GPIDAT08 0x0100
j3 0:24b8a6f0a563 637 #define gpi_data_15_to_0_GPIDAT07 0x0080
j3 0:24b8a6f0a563 638 #define gpi_data_15_to_0_GPIDAT06 0x0040
j3 0:24b8a6f0a563 639 #define gpi_data_15_to_0_GPIDAT05 0x0020
j3 0:24b8a6f0a563 640 #define gpi_data_15_to_0_GPIDAT04 0x0010
j3 0:24b8a6f0a563 641 #define gpi_data_15_to_0_GPIDAT03 0x0008
j3 0:24b8a6f0a563 642 #define gpi_data_15_to_0_GPIDAT02 0x0004
j3 0:24b8a6f0a563 643 #define gpi_data_15_to_0_GPIDAT01 0x0002
j3 0:24b8a6f0a563 644 #define gpi_data_15_to_0_GPIDAT00 0x0001
j3 0:24b8a6f0a563 645
j3 0:24b8a6f0a563 646 /// 0x0c r/o gpi_data_19_to_16 GPI input ports data
j3 0:24b8a6f0a563 647 /// <code>1xxxxxxxxxxxxxxx</code> GPIDAT31 GPIDAT[31]
j3 0:24b8a6f0a563 648 /// <code>x1xxxxxxxxxxxxxx</code> GPIDAT30 GPIDAT[30]
j3 0:24b8a6f0a563 649 /// <code>xx1xxxxxxxxxxxxx</code> GPIDAT29 GPIDAT[29]
j3 0:24b8a6f0a563 650 /// <code>xxx1xxxxxxxxxxxx</code> GPIDAT28 GPIDAT[28]
j3 0:24b8a6f0a563 651 /// <code>xxxx1xxxxxxxxxxx</code> GPIDAT27 GPIDAT[27]
j3 0:24b8a6f0a563 652 /// <code>xxxxx1xxxxxxxxxx</code> GPIDAT26 GPIDAT[26]
j3 0:24b8a6f0a563 653 /// <code>xxxxxx1xxxxxxxxx</code> GPIDAT25 GPIDAT[25]
j3 0:24b8a6f0a563 654 /// <code>xxxxxxx1xxxxxxxx</code> GPIDAT24 GPIDAT[24]
j3 0:24b8a6f0a563 655 /// <code>xxxxxxxx1xxxxxxx</code> GPIDAT23 GPIDAT[23]
j3 0:24b8a6f0a563 656 /// <code>xxxxxxxxx1xxxxxx</code> GPIDAT22 GPIDAT[22]
j3 0:24b8a6f0a563 657 /// <code>xxxxxxxxxx1xxxxx</code> GPIDAT21 GPIDAT[21]
j3 0:24b8a6f0a563 658 /// <code>xxxxxxxxxxx1xxxx</code> GPIDAT20 GPIDAT[20]
j3 0:24b8a6f0a563 659 /// <code>xxxxxxxxxxxx1xxx</code> GPIDAT19 GPIDAT[19]
j3 0:24b8a6f0a563 660 /// <code>xxxxxxxxxxxxx1xx</code> GPIDAT18 GPIDAT[18]
j3 0:24b8a6f0a563 661 /// <code>xxxxxxxxxxxxxx1x</code> GPIDAT17 GPIDAT[17]
j3 0:24b8a6f0a563 662 /// <code>xxxxxxxxxxxxxxx1</code> GPIDAT16 GPIDAT[16]
j3 0:24b8a6f0a563 663 #define gpi_data_19_to_16_GPIDAT31 0x8000
j3 0:24b8a6f0a563 664 #define gpi_data_19_to_16_GPIDAT30 0x4000
j3 0:24b8a6f0a563 665 #define gpi_data_19_to_16_GPIDAT29 0x2000
j3 0:24b8a6f0a563 666 #define gpi_data_19_to_16_GPIDAT28 0x1000
j3 0:24b8a6f0a563 667 #define gpi_data_19_to_16_GPIDAT27 0x0800
j3 0:24b8a6f0a563 668 #define gpi_data_19_to_16_GPIDAT26 0x0400
j3 0:24b8a6f0a563 669 #define gpi_data_19_to_16_GPIDAT25 0x0200
j3 0:24b8a6f0a563 670 #define gpi_data_19_to_16_GPIDAT24 0x0100
j3 0:24b8a6f0a563 671 #define gpi_data_19_to_16_GPIDAT23 0x0080
j3 0:24b8a6f0a563 672 #define gpi_data_19_to_16_GPIDAT22 0x0040
j3 0:24b8a6f0a563 673 #define gpi_data_19_to_16_GPIDAT21 0x0020
j3 0:24b8a6f0a563 674 #define gpi_data_19_to_16_GPIDAT20 0x0010
j3 0:24b8a6f0a563 675 #define gpi_data_19_to_16_GPIDAT19 0x0008
j3 0:24b8a6f0a563 676 #define gpi_data_19_to_16_GPIDAT18 0x0004
j3 0:24b8a6f0a563 677 #define gpi_data_19_to_16_GPIDAT17 0x0002
j3 0:24b8a6f0a563 678 #define gpi_data_19_to_16_GPIDAT16 0x0001
j3 0:24b8a6f0a563 679
j3 0:24b8a6f0a563 680 /// 0x0d r/w gpo_data_15_to_0 GPO output ports data
j3 0:24b8a6f0a563 681 /// <code>1xxxxxxxxxxxxxxx</code> GPODAT15 GPODAT[15]
j3 0:24b8a6f0a563 682 /// <code>x1xxxxxxxxxxxxxx</code> GPODAT14 GPODAT[14]
j3 0:24b8a6f0a563 683 /// <code>xx1xxxxxxxxxxxxx</code> GPODAT13 GPODAT[13]
j3 0:24b8a6f0a563 684 /// <code>xxx1xxxxxxxxxxxx</code> GPODAT12 GPODAT[12]
j3 0:24b8a6f0a563 685 /// <code>xxxx1xxxxxxxxxxx</code> GPODAT11 GPODAT[11]
j3 0:24b8a6f0a563 686 /// <code>xxxxx1xxxxxxxxxx</code> GPODAT10 GPODAT[10]
j3 0:24b8a6f0a563 687 /// <code>xxxxxx1xxxxxxxxx</code> GPODAT09 GPODAT[9]
j3 0:24b8a6f0a563 688 /// <code>xxxxxxx1xxxxxxxx</code> GPODAT08 GPODAT[8]
j3 0:24b8a6f0a563 689 /// <code>xxxxxxxx1xxxxxxx</code> GPODAT07 GPODAT[7]
j3 0:24b8a6f0a563 690 /// <code>xxxxxxxxx1xxxxxx</code> GPODAT06 GPODAT[6]
j3 0:24b8a6f0a563 691 /// <code>xxxxxxxxxx1xxxxx</code> GPODAT05 GPODAT[5]
j3 0:24b8a6f0a563 692 /// <code>xxxxxxxxxxx1xxxx</code> GPODAT04 GPODAT[4]
j3 0:24b8a6f0a563 693 /// <code>xxxxxxxxxxxx1xxx</code> GPODAT03 GPODAT[3]
j3 0:24b8a6f0a563 694 /// <code>xxxxxxxxxxxxx1xx</code> GPODAT02 GPODAT[2]
j3 0:24b8a6f0a563 695 /// <code>xxxxxxxxxxxxxx1x</code> GPODAT01 GPODAT[1]
j3 0:24b8a6f0a563 696 /// <code>xxxxxxxxxxxxxxx1</code> GPODAT00 GPODAT[0]
j3 0:24b8a6f0a563 697 #define gpo_data_15_to_0_GPODAT15 0x8000
j3 0:24b8a6f0a563 698 #define gpo_data_15_to_0_GPODAT14 0x4000
j3 0:24b8a6f0a563 699 #define gpo_data_15_to_0_GPODAT13 0x2000
j3 0:24b8a6f0a563 700 #define gpo_data_15_to_0_GPODAT12 0x1000
j3 0:24b8a6f0a563 701 #define gpo_data_15_to_0_GPODAT11 0x0800
j3 0:24b8a6f0a563 702 #define gpo_data_15_to_0_GPODAT10 0x0400
j3 0:24b8a6f0a563 703 #define gpo_data_15_to_0_GPODAT09 0x0200
j3 0:24b8a6f0a563 704 #define gpo_data_15_to_0_GPODAT08 0x0100
j3 0:24b8a6f0a563 705 #define gpo_data_15_to_0_GPODAT07 0x0080
j3 0:24b8a6f0a563 706 #define gpo_data_15_to_0_GPODAT06 0x0040
j3 0:24b8a6f0a563 707 #define gpo_data_15_to_0_GPODAT05 0x0020
j3 0:24b8a6f0a563 708 #define gpo_data_15_to_0_GPODAT04 0x0010
j3 0:24b8a6f0a563 709 #define gpo_data_15_to_0_GPODAT03 0x0008
j3 0:24b8a6f0a563 710 #define gpo_data_15_to_0_GPODAT02 0x0004
j3 0:24b8a6f0a563 711 #define gpo_data_15_to_0_GPODAT01 0x0002
j3 0:24b8a6f0a563 712 #define gpo_data_15_to_0_GPODAT00 0x0001
j3 0:24b8a6f0a563 713 #define gpo_data_15_to_0_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 714
j3 0:24b8a6f0a563 715 /// 0x0e r/w gpo_data_19_to_16 GPO output ports data
j3 0:24b8a6f0a563 716 /// <code>1xxxxxxxxxxxxxxx</code> GPODAT31 GPODAT[31]
j3 0:24b8a6f0a563 717 /// <code>x1xxxxxxxxxxxxxx</code> GPODAT30 GPODAT[30]
j3 0:24b8a6f0a563 718 /// <code>xx1xxxxxxxxxxxxx</code> GPODAT29 GPODAT[29]
j3 0:24b8a6f0a563 719 /// <code>xxx1xxxxxxxxxxxx</code> GPODAT28 GPODAT[28]
j3 0:24b8a6f0a563 720 /// <code>xxxx1xxxxxxxxxxx</code> GPODAT27 GPODAT[27]
j3 0:24b8a6f0a563 721 /// <code>xxxxx1xxxxxxxxxx</code> GPODAT26 GPODAT[26]
j3 0:24b8a6f0a563 722 /// <code>xxxxxx1xxxxxxxxx</code> GPODAT25 GPODAT[25]
j3 0:24b8a6f0a563 723 /// <code>xxxxxxx1xxxxxxxx</code> GPODAT24 GPODAT[24]
j3 0:24b8a6f0a563 724 /// <code>xxxxxxxx1xxxxxxx</code> GPODAT23 GPODAT[23]
j3 0:24b8a6f0a563 725 /// <code>xxxxxxxxx1xxxxxx</code> GPODAT22 GPODAT[22]
j3 0:24b8a6f0a563 726 /// <code>xxxxxxxxxx1xxxxx</code> GPODAT21 GPODAT[21]
j3 0:24b8a6f0a563 727 /// <code>xxxxxxxxxxx1xxxx</code> GPODAT20 GPODAT[20]
j3 0:24b8a6f0a563 728 /// <code>xxxxxxxxxxxx1xxx</code> GPODAT19 GPODAT[19]
j3 0:24b8a6f0a563 729 /// <code>xxxxxxxxxxxxx1xx</code> GPODAT18 GPODAT[18]
j3 0:24b8a6f0a563 730 /// <code>xxxxxxxxxxxxxx1x</code> GPODAT17 GPODAT[17]
j3 0:24b8a6f0a563 731 /// <code>xxxxxxxxxxxxxxx1</code> GPODAT16 GPODAT[16]
j3 0:24b8a6f0a563 732 #define gpo_data_19_to_16_GPODAT31 0x8000
j3 0:24b8a6f0a563 733 #define gpo_data_19_to_16_GPODAT30 0x4000
j3 0:24b8a6f0a563 734 #define gpo_data_19_to_16_GPODAT29 0x2000
j3 0:24b8a6f0a563 735 #define gpo_data_19_to_16_GPODAT28 0x1000
j3 0:24b8a6f0a563 736 #define gpo_data_19_to_16_GPODAT27 0x0800
j3 0:24b8a6f0a563 737 #define gpo_data_19_to_16_GPODAT26 0x0400
j3 0:24b8a6f0a563 738 #define gpo_data_19_to_16_GPODAT25 0x0200
j3 0:24b8a6f0a563 739 #define gpo_data_19_to_16_GPODAT24 0x0100
j3 0:24b8a6f0a563 740 #define gpo_data_19_to_16_GPODAT23 0x0080
j3 0:24b8a6f0a563 741 #define gpo_data_19_to_16_GPODAT22 0x0040
j3 0:24b8a6f0a563 742 #define gpo_data_19_to_16_GPODAT21 0x0020
j3 0:24b8a6f0a563 743 #define gpo_data_19_to_16_GPODAT20 0x0010
j3 0:24b8a6f0a563 744 #define gpo_data_19_to_16_GPODAT19 0x0008
j3 0:24b8a6f0a563 745 #define gpo_data_19_to_16_GPODAT18 0x0004
j3 0:24b8a6f0a563 746 #define gpo_data_19_to_16_GPODAT17 0x0002
j3 0:24b8a6f0a563 747 #define gpo_data_19_to_16_GPODAT16 0x0001
j3 0:24b8a6f0a563 748 #define gpo_data_19_to_16_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 749
j3 0:24b8a6f0a563 750 /// 0x0f r/o reserved_0F reserved
j3 0:24b8a6f0a563 751
j3 0:24b8a6f0a563 752
j3 0:24b8a6f0a563 753 /// 0x10 r/w device_control Global device control register
j3 0:24b8a6f0a563 754 /// <code>1xxxxxxxxxxxxxxx</code> RESET Soft reset command
j3 0:24b8a6f0a563 755 /// <code>x1xxxxxxxxxxxxxx</code> BRST Burst Mode
j3 0:24b8a6f0a563 756 /// <code>xx1xxxxxxxxxxxxx</code> LPEN Low Power Enable
j3 0:24b8a6f0a563 757 /// <code>xxx1xxxxxxxxxxxx</code> RS_CANCEL series resistance cancelation on external temperature monitors D0P/D0N and D1P/D1N
j3 0:24b8a6f0a563 758 /// <code>xxxx1xxxxxxxxxxx</code> TMPPER temperature monitor period
j3 0:24b8a6f0a563 759 /// <code>xxxxx1xxxxxxxxxx</code> TMPCTLEXT1 monitor external temperature D1P/D1N
j3 0:24b8a6f0a563 760 /// <code>xxxxxx1xxxxxxxxx</code> TMPCTLEXT0 monitor external temperature D0P/D0N
j3 0:24b8a6f0a563 761 /// <code>xxxxxxx1xxxxxxxx</code> TMPCTLINT monitor internal temperature
j3 0:24b8a6f0a563 762 /// <code>xxxxxxxx1xxxxxxx</code> THSHDN Thermal Shutdown
j3 0:24b8a6f0a563 763 /// <code>xxxxxxxxx1xxxxxx</code> DACREF DAC voltage reference
j3 0:24b8a6f0a563 764 /// <code>xxxxxxxxxx11xxxx</code> ADCCONV ADC conversion rate
j3 0:24b8a6f0a563 765 /// <code>xxxxxxxxxxxx11xx</code> DACCTL DAC update mode
j3 0:24b8a6f0a563 766 /// <code>xxxxxxxxxxxxxx11</code> ADCCTL ADC conversion mode
j3 0:24b8a6f0a563 767 #define device_control_RESET 0x8000
j3 0:24b8a6f0a563 768 #define device_control_BRST 0x4000
j3 0:24b8a6f0a563 769 #define device_control_LPEN 0x2000
j3 0:24b8a6f0a563 770 #define device_control_RS_CANCEL 0x1000
j3 0:24b8a6f0a563 771 #define device_control_TMPPER 0x0800
j3 0:24b8a6f0a563 772 #define device_control_TMPCTLEXT1 0x0400
j3 0:24b8a6f0a563 773 #define device_control_TMPCTLEXT0 0x0200
j3 0:24b8a6f0a563 774 #define device_control_TMPCTLINT 0x0100
j3 0:24b8a6f0a563 775 #define device_control_THSHDN 0x0080
j3 0:24b8a6f0a563 776 #define device_control_DACREF 0x0040
j3 0:24b8a6f0a563 777 #define device_control_ADCCONV 0x0030
j3 0:24b8a6f0a563 778 #define device_control_DACCTL 0x000c
j3 0:24b8a6f0a563 779 #define device_control_ADCCTL 0x0003
j3 1:03c04017a728 780 #define device_control_DESIGNVALUE 0x00f2
j3 0:24b8a6f0a563 781
j3 0:24b8a6f0a563 782 /// 0x11 r/w interrupt_mask interrupt mask (1 = disable interrupt source)
j3 0:24b8a6f0a563 783 /// <code>1xxxxxxxxxxxxxxx</code> VMON High Voltage Supply Monitor
j3 0:24b8a6f0a563 784 /// <code>x1xxxxxxxxxxxxxx</code> TMPEXT2HOT External Temperature D1P/D1N Hot
j3 0:24b8a6f0a563 785 /// <code>xx1xxxxxxxxxxxxx</code> TMPEXT2COLD External Temperature D1P/D1N Cold
j3 0:24b8a6f0a563 786 /// <code>xxx1xxxxxxxxxxxx</code> TMPEXT2NEW External Temperature D1P/D1N New
j3 0:24b8a6f0a563 787 /// <code>xxxx1xxxxxxxxxxx</code> TMPEXT1HOT External Temperature D0P/D0N Hot
j3 0:24b8a6f0a563 788 /// <code>xxxxx1xxxxxxxxxx</code> TMPEXT1COLD External Temperature D0P/D0N Cold
j3 0:24b8a6f0a563 789 /// <code>xxxxxx1xxxxxxxxx</code> TMPEXT1NEW External Temperature D0P/D0N New
j3 0:24b8a6f0a563 790 /// <code>xxxxxxx1xxxxxxxx</code> TMPINTHOT Internal Temeprature Hot
j3 0:24b8a6f0a563 791 /// <code>xxxxxxxx1xxxxxxx</code> TMPINTCOLD Internal Temeprature Cold
j3 0:24b8a6f0a563 792 /// <code>xxxxxxxxx1xxxxxx</code> TMPINTNEW Internal Temeprature New
j3 0:24b8a6f0a563 793 /// <code>xxxxxxxxxx1xxxxx</code> DACOI DAC over-current
j3 0:24b8a6f0a563 794 /// <code>xxxxxxxxxxx1xxxx</code> GPIDM GPI event missed
j3 0:24b8a6f0a563 795 /// <code>xxxxxxxxxxxx1xxx</code> GPIDR GPI event ready
j3 0:24b8a6f0a563 796 /// <code>xxxxxxxxxxxxx1xx</code> ADCDM ADC data missed
j3 0:24b8a6f0a563 797 /// <code>xxxxxxxxxxxxxx1x</code> ADCDR ADC data ready
j3 0:24b8a6f0a563 798 /// <code>xxxxxxxxxxxxxxx1</code> ADCFLAG ADC conversion/sweep complete
j3 0:24b8a6f0a563 799 #define interrupt_mask_VMON 0x8000
j3 0:24b8a6f0a563 800 #define interrupt_mask_TMPEXT2HOT 0x4000
j3 0:24b8a6f0a563 801 #define interrupt_mask_TMPEXT2COLD 0x2000
j3 0:24b8a6f0a563 802 #define interrupt_mask_TMPEXT2NEW 0x1000
j3 0:24b8a6f0a563 803 #define interrupt_mask_TMPEXT1HOT 0x0800
j3 0:24b8a6f0a563 804 #define interrupt_mask_TMPEXT1COLD 0x0400
j3 0:24b8a6f0a563 805 #define interrupt_mask_TMPEXT1NEW 0x0200
j3 0:24b8a6f0a563 806 #define interrupt_mask_TMPINTHOT 0x0100
j3 0:24b8a6f0a563 807 #define interrupt_mask_TMPINTCOLD 0x0080
j3 0:24b8a6f0a563 808 #define interrupt_mask_TMPINTNEW 0x0040
j3 0:24b8a6f0a563 809 #define interrupt_mask_DACOI 0x0020
j3 0:24b8a6f0a563 810 #define interrupt_mask_GPIDM 0x0010
j3 0:24b8a6f0a563 811 #define interrupt_mask_GPIDR 0x0008
j3 0:24b8a6f0a563 812 #define interrupt_mask_ADCDM 0x0004
j3 0:24b8a6f0a563 813 #define interrupt_mask_ADCDR 0x0002
j3 0:24b8a6f0a563 814 #define interrupt_mask_ADCFLAG 0x0001
j3 0:24b8a6f0a563 815 #define interrupt_mask_DESIGNVALUE 0xffff
j3 0:24b8a6f0a563 816
j3 0:24b8a6f0a563 817 /// 0x12 r/w gpi_irqmode_7_to_0 xxxxxx
j3 0:24b8a6f0a563 818 /// <code>11xxxxxxxxxxxxxx</code> GPIMD07 GPIMD[7]
j3 0:24b8a6f0a563 819 /// <code>xx11xxxxxxxxxxxx</code> GPIMD06 GPIMD[6]
j3 0:24b8a6f0a563 820 /// <code>xxxx11xxxxxxxxxx</code> GPIMD05 GPIMD[5]
j3 0:24b8a6f0a563 821 /// <code>xxxxxx11xxxxxxxx</code> GPIMD04 GPIMD[4]
j3 0:24b8a6f0a563 822 /// <code>xxxxxxxx11xxxxxx</code> GPIMD03 GPIMD[3]
j3 0:24b8a6f0a563 823 /// <code>xxxxxxxxxx11xxxx</code> GPIMD02 GPIMD[2]
j3 0:24b8a6f0a563 824 /// <code>xxxxxxxxxxxx11xx</code> GPIMD01 GPIMD[1]
j3 0:24b8a6f0a563 825 /// <code>xxxxxxxxxxxxxx11</code> GPIMD00 GPIMD[0]
j3 0:24b8a6f0a563 826 #define gpi_irqmode_7_to_0_GPIMD07 0xc000
j3 0:24b8a6f0a563 827 #define gpi_irqmode_7_to_0_GPIMD06 0x3000
j3 0:24b8a6f0a563 828 #define gpi_irqmode_7_to_0_GPIMD05 0x0c00
j3 0:24b8a6f0a563 829 #define gpi_irqmode_7_to_0_GPIMD04 0x0300
j3 0:24b8a6f0a563 830 #define gpi_irqmode_7_to_0_GPIMD03 0x00c0
j3 0:24b8a6f0a563 831 #define gpi_irqmode_7_to_0_GPIMD02 0x0030
j3 0:24b8a6f0a563 832 #define gpi_irqmode_7_to_0_GPIMD01 0x000c
j3 0:24b8a6f0a563 833 #define gpi_irqmode_7_to_0_GPIMD00 0x0003
j3 0:24b8a6f0a563 834 #define gpi_irqmode_7_to_0_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 835
j3 0:24b8a6f0a563 836 /// 0x13 r/w gpi_irqmode_15_to_8 xxxxxx
j3 0:24b8a6f0a563 837 /// <code>11xxxxxxxxxxxxxx</code> GPIMD15 GPIMD[15]
j3 0:24b8a6f0a563 838 /// <code>xx11xxxxxxxxxxxx</code> GPIMD14 GPIMD[14]
j3 0:24b8a6f0a563 839 /// <code>xxxx11xxxxxxxxxx</code> GPIMD13 GPIMD[13]
j3 0:24b8a6f0a563 840 /// <code>xxxxxx11xxxxxxxx</code> GPIMD12 GPIMD[12]
j3 0:24b8a6f0a563 841 /// <code>xxxxxxxx11xxxxxx</code> GPIMD11 GPIMD[11]
j3 0:24b8a6f0a563 842 /// <code>xxxxxxxxxx11xxxx</code> GPIMD10 GPIMD[10]
j3 0:24b8a6f0a563 843 /// <code>xxxxxxxxxxxx11xx</code> GPIMD09 GPIMD[9]
j3 0:24b8a6f0a563 844 /// <code>xxxxxxxxxxxxxx11</code> GPIMD08 GPIMD[8]
j3 0:24b8a6f0a563 845 #define gpi_irqmode_15_to_8_GPIMD15 0xc000
j3 0:24b8a6f0a563 846 #define gpi_irqmode_15_to_8_GPIMD14 0x3000
j3 0:24b8a6f0a563 847 #define gpi_irqmode_15_to_8_GPIMD13 0x0c00
j3 0:24b8a6f0a563 848 #define gpi_irqmode_15_to_8_GPIMD12 0x0300
j3 0:24b8a6f0a563 849 #define gpi_irqmode_15_to_8_GPIMD11 0x00c0
j3 0:24b8a6f0a563 850 #define gpi_irqmode_15_to_8_GPIMD10 0x0030
j3 0:24b8a6f0a563 851 #define gpi_irqmode_15_to_8_GPIMD09 0x000c
j3 0:24b8a6f0a563 852 #define gpi_irqmode_15_to_8_GPIMD08 0x0003
j3 0:24b8a6f0a563 853 #define gpi_irqmode_15_to_8_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 854
j3 0:24b8a6f0a563 855 /// 0x14 r/w gpi_irqmode_19_to_16 xxxxxx
j3 0:24b8a6f0a563 856 /// <code>11xxxxxxxxxxxxxx</code> GPIMD23 GPIMD[23]
j3 0:24b8a6f0a563 857 /// <code>xx11xxxxxxxxxxxx</code> GPIMD22 GPIMD[22]
j3 0:24b8a6f0a563 858 /// <code>xxxx11xxxxxxxxxx</code> GPIMD21 GPIMD[21]
j3 0:24b8a6f0a563 859 /// <code>xxxxxx11xxxxxxxx</code> GPIMD20 GPIMD[20]
j3 0:24b8a6f0a563 860 /// <code>xxxxxxxx11xxxxxx</code> GPIMD19 GPIMD[19]
j3 0:24b8a6f0a563 861 /// <code>xxxxxxxxxx11xxxx</code> GPIMD18 GPIMD[18]
j3 0:24b8a6f0a563 862 /// <code>xxxxxxxxxxxx11xx</code> GPIMD17 GPIMD[17]
j3 0:24b8a6f0a563 863 /// <code>xxxxxxxxxxxxxx11</code> GPIMD16 GPIMD[16]
j3 0:24b8a6f0a563 864 #define gpi_irqmode_19_to_16_GPIMD23 0xc000
j3 0:24b8a6f0a563 865 #define gpi_irqmode_19_to_16_GPIMD22 0x3000
j3 0:24b8a6f0a563 866 #define gpi_irqmode_19_to_16_GPIMD21 0x0c00
j3 0:24b8a6f0a563 867 #define gpi_irqmode_19_to_16_GPIMD20 0x0300
j3 0:24b8a6f0a563 868 #define gpi_irqmode_19_to_16_GPIMD19 0x00c0
j3 0:24b8a6f0a563 869 #define gpi_irqmode_19_to_16_GPIMD18 0x0030
j3 0:24b8a6f0a563 870 #define gpi_irqmode_19_to_16_GPIMD17 0x000c
j3 0:24b8a6f0a563 871 #define gpi_irqmode_19_to_16_GPIMD16 0x0003
j3 0:24b8a6f0a563 872 #define gpi_irqmode_19_to_16_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 873
j3 0:24b8a6f0a563 874 /// 0x15 r/w gpi_irqmode_31_to_24 xxxxxx
j3 0:24b8a6f0a563 875 /// <code>11xxxxxxxxxxxxxx</code> GPIMD31 GPIMD[31]
j3 0:24b8a6f0a563 876 /// <code>xx11xxxxxxxxxxxx</code> GPIMD30 GPIMD[30]
j3 0:24b8a6f0a563 877 /// <code>xxxx11xxxxxxxxxx</code> GPIMD29 GPIMD[29]
j3 0:24b8a6f0a563 878 /// <code>xxxxxx11xxxxxxxx</code> GPIMD28 GPIMD[28]
j3 0:24b8a6f0a563 879 /// <code>xxxxxxxx11xxxxxx</code> GPIMD27 GPIMD[27]
j3 0:24b8a6f0a563 880 /// <code>xxxxxxxxxx11xxxx</code> GPIMD26 GPIMD[26]
j3 0:24b8a6f0a563 881 /// <code>xxxxxxxxxxxx11xx</code> GPIMD25 GPIMD[25]
j3 0:24b8a6f0a563 882 /// <code>xxxxxxxxxxxxxx11</code> GPIMD24 GPIMD[24]
j3 0:24b8a6f0a563 883 #define gpi_irqmode_31_to_24_GPIMD31 0xc000
j3 0:24b8a6f0a563 884 #define gpi_irqmode_31_to_24_GPIMD30 0x3000
j3 0:24b8a6f0a563 885 #define gpi_irqmode_31_to_24_GPIMD29 0x0c00
j3 0:24b8a6f0a563 886 #define gpi_irqmode_31_to_24_GPIMD28 0x0300
j3 0:24b8a6f0a563 887 #define gpi_irqmode_31_to_24_GPIMD27 0x00c0
j3 0:24b8a6f0a563 888 #define gpi_irqmode_31_to_24_GPIMD26 0x0030
j3 0:24b8a6f0a563 889 #define gpi_irqmode_31_to_24_GPIMD25 0x000c
j3 0:24b8a6f0a563 890 #define gpi_irqmode_31_to_24_GPIMD24 0x0003
j3 0:24b8a6f0a563 891
j3 0:24b8a6f0a563 892 /// 0x16 r/w dac_preset_data_1 DAC preset activated by <see cref="device_control"/>
j3 0:24b8a6f0a563 893 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 894 #define dac_preset_data_1_daccode 0x0fff
j3 0:24b8a6f0a563 895 #define dac_preset_data_1_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 896
j3 0:24b8a6f0a563 897 /// 0x17 r/w dac_preset_data_2 DAC preset activated by <see cref="device_control"/>
j3 0:24b8a6f0a563 898 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 899 #define dac_preset_data_2_daccode 0x0fff
j3 0:24b8a6f0a563 900 #define dac_preset_data_2_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 901
j3 0:24b8a6f0a563 902 /// 0x18 r/w tmp_mon_cfg Temperautre Monitor Configuration
j3 0:24b8a6f0a563 903 /// <code>xxxxxxxxxx11xxxx</code> TMPEXT2MONCFG average 4, 8, 16, or 32 measurements
j3 0:24b8a6f0a563 904 /// <code>xxxxxxxxxxxx11xx</code> TMPEXT1MONCFG average 4, 8, 16, or 32 measurements
j3 0:24b8a6f0a563 905 /// <code>xxxxxxxxxxxxxx11</code> TMPINTMONCFG average 4, 8, 16, or 32 measurements
j3 0:24b8a6f0a563 906 #define tmp_mon_cfg_TMPEXT2MONCFG 0x0030
j3 0:24b8a6f0a563 907 #define tmp_mon_cfg_TMPEXT1MONCFG 0x000c
j3 0:24b8a6f0a563 908 #define tmp_mon_cfg_TMPINTMONCFG 0x0003
j3 0:24b8a6f0a563 909
j3 0:24b8a6f0a563 910 /// 0x19 r/w tmp_mon_int_hi_thresh Internal Temeprature Hot Threshold
j3 0:24b8a6f0a563 911 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement
j3 0:24b8a6f0a563 912 #define tmp_mon_int_hi_thresh_tempcode 0x0fff
j3 0:24b8a6f0a563 913 #define tmp_mon_int_hi_thresh_DESIGNVALUE 0x07ff
j3 0:24b8a6f0a563 914
j3 0:24b8a6f0a563 915 /// 0x1a r/w tmp_mon_int_lo_thresh Internal Temeprature Cold Threshold
j3 0:24b8a6f0a563 916 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement
j3 0:24b8a6f0a563 917 #define tmp_mon_int_lo_thresh_tempcode 0x0fff
j3 0:24b8a6f0a563 918 #define tmp_mon_int_lo_thresh_DESIGNVALUE 0x0800
j3 0:24b8a6f0a563 919
j3 0:24b8a6f0a563 920 /// 0x1b r/w tmp_mon_ext1_hi_thresh External Temperature D0P/D0N Hot Threshold
j3 0:24b8a6f0a563 921 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement
j3 0:24b8a6f0a563 922 #define tmp_mon_ext1_hi_thresh_tempcode 0x0fff
j3 0:24b8a6f0a563 923 #define tmp_mon_ext1_hi_thresh_DESIGNVALUE 0x07ff
j3 0:24b8a6f0a563 924
j3 0:24b8a6f0a563 925 /// 0x1c r/w tmp_mon_ext1_lo_thresh External Temperature D0P/D0N Cold Threshold
j3 0:24b8a6f0a563 926 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement
j3 0:24b8a6f0a563 927 #define tmp_mon_ext1_lo_thresh_tempcode 0x0fff
j3 0:24b8a6f0a563 928 #define tmp_mon_ext1_lo_thresh_DESIGNVALUE 0x0800
j3 0:24b8a6f0a563 929
j3 0:24b8a6f0a563 930 /// 0x1d r/w tmp_mon_ext2_hi_thresh External Temperature D1P/D1N Hot Threshold
j3 0:24b8a6f0a563 931 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement
j3 0:24b8a6f0a563 932 #define tmp_mon_ext2_hi_thresh_tempcode 0x0fff
j3 0:24b8a6f0a563 933 #define tmp_mon_ext2_hi_thresh_DESIGNVALUE 0x07ff
j3 0:24b8a6f0a563 934
j3 0:24b8a6f0a563 935 /// 0x1e r/w tmp_mon_ext2_lo_thresh External Temperature D1P/D1N Cold Threshold
j3 0:24b8a6f0a563 936 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement
j3 0:24b8a6f0a563 937 #define tmp_mon_ext2_lo_thresh_tempcode 0x0fff
j3 0:24b8a6f0a563 938 #define tmp_mon_ext2_lo_thresh_DESIGNVALUE 0x0800
j3 0:24b8a6f0a563 939
j3 0:24b8a6f0a563 940 /// 0x1f r/w reserved_1F reserved
j3 0:24b8a6f0a563 941
j3 0:24b8a6f0a563 942
j3 0:24b8a6f0a563 943 /// 0x20 r/w port_cfg_00 PIXI Port 0 configuration register
j3 0:24b8a6f0a563 944 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 945 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 946 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 947 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 948 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 949 #define port_cfg_00_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 950 #define port_cfg_00_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 951 #define port_cfg_00_funcprm_range 0x0700
j3 0:24b8a6f0a563 952 #define port_cfg_00_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 953 #define port_cfg_00_funcprm_port 0x001f
j3 0:24b8a6f0a563 954 #define port_cfg_00_DESIGNVALUE 0x5100
j3 0:24b8a6f0a563 955
j3 0:24b8a6f0a563 956 /// 0x21 r/w port_cfg_01 PIXI Port 1 configuration register
j3 0:24b8a6f0a563 957 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 958 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 959 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 960 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 961 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 962 #define port_cfg_01_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 963 #define port_cfg_01_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 964 #define port_cfg_01_funcprm_range 0x0700
j3 0:24b8a6f0a563 965 #define port_cfg_01_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 966 #define port_cfg_01_funcprm_port 0x001f
j3 0:24b8a6f0a563 967 #define port_cfg_01_DESIGNVALUE 0x5100
j3 0:24b8a6f0a563 968
j3 0:24b8a6f0a563 969 /// 0x22 r/w port_cfg_02 PIXI Port 2 configuration register
j3 0:24b8a6f0a563 970 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 971 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 972 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 973 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 974 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 975 #define port_cfg_02_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 976 #define port_cfg_02_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 977 #define port_cfg_02_funcprm_range 0x0700
j3 0:24b8a6f0a563 978 #define port_cfg_02_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 979 #define port_cfg_02_funcprm_port 0x001f
j3 0:24b8a6f0a563 980 #define port_cfg_02_DESIGNVALUE 0x5100
j3 0:24b8a6f0a563 981
j3 0:24b8a6f0a563 982 /// 0x23 r/w port_cfg_03 PIXI Port 3 configuration register
j3 0:24b8a6f0a563 983 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 984 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 985 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 986 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 987 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 988 #define port_cfg_03_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 989 #define port_cfg_03_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 990 #define port_cfg_03_funcprm_range 0x0700
j3 0:24b8a6f0a563 991 #define port_cfg_03_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 992 #define port_cfg_03_funcprm_port 0x001f
j3 0:24b8a6f0a563 993 #define port_cfg_03_DESIGNVALUE 0x5100
j3 0:24b8a6f0a563 994
j3 0:24b8a6f0a563 995 /// 0x24 r/w port_cfg_04 PIXI Port 4 configuration register
j3 0:24b8a6f0a563 996 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 997 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 998 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 999 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1000 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1001 #define port_cfg_04_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1002 #define port_cfg_04_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1003 #define port_cfg_04_funcprm_range 0x0700
j3 0:24b8a6f0a563 1004 #define port_cfg_04_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1005 #define port_cfg_04_funcprm_port 0x001f
j3 0:24b8a6f0a563 1006 #define port_cfg_04_DESIGNVALUE 0x5100
j3 0:24b8a6f0a563 1007
j3 0:24b8a6f0a563 1008 /// 0x25 r/w port_cfg_05 PIXI Port 5 configuration register
j3 0:24b8a6f0a563 1009 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1010 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1011 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1012 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1013 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1014 #define port_cfg_05_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1015 #define port_cfg_05_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1016 #define port_cfg_05_funcprm_range 0x0700
j3 0:24b8a6f0a563 1017 #define port_cfg_05_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1018 #define port_cfg_05_funcprm_port 0x001f
j3 0:24b8a6f0a563 1019 #define port_cfg_05_DESIGNVALUE 0x5100
j3 0:24b8a6f0a563 1020
j3 0:24b8a6f0a563 1021 /// 0x26 r/w port_cfg_06 PIXI Port 6 configuration register
j3 0:24b8a6f0a563 1022 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1023 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1024 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1025 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1026 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1027 #define port_cfg_06_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1028 #define port_cfg_06_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1029 #define port_cfg_06_funcprm_range 0x0700
j3 0:24b8a6f0a563 1030 #define port_cfg_06_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1031 #define port_cfg_06_funcprm_port 0x001f
j3 0:24b8a6f0a563 1032 #define port_cfg_06_DESIGNVALUE 0x5100
j3 0:24b8a6f0a563 1033
j3 0:24b8a6f0a563 1034 /// 0x27 r/w port_cfg_07 PIXI Port 7 configuration register
j3 0:24b8a6f0a563 1035 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1036 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1037 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1038 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1039 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1040 #define port_cfg_07_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1041 #define port_cfg_07_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1042 #define port_cfg_07_funcprm_range 0x0700
j3 0:24b8a6f0a563 1043 #define port_cfg_07_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1044 #define port_cfg_07_funcprm_port 0x001f
j3 0:24b8a6f0a563 1045 #define port_cfg_07_DESIGNVALUE 0x5100
j3 0:24b8a6f0a563 1046
j3 0:24b8a6f0a563 1047 /// 0x28 r/w port_cfg_08 PIXI Port 8 configuration register
j3 0:24b8a6f0a563 1048 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1049 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1050 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1051 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1052 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1053 #define port_cfg_08_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1054 #define port_cfg_08_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1055 #define port_cfg_08_funcprm_range 0x0700
j3 0:24b8a6f0a563 1056 #define port_cfg_08_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1057 #define port_cfg_08_funcprm_port 0x001f
j3 0:24b8a6f0a563 1058 #define port_cfg_08_DESIGNVALUE 0x5100
j3 0:24b8a6f0a563 1059
j3 0:24b8a6f0a563 1060 /// 0x29 r/w port_cfg_09 PIXI Port 9 configuration register
j3 0:24b8a6f0a563 1061 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1062 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1063 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1064 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1065 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1066 #define port_cfg_09_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1067 #define port_cfg_09_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1068 #define port_cfg_09_funcprm_range 0x0700
j3 0:24b8a6f0a563 1069 #define port_cfg_09_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1070 #define port_cfg_09_funcprm_port 0x001f
j3 0:24b8a6f0a563 1071 #define port_cfg_09_DESIGNVALUE 0x3000
j3 0:24b8a6f0a563 1072
j3 0:24b8a6f0a563 1073 /// 0x2a r/w port_cfg_10 PIXI Port 10 configuration register
j3 0:24b8a6f0a563 1074 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1075 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1076 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1077 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1078 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1079 #define port_cfg_10_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1080 #define port_cfg_10_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1081 #define port_cfg_10_funcprm_range 0x0700
j3 0:24b8a6f0a563 1082 #define port_cfg_10_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1083 #define port_cfg_10_funcprm_port 0x001f
j3 0:24b8a6f0a563 1084 #define port_cfg_10_DESIGNVALUE 0x3000
j3 0:24b8a6f0a563 1085
j3 0:24b8a6f0a563 1086 /// 0x2b r/w port_cfg_11 PIXI Port 11 configuration register
j3 0:24b8a6f0a563 1087 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1088 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1089 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1090 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1091 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1092 #define port_cfg_11_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1093 #define port_cfg_11_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1094 #define port_cfg_11_funcprm_range 0x0700
j3 0:24b8a6f0a563 1095 #define port_cfg_11_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1096 #define port_cfg_11_funcprm_port 0x001f
j3 0:24b8a6f0a563 1097 #define port_cfg_11_DESIGNVALUE 0x3000
j3 0:24b8a6f0a563 1098
j3 0:24b8a6f0a563 1099 /// 0x2c r/w port_cfg_12 PIXI Port 12 configuration register
j3 0:24b8a6f0a563 1100 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1101 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1102 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1103 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1104 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1105 #define port_cfg_12_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1106 #define port_cfg_12_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1107 #define port_cfg_12_funcprm_range 0x0700
j3 0:24b8a6f0a563 1108 #define port_cfg_12_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1109 #define port_cfg_12_funcprm_port 0x001f
j3 4:2a25a4e00541 1110 #define port_cfg_12_DESIGNVALUE 0x7180
j3 0:24b8a6f0a563 1111
j3 0:24b8a6f0a563 1112 /// 0x2d r/w port_cfg_13 PIXI Port 13 configuration register
j3 0:24b8a6f0a563 1113 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1114 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1115 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1116 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1117 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1118 #define port_cfg_13_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1119 #define port_cfg_13_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1120 #define port_cfg_13_funcprm_range 0x0700
j3 0:24b8a6f0a563 1121 #define port_cfg_13_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1122 #define port_cfg_13_funcprm_port 0x001f
j3 0:24b8a6f0a563 1123 #define port_cfg_13_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1124
j3 0:24b8a6f0a563 1125 /// 0x2e r/w port_cfg_14 PIXI Port 14 configuration register
j3 0:24b8a6f0a563 1126 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1127 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1128 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1129 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1130 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1131 #define port_cfg_14_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1132 #define port_cfg_14_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1133 #define port_cfg_14_funcprm_range 0x0700
j3 0:24b8a6f0a563 1134 #define port_cfg_14_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1135 #define port_cfg_14_funcprm_port 0x001f
j3 0:24b8a6f0a563 1136 #define port_cfg_14_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1137
j3 0:24b8a6f0a563 1138 /// 0x2f r/w port_cfg_15 PIXI Port 15 configuration register
j3 0:24b8a6f0a563 1139 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1140 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1141 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1142 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1143 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1144 #define port_cfg_15_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1145 #define port_cfg_15_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1146 #define port_cfg_15_funcprm_range 0x0700
j3 0:24b8a6f0a563 1147 #define port_cfg_15_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1148 #define port_cfg_15_funcprm_port 0x001f
j3 0:24b8a6f0a563 1149 #define port_cfg_15_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1150
j3 0:24b8a6f0a563 1151 /// 0x30 r/w port_cfg_16 PIXI Port 16 configuration register
j3 0:24b8a6f0a563 1152 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1153 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1154 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1155 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1156 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1157 #define port_cfg_16_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1158 #define port_cfg_16_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1159 #define port_cfg_16_funcprm_range 0x0700
j3 0:24b8a6f0a563 1160 #define port_cfg_16_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1161 #define port_cfg_16_funcprm_port 0x001f
j3 1:03c04017a728 1162 #define port_cfg_16_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1163
j3 0:24b8a6f0a563 1164 /// 0x31 r/w port_cfg_17 PIXI Port 17 configuration register
j3 0:24b8a6f0a563 1165 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1166 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1167 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1168 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1169 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1170 #define port_cfg_17_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1171 #define port_cfg_17_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1172 #define port_cfg_17_funcprm_range 0x0700
j3 0:24b8a6f0a563 1173 #define port_cfg_17_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1174 #define port_cfg_17_funcprm_port 0x001f
j3 1:03c04017a728 1175 #define port_cfg_17_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1176
j3 0:24b8a6f0a563 1177 /// 0x32 r/w port_cfg_18 PIXI Port 18 configuration register
j3 0:24b8a6f0a563 1178 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1179 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1180 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1181 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1182 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1183 #define port_cfg_18_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1184 #define port_cfg_18_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1185 #define port_cfg_18_funcprm_range 0x0700
j3 0:24b8a6f0a563 1186 #define port_cfg_18_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1187 #define port_cfg_18_funcprm_port 0x001f
j3 0:24b8a6f0a563 1188 #define port_cfg_18_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1189
j3 0:24b8a6f0a563 1190 /// 0x33 r/w port_cfg_19 PIXI Port 19 configuration register
j3 0:24b8a6f0a563 1191 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode
j3 0:24b8a6f0a563 1192 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV
j3 0:24b8a6f0a563 1193 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range
j3 0:24b8a6f0a563 1194 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP
j3 0:24b8a6f0a563 1195 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31
j3 0:24b8a6f0a563 1196 #define port_cfg_19_PortCfgFuncID 0xf000
j3 0:24b8a6f0a563 1197 #define port_cfg_19_funcprm_avrInv 0x0800
j3 0:24b8a6f0a563 1198 #define port_cfg_19_funcprm_range 0x0700
j3 0:24b8a6f0a563 1199 #define port_cfg_19_funcprm_nsamples 0x00e0
j3 0:24b8a6f0a563 1200 #define port_cfg_19_funcprm_port 0x001f
j3 0:24b8a6f0a563 1201 #define port_cfg_19_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1202
j3 0:24b8a6f0a563 1203 /// 0x40 r/o adc_data_port_00 PIXI Port 0 Analog to Digital Converter register
j3 0:24b8a6f0a563 1204 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1205 #define adc_data_port_00_adccode 0x0fff
j3 0:24b8a6f0a563 1206
j3 0:24b8a6f0a563 1207 /// 0x41 r/o adc_data_port_01 PIXI Port 1 Analog to Digital Converter register
j3 0:24b8a6f0a563 1208 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1209 #define adc_data_port_01_adccode 0x0fff
j3 0:24b8a6f0a563 1210
j3 0:24b8a6f0a563 1211 /// 0x42 r/o adc_data_port_02 PIXI Port 2 Analog to Digital Converter register
j3 0:24b8a6f0a563 1212 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1213 #define adc_data_port_02_adccode 0x0fff
j3 0:24b8a6f0a563 1214
j3 0:24b8a6f0a563 1215 /// 0x43 r/o adc_data_port_03 PIXI Port 3 Analog to Digital Converter register
j3 0:24b8a6f0a563 1216 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1217 #define adc_data_port_03_adccode 0x0fff
j3 0:24b8a6f0a563 1218
j3 0:24b8a6f0a563 1219 /// 0x44 r/o adc_data_port_04 PIXI Port 4 Analog to Digital Converter register
j3 0:24b8a6f0a563 1220 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1221 #define adc_data_port_04_adccode 0x0fff
j3 0:24b8a6f0a563 1222
j3 0:24b8a6f0a563 1223 /// 0x45 r/o adc_data_port_05 PIXI Port 5 Analog to Digital Converter register
j3 0:24b8a6f0a563 1224 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1225 #define adc_data_port_05_adccode 0x0fff
j3 0:24b8a6f0a563 1226
j3 0:24b8a6f0a563 1227 /// 0x46 r/o adc_data_port_06 PIXI Port 6 Analog to Digital Converter register
j3 0:24b8a6f0a563 1228 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1229 #define adc_data_port_06_adccode 0x0fff
j3 0:24b8a6f0a563 1230
j3 0:24b8a6f0a563 1231 /// 0x47 r/o adc_data_port_07 PIXI Port 7 Analog to Digital Converter register
j3 0:24b8a6f0a563 1232 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1233 #define adc_data_port_07_adccode 0x0fff
j3 0:24b8a6f0a563 1234
j3 0:24b8a6f0a563 1235 /// 0x48 r/o adc_data_port_08 PIXI Port 8 Analog to Digital Converter register
j3 0:24b8a6f0a563 1236 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1237 #define adc_data_port_08_adccode 0x0fff
j3 0:24b8a6f0a563 1238
j3 0:24b8a6f0a563 1239 /// 0x49 r/o adc_data_port_09 PIXI Port 9 Analog to Digital Converter register
j3 0:24b8a6f0a563 1240 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1241 #define adc_data_port_09_adccode 0x0fff
j3 0:24b8a6f0a563 1242
j3 0:24b8a6f0a563 1243 /// 0x4a r/o adc_data_port_10 PIXI Port 10 Analog to Digital Converter register
j3 0:24b8a6f0a563 1244 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1245 #define adc_data_port_10_adccode 0x0fff
j3 0:24b8a6f0a563 1246
j3 0:24b8a6f0a563 1247 /// 0x4b r/o adc_data_port_11 PIXI Port 11 Analog to Digital Converter register
j3 0:24b8a6f0a563 1248 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1249 #define adc_data_port_11_adccode 0x0fff
j3 0:24b8a6f0a563 1250
j3 0:24b8a6f0a563 1251 /// 0x4c r/o adc_data_port_12 PIXI Port 12 Analog to Digital Converter register
j3 0:24b8a6f0a563 1252 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1253 #define adc_data_port_12_adccode 0x0fff
j3 0:24b8a6f0a563 1254
j3 0:24b8a6f0a563 1255 /// 0x4d r/o adc_data_port_13 PIXI Port 13 Analog to Digital Converter register
j3 0:24b8a6f0a563 1256 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1257 #define adc_data_port_13_adccode 0x0fff
j3 0:24b8a6f0a563 1258
j3 0:24b8a6f0a563 1259 /// 0x4e r/o adc_data_port_14 PIXI Port 14 Analog to Digital Converter register
j3 0:24b8a6f0a563 1260 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1261 #define adc_data_port_14_adccode 0x0fff
j3 0:24b8a6f0a563 1262
j3 0:24b8a6f0a563 1263 /// 0x4f r/o adc_data_port_15 PIXI Port 15 Analog to Digital Converter register
j3 0:24b8a6f0a563 1264 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1265 #define adc_data_port_15_adccode 0x0fff
j3 0:24b8a6f0a563 1266
j3 0:24b8a6f0a563 1267 /// 0x50 r/o adc_data_port_16 PIXI Port 16 Analog to Digital Converter register
j3 0:24b8a6f0a563 1268 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1269 #define adc_data_port_16_adccode 0x0fff
j3 0:24b8a6f0a563 1270
j3 0:24b8a6f0a563 1271 /// 0x51 r/o adc_data_port_17 PIXI Port 17 Analog to Digital Converter register
j3 0:24b8a6f0a563 1272 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1273 #define adc_data_port_17_adccode 0x0fff
j3 0:24b8a6f0a563 1274
j3 0:24b8a6f0a563 1275 /// 0x52 r/o adc_data_port_18 PIXI Port 18 Analog to Digital Converter register
j3 0:24b8a6f0a563 1276 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1277 #define adc_data_port_18_adccode 0x0fff
j3 0:24b8a6f0a563 1278
j3 0:24b8a6f0a563 1279 /// 0x53 r/o adc_data_port_19 PIXI Port 19 Analog to Digital Converter register
j3 0:24b8a6f0a563 1280 /// <code>xxxx111111111111</code> adccode 12-bit ADC code
j3 0:24b8a6f0a563 1281 #define adc_data_port_19_adccode 0x0fff
j3 0:24b8a6f0a563 1282
j3 0:24b8a6f0a563 1283 /// 0x60 r/w dac_data_port_00 PIXI Port 0 Digital to Analog Converter register
j3 0:24b8a6f0a563 1284 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1285 #define dac_data_port_00_daccode 0x0fff
j3 0:24b8a6f0a563 1286 #define dac_data_port_00_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1287
j3 0:24b8a6f0a563 1288 /// 0x61 r/w dac_data_port_01 PIXI Port 1 Digital to Analog Converter register
j3 0:24b8a6f0a563 1289 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1290 #define dac_data_port_01_daccode 0x0fff
j3 0:24b8a6f0a563 1291 #define dac_data_port_01_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1292
j3 0:24b8a6f0a563 1293 /// 0x62 r/w dac_data_port_02 PIXI Port 2 Digital to Analog Converter register
j3 0:24b8a6f0a563 1294 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1295 #define dac_data_port_02_daccode 0x0fff
j3 0:24b8a6f0a563 1296 #define dac_data_port_02_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1297
j3 0:24b8a6f0a563 1298 /// 0x63 r/w dac_data_port_03 PIXI Port 3 Digital to Analog Converter register
j3 0:24b8a6f0a563 1299 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1300 #define dac_data_port_03_daccode 0x0fff
j3 0:24b8a6f0a563 1301 #define dac_data_port_03_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1302
j3 0:24b8a6f0a563 1303 /// 0x64 r/w dac_data_port_04 PIXI Port 4 Digital to Analog Converter register
j3 0:24b8a6f0a563 1304 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1305 #define dac_data_port_04_daccode 0x0fff
j3 0:24b8a6f0a563 1306 #define dac_data_port_04_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1307
j3 0:24b8a6f0a563 1308 /// 0x65 r/w dac_data_port_05 PIXI Port 5 Digital to Analog Converter register
j3 0:24b8a6f0a563 1309 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1310 #define dac_data_port_05_daccode 0x0fff
j3 0:24b8a6f0a563 1311 #define dac_data_port_05_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1312
j3 0:24b8a6f0a563 1313 /// 0x66 r/w dac_data_port_06 PIXI Port 6 Digital to Analog Converter register
j3 0:24b8a6f0a563 1314 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1315 #define dac_data_port_06_daccode 0x0fff
j3 0:24b8a6f0a563 1316 #define dac_data_port_06_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1317
j3 0:24b8a6f0a563 1318 /// 0x67 r/w dac_data_port_07 PIXI Port 7 Digital to Analog Converter register
j3 0:24b8a6f0a563 1319 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1320 #define dac_data_port_07_daccode 0x0fff
j3 0:24b8a6f0a563 1321 #define dac_data_port_07_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1322
j3 0:24b8a6f0a563 1323 /// 0x68 r/w dac_data_port_08 PIXI Port 8 Digital to Analog Converter register
j3 0:24b8a6f0a563 1324 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1325 #define dac_data_port_08_daccode 0x0fff
j3 0:24b8a6f0a563 1326 #define dac_data_port_08_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1327
j3 0:24b8a6f0a563 1328 /// 0x69 r/w dac_data_port_09 PIXI Port 9 Digital to Analog Converter register
j3 0:24b8a6f0a563 1329 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1330 #define dac_data_port_09_daccode 0x0fff
j3 0:24b8a6f0a563 1331 #define dac_data_port_09_DESIGNVALUE 0x0800
j3 0:24b8a6f0a563 1332
j3 0:24b8a6f0a563 1333 /// 0x6a r/w dac_data_port_10 PIXI Port 10 Digital to Analog Converter register
j3 0:24b8a6f0a563 1334 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1335 #define dac_data_port_10_daccode 0x0fff
j3 0:24b8a6f0a563 1336 #define dac_data_port_10_DESIGNVALUE 0x0800
j3 0:24b8a6f0a563 1337
j3 0:24b8a6f0a563 1338 /// 0x6b r/w dac_data_port_11 PIXI Port 11 Digital to Analog Converter register
j3 0:24b8a6f0a563 1339 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1340 #define dac_data_port_11_daccode 0x0fff
j3 0:24b8a6f0a563 1341 #define dac_data_port_11_DESIGNVALUE 0x0800
j3 0:24b8a6f0a563 1342
j3 0:24b8a6f0a563 1343 /// 0x6c r/w dac_data_port_12 PIXI Port 12 Digital to Analog Converter register
j3 0:24b8a6f0a563 1344 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1345 #define dac_data_port_12_daccode 0x0fff
j3 0:24b8a6f0a563 1346 #define dac_data_port_12_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1347
j3 0:24b8a6f0a563 1348 /// 0x6d r/w dac_data_port_13 PIXI Port 13 Digital to Analog Converter register
j3 0:24b8a6f0a563 1349 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1350 #define dac_data_port_13_daccode 0x0fff
j3 0:24b8a6f0a563 1351 #define dac_data_port_13_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1352
j3 0:24b8a6f0a563 1353 /// 0x6e r/w dac_data_port_14 PIXI Port 14 Digital to Analog Converter register
j3 0:24b8a6f0a563 1354 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1355 #define dac_data_port_14_daccode 0x0fff
j3 0:24b8a6f0a563 1356 #define dac_data_port_14_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1357
j3 0:24b8a6f0a563 1358 /// 0x6f r/w dac_data_port_15 PIXI Port 15 Digital to Analog Converter register
j3 0:24b8a6f0a563 1359 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1360 #define dac_data_port_15_daccode 0x0fff
j3 0:24b8a6f0a563 1361 #define dac_data_port_15_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1362
j3 0:24b8a6f0a563 1363 /// 0x70 r/w dac_data_port_16 PIXI Port 16 Digital to Analog Converter register
j3 0:24b8a6f0a563 1364 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1365 #define dac_data_port_16_daccode 0x0fff
j3 1:03c04017a728 1366 #define dac_data_port_16_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1367
j3 0:24b8a6f0a563 1368 /// 0x71 r/w dac_data_port_17 PIXI Port 17 Digital to Analog Converter register
j3 0:24b8a6f0a563 1369 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1370 #define dac_data_port_17_daccode 0x0fff
j3 1:03c04017a728 1371 #define dac_data_port_17_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1372
j3 0:24b8a6f0a563 1373 /// 0x72 r/w dac_data_port_18 PIXI Port 18 Digital to Analog Converter register
j3 0:24b8a6f0a563 1374 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1375 #define dac_data_port_18_daccode 0x0fff
j3 0:24b8a6f0a563 1376 #define dac_data_port_18_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1377
j3 0:24b8a6f0a563 1378 /// 0x73 r/w dac_data_port_19 PIXI Port 19 Digital to Analog Converter register
j3 0:24b8a6f0a563 1379 /// <code>xxxx111111111111</code> daccode 12-bit DAC code
j3 0:24b8a6f0a563 1380 #define dac_data_port_19_daccode 0x0fff
j3 0:24b8a6f0a563 1381 #define dac_data_port_19_DESIGNVALUE 0x0000
j3 0:24b8a6f0a563 1382
j3 0:24b8a6f0a563 1383 #endif /* _MAX11300_DESIGNVALUE_H_ */
j3 0:24b8a6f0a563 1384
j3 0:24b8a6f0a563 1385 // End of file
j3 0:24b8a6f0a563 1386