Library for MAX14871 Shield, MAXREFDES89#
Dependents: MAXREFDES89_MAX14871_Shield_Demo MAXREFDES89_Test_Program Line_Following_Bot Line_Following_Bot_Pololu
max14871_shield.cpp@0:b5189f4ce1cb, 2015-07-23 (annotated)
- Committer:
- j3
- Date:
- Thu Jul 23 23:36:46 2015 +0000
- Revision:
- 0:b5189f4ce1cb
- Child:
- 1:7e9b864ddacf
initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
j3 | 0:b5189f4ce1cb | 1 | /******************************************************************//** |
j3 | 0:b5189f4ce1cb | 2 | * @file max14871_shield.h |
j3 | 0:b5189f4ce1cb | 3 | * |
j3 | 0:b5189f4ce1cb | 4 | * @author Justin Jordan |
j3 | 0:b5189f4ce1cb | 5 | * |
j3 | 0:b5189f4ce1cb | 6 | * @version 0.0 |
j3 | 0:b5189f4ce1cb | 7 | * |
j3 | 0:b5189f4ce1cb | 8 | * Started: 18JUL15 |
j3 | 0:b5189f4ce1cb | 9 | * |
j3 | 0:b5189f4ce1cb | 10 | * Updated: |
j3 | 0:b5189f4ce1cb | 11 | * |
j3 | 0:b5189f4ce1cb | 12 | * @brief Source file for Max14871_Shield class |
j3 | 0:b5189f4ce1cb | 13 | *********************************************************************** |
j3 | 0:b5189f4ce1cb | 14 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
j3 | 0:b5189f4ce1cb | 15 | * |
j3 | 0:b5189f4ce1cb | 16 | * Permission is hereby granted, free of charge, to any person obtaining a |
j3 | 0:b5189f4ce1cb | 17 | * copy of this software and associated documentation files (the "Software"), |
j3 | 0:b5189f4ce1cb | 18 | * to deal in the Software without restriction, including without limitation |
j3 | 0:b5189f4ce1cb | 19 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
j3 | 0:b5189f4ce1cb | 20 | * and/or sell copies of the Software, and to permit persons to whom the |
j3 | 0:b5189f4ce1cb | 21 | * Software is furnished to do so, subject to the following conditions: |
j3 | 0:b5189f4ce1cb | 22 | * |
j3 | 0:b5189f4ce1cb | 23 | * The above copyright notice and this permission notice shall be included |
j3 | 0:b5189f4ce1cb | 24 | * in all copies or substantial portions of the Software. |
j3 | 0:b5189f4ce1cb | 25 | * |
j3 | 0:b5189f4ce1cb | 26 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
j3 | 0:b5189f4ce1cb | 27 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
j3 | 0:b5189f4ce1cb | 28 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
j3 | 0:b5189f4ce1cb | 29 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
j3 | 0:b5189f4ce1cb | 30 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
j3 | 0:b5189f4ce1cb | 31 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
j3 | 0:b5189f4ce1cb | 32 | * OTHER DEALINGS IN THE SOFTWARE. |
j3 | 0:b5189f4ce1cb | 33 | * |
j3 | 0:b5189f4ce1cb | 34 | * Except as contained in this notice, the name of Maxim Integrated |
j3 | 0:b5189f4ce1cb | 35 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
j3 | 0:b5189f4ce1cb | 36 | * Products, Inc. Branding Policy. |
j3 | 0:b5189f4ce1cb | 37 | * |
j3 | 0:b5189f4ce1cb | 38 | * The mere transfer of this software does not imply any licenses |
j3 | 0:b5189f4ce1cb | 39 | * of trade secrets, proprietary technology, copyrights, patents, |
j3 | 0:b5189f4ce1cb | 40 | * trademarks, maskwork rights, or any other form of intellectual |
j3 | 0:b5189f4ce1cb | 41 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
j3 | 0:b5189f4ce1cb | 42 | * ownership rights. |
j3 | 0:b5189f4ce1cb | 43 | **********************************************************************/ |
j3 | 0:b5189f4ce1cb | 44 | |
j3 | 0:b5189f4ce1cb | 45 | |
j3 | 0:b5189f4ce1cb | 46 | #include "max14871_shield.h" |
j3 | 0:b5189f4ce1cb | 47 | |
j3 | 0:b5189f4ce1cb | 48 | #define MIN_PERIOD (20) //50KHz |
j3 | 0:b5189f4ce1cb | 49 | |
j3 | 0:b5189f4ce1cb | 50 | //Motor Driver control inputs |
j3 | 0:b5189f4ce1cb | 51 | #define MD_EN (0x01) |
j3 | 0:b5189f4ce1cb | 52 | #define MD_DIR (0x02) |
j3 | 0:b5189f4ce1cb | 53 | #define MD_MODE0 (0x04) |
j3 | 0:b5189f4ce1cb | 54 | #define MD_MODE1 (0x08) |
j3 | 0:b5189f4ce1cb | 55 | |
j3 | 0:b5189f4ce1cb | 56 | #define MAX_VREF (100) |
j3 | 0:b5189f4ce1cb | 57 | |
j3 | 0:b5189f4ce1cb | 58 | //GPIO Expander Default Configurations |
j3 | 0:b5189f4ce1cb | 59 | #define MAX7300_ALL_OUTPUTS (0x55) |
j3 | 0:b5189f4ce1cb | 60 | #define MAX7300_ALL_INPUTS (0xFF) |
j3 | 0:b5189f4ce1cb | 61 | #define MAX7300_OUTPUT_DEFAULT (0xBB) |
j3 | 0:b5189f4ce1cb | 62 | |
j3 | 0:b5189f4ce1cb | 63 | |
j3 | 0:b5189f4ce1cb | 64 | //********************************************************************* |
j3 | 0:b5189f4ce1cb | 65 | Max14871_Shield::Max14871_Shield(I2C *i2c_bus, bool default_config): _p_i2c(i2c_bus) |
j3 | 0:b5189f4ce1cb | 66 | { |
j3 | 0:b5189f4ce1cb | 67 | _i2c_owner = false; |
j3 | 0:b5189f4ce1cb | 68 | |
j3 | 0:b5189f4ce1cb | 69 | if(default_config) |
j3 | 0:b5189f4ce1cb | 70 | { |
j3 | 0:b5189f4ce1cb | 71 | _p_io_expander = new Max7300(_p_i2c, Max7300::MAX7300_I2C_ADRS0); |
j3 | 0:b5189f4ce1cb | 72 | _p_digi_pot1 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS0); |
j3 | 0:b5189f4ce1cb | 73 | _p_digi_pot2 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS1); |
j3 | 0:b5189f4ce1cb | 74 | |
j3 | 0:b5189f4ce1cb | 75 | _p_pwm1 = new PwmOut(D4); |
j3 | 0:b5189f4ce1cb | 76 | _p_pwm2 = new PwmOut(D5); |
j3 | 0:b5189f4ce1cb | 77 | _p_pwm3 = new PwmOut(D9); |
j3 | 0:b5189f4ce1cb | 78 | _p_pwm4 = new PwmOut(D10); |
j3 | 0:b5189f4ce1cb | 79 | } |
j3 | 0:b5189f4ce1cb | 80 | else |
j3 | 0:b5189f4ce1cb | 81 | { |
j3 | 0:b5189f4ce1cb | 82 | _p_io_expander = new Max7300(_p_i2c, Max7300::MAX7300_I2C_ADRS1); |
j3 | 0:b5189f4ce1cb | 83 | _p_digi_pot1 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS2); |
j3 | 0:b5189f4ce1cb | 84 | _p_digi_pot2 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS3); |
j3 | 0:b5189f4ce1cb | 85 | |
j3 | 0:b5189f4ce1cb | 86 | _p_pwm1 = new PwmOut(D3); |
j3 | 0:b5189f4ce1cb | 87 | _p_pwm2 = new PwmOut(D6); |
j3 | 0:b5189f4ce1cb | 88 | _p_pwm3 = new PwmOut(D8); |
j3 | 0:b5189f4ce1cb | 89 | _p_pwm4 = new PwmOut(D11); |
j3 | 0:b5189f4ce1cb | 90 | } |
j3 | 0:b5189f4ce1cb | 91 | |
j3 | 0:b5189f4ce1cb | 92 | init_board(); |
j3 | 0:b5189f4ce1cb | 93 | } |
j3 | 0:b5189f4ce1cb | 94 | |
j3 | 0:b5189f4ce1cb | 95 | |
j3 | 0:b5189f4ce1cb | 96 | //********************************************************************* |
j3 | 0:b5189f4ce1cb | 97 | Max14871_Shield::Max14871_Shield(PinName sda, PinName scl, bool default_config) |
j3 | 0:b5189f4ce1cb | 98 | { |
j3 | 0:b5189f4ce1cb | 99 | _p_i2c = new I2C(sda, scl); |
j3 | 0:b5189f4ce1cb | 100 | _i2c_owner = true; |
j3 | 0:b5189f4ce1cb | 101 | |
j3 | 0:b5189f4ce1cb | 102 | if(default_config) |
j3 | 0:b5189f4ce1cb | 103 | { |
j3 | 0:b5189f4ce1cb | 104 | _p_io_expander = new Max7300(_p_i2c, Max7300::MAX7300_I2C_ADRS0); |
j3 | 0:b5189f4ce1cb | 105 | _p_digi_pot1 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS0); |
j3 | 0:b5189f4ce1cb | 106 | _p_digi_pot2 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS1); |
j3 | 0:b5189f4ce1cb | 107 | |
j3 | 0:b5189f4ce1cb | 108 | _p_pwm1 = new PwmOut(D4); |
j3 | 0:b5189f4ce1cb | 109 | _p_pwm2 = new PwmOut(D5); |
j3 | 0:b5189f4ce1cb | 110 | _p_pwm3 = new PwmOut(D9); |
j3 | 0:b5189f4ce1cb | 111 | _p_pwm4 = new PwmOut(D10); |
j3 | 0:b5189f4ce1cb | 112 | } |
j3 | 0:b5189f4ce1cb | 113 | else |
j3 | 0:b5189f4ce1cb | 114 | { |
j3 | 0:b5189f4ce1cb | 115 | _p_io_expander = new Max7300(_p_i2c, Max7300::MAX7300_I2C_ADRS1); |
j3 | 0:b5189f4ce1cb | 116 | _p_digi_pot1 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS2); |
j3 | 0:b5189f4ce1cb | 117 | _p_digi_pot2 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS3); |
j3 | 0:b5189f4ce1cb | 118 | |
j3 | 0:b5189f4ce1cb | 119 | _p_pwm1 = new PwmOut(D3); |
j3 | 0:b5189f4ce1cb | 120 | _p_pwm2 = new PwmOut(D6); |
j3 | 0:b5189f4ce1cb | 121 | _p_pwm3 = new PwmOut(D8); |
j3 | 0:b5189f4ce1cb | 122 | _p_pwm4 = new PwmOut(D11); |
j3 | 0:b5189f4ce1cb | 123 | } |
j3 | 0:b5189f4ce1cb | 124 | |
j3 | 0:b5189f4ce1cb | 125 | init_board(); |
j3 | 0:b5189f4ce1cb | 126 | } |
j3 | 0:b5189f4ce1cb | 127 | |
j3 | 0:b5189f4ce1cb | 128 | |
j3 | 0:b5189f4ce1cb | 129 | //********************************************************************* |
j3 | 0:b5189f4ce1cb | 130 | Max14871_Shield::~Max14871_Shield() |
j3 | 0:b5189f4ce1cb | 131 | { |
j3 | 0:b5189f4ce1cb | 132 | if(_i2c_owner) |
j3 | 0:b5189f4ce1cb | 133 | { |
j3 | 0:b5189f4ce1cb | 134 | delete _p_i2c; |
j3 | 0:b5189f4ce1cb | 135 | } |
j3 | 0:b5189f4ce1cb | 136 | |
j3 | 0:b5189f4ce1cb | 137 | delete _p_io_expander; |
j3 | 0:b5189f4ce1cb | 138 | delete _p_digi_pot1; |
j3 | 0:b5189f4ce1cb | 139 | delete _p_digi_pot2; |
j3 | 0:b5189f4ce1cb | 140 | delete _p_pwm1; |
j3 | 0:b5189f4ce1cb | 141 | delete _p_pwm2; |
j3 | 0:b5189f4ce1cb | 142 | delete _p_pwm3; |
j3 | 0:b5189f4ce1cb | 143 | delete _p_pwm4; |
j3 | 0:b5189f4ce1cb | 144 | } |
j3 | 0:b5189f4ce1cb | 145 | |
j3 | 0:b5189f4ce1cb | 146 | |
j3 | 0:b5189f4ce1cb | 147 | //********************************************************************* |
j3 | 0:b5189f4ce1cb | 148 | int16_t Max14871_Shield::set_operating_mode(max14871_motor_driver_t md, |
j3 | 0:b5189f4ce1cb | 149 | max14871_operating_mode_t mode) |
j3 | 0:b5189f4ce1cb | 150 | { |
j3 | 0:b5189f4ce1cb | 151 | int16_t result = 0; |
j3 | 0:b5189f4ce1cb | 152 | int16_t port_data; |
j3 | 0:b5189f4ce1cb | 153 | |
j3 | 0:b5189f4ce1cb | 154 | Max7300::max7300_port_number_t low_port; |
j3 | 0:b5189f4ce1cb | 155 | |
j3 | 0:b5189f4ce1cb | 156 | //determine the low port of an 8 bit register to read/write |
j3 | 0:b5189f4ce1cb | 157 | if(md < MD3) |
j3 | 0:b5189f4ce1cb | 158 | { |
j3 | 0:b5189f4ce1cb | 159 | low_port = Max7300::MAX7300_PORT_04; |
j3 | 0:b5189f4ce1cb | 160 | } |
j3 | 0:b5189f4ce1cb | 161 | else |
j3 | 0:b5189f4ce1cb | 162 | { |
j3 | 0:b5189f4ce1cb | 163 | low_port = Max7300::MAX7300_PORT_12; |
j3 | 0:b5189f4ce1cb | 164 | } |
j3 | 0:b5189f4ce1cb | 165 | |
j3 | 0:b5189f4ce1cb | 166 | //get current state of outputs |
j3 | 0:b5189f4ce1cb | 167 | port_data = _p_io_expander->read_8_ports(low_port); |
j3 | 0:b5189f4ce1cb | 168 | |
j3 | 0:b5189f4ce1cb | 169 | switch(mode) |
j3 | 0:b5189f4ce1cb | 170 | { |
j3 | 0:b5189f4ce1cb | 171 | //if(md % 2) for following cases, modify control bits |
j3 | 0:b5189f4ce1cb | 172 | //of odd motor driver |
j3 | 0:b5189f4ce1cb | 173 | |
j3 | 0:b5189f4ce1cb | 174 | case COAST: |
j3 | 0:b5189f4ce1cb | 175 | if(md % 2) |
j3 | 0:b5189f4ce1cb | 176 | { |
j3 | 0:b5189f4ce1cb | 177 | port_data |= MD_EN; |
j3 | 0:b5189f4ce1cb | 178 | } |
j3 | 0:b5189f4ce1cb | 179 | else |
j3 | 0:b5189f4ce1cb | 180 | { |
j3 | 0:b5189f4ce1cb | 181 | port_data |= (MD_EN << 4); |
j3 | 0:b5189f4ce1cb | 182 | } |
j3 | 0:b5189f4ce1cb | 183 | break; |
j3 | 0:b5189f4ce1cb | 184 | |
j3 | 0:b5189f4ce1cb | 185 | case BRAKE: |
j3 | 0:b5189f4ce1cb | 186 | if(md % 2) |
j3 | 0:b5189f4ce1cb | 187 | { |
j3 | 0:b5189f4ce1cb | 188 | port_data &= ~MD_EN; |
j3 | 0:b5189f4ce1cb | 189 | } |
j3 | 0:b5189f4ce1cb | 190 | else |
j3 | 0:b5189f4ce1cb | 191 | { |
j3 | 0:b5189f4ce1cb | 192 | port_data &= ~(MD_EN << 4); |
j3 | 0:b5189f4ce1cb | 193 | } |
j3 | 0:b5189f4ce1cb | 194 | |
j3 | 0:b5189f4ce1cb | 195 | set_pwm_duty_cycle(md, 0); |
j3 | 0:b5189f4ce1cb | 196 | break; |
j3 | 0:b5189f4ce1cb | 197 | |
j3 | 0:b5189f4ce1cb | 198 | case REVERSE: |
j3 | 0:b5189f4ce1cb | 199 | if(md % 2) |
j3 | 0:b5189f4ce1cb | 200 | { |
j3 | 0:b5189f4ce1cb | 201 | port_data &= ~(MD_EN + MD_DIR); |
j3 | 0:b5189f4ce1cb | 202 | } |
j3 | 0:b5189f4ce1cb | 203 | else |
j3 | 0:b5189f4ce1cb | 204 | { |
j3 | 0:b5189f4ce1cb | 205 | port_data &= ~((MD_EN + MD_DIR) << 4); |
j3 | 0:b5189f4ce1cb | 206 | } |
j3 | 0:b5189f4ce1cb | 207 | break; |
j3 | 0:b5189f4ce1cb | 208 | |
j3 | 0:b5189f4ce1cb | 209 | case FORWARD: |
j3 | 0:b5189f4ce1cb | 210 | if(md % 2) |
j3 | 0:b5189f4ce1cb | 211 | { |
j3 | 0:b5189f4ce1cb | 212 | port_data &= ~MD_EN; |
j3 | 0:b5189f4ce1cb | 213 | port_data |= MD_DIR; |
j3 | 0:b5189f4ce1cb | 214 | } |
j3 | 0:b5189f4ce1cb | 215 | else |
j3 | 0:b5189f4ce1cb | 216 | { |
j3 | 0:b5189f4ce1cb | 217 | port_data &= ~(MD_EN << 4); |
j3 | 0:b5189f4ce1cb | 218 | port_data |= (MD_DIR << 4); |
j3 | 0:b5189f4ce1cb | 219 | } |
j3 | 0:b5189f4ce1cb | 220 | break; |
j3 | 0:b5189f4ce1cb | 221 | |
j3 | 0:b5189f4ce1cb | 222 | default: |
j3 | 0:b5189f4ce1cb | 223 | result = -1; |
j3 | 0:b5189f4ce1cb | 224 | break; |
j3 | 0:b5189f4ce1cb | 225 | } |
j3 | 0:b5189f4ce1cb | 226 | |
j3 | 0:b5189f4ce1cb | 227 | if(!result) |
j3 | 0:b5189f4ce1cb | 228 | { |
j3 | 0:b5189f4ce1cb | 229 | //write data back to port |
j3 | 0:b5189f4ce1cb | 230 | result = _p_io_expander->write_8_ports(low_port, (uint8_t) port_data); |
j3 | 0:b5189f4ce1cb | 231 | } |
j3 | 0:b5189f4ce1cb | 232 | |
j3 | 0:b5189f4ce1cb | 233 | return result; |
j3 | 0:b5189f4ce1cb | 234 | } |
j3 | 0:b5189f4ce1cb | 235 | |
j3 | 0:b5189f4ce1cb | 236 | |
j3 | 0:b5189f4ce1cb | 237 | //********************************************************************* |
j3 | 0:b5189f4ce1cb | 238 | int16_t Max14871_Shield::set_current_regulation_mode(max14871_motor_driver_t md, |
j3 | 0:b5189f4ce1cb | 239 | max14871_current_regulation_mode_t mode, |
j3 | 0:b5189f4ce1cb | 240 | uint8_t vref) |
j3 | 0:b5189f4ce1cb | 241 | { |
j3 | 0:b5189f4ce1cb | 242 | int16_t result = 0; |
j3 | 0:b5189f4ce1cb | 243 | int16_t port_data; |
j3 | 0:b5189f4ce1cb | 244 | |
j3 | 0:b5189f4ce1cb | 245 | Max7300::max7300_port_number_t low_port; |
j3 | 0:b5189f4ce1cb | 246 | Max5387 *p_digi_pot; |
j3 | 0:b5189f4ce1cb | 247 | |
j3 | 0:b5189f4ce1cb | 248 | //determine the low port of an 8 bit register to read/write |
j3 | 0:b5189f4ce1cb | 249 | if(md < MD3) |
j3 | 0:b5189f4ce1cb | 250 | { |
j3 | 0:b5189f4ce1cb | 251 | low_port = Max7300::MAX7300_PORT_04; |
j3 | 0:b5189f4ce1cb | 252 | p_digi_pot = _p_digi_pot1; |
j3 | 0:b5189f4ce1cb | 253 | } |
j3 | 0:b5189f4ce1cb | 254 | else |
j3 | 0:b5189f4ce1cb | 255 | { |
j3 | 0:b5189f4ce1cb | 256 | low_port = Max7300::MAX7300_PORT_12; |
j3 | 0:b5189f4ce1cb | 257 | p_digi_pot = _p_digi_pot2; |
j3 | 0:b5189f4ce1cb | 258 | } |
j3 | 0:b5189f4ce1cb | 259 | |
j3 | 0:b5189f4ce1cb | 260 | //get current state of outputs |
j3 | 0:b5189f4ce1cb | 261 | port_data = _p_io_expander->read_8_ports(low_port); |
j3 | 0:b5189f4ce1cb | 262 | |
j3 | 0:b5189f4ce1cb | 263 | switch(mode) |
j3 | 0:b5189f4ce1cb | 264 | { |
j3 | 0:b5189f4ce1cb | 265 | case RIPPLE_25_INTERNAL_REF: |
j3 | 0:b5189f4ce1cb | 266 | if(md % 2) |
j3 | 0:b5189f4ce1cb | 267 | { |
j3 | 0:b5189f4ce1cb | 268 | port_data &= ~MD_MODE0; |
j3 | 0:b5189f4ce1cb | 269 | port_data |= MD_MODE1; |
j3 | 0:b5189f4ce1cb | 270 | p_digi_pot->write_ch_A(0); |
j3 | 0:b5189f4ce1cb | 271 | } |
j3 | 0:b5189f4ce1cb | 272 | else |
j3 | 0:b5189f4ce1cb | 273 | { |
j3 | 0:b5189f4ce1cb | 274 | port_data &= ~(MD_MODE0 << 4); |
j3 | 0:b5189f4ce1cb | 275 | port_data |= (MD_MODE1 << 4); |
j3 | 0:b5189f4ce1cb | 276 | p_digi_pot->write_ch_B(0); |
j3 | 0:b5189f4ce1cb | 277 | } |
j3 | 0:b5189f4ce1cb | 278 | break; |
j3 | 0:b5189f4ce1cb | 279 | |
j3 | 0:b5189f4ce1cb | 280 | case RIPPLE_25_EXTERNAL_REF: |
j3 | 0:b5189f4ce1cb | 281 | if(md % 2) |
j3 | 0:b5189f4ce1cb | 282 | { |
j3 | 0:b5189f4ce1cb | 283 | port_data &= ~MD_MODE0; |
j3 | 0:b5189f4ce1cb | 284 | port_data |= MD_MODE1; |
j3 | 0:b5189f4ce1cb | 285 | |
j3 | 0:b5189f4ce1cb | 286 | if(vref > MAX_VREF) |
j3 | 0:b5189f4ce1cb | 287 | { |
j3 | 0:b5189f4ce1cb | 288 | vref = MAX_VREF; |
j3 | 0:b5189f4ce1cb | 289 | } |
j3 | 0:b5189f4ce1cb | 290 | p_digi_pot->write_ch_A(vref); |
j3 | 0:b5189f4ce1cb | 291 | } |
j3 | 0:b5189f4ce1cb | 292 | else |
j3 | 0:b5189f4ce1cb | 293 | { |
j3 | 0:b5189f4ce1cb | 294 | port_data &= ~(MD_MODE0 << 4); |
j3 | 0:b5189f4ce1cb | 295 | port_data |= (MD_MODE1 << 4); |
j3 | 0:b5189f4ce1cb | 296 | |
j3 | 0:b5189f4ce1cb | 297 | if(vref > MAX_VREF) |
j3 | 0:b5189f4ce1cb | 298 | { |
j3 | 0:b5189f4ce1cb | 299 | vref = MAX_VREF; |
j3 | 0:b5189f4ce1cb | 300 | } |
j3 | 0:b5189f4ce1cb | 301 | p_digi_pot->write_ch_B(vref); |
j3 | 0:b5189f4ce1cb | 302 | } |
j3 | 0:b5189f4ce1cb | 303 | break; |
j3 | 0:b5189f4ce1cb | 304 | |
j3 | 0:b5189f4ce1cb | 305 | case TCOFF_FAST_INTERNAL_REF: |
j3 | 0:b5189f4ce1cb | 306 | if(md % 2) |
j3 | 0:b5189f4ce1cb | 307 | { |
j3 | 0:b5189f4ce1cb | 308 | port_data |= (MD_MODE1 + MD_MODE0); |
j3 | 0:b5189f4ce1cb | 309 | p_digi_pot->write_ch_A(0); |
j3 | 0:b5189f4ce1cb | 310 | } |
j3 | 0:b5189f4ce1cb | 311 | else |
j3 | 0:b5189f4ce1cb | 312 | { |
j3 | 0:b5189f4ce1cb | 313 | port_data |= ((MD_MODE1 + MD_MODE0) << 4); |
j3 | 0:b5189f4ce1cb | 314 | p_digi_pot->write_ch_B(0); |
j3 | 0:b5189f4ce1cb | 315 | } |
j3 | 0:b5189f4ce1cb | 316 | break; |
j3 | 0:b5189f4ce1cb | 317 | |
j3 | 0:b5189f4ce1cb | 318 | case TCOFF_SLOW_INTERNAL_REF: |
j3 | 0:b5189f4ce1cb | 319 | if(md % 2) |
j3 | 0:b5189f4ce1cb | 320 | { |
j3 | 0:b5189f4ce1cb | 321 | port_data |= MD_MODE0; |
j3 | 0:b5189f4ce1cb | 322 | port_data &= ~MD_MODE1; |
j3 | 0:b5189f4ce1cb | 323 | p_digi_pot->write_ch_A(0); |
j3 | 0:b5189f4ce1cb | 324 | } |
j3 | 0:b5189f4ce1cb | 325 | else |
j3 | 0:b5189f4ce1cb | 326 | { |
j3 | 0:b5189f4ce1cb | 327 | port_data |= (MD_MODE0 << 4); |
j3 | 0:b5189f4ce1cb | 328 | port_data &= ~(MD_MODE1 << 4); |
j3 | 0:b5189f4ce1cb | 329 | p_digi_pot->write_ch_B(0); |
j3 | 0:b5189f4ce1cb | 330 | } |
j3 | 0:b5189f4ce1cb | 331 | break; |
j3 | 0:b5189f4ce1cb | 332 | |
j3 | 0:b5189f4ce1cb | 333 | case TCOFF_FAST_EXTERNAL_REF: |
j3 | 0:b5189f4ce1cb | 334 | if(md % 2) |
j3 | 0:b5189f4ce1cb | 335 | { |
j3 | 0:b5189f4ce1cb | 336 | port_data |= (MD_MODE1 + MD_MODE0); |
j3 | 0:b5189f4ce1cb | 337 | |
j3 | 0:b5189f4ce1cb | 338 | if(vref > MAX_VREF) |
j3 | 0:b5189f4ce1cb | 339 | { |
j3 | 0:b5189f4ce1cb | 340 | vref = MAX_VREF; |
j3 | 0:b5189f4ce1cb | 341 | } |
j3 | 0:b5189f4ce1cb | 342 | p_digi_pot->write_ch_A(vref); |
j3 | 0:b5189f4ce1cb | 343 | } |
j3 | 0:b5189f4ce1cb | 344 | else |
j3 | 0:b5189f4ce1cb | 345 | { |
j3 | 0:b5189f4ce1cb | 346 | port_data |= ((MD_MODE1 + MD_MODE0) << 4); |
j3 | 0:b5189f4ce1cb | 347 | |
j3 | 0:b5189f4ce1cb | 348 | if(vref > MAX_VREF) |
j3 | 0:b5189f4ce1cb | 349 | { |
j3 | 0:b5189f4ce1cb | 350 | vref = MAX_VREF; |
j3 | 0:b5189f4ce1cb | 351 | } |
j3 | 0:b5189f4ce1cb | 352 | p_digi_pot->write_ch_B(vref); |
j3 | 0:b5189f4ce1cb | 353 | } |
j3 | 0:b5189f4ce1cb | 354 | break; |
j3 | 0:b5189f4ce1cb | 355 | |
j3 | 0:b5189f4ce1cb | 356 | case TCOFF_SLOW_EXTERNAL_REF: |
j3 | 0:b5189f4ce1cb | 357 | if(md % 2) |
j3 | 0:b5189f4ce1cb | 358 | { |
j3 | 0:b5189f4ce1cb | 359 | port_data |= MD_MODE0; |
j3 | 0:b5189f4ce1cb | 360 | port_data &= ~MD_MODE1; |
j3 | 0:b5189f4ce1cb | 361 | |
j3 | 0:b5189f4ce1cb | 362 | if(vref > MAX_VREF) |
j3 | 0:b5189f4ce1cb | 363 | { |
j3 | 0:b5189f4ce1cb | 364 | vref = MAX_VREF; |
j3 | 0:b5189f4ce1cb | 365 | } |
j3 | 0:b5189f4ce1cb | 366 | p_digi_pot->write_ch_A(vref); |
j3 | 0:b5189f4ce1cb | 367 | } |
j3 | 0:b5189f4ce1cb | 368 | else |
j3 | 0:b5189f4ce1cb | 369 | { |
j3 | 0:b5189f4ce1cb | 370 | port_data |= (MD_MODE0 << 4); |
j3 | 0:b5189f4ce1cb | 371 | port_data &= ~(MD_MODE1 << 4); |
j3 | 0:b5189f4ce1cb | 372 | |
j3 | 0:b5189f4ce1cb | 373 | if(vref > MAX_VREF) |
j3 | 0:b5189f4ce1cb | 374 | { |
j3 | 0:b5189f4ce1cb | 375 | vref = MAX_VREF; |
j3 | 0:b5189f4ce1cb | 376 | } |
j3 | 0:b5189f4ce1cb | 377 | p_digi_pot->write_ch_B(vref); |
j3 | 0:b5189f4ce1cb | 378 | } |
j3 | 0:b5189f4ce1cb | 379 | break; |
j3 | 0:b5189f4ce1cb | 380 | |
j3 | 0:b5189f4ce1cb | 381 | default: |
j3 | 0:b5189f4ce1cb | 382 | result = -1; |
j3 | 0:b5189f4ce1cb | 383 | break; |
j3 | 0:b5189f4ce1cb | 384 | } |
j3 | 0:b5189f4ce1cb | 385 | |
j3 | 0:b5189f4ce1cb | 386 | if(!result) |
j3 | 0:b5189f4ce1cb | 387 | { |
j3 | 0:b5189f4ce1cb | 388 | //write data back to port |
j3 | 0:b5189f4ce1cb | 389 | result = _p_io_expander->write_8_ports(low_port, (uint8_t) port_data); |
j3 | 0:b5189f4ce1cb | 390 | } |
j3 | 0:b5189f4ce1cb | 391 | |
j3 | 0:b5189f4ce1cb | 392 | return result; |
j3 | 0:b5189f4ce1cb | 393 | } |
j3 | 0:b5189f4ce1cb | 394 | |
j3 | 0:b5189f4ce1cb | 395 | |
j3 | 0:b5189f4ce1cb | 396 | //********************************************************************* |
j3 | 0:b5189f4ce1cb | 397 | int16_t Max14871_Shield::set_pwm_period(max14871_motor_driver_t md, uint16_t period) |
j3 | 0:b5189f4ce1cb | 398 | { |
j3 | 0:b5189f4ce1cb | 399 | int16_t result = 0; |
j3 | 0:b5189f4ce1cb | 400 | |
j3 | 0:b5189f4ce1cb | 401 | if(period < MIN_PERIOD) |
j3 | 0:b5189f4ce1cb | 402 | { |
j3 | 0:b5189f4ce1cb | 403 | result = -1; |
j3 | 0:b5189f4ce1cb | 404 | } |
j3 | 0:b5189f4ce1cb | 405 | else |
j3 | 0:b5189f4ce1cb | 406 | { |
j3 | 0:b5189f4ce1cb | 407 | switch(md) |
j3 | 0:b5189f4ce1cb | 408 | { |
j3 | 0:b5189f4ce1cb | 409 | case MD1: |
j3 | 0:b5189f4ce1cb | 410 | _p_pwm1->period_us(period); |
j3 | 0:b5189f4ce1cb | 411 | break; |
j3 | 0:b5189f4ce1cb | 412 | |
j3 | 0:b5189f4ce1cb | 413 | case MD2: |
j3 | 0:b5189f4ce1cb | 414 | _p_pwm2->period_us(period); |
j3 | 0:b5189f4ce1cb | 415 | break; |
j3 | 0:b5189f4ce1cb | 416 | |
j3 | 0:b5189f4ce1cb | 417 | case MD3: |
j3 | 0:b5189f4ce1cb | 418 | _p_pwm3->period_us(period); |
j3 | 0:b5189f4ce1cb | 419 | break; |
j3 | 0:b5189f4ce1cb | 420 | |
j3 | 0:b5189f4ce1cb | 421 | case MD4: |
j3 | 0:b5189f4ce1cb | 422 | _p_pwm4->period_us(period); |
j3 | 0:b5189f4ce1cb | 423 | break; |
j3 | 0:b5189f4ce1cb | 424 | |
j3 | 0:b5189f4ce1cb | 425 | default: |
j3 | 0:b5189f4ce1cb | 426 | result = -1; |
j3 | 0:b5189f4ce1cb | 427 | break; |
j3 | 0:b5189f4ce1cb | 428 | } |
j3 | 0:b5189f4ce1cb | 429 | } |
j3 | 0:b5189f4ce1cb | 430 | |
j3 | 0:b5189f4ce1cb | 431 | return result; |
j3 | 0:b5189f4ce1cb | 432 | } |
j3 | 0:b5189f4ce1cb | 433 | |
j3 | 0:b5189f4ce1cb | 434 | |
j3 | 0:b5189f4ce1cb | 435 | //********************************************************************* |
j3 | 0:b5189f4ce1cb | 436 | int16_t Max14871_Shield::set_pwm_duty_cycle(max14871_motor_driver_t md, uint16_t duty_cycle) |
j3 | 0:b5189f4ce1cb | 437 | { |
j3 | 0:b5189f4ce1cb | 438 | int16_t result = 0; |
j3 | 0:b5189f4ce1cb | 439 | |
j3 | 0:b5189f4ce1cb | 440 | switch(md) |
j3 | 0:b5189f4ce1cb | 441 | { |
j3 | 0:b5189f4ce1cb | 442 | case MD1: |
j3 | 0:b5189f4ce1cb | 443 | _p_pwm1->pulsewidth_us(duty_cycle); |
j3 | 0:b5189f4ce1cb | 444 | break; |
j3 | 0:b5189f4ce1cb | 445 | |
j3 | 0:b5189f4ce1cb | 446 | case MD2: |
j3 | 0:b5189f4ce1cb | 447 | _p_pwm2->pulsewidth_us(duty_cycle); |
j3 | 0:b5189f4ce1cb | 448 | break; |
j3 | 0:b5189f4ce1cb | 449 | |
j3 | 0:b5189f4ce1cb | 450 | case MD3: |
j3 | 0:b5189f4ce1cb | 451 | _p_pwm3->pulsewidth_us(duty_cycle); |
j3 | 0:b5189f4ce1cb | 452 | break; |
j3 | 0:b5189f4ce1cb | 453 | |
j3 | 0:b5189f4ce1cb | 454 | case MD4: |
j3 | 0:b5189f4ce1cb | 455 | _p_pwm4->pulsewidth_us(duty_cycle); |
j3 | 0:b5189f4ce1cb | 456 | break; |
j3 | 0:b5189f4ce1cb | 457 | |
j3 | 0:b5189f4ce1cb | 458 | default: |
j3 | 0:b5189f4ce1cb | 459 | result = -1; |
j3 | 0:b5189f4ce1cb | 460 | break; |
j3 | 0:b5189f4ce1cb | 461 | } |
j3 | 0:b5189f4ce1cb | 462 | |
j3 | 0:b5189f4ce1cb | 463 | return result; |
j3 | 0:b5189f4ce1cb | 464 | } |
j3 | 0:b5189f4ce1cb | 465 | |
j3 | 0:b5189f4ce1cb | 466 | |
j3 | 0:b5189f4ce1cb | 467 | //********************************************************************* |
j3 | 0:b5189f4ce1cb | 468 | void Max14871_Shield::init_board(void) |
j3 | 0:b5189f4ce1cb | 469 | { |
j3 | 0:b5189f4ce1cb | 470 | //configure these ports as outputs |
j3 | 0:b5189f4ce1cb | 471 | _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_04, MAX7300_ALL_OUTPUTS); |
j3 | 0:b5189f4ce1cb | 472 | _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_08, MAX7300_ALL_OUTPUTS); |
j3 | 0:b5189f4ce1cb | 473 | _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_12, MAX7300_ALL_OUTPUTS); |
j3 | 0:b5189f4ce1cb | 474 | _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_16, MAX7300_ALL_OUTPUTS); |
j3 | 0:b5189f4ce1cb | 475 | |
j3 | 0:b5189f4ce1cb | 476 | //Set /EN and DIR pin of all motor drivers and set mode pin |
j3 | 0:b5189f4ce1cb | 477 | //of all motor drivers to 0.75V |
j3 | 0:b5189f4ce1cb | 478 | _p_io_expander->write_8_ports(Max7300::MAX7300_PORT_04, MAX7300_OUTPUT_DEFAULT); |
j3 | 0:b5189f4ce1cb | 479 | _p_io_expander->write_8_ports(Max7300::MAX7300_PORT_12, MAX7300_OUTPUT_DEFAULT); |
j3 | 0:b5189f4ce1cb | 480 | |
j3 | 0:b5189f4ce1cb | 481 | //configure these ports as inputs w/pull-up, |
j3 | 0:b5189f4ce1cb | 482 | _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_20, MAX7300_ALL_INPUTS); |
j3 | 0:b5189f4ce1cb | 483 | _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_24, MAX7300_ALL_INPUTS); |
j3 | 0:b5189f4ce1cb | 484 | _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_28, MAX7300_ALL_INPUTS); |
j3 | 0:b5189f4ce1cb | 485 | |
j3 | 0:b5189f4ce1cb | 486 | //config port 31 as output for interrupt |
j3 | 0:b5189f4ce1cb | 487 | _p_io_expander->config_port(Max7300::MAX7300_PORT_31, Max7300::MAX7300_PORT_OUTPUT); |
j3 | 0:b5189f4ce1cb | 488 | |
j3 | 0:b5189f4ce1cb | 489 | _p_io_expander->enable_transition_detection(); |
j3 | 0:b5189f4ce1cb | 490 | _p_io_expander->enable_ports(); |
j3 | 0:b5189f4ce1cb | 491 | |
j3 | 0:b5189f4ce1cb | 492 | //set Vref pin of all motor drivers to 1.3V |
j3 | 0:b5189f4ce1cb | 493 | _p_digi_pot1->write_ch_AB(MAX_VREF); |
j3 | 0:b5189f4ce1cb | 494 | _p_digi_pot2->write_ch_AB(MAX_VREF); |
j3 | 0:b5189f4ce1cb | 495 | |
j3 | 0:b5189f4ce1cb | 496 | //set switching frequency of all motor drivers to 50KHz |
j3 | 0:b5189f4ce1cb | 497 | _p_pwm1->period_us(MIN_PERIOD); |
j3 | 0:b5189f4ce1cb | 498 | _p_pwm2->period_us(MIN_PERIOD); |
j3 | 0:b5189f4ce1cb | 499 | _p_pwm3->period_us(MIN_PERIOD); |
j3 | 0:b5189f4ce1cb | 500 | _p_pwm4->period_us(MIN_PERIOD); |
j3 | 0:b5189f4ce1cb | 501 | } |