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targets/hal/TARGET_Freescale/TARGET_KL25Z/PeripheralNames.h@13:0645d8841f51, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 14:12:34 2013 +0300
Revision:
13:0645d8841f51
Parent:
vendor/Freescale/KL25Z/hal/PeripheralNames.h@10:3bc89ef62ce7
Child:
17:151ab7482c89
Update mbed sources to revision 64

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #ifndef MBED_PERIPHERALNAMES_H
emilmont 10:3bc89ef62ce7 17 #define MBED_PERIPHERALNAMES_H
emilmont 10:3bc89ef62ce7 18
emilmont 10:3bc89ef62ce7 19 #include "cmsis.h"
emilmont 10:3bc89ef62ce7 20
emilmont 10:3bc89ef62ce7 21 #ifdef __cplusplus
emilmont 10:3bc89ef62ce7 22 extern "C" {
emilmont 10:3bc89ef62ce7 23 #endif
emilmont 10:3bc89ef62ce7 24
emilmont 10:3bc89ef62ce7 25 typedef enum {
emilmont 10:3bc89ef62ce7 26 UART_0 = (int)UART0_BASE,
emilmont 10:3bc89ef62ce7 27 UART_1 = (int)UART1_BASE,
emilmont 10:3bc89ef62ce7 28 UART_2 = (int)UART2_BASE
emilmont 10:3bc89ef62ce7 29 } UARTName;
emilmont 10:3bc89ef62ce7 30 #define STDIO_UART_TX USBTX
emilmont 10:3bc89ef62ce7 31 #define STDIO_UART_RX USBRX
emilmont 10:3bc89ef62ce7 32 #define STDIO_UART UART_0
emilmont 10:3bc89ef62ce7 33
emilmont 10:3bc89ef62ce7 34 typedef enum {
emilmont 10:3bc89ef62ce7 35 I2C_0 = (int)I2C0_BASE,
emilmont 10:3bc89ef62ce7 36 I2C_1 = (int)I2C1_BASE,
emilmont 10:3bc89ef62ce7 37 } I2CName;
emilmont 10:3bc89ef62ce7 38
emilmont 10:3bc89ef62ce7 39 #define TPM_SHIFT 8
emilmont 10:3bc89ef62ce7 40 typedef enum {
emilmont 10:3bc89ef62ce7 41 PWM_1 = (0 << TPM_SHIFT) | (0), // TPM0 CH0
emilmont 10:3bc89ef62ce7 42 PWM_2 = (0 << TPM_SHIFT) | (1), // TPM0 CH1
emilmont 10:3bc89ef62ce7 43 PWM_3 = (0 << TPM_SHIFT) | (2), // TPM0 CH2
emilmont 10:3bc89ef62ce7 44 PWM_4 = (0 << TPM_SHIFT) | (3), // TPM0 CH3
emilmont 10:3bc89ef62ce7 45 PWM_5 = (0 << TPM_SHIFT) | (4), // TPM0 CH4
emilmont 10:3bc89ef62ce7 46 PWM_6 = (0 << TPM_SHIFT) | (5), // TPM0 CH5
emilmont 10:3bc89ef62ce7 47
emilmont 10:3bc89ef62ce7 48 PWM_7 = (1 << TPM_SHIFT) | (0), // TPM1 CH0
emilmont 10:3bc89ef62ce7 49 PWM_8 = (1 << TPM_SHIFT) | (1), // TPM1 CH1
emilmont 10:3bc89ef62ce7 50
emilmont 10:3bc89ef62ce7 51 PWM_9 = (2 << TPM_SHIFT) | (0), // TPM2 CH0
emilmont 10:3bc89ef62ce7 52 PWM_10 = (2 << TPM_SHIFT) | (1) // TPM2 CH1
emilmont 10:3bc89ef62ce7 53 } PWMName;
emilmont 10:3bc89ef62ce7 54
emilmont 10:3bc89ef62ce7 55 typedef enum {
emilmont 10:3bc89ef62ce7 56 ADC0_SE0 = 0,
emilmont 10:3bc89ef62ce7 57 ADC0_SE3 = 3,
emilmont 10:3bc89ef62ce7 58 ADC0_SE4b = 4,
emilmont 10:3bc89ef62ce7 59 ADC0_SE5b = 5,
emilmont 10:3bc89ef62ce7 60 ADC0_SE6b = 6,
emilmont 10:3bc89ef62ce7 61 ADC0_SE7b = 7,
emilmont 10:3bc89ef62ce7 62 ADC0_SE8 = 8,
emilmont 10:3bc89ef62ce7 63 ADC0_SE9 = 9,
emilmont 10:3bc89ef62ce7 64 ADC0_SE11 = 11,
emilmont 10:3bc89ef62ce7 65 ADC0_SE12 = 12,
emilmont 10:3bc89ef62ce7 66 ADC0_SE13 = 13,
emilmont 10:3bc89ef62ce7 67 ADC0_SE14 = 14,
emilmont 10:3bc89ef62ce7 68 ADC0_SE15 = 15,
emilmont 10:3bc89ef62ce7 69 ADC0_SE23 = 23
emilmont 10:3bc89ef62ce7 70 } ADCName;
emilmont 10:3bc89ef62ce7 71
emilmont 10:3bc89ef62ce7 72 typedef enum {
emilmont 10:3bc89ef62ce7 73 DAC_0 = 0
emilmont 10:3bc89ef62ce7 74 } DACName;
emilmont 10:3bc89ef62ce7 75
emilmont 10:3bc89ef62ce7 76
emilmont 10:3bc89ef62ce7 77 typedef enum {
emilmont 10:3bc89ef62ce7 78 SPI_0 = (int)SPI0_BASE,
emilmont 10:3bc89ef62ce7 79 SPI_1 = (int)SPI1_BASE,
emilmont 10:3bc89ef62ce7 80 } SPIName;
emilmont 10:3bc89ef62ce7 81
emilmont 10:3bc89ef62ce7 82 #ifdef __cplusplus
emilmont 10:3bc89ef62ce7 83 }
emilmont 10:3bc89ef62ce7 84 #endif
emilmont 10:3bc89ef62ce7 85
emilmont 10:3bc89ef62ce7 86 #endif