![](/media/cache/group/default_image.jpg.50x50_q85.jpg)
Test2
Dependencies: MAX30003 max32630fthr DS1307
Diff: main.cpp
- Revision:
- 4:06e258ff0b97
- Parent:
- 3:420d5efbd967
- Child:
- 5:f8d1f651bef5
--- a/main.cpp Tue Aug 22 21:40:49 2017 +0000 +++ b/main.cpp Mon Aug 28 16:09:51 2017 +0000 @@ -16,8 +16,7 @@ int main() { - const int RTOR_STATUS_MASK = ( 1<<10 ); - const int EINT_STATUS_MASK = ( 1<<23 ); + const int EINT_STATUS_MASK = 1 << 23; Serial pc(USBTX, USBRX); // Use USB debug probe for serial link pc.baud(115200); // Baud rate = 115200 @@ -32,68 +31,48 @@ SPI spiBus(SPI2_MOSI, SPI2_MISO, SPI2_SCK); // SPI bus, P5_1 = MOSI, // P5_2 = MISO, P5_0 = SCK - MAX30003 * ecgAFE; - ecgAFE = new MAX30003(spiBus, P5_3); // New MAX30003 on spiBus, CS = P5_3 - ecg_config(*ecgAFE); // Config ECG + MAX30003 ecgAFE(spiBus, P5_3); // New MAX30003 on spiBus, CS = P5_3 + ecg_config(ecgAFE); // Config ECG - ecgAFE->writeRegister( MAX30003::SYNCH , 0); + ecgAFE.writeRegister( MAX30003::SYNCH , 0); - uint32_t ecgFIFO, readSamples, idx, ETAG[32], status, RtoR; + uint32_t ecgFIFO, readECGSamples, idx, ETAG[32], status; int16_t ecgSample[32]; - float BPM; while(1) { - /* Read back ECG samples from the FIFO */ + // Read back ECG samples from the FIFO if( ecgFIFOIntFlag ) { - pc.printf("Interrupt received....\r\n"); - status = ecgAFE->readRegister( MAX30003::STATUS ); // Read the STATUS register - pc.printf("Status : 0x%x\r\n" - "Current BPM is %3.2f\r\n\r\n", status, BPM); - // Check if R-to-R interrupt asserted - if( ( status & RTOR_STATUS_MASK ) == RTOR_STATUS_MASK ){ // Check if RtoR update - - ecgFIFOIntFlag = 0; - pc.printf("R-to-R Interrupt \r\n"); - RtoR = ecgAFE->readRegister( MAX30003::RTOR ); // Read RtoR register - BPM = 60.0*RtoR/32768.0; // Convert to BPM - pc.printf("RtoR : %d\r\n\r\n", RtoR); // Print BPM/RtoR - - } + status = ecgAFE.readRegister( MAX30003::STATUS ); // Read the STATUS register // Check if EINT interrupt asserted if ( ( status & EINT_STATUS_MASK ) == EINT_STATUS_MASK ) { ecgFIFOIntFlag = 0; - pc.printf("FIFO Interrupt \r\n"); - readSamples = 0; // Reset sample counter + readECGSamples = 0; // Reset sample counter do { - ecgFIFO = ecgAFE->readRegister( MAX30003::ECG_FIFO ); // Read FIFO - ecgSample[readSamples] = ecgFIFO >> 8; // Isolate voltage data - ETAG[readSamples] = ( ecgFIFO >> 3 ) & 0b111; // Isolate ETAG - readSamples++; // Increment sample counter + ecgFIFO = ecgAFE.readRegister( MAX30003::ECG_FIFO ); // Read FIFO + ecgSample[readECGSamples] = ecgFIFO >> 8; // Isolate voltage data + ETAG[readECGSamples] = ( ecgFIFO >> 3 ) & 0b111; // Isolate ETAG + readECGSamples++; // Increment sample counter // Check that sample is not last sample in FIFO - } while ( ETAG[readSamples-1] == 0x0 || - ETAG[readSamples-1] == 0x1 ); - - pc.printf("%d samples read from FIFO \r\n", readSamples); + } while ( ETAG[readECGSamples-1] == 0x0 || + ETAG[readECGSamples-1] == 0x1 ); // Check if FIFO has overflowed if( ETAG[readECGSamples - 1] == 0x7 ){ ecgAFE.writeRegister( MAX30003::FIFO_RST , 0); // Reset FIFO } - /* Print results */ - for( idx = 0; idx < readSamples; idx++ ) { - pc.printf("Sample : %6d, \tETAG : 0x%x\r\n", ecgSample[idx], ETAG[idx]); - } - pc.printf("\r\n\r\n\r\n"); + // Print results + for( idx = 0; idx < readECGSamples; idx++ ) { + pc.printf("Sample : %6d\r\n", ecgSample[idx]); + } } - } } } @@ -142,7 +121,7 @@ //Enable interrupts register setting MAX30003::EnableInterrupts_u EN_INT_r; EN_INT_r.bits.en_eint = 1; // Enable EINT interrupt - EN_INT_r.bits.en_rrint = 1; // Enable R-to-R interrupt + EN_INT_r.bits.en_rrint = 0; // Disable R-to-R interrupt EN_INT_r.bits.intb_type = 3; // Open-drain NMOS with internal pullup ecgAFE.writeRegister( MAX30003::EN_INT , EN_INT_r.all);