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Test2
Dependencies: MAX30003 max32630fthr DS1307
main.cpp@2:812d40f1853d, 2017-08-18 (annotated)
- Committer:
- coreyharris
- Date:
- Fri Aug 18 17:37:07 2017 +0000
- Revision:
- 2:812d40f1853d
- Parent:
- 1:86843c27cc81
- Child:
- 3:420d5efbd967
Read status register to determine the interrupt. Attempt to get R-to-R working, but no-go. The program works however, and prints ECG FIFO data;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
coreyharris | 0:38c49bc37c7c | 1 | #include "mbed.h" |
coreyharris | 0:38c49bc37c7c | 2 | #include "max32630fthr.h" |
coreyharris | 0:38c49bc37c7c | 3 | #include "MAX30003.h" |
coreyharris | 0:38c49bc37c7c | 4 | |
coreyharris | 0:38c49bc37c7c | 5 | MAX32630FTHR pegasus(MAX32630FTHR::VIO_3V3); |
coreyharris | 0:38c49bc37c7c | 6 | |
coreyharris | 0:38c49bc37c7c | 7 | void ecg_config(MAX30003 &ecgAFE); |
coreyharris | 0:38c49bc37c7c | 8 | |
coreyharris | 0:38c49bc37c7c | 9 | /* ECG FIFO nearly full callback */ |
coreyharris | 0:38c49bc37c7c | 10 | volatile bool ecgFIFOIntFlag = 0; |
coreyharris | 0:38c49bc37c7c | 11 | void ecgFIFO_callback() { |
coreyharris | 0:38c49bc37c7c | 12 | |
coreyharris | 0:38c49bc37c7c | 13 | ecgFIFOIntFlag = 1; |
coreyharris | 0:38c49bc37c7c | 14 | |
coreyharris | 0:38c49bc37c7c | 15 | } |
coreyharris | 0:38c49bc37c7c | 16 | |
coreyharris | 0:38c49bc37c7c | 17 | int main() |
coreyharris | 0:38c49bc37c7c | 18 | { |
coreyharris | 1:86843c27cc81 | 19 | Serial pc(USBTX, USBRX); // Use USB debug probe for serial link |
coreyharris | 1:86843c27cc81 | 20 | pc.baud(115200); // Baud rate = 115200 |
coreyharris | 1:86843c27cc81 | 21 | |
coreyharris | 1:86843c27cc81 | 22 | DigitalOut rLed(LED1, LED_OFF); // Debug LEDs |
coreyharris | 0:38c49bc37c7c | 23 | DigitalOut gLed(LED2, LED_OFF); |
coreyharris | 0:38c49bc37c7c | 24 | DigitalOut bLed(LED3, LED_OFF); |
coreyharris | 0:38c49bc37c7c | 25 | |
coreyharris | 1:86843c27cc81 | 26 | InterruptIn ecgFIFO_int(P5_4); // Config P5_4 as int. in for the |
coreyharris | 1:86843c27cc81 | 27 | ecgFIFO_int.fall(&ecgFIFO_callback); // ecg FIFO almost full interrupt |
coreyharris | 0:38c49bc37c7c | 28 | |
coreyharris | 1:86843c27cc81 | 29 | SPI spiBus(SPI2_MOSI, SPI2_MISO, SPI2_SCK); // SPI bus, P5_1 = MOSI, |
coreyharris | 1:86843c27cc81 | 30 | // P5_2 = MISO, P5_0 = SCK |
coreyharris | 0:38c49bc37c7c | 31 | |
coreyharris | 0:38c49bc37c7c | 32 | MAX30003 *ecgAFE; |
coreyharris | 1:86843c27cc81 | 33 | ecgAFE = new MAX30003(spiBus, P5_3); // New MAX30003 on spiBus, CS = P5_3 |
coreyharris | 1:86843c27cc81 | 34 | ecg_config(*ecgAFE); // Config ECG |
coreyharris | 1:86843c27cc81 | 35 | |
coreyharris | 0:38c49bc37c7c | 36 | |
coreyharris | 1:86843c27cc81 | 37 | ecgAFE->writeRegister( MAX30003::SYNCH , 0); |
coreyharris | 0:38c49bc37c7c | 38 | |
coreyharris | 2:812d40f1853d | 39 | uint32_t ecgFIFO, readSamples, idx, ETAG[32], status, RtoR; |
coreyharris | 1:86843c27cc81 | 40 | int16_t ecgSample[32]; |
coreyharris | 2:812d40f1853d | 41 | float BPM; |
coreyharris | 2:812d40f1853d | 42 | |
coreyharris | 1:86843c27cc81 | 43 | while(1) { |
coreyharris | 1:86843c27cc81 | 44 | |
coreyharris | 1:86843c27cc81 | 45 | bLed = LED_ON; |
coreyharris | 1:86843c27cc81 | 46 | |
coreyharris | 0:38c49bc37c7c | 47 | /* Read back ECG samples from the FIFO */ |
coreyharris | 0:38c49bc37c7c | 48 | if( ecgFIFOIntFlag ) { |
coreyharris | 2:812d40f1853d | 49 | pc.printf("Interrupt received....\r\n"); |
coreyharris | 1:86843c27cc81 | 50 | bLed = LED_OFF; |
coreyharris | 2:812d40f1853d | 51 | // Clear interrupt flag |
coreyharris | 2:812d40f1853d | 52 | |
coreyharris | 2:812d40f1853d | 53 | status = ecgAFE->readRegister( MAX30003::STATUS ); |
coreyharris | 2:812d40f1853d | 54 | pc.printf("Status : 0x%x\r\nCurrent BPM is %f\r\n\r\n", status, BPM); |
coreyharris | 2:812d40f1853d | 55 | |
coreyharris | 1:86843c27cc81 | 56 | |
coreyharris | 2:812d40f1853d | 57 | if( ( status & (1<<10) ) == (1<<10) ){ |
coreyharris | 2:812d40f1853d | 58 | ecgFIFOIntFlag = 0; |
coreyharris | 2:812d40f1853d | 59 | pc.printf("R-to-R Interrupt \r\n"); |
coreyharris | 2:812d40f1853d | 60 | RtoR = ecgAFE->readRegister( MAX30003::RTOR ); |
coreyharris | 2:812d40f1853d | 61 | BPM = 60.0*RtoR/32768.0; |
coreyharris | 2:812d40f1853d | 62 | pc.printf("RtoR : %d\r\n\r\n", RtoR); |
coreyharris | 2:812d40f1853d | 63 | } |
coreyharris | 2:812d40f1853d | 64 | |
coreyharris | 2:812d40f1853d | 65 | if ( ( status & (1<<23) ) == (1<<23) ) { |
coreyharris | 2:812d40f1853d | 66 | ecgFIFOIntFlag = 0; |
coreyharris | 2:812d40f1853d | 67 | pc.printf("FIFO Interrupt \r\n"); |
coreyharris | 2:812d40f1853d | 68 | readSamples = 0; // Reset sample counter |
coreyharris | 2:812d40f1853d | 69 | do { |
coreyharris | 2:812d40f1853d | 70 | ecgFIFO = ecgAFE->readRegister( MAX30003::ECG_FIFO ); // Read FIFO |
coreyharris | 2:812d40f1853d | 71 | ecgSample[readSamples] = ecgFIFO >> 8; // Isolate voltage data |
coreyharris | 2:812d40f1853d | 72 | ETAG[readSamples] = ( ecgFIFO >> 3 ) & 0b111; // Isolate ETAG |
coreyharris | 2:812d40f1853d | 73 | readSamples++; // Increment sample counter |
coreyharris | 2:812d40f1853d | 74 | } while ( ETAG[readSamples-1] == 0x0 || ETAG[readSamples-1] == 0x1 ); // Check that sample is valid |
coreyharris | 1:86843c27cc81 | 75 | |
coreyharris | 2:812d40f1853d | 76 | pc.printf("%d samples read from FIFO \r\n", readSamples); |
coreyharris | 2:812d40f1853d | 77 | |
coreyharris | 2:812d40f1853d | 78 | for( idx = 0; idx < readSamples; idx++ ) { |
coreyharris | 2:812d40f1853d | 79 | pc.printf("Sample : %6d, \tETAG : 0x%x\r\n", ecgSample[idx], ETAG[idx]); |
coreyharris | 2:812d40f1853d | 80 | } |
coreyharris | 2:812d40f1853d | 81 | pc.printf("\r\n\r\n\r\n"); |
coreyharris | 0:38c49bc37c7c | 82 | } |
coreyharris | 2:812d40f1853d | 83 | |
coreyharris | 0:38c49bc37c7c | 84 | } |
coreyharris | 0:38c49bc37c7c | 85 | } |
coreyharris | 0:38c49bc37c7c | 86 | } |
coreyharris | 0:38c49bc37c7c | 87 | |
coreyharris | 0:38c49bc37c7c | 88 | |
coreyharris | 0:38c49bc37c7c | 89 | |
coreyharris | 0:38c49bc37c7c | 90 | |
coreyharris | 0:38c49bc37c7c | 91 | void ecg_config(MAX30003& ecgAFE) { |
coreyharris | 0:38c49bc37c7c | 92 | |
coreyharris | 1:86843c27cc81 | 93 | // Reset ECG to clear registers |
coreyharris | 1:86843c27cc81 | 94 | ecgAFE.writeRegister( MAX30003::SW_RST , 0); |
coreyharris | 0:38c49bc37c7c | 95 | |
coreyharris | 0:38c49bc37c7c | 96 | |
coreyharris | 0:38c49bc37c7c | 97 | |
coreyharris | 1:86843c27cc81 | 98 | // General config register setting |
coreyharris | 1:86843c27cc81 | 99 | MAX30003::GeneralConfiguration_u CNFG_GEN_r; |
coreyharris | 1:86843c27cc81 | 100 | CNFG_GEN_r.bits.en_ecg = 1; |
coreyharris | 1:86843c27cc81 | 101 | CNFG_GEN_r.bits.rbiasn = 1; |
coreyharris | 1:86843c27cc81 | 102 | CNFG_GEN_r.bits.rbiasp = 1; |
coreyharris | 1:86843c27cc81 | 103 | CNFG_GEN_r.bits.en_rbias = 1; |
coreyharris | 1:86843c27cc81 | 104 | CNFG_GEN_r.bits.imag = 2; |
coreyharris | 1:86843c27cc81 | 105 | CNFG_GEN_r.bits.en_dcloff = 1; |
coreyharris | 1:86843c27cc81 | 106 | ecgAFE.writeRegister( MAX30003::CNFG_GEN , CNFG_GEN_r.all); |
coreyharris | 1:86843c27cc81 | 107 | |
coreyharris | 1:86843c27cc81 | 108 | |
coreyharris | 1:86843c27cc81 | 109 | // ECG Config register setting |
coreyharris | 1:86843c27cc81 | 110 | MAX30003::ECGConfiguration_u CNFG_ECG_r; |
coreyharris | 1:86843c27cc81 | 111 | CNFG_ECG_r.bits.dlpf = 1; |
coreyharris | 1:86843c27cc81 | 112 | CNFG_ECG_r.bits.dhpf = 1; |
coreyharris | 1:86843c27cc81 | 113 | CNFG_ECG_r.bits.gain = 3; |
coreyharris | 1:86843c27cc81 | 114 | CNFG_ECG_r.bits.rate = 3; |
coreyharris | 1:86843c27cc81 | 115 | ecgAFE.writeRegister( MAX30003::CNFG_ECG , CNFG_ECG_r.all); |
coreyharris | 1:86843c27cc81 | 116 | |
coreyharris | 1:86843c27cc81 | 117 | |
coreyharris | 1:86843c27cc81 | 118 | //R-to-R configuration |
coreyharris | 1:86843c27cc81 | 119 | MAX30003::RtoR1Configuration_u CNFG_RTOR_r; |
coreyharris | 1:86843c27cc81 | 120 | CNFG_RTOR_r.bits.en_rtor = 1; |
coreyharris | 1:86843c27cc81 | 121 | ecgAFE.writeRegister( MAX30003::CNFG_RTOR1 , CNFG_RTOR_r.all); |
coreyharris | 1:86843c27cc81 | 122 | |
coreyharris | 1:86843c27cc81 | 123 | |
coreyharris | 1:86843c27cc81 | 124 | //Manage interrupts register setting |
coreyharris | 1:86843c27cc81 | 125 | MAX30003::ManageInterrupts_u MNG_INT_r; |
coreyharris | 2:812d40f1853d | 126 | MNG_INT_r.bits.efit = 0b00011; |
coreyharris | 2:812d40f1853d | 127 | MNG_INT_r.bits.clr_rrint = 0b01; |
coreyharris | 1:86843c27cc81 | 128 | ecgAFE.writeRegister( MAX30003::MNGR_INT , MNG_INT_r.all); |
coreyharris | 0:38c49bc37c7c | 129 | |
coreyharris | 0:38c49bc37c7c | 130 | |
coreyharris | 1:86843c27cc81 | 131 | //Enable interrupts register setting |
coreyharris | 1:86843c27cc81 | 132 | MAX30003::EnableInterrupts_u EN_INT_r; |
coreyharris | 1:86843c27cc81 | 133 | EN_INT_r.all = 0; |
coreyharris | 1:86843c27cc81 | 134 | EN_INT_r.bits.en_eint = 1; |
coreyharris | 2:812d40f1853d | 135 | EN_INT_r.bits.en_rrint = 1; |
coreyharris | 1:86843c27cc81 | 136 | EN_INT_r.bits.intb_type = 0b11; |
coreyharris | 1:86843c27cc81 | 137 | ecgAFE.writeRegister( MAX30003::EN_INT , EN_INT_r.all); |
coreyharris | 1:86843c27cc81 | 138 | |
coreyharris | 1:86843c27cc81 | 139 | |
coreyharris | 1:86843c27cc81 | 140 | //Dyanmic modes config |
coreyharris | 1:86843c27cc81 | 141 | MAX30003::ManageDynamicModes_u MNG_DYN_r; |
coreyharris | 1:86843c27cc81 | 142 | MNG_DYN_r.bits.fast = 0; |
coreyharris | 1:86843c27cc81 | 143 | ecgAFE.writeRegister( MAX30003::MNGR_DYN , MNG_DYN_r.all); |
coreyharris | 1:86843c27cc81 | 144 | |
coreyharris | 0:38c49bc37c7c | 145 | |
coreyharris | 1:86843c27cc81 | 146 | //MUX Config |
coreyharris | 1:86843c27cc81 | 147 | MAX30003::MuxConfiguration_u CNFG_MUX_r; |
coreyharris | 1:86843c27cc81 | 148 | CNFG_MUX_r.bits.pol = 0; |
coreyharris | 1:86843c27cc81 | 149 | ecgAFE.writeRegister( MAX30003::CNFG_EMUX , CNFG_MUX_r.all); |
coreyharris | 0:38c49bc37c7c | 150 | |
coreyharris | 1:86843c27cc81 | 151 | return; |
coreyharris | 0:38c49bc37c7c | 152 | } |
coreyharris | 0:38c49bc37c7c | 153 |