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cmsis_dsp/BasicMathFunctions/arm_offset_q31.c@3:7a284390b0ce, 2013-11-08 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Nov 08 13:45:10 2013 +0000
- Revision:
- 3:7a284390b0ce
- Parent:
- 2:da51fb522205
- Child:
- 5:3762170b6d4d
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8
Who changed what in which revision?
| User | Revision | Line number | New contents of line | 
|---|---|---|---|
| emilmont | 1:fdd22bb7aa52 | 1 | /* ---------------------------------------------------------------------- | 
| mbed_official | 3:7a284390b0ce | 2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved. | 
| emilmont | 1:fdd22bb7aa52 | 3 | * | 
| mbed_official | 3:7a284390b0ce | 4 | * $Date: 17. January 2013 | 
| mbed_official | 3:7a284390b0ce | 5 | * $Revision: V1.4.1 | 
| emilmont | 1:fdd22bb7aa52 | 6 | * | 
| emilmont | 2:da51fb522205 | 7 | * Project: CMSIS DSP Library | 
| emilmont | 2:da51fb522205 | 8 | * Title: arm_offset_q31.c | 
| emilmont | 1:fdd22bb7aa52 | 9 | * | 
| emilmont | 2:da51fb522205 | 10 | * Description: Q31 vector offset. | 
| emilmont | 1:fdd22bb7aa52 | 11 | * | 
| emilmont | 1:fdd22bb7aa52 | 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 | 
| emilmont | 1:fdd22bb7aa52 | 13 | * | 
| mbed_official | 3:7a284390b0ce | 14 | * Redistribution and use in source and binary forms, with or without | 
| mbed_official | 3:7a284390b0ce | 15 | * modification, are permitted provided that the following conditions | 
| mbed_official | 3:7a284390b0ce | 16 | * are met: | 
| mbed_official | 3:7a284390b0ce | 17 | * - Redistributions of source code must retain the above copyright | 
| mbed_official | 3:7a284390b0ce | 18 | * notice, this list of conditions and the following disclaimer. | 
| mbed_official | 3:7a284390b0ce | 19 | * - Redistributions in binary form must reproduce the above copyright | 
| mbed_official | 3:7a284390b0ce | 20 | * notice, this list of conditions and the following disclaimer in | 
| mbed_official | 3:7a284390b0ce | 21 | * the documentation and/or other materials provided with the | 
| mbed_official | 3:7a284390b0ce | 22 | * distribution. | 
| mbed_official | 3:7a284390b0ce | 23 | * - Neither the name of ARM LIMITED nor the names of its contributors | 
| mbed_official | 3:7a284390b0ce | 24 | * may be used to endorse or promote products derived from this | 
| mbed_official | 3:7a284390b0ce | 25 | * software without specific prior written permission. | 
| mbed_official | 3:7a284390b0ce | 26 | * | 
| mbed_official | 3:7a284390b0ce | 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | 
| mbed_official | 3:7a284390b0ce | 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | 
| mbed_official | 3:7a284390b0ce | 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | 
| mbed_official | 3:7a284390b0ce | 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | 
| mbed_official | 3:7a284390b0ce | 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | 
| mbed_official | 3:7a284390b0ce | 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | 
| mbed_official | 3:7a284390b0ce | 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | 
| mbed_official | 3:7a284390b0ce | 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | 
| mbed_official | 3:7a284390b0ce | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 
| mbed_official | 3:7a284390b0ce | 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN | 
| mbed_official | 3:7a284390b0ce | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 
| mbed_official | 3:7a284390b0ce | 38 | * POSSIBILITY OF SUCH DAMAGE. | 
| emilmont | 1:fdd22bb7aa52 | 39 | * -------------------------------------------------------------------- */ | 
| emilmont | 1:fdd22bb7aa52 | 40 | |
| emilmont | 1:fdd22bb7aa52 | 41 | #include "arm_math.h" | 
| emilmont | 1:fdd22bb7aa52 | 42 | |
| emilmont | 1:fdd22bb7aa52 | 43 | /** | 
| emilmont | 1:fdd22bb7aa52 | 44 | * @ingroup groupMath | 
| emilmont | 1:fdd22bb7aa52 | 45 | */ | 
| emilmont | 1:fdd22bb7aa52 | 46 | |
| emilmont | 1:fdd22bb7aa52 | 47 | /** | 
| emilmont | 1:fdd22bb7aa52 | 48 | * @addtogroup offset | 
| emilmont | 1:fdd22bb7aa52 | 49 | * @{ | 
| emilmont | 1:fdd22bb7aa52 | 50 | */ | 
| emilmont | 1:fdd22bb7aa52 | 51 | |
| emilmont | 1:fdd22bb7aa52 | 52 | /** | 
| emilmont | 1:fdd22bb7aa52 | 53 | * @brief Adds a constant offset to a Q31 vector. | 
| emilmont | 1:fdd22bb7aa52 | 54 | * @param[in] *pSrc points to the input vector | 
| emilmont | 1:fdd22bb7aa52 | 55 | * @param[in] offset is the offset to be added | 
| emilmont | 1:fdd22bb7aa52 | 56 | * @param[out] *pDst points to the output vector | 
| emilmont | 1:fdd22bb7aa52 | 57 | * @param[in] blockSize number of samples in the vector | 
| emilmont | 1:fdd22bb7aa52 | 58 | * @return none. | 
| emilmont | 1:fdd22bb7aa52 | 59 | * | 
| emilmont | 1:fdd22bb7aa52 | 60 | * <b>Scaling and Overflow Behavior:</b> | 
| emilmont | 1:fdd22bb7aa52 | 61 | * \par | 
| emilmont | 1:fdd22bb7aa52 | 62 | * The function uses saturating arithmetic. | 
| emilmont | 1:fdd22bb7aa52 | 63 | * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. | 
| emilmont | 1:fdd22bb7aa52 | 64 | */ | 
| emilmont | 1:fdd22bb7aa52 | 65 | |
| emilmont | 1:fdd22bb7aa52 | 66 | void arm_offset_q31( | 
| emilmont | 1:fdd22bb7aa52 | 67 | q31_t * pSrc, | 
| emilmont | 1:fdd22bb7aa52 | 68 | q31_t offset, | 
| emilmont | 1:fdd22bb7aa52 | 69 | q31_t * pDst, | 
| emilmont | 1:fdd22bb7aa52 | 70 | uint32_t blockSize) | 
| emilmont | 1:fdd22bb7aa52 | 71 | { | 
| emilmont | 1:fdd22bb7aa52 | 72 | uint32_t blkCnt; /* loop counter */ | 
| emilmont | 1:fdd22bb7aa52 | 73 | |
| mbed_official | 3:7a284390b0ce | 74 | #ifndef ARM_MATH_CM0_FAMILY | 
| emilmont | 1:fdd22bb7aa52 | 75 | |
| emilmont | 1:fdd22bb7aa52 | 76 | /* Run the below code for Cortex-M4 and Cortex-M3 */ | 
| emilmont | 1:fdd22bb7aa52 | 77 | q31_t in1, in2, in3, in4; | 
| emilmont | 1:fdd22bb7aa52 | 78 | |
| emilmont | 1:fdd22bb7aa52 | 79 | |
| emilmont | 1:fdd22bb7aa52 | 80 | /*loop Unrolling */ | 
| emilmont | 1:fdd22bb7aa52 | 81 | blkCnt = blockSize >> 2u; | 
| emilmont | 1:fdd22bb7aa52 | 82 | |
| emilmont | 1:fdd22bb7aa52 | 83 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. | 
| emilmont | 1:fdd22bb7aa52 | 84 | ** a second loop below computes the remaining 1 to 3 samples. */ | 
| emilmont | 1:fdd22bb7aa52 | 85 | while(blkCnt > 0u) | 
| emilmont | 1:fdd22bb7aa52 | 86 | { | 
| emilmont | 1:fdd22bb7aa52 | 87 | /* C = A + offset */ | 
| emilmont | 1:fdd22bb7aa52 | 88 | /* Add offset and then store the results in the destination buffer. */ | 
| emilmont | 1:fdd22bb7aa52 | 89 | in1 = *pSrc++; | 
| emilmont | 1:fdd22bb7aa52 | 90 | in2 = *pSrc++; | 
| emilmont | 1:fdd22bb7aa52 | 91 | in3 = *pSrc++; | 
| emilmont | 1:fdd22bb7aa52 | 92 | in4 = *pSrc++; | 
| emilmont | 1:fdd22bb7aa52 | 93 | |
| emilmont | 1:fdd22bb7aa52 | 94 | *pDst++ = __QADD(in1, offset); | 
| emilmont | 1:fdd22bb7aa52 | 95 | *pDst++ = __QADD(in2, offset); | 
| emilmont | 1:fdd22bb7aa52 | 96 | *pDst++ = __QADD(in3, offset); | 
| emilmont | 1:fdd22bb7aa52 | 97 | *pDst++ = __QADD(in4, offset); | 
| emilmont | 1:fdd22bb7aa52 | 98 | |
| emilmont | 1:fdd22bb7aa52 | 99 | /* Decrement the loop counter */ | 
| emilmont | 1:fdd22bb7aa52 | 100 | blkCnt--; | 
| emilmont | 1:fdd22bb7aa52 | 101 | } | 
| emilmont | 1:fdd22bb7aa52 | 102 | |
| emilmont | 1:fdd22bb7aa52 | 103 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here. | 
| emilmont | 1:fdd22bb7aa52 | 104 | ** No loop unrolling is used. */ | 
| emilmont | 1:fdd22bb7aa52 | 105 | blkCnt = blockSize % 0x4u; | 
| emilmont | 1:fdd22bb7aa52 | 106 | |
| emilmont | 1:fdd22bb7aa52 | 107 | while(blkCnt > 0u) | 
| emilmont | 1:fdd22bb7aa52 | 108 | { | 
| emilmont | 1:fdd22bb7aa52 | 109 | /* C = A + offset */ | 
| emilmont | 1:fdd22bb7aa52 | 110 | /* Add offset and then store the result in the destination buffer. */ | 
| emilmont | 1:fdd22bb7aa52 | 111 | *pDst++ = __QADD(*pSrc++, offset); | 
| emilmont | 1:fdd22bb7aa52 | 112 | |
| emilmont | 1:fdd22bb7aa52 | 113 | /* Decrement the loop counter */ | 
| emilmont | 1:fdd22bb7aa52 | 114 | blkCnt--; | 
| emilmont | 1:fdd22bb7aa52 | 115 | } | 
| emilmont | 1:fdd22bb7aa52 | 116 | |
| emilmont | 1:fdd22bb7aa52 | 117 | #else | 
| emilmont | 1:fdd22bb7aa52 | 118 | |
| emilmont | 1:fdd22bb7aa52 | 119 | /* Run the below code for Cortex-M0 */ | 
| emilmont | 1:fdd22bb7aa52 | 120 | |
| emilmont | 1:fdd22bb7aa52 | 121 | /* Initialize blkCnt with number of samples */ | 
| emilmont | 1:fdd22bb7aa52 | 122 | blkCnt = blockSize; | 
| emilmont | 1:fdd22bb7aa52 | 123 | |
| emilmont | 1:fdd22bb7aa52 | 124 | while(blkCnt > 0u) | 
| emilmont | 1:fdd22bb7aa52 | 125 | { | 
| emilmont | 1:fdd22bb7aa52 | 126 | /* C = A + offset */ | 
| emilmont | 1:fdd22bb7aa52 | 127 | /* Add offset and then store the result in the destination buffer. */ | 
| emilmont | 1:fdd22bb7aa52 | 128 | *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset); | 
| emilmont | 1:fdd22bb7aa52 | 129 | |
| emilmont | 1:fdd22bb7aa52 | 130 | /* Decrement the loop counter */ | 
| emilmont | 1:fdd22bb7aa52 | 131 | blkCnt--; | 
| emilmont | 1:fdd22bb7aa52 | 132 | } | 
| emilmont | 1:fdd22bb7aa52 | 133 | |
| mbed_official | 3:7a284390b0ce | 134 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ | 
| emilmont | 1:fdd22bb7aa52 | 135 | |
| emilmont | 1:fdd22bb7aa52 | 136 | } | 
| emilmont | 1:fdd22bb7aa52 | 137 | |
| emilmont | 1:fdd22bb7aa52 | 138 | /** | 
| emilmont | 1:fdd22bb7aa52 | 139 | * @} end of offset group | 
| emilmont | 1:fdd22bb7aa52 | 140 | */ |