MBED_DEMOS / Mbed 2 deprecated IoT_World_Hackathon_WiGo_NSP_Demo

Demo starter application to connect WiGo to NSP and expose on-board sensors

Dependencies:   NVIC_set_all_priorities cc3000_hostdriver_mbedsocket mbed nsdl_lib TEMT6200 TSI Wi-Go_eCompass_Lib_V3 WiGo_BattCharger

This is the mbed project for the IoT World Hackathon event, June 17th and 18th in Palo Also.

The setup instructions for participants are at the Setup page of this wiki:

http://mbed.org/teams/MBED_DEMOS/code/IoT_World_Hackathon_WiGo_NSP_Demo/wiki/Setup-Guide-for-the-IoT-World-Hackathon

I2C_busreset/I2C_busreset.cpp@0:07581223f90c, 2014-06-13 (annotated)

Committer:
michaeljkoster
Date:
Fri Jun 13 18:00:38 2014 +0000
Revision:
0:07581223f90c
Initial files

Who changed what in which revision?

UserRevisionLine numberNew contents of line
michaeljkoster 0:07581223f90c 1 /**************************************************************************************************
michaeljkoster 0:07581223f90c 2 ***** *****
michaeljkoster 0:07581223f90c 3 ***** Name: KL25Z I2C_busreset.cpp *****
michaeljkoster 0:07581223f90c 4 ***** Date: 24/11/2013 *****
michaeljkoster 0:07581223f90c 5 ***** Auth: Frank Vannieuwkerke *****
michaeljkoster 0:07581223f90c 6 ***** Func: library for unblocking I2C bus on KL25Z board *****
michaeljkoster 0:07581223f90c 7 ***** Info: MPL3115A2-AN4481 *****
michaeljkoster 0:07581223f90c 8 **************************************************************************************************/
michaeljkoster 0:07581223f90c 9
michaeljkoster 0:07581223f90c 10 #include "I2C_busreset.h"
michaeljkoster 0:07581223f90c 11
michaeljkoster 0:07581223f90c 12 void I2C_busreset(void)
michaeljkoster 0:07581223f90c 13 {
michaeljkoster 0:07581223f90c 14 I2C0->C1 &= 0x7f; // Disable I2C0 bus
michaeljkoster 0:07581223f90c 15 I2C1->C1 &= 0x7f; // Disable I2C1 bus
michaeljkoster 0:07581223f90c 16 PORTE->PCR[1] = PORT_PCR_MUX(1); // PTE1 Alt1 (pin)
michaeljkoster 0:07581223f90c 17 PORTE->PCR[0] = PORT_PCR_MUX(1); // PTE0 Alt1 (pin)
michaeljkoster 0:07581223f90c 18 PORTE->PCR[24] = PORT_PCR_MUX(1); // PTE24 Alt1 (pin)
michaeljkoster 0:07581223f90c 19 PORTE->PCR[25] = PORT_PCR_MUX(1); // PTE25 Alt1 (pin)
michaeljkoster 0:07581223f90c 20 if((PTE->PDIR & 0x3) != 3) // When PTE0 / PTE1 are not 1 : I2C1 bus lock-up
michaeljkoster 0:07581223f90c 21 {
michaeljkoster 0:07581223f90c 22 PTE->PDDR |= 0x2; // Set PTE1 as a GPIO output so we can bit bang it
michaeljkoster 0:07581223f90c 23 PTE->PDOR |= 0x2; // Set PTE1 (SCL) pin high;
michaeljkoster 0:07581223f90c 24 wait_ms(1);
michaeljkoster 0:07581223f90c 25 while(!(PTE->PDIR & 0x1)) // bit bang SCL until the offending device releases the bus
michaeljkoster 0:07581223f90c 26 {
michaeljkoster 0:07581223f90c 27 PTE->PDOR &= 0xfffffffd; // Set PTE1 (SCL) pin low;
michaeljkoster 0:07581223f90c 28 wait_ms(1);
michaeljkoster 0:07581223f90c 29 PTE->PDOR |= 0x2; // Set PTE1 (SCL) pin high;
michaeljkoster 0:07581223f90c 30 wait_ms(1);
michaeljkoster 0:07581223f90c 31 }
michaeljkoster 0:07581223f90c 32 }
michaeljkoster 0:07581223f90c 33 if((PTE->PDIR & 0x03000000) != 0x03000000) // When PTE24 / PTE25 are not 1 : I2C0 bus lock-up
michaeljkoster 0:07581223f90c 34 {
michaeljkoster 0:07581223f90c 35 PTE->PDDR |= 0x01000000; // Set PTE24 as a GPIO output so we can bit bang it
michaeljkoster 0:07581223f90c 36 PTE->PDOR |= 0x01000000; // Set PTE24 (SCL) pin high;
michaeljkoster 0:07581223f90c 37 wait_ms(1);
michaeljkoster 0:07581223f90c 38 while(!(PTE->PDIR & 0x1)) // bit bang SCL until the offending device releases the bus
michaeljkoster 0:07581223f90c 39 {
michaeljkoster 0:07581223f90c 40 PTE->PDOR &= 0xfeffffff; // Set PTE24 (SCL) pin low;
michaeljkoster 0:07581223f90c 41 wait_ms(1);
michaeljkoster 0:07581223f90c 42 PTE->PDOR |= 0x01000000; // Set PTE24 (SCL) pin high;
michaeljkoster 0:07581223f90c 43 wait_ms(1);
michaeljkoster 0:07581223f90c 44 }
michaeljkoster 0:07581223f90c 45 }
michaeljkoster 0:07581223f90c 46 // Reinstate I2C bus pins
michaeljkoster 0:07581223f90c 47 PORTE->PCR[1] = PORT_PCR_MUX(6); // PTE1 Alt6 (SCL)
michaeljkoster 0:07581223f90c 48 PORTE->PCR[0] = PORT_PCR_MUX(6); // PTE0 Alt6 (SDA)
michaeljkoster 0:07581223f90c 49 PORTE->PCR[24] = PORT_PCR_MUX(5); // PTE24 Alt6 (SCL)
michaeljkoster 0:07581223f90c 50 PORTE->PCR[25] = PORT_PCR_MUX(5); // PTE25 Alt6 (SDA)
michaeljkoster 0:07581223f90c 51 I2C0->C1 |= 0x80; // Enable I2C0 bus
michaeljkoster 0:07581223f90c 52 I2C1->C1 |= 0x80; // Enable I2C1 bus
michaeljkoster 0:07581223f90c 53 }
michaeljkoster 0:07581223f90c 54
michaeljkoster 0:07581223f90c 55
michaeljkoster 0:07581223f90c 56
michaeljkoster 0:07581223f90c 57
michaeljkoster 0:07581223f90c 58