Revision 1:40b397b31d13, committed 2017-07-31

Comitter:

MI

Date:

Mon Jul 31 23:57:09 2017 +0000

Parent:

0:9f09f1b58389

Commit message:

Committed the wrong version the first time.

Changed in this revision

diff -r 9f09f1b58389 -r 40b397b31d13 MAX2871.cpp
--- a/MAX2871.cpp	Mon Jul 31 18:40:54 2017 +0000
+++ b/MAX2871.cpp	Mon Jul 31 23:57:09 2017 +0000
@@ -127,8 +127,8 @@
     n = floor(pll_coefficient);
     pll_coefficient = pll_coefficient - n;
     
-    m = 2500;
-    frac = roundf(m*pll_coefficient);
+    m = 4000;
+    frac = floor(m*pll_coefficient);
     
     reg0.bits.frac = frac;
     reg0.bits.n = n;

diff -r 9f09f1b58389 -r 40b397b31d13 MAX2871.h
--- a/MAX2871.h	Mon Jul 31 18:40:54 2017 +0000
+++ b/MAX2871.h	Mon Jul 31 23:57:09 2017 +0000
@@ -82,16 +82,19 @@
         fgets(buffer,256,stdin);        //store entry as string until newline entered
         freq_entry = atof (buffer);     //convert string to a float
         max2871.frequency(freq_entry);  //update MAX2871 registers for new frequency
+        max2871.readRegister6();        //read register 6 and update max2871.reg6
         
         //Examples for how to calculate important operation parameters like
         //PFD frequency and divisor ratios using members of the MAX2871 class
         freq_pfd = max2871.f_reference*(1+max2871.reg2.bits.dbr)/(max2871.reg2.bits.r*(1+max2871.reg2.bits.rdiv2));
-        pll_coefficient = (max2871.reg0.bits.n+max2871.reg0.bits.frac/(float)max2871.reg1.bits.m);
+        pll_coefficient = (max2871.reg0.bits.n+1.0*max2871.reg0.bits.frac/max2871.reg1.bits.m);
         vco_divisor = powf(2,max2871.reg4.bits.diva);
         
         //calculate expected f_RFOUTA based on the register settings
         freq_actual = freq_pfd*pll_coefficient/vco_divisor;
-        pc.printf("\n\rTarget: %f MHz \tActual: %f MHz",freq_entry,freq_actual);
+        pc.printf("\n\rTarget: %.3f MHz\tActual: %.3f MHz",freq_entry,freq_actual);
+        pc.printf("\n\rDie: %d, VCO: %d, F_PFD: %f",max2871.reg6.bits.die,max2871.reg6.bits.v,freq_pfd);
+        pc.printf("\n\rN: %d, F: %d, M: %d, N+F/M: %f",max2871.reg0.bits.n,max2871.reg0.bits.frac,max2871.reg1.bits.m,pll_coefficient);
     }
         
 }
@@ -264,6 +267,7 @@
     REG4_u reg4;
     REG5_u reg5;
     REG6_u reg6;
+    
     float f_reference;
     
     ///@brief MAX2871 Constructor