Los Putacos / Mbed OS WearableDevice_Nucleo_New

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Dependencies:   MPU9250_SPI

Fork of WearableDevice_Nucleo by Los Putacos

configuration.h@28:c7e977a19564, 2017-12-19 (annotated)

Committer:
Muglug
Date:
Tue Dec 19 10:15:19 2017 +0000
Revision:
28:c7e977a19564
Parent:
26:4bc56ce08d15
Child:
29:ab809198c1ba
Newest Version.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gusteibolt 2:7f90cc734a10 1 /*
gusteibolt 2:7f90cc734a10 2 * Los Putacos
gusteibolt 2:7f90cc734a10 3 * Copyright (C) 2017, All rights reserved.
Muglug 19:0a3ae902722e 4 * ________________________________________
gusteibolt 2:7f90cc734a10 5 *
gusteibolt 2:7f90cc734a10 6 * Created by: Gustavo Campana, Michael Schmidt, Miguel Lopez
gusteibolt 2:7f90cc734a10 7 * Date: 11-Oct-2017
gusteibolt 2:7f90cc734a10 8 * Version: V0.1
gusteibolt 2:7f90cc734a10 9 */
gusteibolt 2:7f90cc734a10 10
gusteibolt 2:7f90cc734a10 11 //-----------------------------------------------------------------
gusteibolt 2:7f90cc734a10 12 #ifndef CONFIGURATION_H_
gusteibolt 2:7f90cc734a10 13 #define CONFIGURATION_H_
gusteibolt 2:7f90cc734a10 14
Muglug 23:aad5fd1b3ef9 15 // Microcontroller definition - Comment the Version not used
Muglug 23:aad5fd1b3ef9 16 // #define STM32F401RET6 1
Muglug 23:aad5fd1b3ef9 17 #define STM32F446RET6 1
gusteibolt 2:7f90cc734a10 18
gusteibolt 2:7f90cc734a10 19 // Debug mode
gusteibolt 2:7f90cc734a10 20 #define DEBUG_MODE 0
Muglug 26:4bc56ce08d15 21 //-----------------------------------------------------------------
Muglug 26:4bc56ce08d15 22
Muglug 26:4bc56ce08d15 23 //-----------------------------------------------------------------
Muglug 26:4bc56ce08d15 24 // PIN Defines
Muglug 26:4bc56ce08d15 25 #ifdef STM32F401RET6
Muglug 26:4bc56ce08d15 26 #define RADIO_TX PA_11
Muglug 26:4bc56ce08d15 27 #define RADIO_RX PA_12
Muglug 26:4bc56ce08d15 28 #define RADIO_RESET NC
Muglug 26:4bc56ce08d15 29
Muglug 26:4bc56ce08d15 30 #define SD_CLK PC_10
Muglug 26:4bc56ce08d15 31 #define SD_MISO PC_11
Muglug 26:4bc56ce08d15 32 #define SD_MOSI PC_12
Muglug 26:4bc56ce08d15 33 #define SD_CS PD_2
Muglug 26:4bc56ce08d15 34
Muglug 26:4bc56ce08d15 35 //Analog Input
Muglug 26:4bc56ce08d15 36 AnalogIn micro(A0);
Muglug 26:4bc56ce08d15 37 //Digital Input
Muglug 26:4bc56ce08d15 38 DigitalOut led1(LED1);
Muglug 26:4bc56ce08d15 39 #endif
Muglug 28:c7e977a19564 40
Muglug 26:4bc56ce08d15 41 #ifdef STM32F446RET6
Muglug 28:c7e977a19564 42 #define WiFi_SSID "OnePlus3"
Muglug 28:c7e977a19564 43 #define WiFi_Pass "mahandi00"
Muglug 28:c7e977a19564 44
Muglug 28:c7e977a19564 45 #define ESP_TX PC_6
Muglug 28:c7e977a19564 46 #define ESP_RX PC_7
Muglug 26:4bc56ce08d15 47
Muglug 28:c7e977a19564 48 // #define SD_CLK PC_10
Muglug 28:c7e977a19564 49 // #define SD_MISO PC_11
Muglug 28:c7e977a19564 50 // #define SD_MOSI PC_12
Muglug 28:c7e977a19564 51 // #define SD_CS PD_2
Muglug 28:c7e977a19564 52 // #define SD_CD PC_0
Muglug 28:c7e977a19564 53
Muglug 28:c7e977a19564 54 #define IMU_SCK PB_13
Muglug 28:c7e977a19564 55 #define IMU_MISO PB_14 // SDO - Serial Data Output - MISO
Muglug 28:c7e977a19564 56 #define IMU_MOSI PB_15 // SDI - Serial Data Input - MOSI
Muglug 28:c7e977a19564 57 #define IMU_CS PB_1
Muglug 26:4bc56ce08d15 58
Muglug 26:4bc56ce08d15 59 //Analog Input
Muglug 26:4bc56ce08d15 60 AnalogIn micro(PC_4);
Muglug 26:4bc56ce08d15 61 //Digital Input
Muglug 26:4bc56ce08d15 62 DigitalOut led1(LED1);
Muglug 26:4bc56ce08d15 63 #endif
gusteibolt 2:7f90cc734a10 64
gusteibolt 2:7f90cc734a10 65 #endif // CONFIGURATION_H_
gusteibolt 2:7f90cc734a10 66 //-----------------------------------------------------------------