Lancaster University / mbed-lite-test

test

SPI.h@1:a7c51b5e0534, 2016-04-07 (annotated)

Committer:
jamesadevine
Date:
Thu Apr 07 17:50:29 2016 +0000
Revision:
1:a7c51b5e0534
Parent:
0:e1a608bb55e8 
Added correct nrf51.h ; Added scatter file.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jamesadevine 0:e1a608bb55e8 1 /* mbed Microcontroller Library
jamesadevine 0:e1a608bb55e8 2 * Copyright (c) 2006-2015 ARM Limited
jamesadevine 0:e1a608bb55e8 3 *
jamesadevine 0:e1a608bb55e8 4 * Licensed under the Apache License, Version 2.0 (the "License");
jamesadevine 0:e1a608bb55e8 5 * you may not use this file except in compliance with the License.
jamesadevine 0:e1a608bb55e8 6 * You may obtain a copy of the License at
jamesadevine 0:e1a608bb55e8 7 *
jamesadevine 0:e1a608bb55e8 8 * http://www.apache.org/licenses/LICENSE-2.0
jamesadevine 0:e1a608bb55e8 9 *
jamesadevine 0:e1a608bb55e8 10 * Unless required by applicable law or agreed to in writing, software
jamesadevine 0:e1a608bb55e8 11 * distributed under the License is distributed on an "AS IS" BASIS,
jamesadevine 0:e1a608bb55e8 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
jamesadevine 0:e1a608bb55e8 13 * See the License for the specific language governing permissions and
jamesadevine 0:e1a608bb55e8 14 * limitations under the License.
jamesadevine 0:e1a608bb55e8 15 */
jamesadevine 0:e1a608bb55e8 16 #ifndef MBED_SPI_H
jamesadevine 0:e1a608bb55e8 17 #define MBED_SPI_H
jamesadevine 0:e1a608bb55e8 18
jamesadevine 0:e1a608bb55e8 19 #include "platform.h"
jamesadevine 0:e1a608bb55e8 20
jamesadevine 0:e1a608bb55e8 21 #if DEVICE_SPI
jamesadevine 0:e1a608bb55e8 22
jamesadevine 0:e1a608bb55e8 23 #include "spi_api.h"
jamesadevine 0:e1a608bb55e8 24
jamesadevine 0:e1a608bb55e8 25 #if DEVICE_SPI_ASYNCH
jamesadevine 0:e1a608bb55e8 26 #include "CThunk.h"
jamesadevine 0:e1a608bb55e8 27 #include "dma_api.h"
jamesadevine 0:e1a608bb55e8 28 #include "CircularBuffer.h"
jamesadevine 0:e1a608bb55e8 29 #include "FunctionPointer.h"
jamesadevine 0:e1a608bb55e8 30 #include "Transaction.h"
jamesadevine 0:e1a608bb55e8 31 #endif
jamesadevine 0:e1a608bb55e8 32
jamesadevine 0:e1a608bb55e8 33 namespace mbed {
jamesadevine 0:e1a608bb55e8 34
jamesadevine 0:e1a608bb55e8 35 /** A SPI Master, used for communicating with SPI slave devices
jamesadevine 0:e1a608bb55e8 36 *
jamesadevine 0:e1a608bb55e8 37 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
jamesadevine 0:e1a608bb55e8 38 *
jamesadevine 0:e1a608bb55e8 39 * Most SPI devices will also require Chip Select and Reset signals. These
jamesadevine 0:e1a608bb55e8 40 * can be controlled using <DigitalOut> pins
jamesadevine 0:e1a608bb55e8 41 *
jamesadevine 0:e1a608bb55e8 42 * Example:
jamesadevine 0:e1a608bb55e8 43 * @code
jamesadevine 0:e1a608bb55e8 44 * // Send a byte to a SPI slave, and record the response
jamesadevine 0:e1a608bb55e8 45 *
jamesadevine 0:e1a608bb55e8 46 * #include "mbed.h"
jamesadevine 0:e1a608bb55e8 47 *
jamesadevine 0:e1a608bb55e8 48 * // hardware ssel (where applicable)
jamesadevine 0:e1a608bb55e8 49 * //SPI device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
jamesadevine 0:e1a608bb55e8 50 *
jamesadevine 0:e1a608bb55e8 51 * // software ssel
jamesadevine 0:e1a608bb55e8 52 * SPI device(p5, p6, p7); // mosi, miso, sclk
jamesadevine 0:e1a608bb55e8 53 * DigitalOut cs(p8); // ssel
jamesadevine 0:e1a608bb55e8 54 *
jamesadevine 0:e1a608bb55e8 55 * int main() {
jamesadevine 0:e1a608bb55e8 56 * // hardware ssel (where applicable)
jamesadevine 0:e1a608bb55e8 57 * //int response = device.write(0xFF);
jamesadevine 0:e1a608bb55e8 58 *
jamesadevine 0:e1a608bb55e8 59 * // software ssel
jamesadevine 0:e1a608bb55e8 60 * cs = 0;
jamesadevine 0:e1a608bb55e8 61 * int response = device.write(0xFF);
jamesadevine 0:e1a608bb55e8 62 * cs = 1;
jamesadevine 0:e1a608bb55e8 63 * }
jamesadevine 0:e1a608bb55e8 64 * @endcode
jamesadevine 0:e1a608bb55e8 65 */
jamesadevine 0:e1a608bb55e8 66 class SPI {
jamesadevine 0:e1a608bb55e8 67
jamesadevine 0:e1a608bb55e8 68 public:
jamesadevine 0:e1a608bb55e8 69
jamesadevine 0:e1a608bb55e8 70 /** Create a SPI master connected to the specified pins
jamesadevine 0:e1a608bb55e8 71 *
jamesadevine 0:e1a608bb55e8 72 * mosi or miso can be specfied as NC if not used
jamesadevine 0:e1a608bb55e8 73 *
jamesadevine 0:e1a608bb55e8 74 * @param mosi SPI Master Out, Slave In pin
jamesadevine 0:e1a608bb55e8 75 * @param miso SPI Master In, Slave Out pin
jamesadevine 0:e1a608bb55e8 76 * @param sclk SPI Clock pin
jamesadevine 0:e1a608bb55e8 77 * @param ssel SPI chip select pin
jamesadevine 0:e1a608bb55e8 78 */
jamesadevine 0:e1a608bb55e8 79 SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel=NC);
jamesadevine 0:e1a608bb55e8 80
jamesadevine 0:e1a608bb55e8 81 /** Configure the data transmission format
jamesadevine 0:e1a608bb55e8 82 *
jamesadevine 0:e1a608bb55e8 83 * @param bits Number of bits per SPI frame (4 - 16)
jamesadevine 0:e1a608bb55e8 84 * @param mode Clock polarity and phase mode (0 - 3)
jamesadevine 0:e1a608bb55e8 85 *
jamesadevine 0:e1a608bb55e8 86 * @code
jamesadevine 0:e1a608bb55e8 87 * mode | POL PHA
jamesadevine 0:e1a608bb55e8 88 * -----+--------
jamesadevine 0:e1a608bb55e8 89 * 0 | 0 0
jamesadevine 0:e1a608bb55e8 90 * 1 | 0 1
jamesadevine 0:e1a608bb55e8 91 * 2 | 1 0
jamesadevine 0:e1a608bb55e8 92 * 3 | 1 1
jamesadevine 0:e1a608bb55e8 93 * @endcode
jamesadevine 0:e1a608bb55e8 94 */
jamesadevine 0:e1a608bb55e8 95 void format(int bits, int mode = 0);
jamesadevine 0:e1a608bb55e8 96
jamesadevine 0:e1a608bb55e8 97 /** Set the spi bus clock frequency
jamesadevine 0:e1a608bb55e8 98 *
jamesadevine 0:e1a608bb55e8 99 * @param hz SCLK frequency in hz (default = 1MHz)
jamesadevine 0:e1a608bb55e8 100 */
jamesadevine 0:e1a608bb55e8 101 void frequency(int hz = 1000000);
jamesadevine 0:e1a608bb55e8 102
jamesadevine 0:e1a608bb55e8 103 /** Write to the SPI Slave and return the response
jamesadevine 0:e1a608bb55e8 104 *
jamesadevine 0:e1a608bb55e8 105 * @param value Data to be sent to the SPI slave
jamesadevine 0:e1a608bb55e8 106 *
jamesadevine 0:e1a608bb55e8 107 * @returns
jamesadevine 0:e1a608bb55e8 108 * Response from the SPI slave
jamesadevine 0:e1a608bb55e8 109 */
jamesadevine 0:e1a608bb55e8 110 virtual int write(int value);
jamesadevine 0:e1a608bb55e8 111
jamesadevine 0:e1a608bb55e8 112 #if DEVICE_SPI_ASYNCH
jamesadevine 0:e1a608bb55e8 113
jamesadevine 0:e1a608bb55e8 114 /** Start non-blocking SPI transfer using 8bit buffers.
jamesadevine 0:e1a608bb55e8 115 *
jamesadevine 0:e1a608bb55e8 116 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
jamesadevine 0:e1a608bb55e8 117 * the default SPI value is sent
jamesadevine 0:e1a608bb55e8 118 * @param tx_length The length of TX buffer in bytes
jamesadevine 0:e1a608bb55e8 119 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
jamesadevine 0:e1a608bb55e8 120 * received data are ignored
jamesadevine 0:e1a608bb55e8 121 * @param rx_length The length of RX buffer in bytes
jamesadevine 0:e1a608bb55e8 122 * @param callback The event callback function
jamesadevine 0:e1a608bb55e8 123 * @param event The logical OR of events to modify. Look at spi hal header file for SPI events.
jamesadevine 0:e1a608bb55e8 124 * @return Zero if the transfer has started, or -1 if SPI peripheral is busy
jamesadevine 0:e1a608bb55e8 125 */
jamesadevine 0:e1a608bb55e8 126 template<typename Type>
jamesadevine 0:e1a608bb55e8 127 int transfer(const Type *tx_buffer, int tx_length, Type *rx_buffer, int rx_length, const event_callback_t& callback, int event = SPI_EVENT_COMPLETE) {
jamesadevine 0:e1a608bb55e8 128 if (spi_active(&_spi)) {
jamesadevine 0:e1a608bb55e8 129 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
jamesadevine 0:e1a608bb55e8 130 }
jamesadevine 0:e1a608bb55e8 131 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
jamesadevine 0:e1a608bb55e8 132 return 0;
jamesadevine 0:e1a608bb55e8 133 }
jamesadevine 0:e1a608bb55e8 134
jamesadevine 0:e1a608bb55e8 135 /** Abort the on-going SPI transfer, and continue with transfer's in the queue if any.
jamesadevine 0:e1a608bb55e8 136 */
jamesadevine 0:e1a608bb55e8 137 void abort_transfer();
jamesadevine 0:e1a608bb55e8 138
jamesadevine 0:e1a608bb55e8 139 /** Clear the transaction buffer
jamesadevine 0:e1a608bb55e8 140 */
jamesadevine 0:e1a608bb55e8 141 void clear_transfer_buffer();
jamesadevine 0:e1a608bb55e8 142
jamesadevine 0:e1a608bb55e8 143 /** Clear the transaction buffer and abort on-going transfer.
jamesadevine 0:e1a608bb55e8 144 */
jamesadevine 0:e1a608bb55e8 145 void abort_all_transfers();
jamesadevine 0:e1a608bb55e8 146
jamesadevine 0:e1a608bb55e8 147 /** Configure DMA usage suggestion for non-blocking transfers
jamesadevine 0:e1a608bb55e8 148 *
jamesadevine 0:e1a608bb55e8 149 * @param usage The usage DMA hint for peripheral
jamesadevine 0:e1a608bb55e8 150 * @return Zero if the usage was set, -1 if a transaction is on-going
jamesadevine 0:e1a608bb55e8 151 */
jamesadevine 0:e1a608bb55e8 152 int set_dma_usage(DMAUsage usage);
jamesadevine 0:e1a608bb55e8 153
jamesadevine 0:e1a608bb55e8 154 protected:
jamesadevine 0:e1a608bb55e8 155 /** SPI IRQ handler
jamesadevine 0:e1a608bb55e8 156 *
jamesadevine 0:e1a608bb55e8 157 */
jamesadevine 0:e1a608bb55e8 158 void irq_handler_asynch(void);
jamesadevine 0:e1a608bb55e8 159
jamesadevine 0:e1a608bb55e8 160 /** Common transfer method
jamesadevine 0:e1a608bb55e8 161 *
jamesadevine 0:e1a608bb55e8 162 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
jamesadevine 0:e1a608bb55e8 163 * the default SPI value is sent
jamesadevine 0:e1a608bb55e8 164 * @param tx_length The length of TX buffer in bytes
jamesadevine 0:e1a608bb55e8 165 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
jamesadevine 0:e1a608bb55e8 166 * received data are ignored
jamesadevine 0:e1a608bb55e8 167 * @param rx_length The length of RX buffer in bytes
jamesadevine 0:e1a608bb55e8 168 * @param bit_width The buffers element width
jamesadevine 0:e1a608bb55e8 169 * @param callback The event callback function
jamesadevine 0:e1a608bb55e8 170 * @param event The logical OR of events to modify
jamesadevine 0:e1a608bb55e8 171 * @return Zero if the transfer has started or was added to the queue, or -1 if SPI peripheral is busy/buffer is full
jamesadevine 0:e1a608bb55e8 172 */
jamesadevine 0:e1a608bb55e8 173 int transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
jamesadevine 0:e1a608bb55e8 174
jamesadevine 0:e1a608bb55e8 175 /**
jamesadevine 0:e1a608bb55e8 176 *
jamesadevine 0:e1a608bb55e8 177 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
jamesadevine 0:e1a608bb55e8 178 * the default SPI value is sent
jamesadevine 0:e1a608bb55e8 179 * @param tx_length The length of TX buffer in bytes
jamesadevine 0:e1a608bb55e8 180 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
jamesadevine 0:e1a608bb55e8 181 * received data are ignored
jamesadevine 0:e1a608bb55e8 182 * @param rx_length The length of RX buffer in bytes
jamesadevine 0:e1a608bb55e8 183 * @param bit_width The buffers element width
jamesadevine 0:e1a608bb55e8 184 * @param callback The event callback function
jamesadevine 0:e1a608bb55e8 185 * @param event The logical OR of events to modify
jamesadevine 0:e1a608bb55e8 186 * @return Zero if a transfer was added to the queue, or -1 if the queue is full
jamesadevine 0:e1a608bb55e8 187 */
jamesadevine 0:e1a608bb55e8 188 int queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
jamesadevine 0:e1a608bb55e8 189
jamesadevine 0:e1a608bb55e8 190 /** Configures a callback, spi peripheral and initiate a new transfer
jamesadevine 0:e1a608bb55e8 191 *
jamesadevine 0:e1a608bb55e8 192 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
jamesadevine 0:e1a608bb55e8 193 * the default SPI value is sent
jamesadevine 0:e1a608bb55e8 194 * @param tx_length The length of TX buffer in bytes
jamesadevine 0:e1a608bb55e8 195 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
jamesadevine 0:e1a608bb55e8 196 * received data are ignored
jamesadevine 0:e1a608bb55e8 197 * @param rx_length The length of RX buffer in bytes
jamesadevine 0:e1a608bb55e8 198 * @param bit_width The buffers element width
jamesadevine 0:e1a608bb55e8 199 * @param callback The event callback function
jamesadevine 0:e1a608bb55e8 200 * @param event The logical OR of events to modify
jamesadevine 0:e1a608bb55e8 201 */
jamesadevine 0:e1a608bb55e8 202 void start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
jamesadevine 0:e1a608bb55e8 203
jamesadevine 0:e1a608bb55e8 204 #if TRANSACTION_QUEUE_SIZE_SPI
jamesadevine 0:e1a608bb55e8 205
jamesadevine 0:e1a608bb55e8 206 /** Start a new transaction
jamesadevine 0:e1a608bb55e8 207 *
jamesadevine 0:e1a608bb55e8 208 * @param data Transaction data
jamesadevine 0:e1a608bb55e8 209 */
jamesadevine 0:e1a608bb55e8 210 void start_transaction(transaction_t *data);
jamesadevine 0:e1a608bb55e8 211
jamesadevine 0:e1a608bb55e8 212 /** Dequeue a transaction
jamesadevine 0:e1a608bb55e8 213 *
jamesadevine 0:e1a608bb55e8 214 */
jamesadevine 0:e1a608bb55e8 215 void dequeue_transaction();
jamesadevine 0:e1a608bb55e8 216 static CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> _transaction_buffer;
jamesadevine 0:e1a608bb55e8 217 #endif
jamesadevine 0:e1a608bb55e8 218
jamesadevine 0:e1a608bb55e8 219 #endif
jamesadevine 0:e1a608bb55e8 220
jamesadevine 0:e1a608bb55e8 221 public:
jamesadevine 0:e1a608bb55e8 222 virtual ~SPI() {
jamesadevine 0:e1a608bb55e8 223 }
jamesadevine 0:e1a608bb55e8 224
jamesadevine 0:e1a608bb55e8 225 protected:
jamesadevine 0:e1a608bb55e8 226 spi_t _spi;
jamesadevine 0:e1a608bb55e8 227
jamesadevine 0:e1a608bb55e8 228 #if DEVICE_SPI_ASYNCH
jamesadevine 0:e1a608bb55e8 229 CThunk<SPI> _irq;
jamesadevine 0:e1a608bb55e8 230 event_callback_t _callback;
jamesadevine 0:e1a608bb55e8 231 DMAUsage _usage;
jamesadevine 0:e1a608bb55e8 232 #endif
jamesadevine 0:e1a608bb55e8 233
jamesadevine 0:e1a608bb55e8 234 void aquire(void);
jamesadevine 0:e1a608bb55e8 235 static SPI *_owner;
jamesadevine 0:e1a608bb55e8 236 int _bits;
jamesadevine 0:e1a608bb55e8 237 int _mode;
jamesadevine 0:e1a608bb55e8 238 int _hz;
jamesadevine 0:e1a608bb55e8 239 };
jamesadevine 0:e1a608bb55e8 240
jamesadevine 0:e1a608bb55e8 241 } // namespace mbed
jamesadevine 0:e1a608bb55e8 242
jamesadevine 0:e1a608bb55e8 243 #endif
jamesadevine 0:e1a608bb55e8 244
jamesadevine 0:e1a608bb55e8 245 #endif