Temporary Connector Reversed Version
Dependencies: UniGraphic mbed vt100
afero_poc15_180403R , J1 のピン配置を反転させたヴァージョンです。
Color2系を使用するためには以下のピンをジャンパで接続してください。
J1-D7 <-> J1-D0
J1-D6 <-> J1-D1
(調査中) また、こちらでテストした範囲では、
FRDM-KL25Z の V3.3 を、Modulo2 の VCC_3V3 ピンに接続してやる必要がありました。
尚、J1-D1, D0 を使用するために UART を無効にしているため
ログは表示されません。
TFTモジュールについて
aitendoのTFTモジュールはデフォルトでは8bit bus モードになっています。
半田のジャンパを変えて、SPIの設定にしてください。
サーミスタについて
POC1.5 では サーミスタは 25℃の時に抵抗値が 50.0kΩになる502AT-11 が
4.95kΩのプルアップ(実際は10kΩx2の並列)で使用されていました。
今回の試作では抵抗値が 10.0kΩの 103AT-11 が
5.1kΩのプルアップで使用されていますので、係数を合わせるために
SMTC502AT-11 のコンストラクタを
R0 = 10.0
R1 = 5.1
B = 3435
T0 = 298.15
で呼ぶように変更しました。
sensors/MMA8451Q.cpp@1:6c54dc8acf96, 2018-04-24 (annotated)
- Committer:
- Rhyme
- Date:
- Tue Apr 24 12:18:10 2018 +0000
- Revision:
- 1:6c54dc8acf96
- Parent:
- 0:0b6732b53bf4
to adjust with 103AT-11 with 5.1k pull-up, the constructor of 502AT-11 is called with R0=10.0, R1=5.1, B=3435, T0=298.15
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Rhyme | 0:0b6732b53bf4 | 1 | /** |
Rhyme | 0:0b6732b53bf4 | 2 | * MMA8451Q 3-Axis, 14-bit/8-bit Digital Accelerometer |
Rhyme | 0:0b6732b53bf4 | 3 | */ |
Rhyme | 0:0b6732b53bf4 | 4 | |
Rhyme | 0:0b6732b53bf4 | 5 | #include "mbed.h" |
Rhyme | 0:0b6732b53bf4 | 6 | #include "MMA8451Q.h" |
Rhyme | 0:0b6732b53bf4 | 7 | #include "af_mgr.h" |
Rhyme | 0:0b6732b53bf4 | 8 | |
Rhyme | 0:0b6732b53bf4 | 9 | #define REG_STATUS 0x00 // when F_MODE = 00 |
Rhyme | 0:0b6732b53bf4 | 10 | #define REG_FIFO_STATUS 0x00 // when F_MODE > 0 |
Rhyme | 0:0b6732b53bf4 | 11 | #define REG_XYZ_FIFO 0x01 // Root pointer to XYZ FIFO data |
Rhyme | 0:0b6732b53bf4 | 12 | #define REG_OUT_X_MSB 0x01 // 8 MSBs of 14-bit sample |
Rhyme | 0:0b6732b53bf4 | 13 | #define REG_OUT_X_LSB 0x02 // 6 LSBs of 14-bit sample |
Rhyme | 0:0b6732b53bf4 | 14 | #define REG_OUT_Y_MSB 0x03 |
Rhyme | 0:0b6732b53bf4 | 15 | #define REG_OUT_Y_LSB 0x04 |
Rhyme | 0:0b6732b53bf4 | 16 | #define REG_OUT_Z_MSB 0x05 |
Rhyme | 0:0b6732b53bf4 | 17 | #define REG_OUT_Z_LSB 0x06 |
Rhyme | 0:0b6732b53bf4 | 18 | #define REG_F_SETUP 0x09 // FIFO setup |
Rhyme | 0:0b6732b53bf4 | 19 | #define REG_TRIG_CFG 0x0A // Map of FIFO daa capture events |
Rhyme | 0:0b6732b53bf4 | 20 | #define REG_SYSMOD 0x0B // Current System Mode |
Rhyme | 0:0b6732b53bf4 | 21 | #define REG_INT_SOURCE 0x0C // Interrupt status |
Rhyme | 0:0b6732b53bf4 | 22 | #define REG_WHO_AM_I 0x0D // Device ID (0x1A) |
Rhyme | 0:0b6732b53bf4 | 23 | #define REG_XYZ_DATA_CFG 0x0E // Dynamic Range Settings |
Rhyme | 0:0b6732b53bf4 | 24 | #define REG_HP_FILTER_CUTOFF 0x0F // Cutoff freq is set to 16Hz@800Hz |
Rhyme | 0:0b6732b53bf4 | 25 | #define REG_PL_STATUS 0x10 // Landscape/Portrait orientation status |
Rhyme | 0:0b6732b53bf4 | 26 | #define REG_PL_CFG 0x11 // Landscape/Portrait configuration |
Rhyme | 0:0b6732b53bf4 | 27 | #define REG_PL_COUNT 0x12 // Landscape/Portrait debounce counter |
Rhyme | 0:0b6732b53bf4 | 28 | #define REG_PL_BF_ZCOMP 0x13 // Back/Front, Z-Lock Trip threshold |
Rhyme | 0:0b6732b53bf4 | 29 | #define REG_P_L_THS_REG 0x14 // Portrait to Landscape Trip Angle is 29 degree |
Rhyme | 0:0b6732b53bf4 | 30 | #define REG_FF_MT_CFG 0x15 // Freefall/Motion function block configuration |
Rhyme | 0:0b6732b53bf4 | 31 | #define REG_FF_MT_SRC 0x16 // Freefall/Motion event source register |
Rhyme | 0:0b6732b53bf4 | 32 | #define REG_FF_MT_THS 0x17 // Freefall/Motion threshold register |
Rhyme | 0:0b6732b53bf4 | 33 | #define REG_FF_MT_COUNT 0x18 // Freefall/Motion debounce counter |
Rhyme | 0:0b6732b53bf4 | 34 | // TRANSIENT |
Rhyme | 0:0b6732b53bf4 | 35 | #define REG_TRANSIENT_CFG 0x1D // Transient functional block configuration |
Rhyme | 0:0b6732b53bf4 | 36 | #define REG_TRANSIENT_SRC 0x1E // Transient event status register |
Rhyme | 0:0b6732b53bf4 | 37 | #define REG_TRANSIENT_THS 0x1F // Transient event threshold |
Rhyme | 0:0b6732b53bf4 | 38 | #define REG_TRANSIENT_COUNT 0x20 // Transient debounce counter |
Rhyme | 0:0b6732b53bf4 | 39 | // PULSE |
Rhyme | 0:0b6732b53bf4 | 40 | #define REG_PULSE_CFG 0x21 // ELE, Double_XYZ or Single_XYZ |
Rhyme | 0:0b6732b53bf4 | 41 | #define REG_PULSE_SRC 0x22 // EA, Double_XYZ or Single_XYZ |
Rhyme | 0:0b6732b53bf4 | 42 | #define REG_PULSE_THSX 0x23 // X pulse threshold |
Rhyme | 0:0b6732b53bf4 | 43 | #define REG_PULSE_THSY 0x24 // Y pulse threshold |
Rhyme | 0:0b6732b53bf4 | 44 | #define REG_PULSE_THSZ 0x25 // Z pulse threshold |
Rhyme | 0:0b6732b53bf4 | 45 | #define REG_PULSE_TMLT 0x26 // Time limit for pulse |
Rhyme | 0:0b6732b53bf4 | 46 | #define REG_PULSE_LTCY 0x27 // Latency time for 2nd pulse |
Rhyme | 0:0b6732b53bf4 | 47 | #define REG_PULSE_WIND 0x28 // Window time for 2nd pulse |
Rhyme | 0:0b6732b53bf4 | 48 | #define REG_ASLP_COUNT 0x29 // Counter setting for Auto-SLEEP |
Rhyme | 0:0b6732b53bf4 | 49 | // Control Registers |
Rhyme | 0:0b6732b53bf4 | 50 | #define REG_CTRL_REG1 0x2A // ODR = 800Hz, STANDBY Mode |
Rhyme | 0:0b6732b53bf4 | 51 | #define REG_CTRL_REG2 0x2B // Sleep Enable, OS Modes, RST, ST |
Rhyme | 0:0b6732b53bf4 | 52 | #define REG_CTRL_REG3 0x2C // Wake from Sleep, IPOL, PP_OD |
Rhyme | 0:0b6732b53bf4 | 53 | #define REG_CTRL_REG4 0x2D // Interrupt enable register |
Rhyme | 0:0b6732b53bf4 | 54 | #define REG_CTRL_REG5 0x2E // Interrupt pin (INT1/INT2) map |
Rhyme | 0:0b6732b53bf4 | 55 | // User Offset |
Rhyme | 0:0b6732b53bf4 | 56 | #define REG_OFF_X 0x2F // X-axis offset adjust |
Rhyme | 0:0b6732b53bf4 | 57 | #define REG_OFF_Y 0x30 // Y-axis offset adjust |
Rhyme | 0:0b6732b53bf4 | 58 | #define REG_OFF_Z 0x31 // Z-axis offset adjust |
Rhyme | 0:0b6732b53bf4 | 59 | |
Rhyme | 0:0b6732b53bf4 | 60 | // Value definitions |
Rhyme | 0:0b6732b53bf4 | 61 | #define BIT_TRIG_TRANS 0x20 // Transient interrupt trigger bit |
Rhyme | 0:0b6732b53bf4 | 62 | #define BIT_TRIG_LNDPRT 0x10 // Landscape/Portrati Orientation |
Rhyme | 0:0b6732b53bf4 | 63 | #define BIT_TRIG_PULSE 0x08 // Pulse interrupt trigger bit |
Rhyme | 0:0b6732b53bf4 | 64 | #define BIT_TRIG_FF_MT 0x04 // Freefall/Motion trigger bit |
Rhyme | 0:0b6732b53bf4 | 65 | |
Rhyme | 0:0b6732b53bf4 | 66 | MMA8451Q::MMA8451Q(I2C *i2c, int addr) : m_addr(addr<<1) { |
Rhyme | 0:0b6732b53bf4 | 67 | // activate the peripheral |
Rhyme | 0:0b6732b53bf4 | 68 | p_i2c = i2c ; |
Rhyme | 0:0b6732b53bf4 | 69 | uint8_t data[2] = {REG_CTRL_REG1, 0x01}; |
Rhyme | 0:0b6732b53bf4 | 70 | writeRegs(data, 2); |
Rhyme | 0:0b6732b53bf4 | 71 | } |
Rhyme | 0:0b6732b53bf4 | 72 | |
Rhyme | 0:0b6732b53bf4 | 73 | MMA8451Q::~MMA8451Q() { } |
Rhyme | 0:0b6732b53bf4 | 74 | |
Rhyme | 0:0b6732b53bf4 | 75 | int MMA8451Q::readRegs(int addr, uint8_t * data, int len) |
Rhyme | 0:0b6732b53bf4 | 76 | { |
Rhyme | 0:0b6732b53bf4 | 77 | char t[1] = {addr}; |
Rhyme | 0:0b6732b53bf4 | 78 | int result ; |
Rhyme | 0:0b6732b53bf4 | 79 | __disable_irq() ; // Disable Interrupts |
Rhyme | 0:0b6732b53bf4 | 80 | result = p_i2c->write(m_addr, t, 1, true); |
Rhyme | 0:0b6732b53bf4 | 81 | if (result == 0) { |
Rhyme | 0:0b6732b53bf4 | 82 | result = p_i2c->read(m_addr, (char *)data, len); |
Rhyme | 0:0b6732b53bf4 | 83 | } |
Rhyme | 0:0b6732b53bf4 | 84 | __enable_irq() ; // Enable Interrupts |
Rhyme | 0:0b6732b53bf4 | 85 | return( result ) ; |
Rhyme | 0:0b6732b53bf4 | 86 | } |
Rhyme | 0:0b6732b53bf4 | 87 | |
Rhyme | 0:0b6732b53bf4 | 88 | int MMA8451Q::writeRegs(uint8_t * data, int len) |
Rhyme | 0:0b6732b53bf4 | 89 | { |
Rhyme | 0:0b6732b53bf4 | 90 | int result ; |
Rhyme | 0:0b6732b53bf4 | 91 | __disable_irq() ; // Disable Interrupts |
Rhyme | 0:0b6732b53bf4 | 92 | result = p_i2c->write(m_addr, (char *)data, len); |
Rhyme | 0:0b6732b53bf4 | 93 | __enable_irq() ; // Enable Interrupts |
Rhyme | 0:0b6732b53bf4 | 94 | return( result ) ; |
Rhyme | 0:0b6732b53bf4 | 95 | } |
Rhyme | 0:0b6732b53bf4 | 96 | |
Rhyme | 0:0b6732b53bf4 | 97 | int MMA8451Q::getAllRawData(int16_t value[]) |
Rhyme | 0:0b6732b53bf4 | 98 | { |
Rhyme | 0:0b6732b53bf4 | 99 | int result ; |
Rhyme | 0:0b6732b53bf4 | 100 | uint8_t data[6] ; |
Rhyme | 0:0b6732b53bf4 | 101 | result = readRegs(REG_OUT_X_MSB, data, 6) ; |
Rhyme | 0:0b6732b53bf4 | 102 | if (result == 0) { |
Rhyme | 0:0b6732b53bf4 | 103 | value[0] = ((int16_t)((data[0] << 8) | data[1])) >> 2 ; |
Rhyme | 0:0b6732b53bf4 | 104 | value[1] = ((int16_t)((data[2] << 8) | data[3])) >> 2 ; |
Rhyme | 0:0b6732b53bf4 | 105 | value[2] = ((int16_t)((data[4] << 8) | data[5])) >> 2 ; |
Rhyme | 0:0b6732b53bf4 | 106 | } |
Rhyme | 0:0b6732b53bf4 | 107 | return( result ) ; |
Rhyme | 0:0b6732b53bf4 | 108 | } |
Rhyme | 0:0b6732b53bf4 | 109 | |
Rhyme | 0:0b6732b53bf4 | 110 | int MMA8451Q::getAllData(float fvalue[]) |
Rhyme | 0:0b6732b53bf4 | 111 | { |
Rhyme | 0:0b6732b53bf4 | 112 | int result ; |
Rhyme | 0:0b6732b53bf4 | 113 | uint8_t data[6] ; |
Rhyme | 0:0b6732b53bf4 | 114 | result = readRegs(REG_OUT_X_MSB, data, 6) ; |
Rhyme | 0:0b6732b53bf4 | 115 | if (result == 0) { |
Rhyme | 0:0b6732b53bf4 | 116 | fvalue[0] = (float)((int16_t)((data[0] << 8) | data[1])) / 16384.0 ; |
Rhyme | 0:0b6732b53bf4 | 117 | fvalue[1] = (float)((int16_t)((data[2] << 8) | data[3])) / 16384.0 ; |
Rhyme | 0:0b6732b53bf4 | 118 | fvalue[2] = (float)((int16_t)((data[4] << 8) | data[5])) / 16384.0 ; |
Rhyme | 0:0b6732b53bf4 | 119 | } |
Rhyme | 0:0b6732b53bf4 | 120 | return( result ) ; |
Rhyme | 0:0b6732b53bf4 | 121 | } |
Rhyme | 0:0b6732b53bf4 | 122 | |
Rhyme | 0:0b6732b53bf4 | 123 | int16_t MMA8451Q::getRawData(uint8_t addr) |
Rhyme | 0:0b6732b53bf4 | 124 | { |
Rhyme | 0:0b6732b53bf4 | 125 | int16_t value ; |
Rhyme | 0:0b6732b53bf4 | 126 | uint8_t data[2] ; |
Rhyme | 0:0b6732b53bf4 | 127 | readRegs(addr, data, 2) ; |
Rhyme | 0:0b6732b53bf4 | 128 | value = ((int16_t)((data[0] << 8) | data[1])) >> 2 ; |
Rhyme | 0:0b6732b53bf4 | 129 | return( value ) ; |
Rhyme | 0:0b6732b53bf4 | 130 | } |
Rhyme | 0:0b6732b53bf4 | 131 | |
Rhyme | 0:0b6732b53bf4 | 132 | int16_t MMA8451Q::getRawX(void) |
Rhyme | 0:0b6732b53bf4 | 133 | { |
Rhyme | 0:0b6732b53bf4 | 134 | int16_t value ; |
Rhyme | 0:0b6732b53bf4 | 135 | value = getRawData(REG_OUT_X_MSB) ; |
Rhyme | 0:0b6732b53bf4 | 136 | return( value ) ; |
Rhyme | 0:0b6732b53bf4 | 137 | } |
Rhyme | 0:0b6732b53bf4 | 138 | |
Rhyme | 0:0b6732b53bf4 | 139 | int16_t MMA8451Q::getRawY(void) |
Rhyme | 0:0b6732b53bf4 | 140 | { |
Rhyme | 0:0b6732b53bf4 | 141 | int16_t value ; |
Rhyme | 0:0b6732b53bf4 | 142 | value = getRawData(REG_OUT_Y_MSB) ; |
Rhyme | 0:0b6732b53bf4 | 143 | return( value ) ; |
Rhyme | 0:0b6732b53bf4 | 144 | } |
Rhyme | 0:0b6732b53bf4 | 145 | |
Rhyme | 0:0b6732b53bf4 | 146 | int16_t MMA8451Q::getRawZ(void) |
Rhyme | 0:0b6732b53bf4 | 147 | { |
Rhyme | 0:0b6732b53bf4 | 148 | int16_t value ; |
Rhyme | 0:0b6732b53bf4 | 149 | value = getRawData(REG_OUT_Z_MSB) ; |
Rhyme | 0:0b6732b53bf4 | 150 | return( value ) ; |
Rhyme | 0:0b6732b53bf4 | 151 | } |
Rhyme | 0:0b6732b53bf4 | 152 | |
Rhyme | 0:0b6732b53bf4 | 153 | float MMA8451Q::getAccX(void) |
Rhyme | 0:0b6732b53bf4 | 154 | { |
Rhyme | 0:0b6732b53bf4 | 155 | return(((float)getRawX())/4096.0) ; |
Rhyme | 0:0b6732b53bf4 | 156 | } |
Rhyme | 0:0b6732b53bf4 | 157 | |
Rhyme | 0:0b6732b53bf4 | 158 | float MMA8451Q::getAccY(void) |
Rhyme | 0:0b6732b53bf4 | 159 | { |
Rhyme | 0:0b6732b53bf4 | 160 | return(((float)getRawY())/4096.0) ; |
Rhyme | 0:0b6732b53bf4 | 161 | } |
Rhyme | 0:0b6732b53bf4 | 162 | |
Rhyme | 0:0b6732b53bf4 | 163 | float MMA8451Q::getAccZ(void) |
Rhyme | 0:0b6732b53bf4 | 164 | { |
Rhyme | 0:0b6732b53bf4 | 165 | return(((float)getRawZ())/4096.0) ; |
Rhyme | 0:0b6732b53bf4 | 166 | } |