Basically i glued Peter Drescher and Simon Ford libs in a GraphicsDisplay class, then derived TFT or LCD class (which inherits Protocols class), then the most derived ones (Inits), which are per-display and are the only part needed to be adapted to diff hw.

Dependents:   afero_poc15_180216 afero_poc15_180223 afero_poc15_180302 afero_poc15_180403R ... more

Fork of UniGraphic by GraphicsDisplay

UniGraphic for La Suno Version.
To go with La Suno, WatchDog Reset functions were added in ILI9341.

Committer:
Rhyme
Date:
Mon Dec 25 08:33:03 2017 +0000
Revision:
34:1a148973febe
Parent:
21:ae0a4eedfc90
watch dog resets were added in ILI9341

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Geremia 21:ae0a4eedfc90 1 /* mbed UniGraphic library - BUS8 protocol class
Geremia 21:ae0a4eedfc90 2 * Copyright (c) 2015 Giuliano Dianda
Geremia 21:ae0a4eedfc90 3 * Released under the MIT License: http://mbed.org/license/mit
Geremia 21:ae0a4eedfc90 4 *
Geremia 21:ae0a4eedfc90 5 * Derived work of:
Geremia 21:ae0a4eedfc90 6 *
Geremia 21:ae0a4eedfc90 7 * mbed library for 240*320 pixel display TFT based on ILI9341 LCD Controller
Geremia 21:ae0a4eedfc90 8 * Copyright (c) 2013 Peter Drescher - DC2PD
Geremia 21:ae0a4eedfc90 9 *
Geremia 21:ae0a4eedfc90 10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Geremia 21:ae0a4eedfc90 11 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Geremia 21:ae0a4eedfc90 12 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Geremia 21:ae0a4eedfc90 13 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Geremia 21:ae0a4eedfc90 14 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Geremia 21:ae0a4eedfc90 15 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Geremia 21:ae0a4eedfc90 16 * THE SOFTWARE.
Geremia 21:ae0a4eedfc90 17 */
Geremia 21:ae0a4eedfc90 18
Geremia 21:ae0a4eedfc90 19 #include "BUS8.h"
Geremia 21:ae0a4eedfc90 20
Geremia 21:ae0a4eedfc90 21 BUS8::BUS8(PinName* buspins, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD)
Geremia 21:ae0a4eedfc90 22 : _bus(buspins), _CS(CS), _reset(reset), _DC(DC), _WR(WR), _RD(RD)
Geremia 21:ae0a4eedfc90 23 {
Geremia 21:ae0a4eedfc90 24 _reset = 1;
Geremia 21:ae0a4eedfc90 25 _DC=1;
Geremia 21:ae0a4eedfc90 26 _WR=1;
Geremia 21:ae0a4eedfc90 27 _RD=1;
Geremia 21:ae0a4eedfc90 28 _CS=1;
Geremia 21:ae0a4eedfc90 29 _bus.mode(PullNone);
Geremia 21:ae0a4eedfc90 30 _bus.output(); // will re-enable our GPIO port
Geremia 21:ae0a4eedfc90 31 hw_reset();
Geremia 21:ae0a4eedfc90 32 }
Geremia 21:ae0a4eedfc90 33
Geremia 21:ae0a4eedfc90 34 void BUS8::wr_cmd8(unsigned char cmd)
Geremia 21:ae0a4eedfc90 35 {
Geremia 21:ae0a4eedfc90 36 _DC = 0; // 0=cmd
Geremia 21:ae0a4eedfc90 37 _bus.write(cmd); // write 8bit
Geremia 21:ae0a4eedfc90 38 _WR=0;
Geremia 21:ae0a4eedfc90 39 _WR=1;
Geremia 21:ae0a4eedfc90 40 _DC = 1; // 1=data next
Geremia 21:ae0a4eedfc90 41 }
Geremia 21:ae0a4eedfc90 42 void BUS8::wr_data8(unsigned char data)
Geremia 21:ae0a4eedfc90 43 {
Geremia 21:ae0a4eedfc90 44 _bus.write(data); // write 8bit
Geremia 21:ae0a4eedfc90 45 _WR=0;
Geremia 21:ae0a4eedfc90 46 _WR=1;
Geremia 21:ae0a4eedfc90 47 }
Geremia 21:ae0a4eedfc90 48 void BUS8::wr_cmd16(unsigned short cmd)
Geremia 21:ae0a4eedfc90 49 {
Geremia 21:ae0a4eedfc90 50 _DC = 0; // 0=cmd
Geremia 21:ae0a4eedfc90 51 _bus.write(cmd>>8); // write 8bit
Geremia 21:ae0a4eedfc90 52 _WR=0;
Geremia 21:ae0a4eedfc90 53 _WR=1;
Geremia 21:ae0a4eedfc90 54 _bus.write(cmd&0xFF); // write 8bit
Geremia 21:ae0a4eedfc90 55 _WR=0;
Geremia 21:ae0a4eedfc90 56 _WR=1;
Geremia 21:ae0a4eedfc90 57 _DC = 1; // 1=data next
Geremia 21:ae0a4eedfc90 58 }
Geremia 21:ae0a4eedfc90 59 void BUS8::wr_data16(unsigned short data)
Geremia 21:ae0a4eedfc90 60 {
Geremia 21:ae0a4eedfc90 61 _bus.write(data>>8); // write 8bit
Geremia 21:ae0a4eedfc90 62 _WR=0;
Geremia 21:ae0a4eedfc90 63 _WR=1;
Geremia 21:ae0a4eedfc90 64 _bus.write(data&0xFF); // write 8bit
Geremia 21:ae0a4eedfc90 65 _WR=0;
Geremia 21:ae0a4eedfc90 66 _WR=1;
Geremia 21:ae0a4eedfc90 67 }
Geremia 21:ae0a4eedfc90 68 void BUS8::wr_gram(unsigned short data)
Geremia 21:ae0a4eedfc90 69 {
Geremia 21:ae0a4eedfc90 70 _bus.write(data>>8); // write 8bit
Geremia 21:ae0a4eedfc90 71 _WR=0;
Geremia 21:ae0a4eedfc90 72 _WR=1;
Geremia 21:ae0a4eedfc90 73 _bus.write(data&0xFF); // write 8bit
Geremia 21:ae0a4eedfc90 74 _WR=0;
Geremia 21:ae0a4eedfc90 75 _WR=1;
Geremia 21:ae0a4eedfc90 76 }
Geremia 21:ae0a4eedfc90 77 void BUS8::wr_gram(unsigned short data, unsigned int count)
Geremia 21:ae0a4eedfc90 78 {
Geremia 21:ae0a4eedfc90 79 if((data>>8)==(data&0xFF))
Geremia 21:ae0a4eedfc90 80 {
Geremia 21:ae0a4eedfc90 81 count<<=1;
Geremia 21:ae0a4eedfc90 82 // _bus.write(data); // write 8bit
Geremia 21:ae0a4eedfc90 83 while(count)
Geremia 21:ae0a4eedfc90 84 {
Geremia 21:ae0a4eedfc90 85 _bus.write(data); // rewrite even if same data, otherwise too much fast
Geremia 21:ae0a4eedfc90 86 _WR=0;
Geremia 21:ae0a4eedfc90 87 _WR=1;
Geremia 21:ae0a4eedfc90 88 count--;
Geremia 21:ae0a4eedfc90 89 }
Geremia 21:ae0a4eedfc90 90 }
Geremia 21:ae0a4eedfc90 91 else
Geremia 21:ae0a4eedfc90 92 {
Geremia 21:ae0a4eedfc90 93 while(count)
Geremia 21:ae0a4eedfc90 94 {
Geremia 21:ae0a4eedfc90 95 _bus.write(data>>8); // write 8bit
Geremia 21:ae0a4eedfc90 96 _WR=0;
Geremia 21:ae0a4eedfc90 97 _WR=1;
Geremia 21:ae0a4eedfc90 98 _bus.write(data&0xFF); // write 8bit
Geremia 21:ae0a4eedfc90 99 _WR=0;
Geremia 21:ae0a4eedfc90 100 _WR=1;
Geremia 21:ae0a4eedfc90 101 count--;
Geremia 21:ae0a4eedfc90 102 }
Geremia 21:ae0a4eedfc90 103 }
Geremia 21:ae0a4eedfc90 104 }
Geremia 21:ae0a4eedfc90 105 void BUS8::wr_grambuf(unsigned short* data, unsigned int lenght)
Geremia 21:ae0a4eedfc90 106 {
Geremia 21:ae0a4eedfc90 107 while(lenght)
Geremia 21:ae0a4eedfc90 108 {
Geremia 21:ae0a4eedfc90 109 _bus.write((*data)>>8); // write 8bit
Geremia 21:ae0a4eedfc90 110 _WR=0;
Geremia 21:ae0a4eedfc90 111 _WR=1;
Geremia 21:ae0a4eedfc90 112 _bus.write((*data)&0xFF); // write 8bit
Geremia 21:ae0a4eedfc90 113 _WR=0;
Geremia 21:ae0a4eedfc90 114 _WR=1;
Geremia 21:ae0a4eedfc90 115 data++;
Geremia 21:ae0a4eedfc90 116 lenght--;
Geremia 21:ae0a4eedfc90 117 }
Geremia 21:ae0a4eedfc90 118 }
Geremia 21:ae0a4eedfc90 119 unsigned short BUS8::rd_gram(bool convert)
Geremia 21:ae0a4eedfc90 120 {
Geremia 21:ae0a4eedfc90 121 unsigned int r=0;
Geremia 21:ae0a4eedfc90 122 _bus.input();
Geremia 21:ae0a4eedfc90 123
Geremia 21:ae0a4eedfc90 124 _RD = 0;
Geremia 21:ae0a4eedfc90 125 _RD = 0; // add wait
Geremia 21:ae0a4eedfc90 126 _bus.read(); //dummy read
Geremia 21:ae0a4eedfc90 127 _RD = 1;
Geremia 21:ae0a4eedfc90 128
Geremia 21:ae0a4eedfc90 129 _RD = 0;
Geremia 21:ae0a4eedfc90 130 _RD = 0; // add wait
Geremia 21:ae0a4eedfc90 131 r |= _bus.read();
Geremia 21:ae0a4eedfc90 132 _RD = 1;
Geremia 21:ae0a4eedfc90 133 r <<= 8;
Geremia 21:ae0a4eedfc90 134
Geremia 21:ae0a4eedfc90 135 _RD = 0;
Geremia 21:ae0a4eedfc90 136 _RD = 0; // add wait
Geremia 21:ae0a4eedfc90 137 r |= _bus.read();
Geremia 21:ae0a4eedfc90 138 _RD = 1;
Geremia 21:ae0a4eedfc90 139 if(convert)
Geremia 21:ae0a4eedfc90 140 {
Geremia 21:ae0a4eedfc90 141 r <<= 8;
Geremia 21:ae0a4eedfc90 142 _RD = 0;
Geremia 21:ae0a4eedfc90 143 // _RD = 0; // add wait
Geremia 21:ae0a4eedfc90 144 r |= _bus.read();
Geremia 21:ae0a4eedfc90 145 _RD = 1;
Geremia 21:ae0a4eedfc90 146 // gram is 18bit/pixel, if you set 16bit/pixel (cmd 3A), during writing the 16bits are expanded to 18bit
Geremia 21:ae0a4eedfc90 147 // during reading, you read the raw 18bit gram
Geremia 21:ae0a4eedfc90 148 r = RGB24to16((r&0xFF0000)>>16, (r&0xFF00)>>8, r&0xFF);// 18bit pixel padded to 24bits, rrrrrr00_gggggg00_bbbbbb00, converted to 16bit
Geremia 21:ae0a4eedfc90 149 }
Geremia 21:ae0a4eedfc90 150 _bus.output();
Geremia 21:ae0a4eedfc90 151 return (unsigned short)r;
Geremia 21:ae0a4eedfc90 152 }
Geremia 21:ae0a4eedfc90 153 unsigned int BUS8::rd_reg_data32(unsigned char reg)
Geremia 21:ae0a4eedfc90 154 {
Geremia 21:ae0a4eedfc90 155 wr_cmd8(reg);
Geremia 21:ae0a4eedfc90 156 unsigned int r=0;
Geremia 21:ae0a4eedfc90 157 _bus.input();
Geremia 21:ae0a4eedfc90 158
Geremia 21:ae0a4eedfc90 159 _RD = 0;
Geremia 21:ae0a4eedfc90 160 _bus.read(); //dummy read
Geremia 21:ae0a4eedfc90 161 _RD = 1;
Geremia 21:ae0a4eedfc90 162
Geremia 21:ae0a4eedfc90 163 _RD = 0;
Geremia 21:ae0a4eedfc90 164 // _RD = 0; // add wait
Geremia 21:ae0a4eedfc90 165 r |= (_bus.read()&0xFF);
Geremia 21:ae0a4eedfc90 166 r <<= 8;
Geremia 21:ae0a4eedfc90 167 _RD = 1;
Geremia 21:ae0a4eedfc90 168
Geremia 21:ae0a4eedfc90 169 _RD = 0;
Geremia 21:ae0a4eedfc90 170 // _RD = 0; // add wait
Geremia 21:ae0a4eedfc90 171 r |= (_bus.read()&0xFF);
Geremia 21:ae0a4eedfc90 172 r <<= 8;
Geremia 21:ae0a4eedfc90 173 _RD = 1;
Geremia 21:ae0a4eedfc90 174
Geremia 21:ae0a4eedfc90 175 _RD = 0;
Geremia 21:ae0a4eedfc90 176 // _RD = 0; // add wait
Geremia 21:ae0a4eedfc90 177 r |= (_bus.read()&0xFF);
Geremia 21:ae0a4eedfc90 178 r <<= 8;
Geremia 21:ae0a4eedfc90 179 _RD = 1;
Geremia 21:ae0a4eedfc90 180
Geremia 21:ae0a4eedfc90 181 _RD = 0;
Geremia 21:ae0a4eedfc90 182 // _RD = 0; // add wait
Geremia 21:ae0a4eedfc90 183 r |= (_bus.read()&0xFF);
Geremia 21:ae0a4eedfc90 184 _RD = 1;
Geremia 21:ae0a4eedfc90 185
Geremia 21:ae0a4eedfc90 186 _CS = 1; // force CS HIG to interupt the cmd in case was not supported
Geremia 21:ae0a4eedfc90 187 _CS = 0;
Geremia 21:ae0a4eedfc90 188 _bus.output();
Geremia 21:ae0a4eedfc90 189 return r;
Geremia 21:ae0a4eedfc90 190 }
Geremia 21:ae0a4eedfc90 191 // in Par mode EXTC regs (0xB0-0xFF) can be directly read
Geremia 21:ae0a4eedfc90 192 unsigned int BUS8::rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd)
Geremia 21:ae0a4eedfc90 193 {
Geremia 21:ae0a4eedfc90 194 return rd_reg_data32(reg);
Geremia 21:ae0a4eedfc90 195 }
Geremia 21:ae0a4eedfc90 196 // ILI932x specific
Geremia 21:ae0a4eedfc90 197 void BUS8::dummyread()
Geremia 21:ae0a4eedfc90 198 {
Geremia 21:ae0a4eedfc90 199 _bus.input();
Geremia 21:ae0a4eedfc90 200 _RD=0;
Geremia 21:ae0a4eedfc90 201 _RD=0; // add wait
Geremia 21:ae0a4eedfc90 202 _bus.read(); // dummy read
Geremia 21:ae0a4eedfc90 203 _RD=1;
Geremia 21:ae0a4eedfc90 204 // _bus.output();
Geremia 21:ae0a4eedfc90 205 }
Geremia 21:ae0a4eedfc90 206 // ILI932x specific
Geremia 21:ae0a4eedfc90 207 void BUS8::reg_select(unsigned char reg, bool forread)
Geremia 21:ae0a4eedfc90 208 {
Geremia 21:ae0a4eedfc90 209 _DC = 0;
Geremia 21:ae0a4eedfc90 210 _bus.write(0); // write MSB
Geremia 21:ae0a4eedfc90 211 _WR=0;
Geremia 21:ae0a4eedfc90 212 _WR=1;
Geremia 21:ae0a4eedfc90 213 _bus.write(reg); // write LSB
Geremia 21:ae0a4eedfc90 214 _WR=0;
Geremia 21:ae0a4eedfc90 215 _WR=1;
Geremia 21:ae0a4eedfc90 216 _DC = 1; // 1=data next
Geremia 21:ae0a4eedfc90 217 }
Geremia 21:ae0a4eedfc90 218 // ILI932x specific
Geremia 21:ae0a4eedfc90 219 void BUS8::reg_write(unsigned char reg, unsigned short data)
Geremia 21:ae0a4eedfc90 220 {
Geremia 21:ae0a4eedfc90 221 _DC = 0;
Geremia 21:ae0a4eedfc90 222 _bus.write(0); // write MSB
Geremia 21:ae0a4eedfc90 223 _WR=0;
Geremia 21:ae0a4eedfc90 224 _WR=1;
Geremia 21:ae0a4eedfc90 225 _bus.write(reg); // write MSB
Geremia 21:ae0a4eedfc90 226 _WR=0;
Geremia 21:ae0a4eedfc90 227 _WR=1;
Geremia 21:ae0a4eedfc90 228 _DC = 1;
Geremia 21:ae0a4eedfc90 229 _bus.write(data>>8);
Geremia 21:ae0a4eedfc90 230 _WR=0;
Geremia 21:ae0a4eedfc90 231 _WR=1;
Geremia 21:ae0a4eedfc90 232 _bus.write(data&0xFF);
Geremia 21:ae0a4eedfc90 233 _WR=0;
Geremia 21:ae0a4eedfc90 234 _WR=1;
Geremia 21:ae0a4eedfc90 235 }
Geremia 21:ae0a4eedfc90 236 // ILI932x specific
Geremia 21:ae0a4eedfc90 237 unsigned short BUS8::reg_read(unsigned char reg)
Geremia 21:ae0a4eedfc90 238 {
Geremia 21:ae0a4eedfc90 239 unsigned short r=0;
Geremia 21:ae0a4eedfc90 240 _DC = 0;
Geremia 21:ae0a4eedfc90 241 _bus.write(0);
Geremia 21:ae0a4eedfc90 242 _WR=0;
Geremia 21:ae0a4eedfc90 243 _WR=1;
Geremia 21:ae0a4eedfc90 244 _bus.write(reg);
Geremia 21:ae0a4eedfc90 245 _WR=0;
Geremia 21:ae0a4eedfc90 246 _WR=1;
Geremia 21:ae0a4eedfc90 247 _DC = 1;
Geremia 21:ae0a4eedfc90 248 _bus.input();
Geremia 21:ae0a4eedfc90 249 _RD=0;
Geremia 21:ae0a4eedfc90 250 r |= _bus.read(); // read 8bit
Geremia 21:ae0a4eedfc90 251 _RD=1;
Geremia 21:ae0a4eedfc90 252 r <<= 8;
Geremia 21:ae0a4eedfc90 253 _RD=0;
Geremia 21:ae0a4eedfc90 254 r |= _bus.read(); // read 8bit
Geremia 21:ae0a4eedfc90 255 _RD=1;
Geremia 21:ae0a4eedfc90 256 _bus.output();
Geremia 21:ae0a4eedfc90 257
Geremia 21:ae0a4eedfc90 258 return r;
Geremia 21:ae0a4eedfc90 259 }
Geremia 21:ae0a4eedfc90 260 void BUS8::hw_reset()
Geremia 21:ae0a4eedfc90 261 {
Geremia 21:ae0a4eedfc90 262 wait_ms(15);
Geremia 21:ae0a4eedfc90 263 _DC = 1;
Geremia 21:ae0a4eedfc90 264 _CS = 1;
Geremia 21:ae0a4eedfc90 265 _WR = 1;
Geremia 21:ae0a4eedfc90 266 _RD = 1;
Geremia 21:ae0a4eedfc90 267 _reset = 0; // display reset
Geremia 21:ae0a4eedfc90 268 wait_ms(2);
Geremia 21:ae0a4eedfc90 269 _reset = 1; // end reset
Geremia 21:ae0a4eedfc90 270 wait_ms(100);
Geremia 21:ae0a4eedfc90 271 }
Geremia 21:ae0a4eedfc90 272 void BUS8::BusEnable(bool enable)
Geremia 21:ae0a4eedfc90 273 {
Geremia 21:ae0a4eedfc90 274 _CS = enable ? 0:1;
Geremia 21:ae0a4eedfc90 275 }