La Suno / UniGraphic

Basically i glued Peter Drescher and Simon Ford libs in a GraphicsDisplay class, then derived TFT or LCD class (which inherits Protocols class), then the most derived ones (Inits), which are per-display and are the only part needed to be adapted to diff hw.

Dependents:   afero_poc15_180216 afero_poc15_180223 afero_poc15_180302 afero_poc15_180403R ... more

Fork of UniGraphic by GraphicsDisplay

UniGraphic for La Suno Version.
To go with La Suno, WatchDog Reset functions were added in ILI9341.

Protocols/I2C_bus.cpp@33:f87f06292637, 2017-02-06 (annotated)

Committer:
dreschpe
Date:
Mon Feb 06 12:29:33 2017 +0000
Revision:
33:f87f06292637
Add I2C protocol. ; Add SSD1306 i2C modus

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dreschpe 33:f87f06292637 1 /* mbed UniGraphic library - I2C protocol class
dreschpe 33:f87f06292637 2 * Copyright (c) 2017 Peter Drescher
dreschpe 33:f87f06292637 3 * Released under the MIT License: http://mbed.org/license/mit
dreschpe 33:f87f06292637 4 *
dreschpe 33:f87f06292637 5 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
dreschpe 33:f87f06292637 6 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
dreschpe 33:f87f06292637 7 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
dreschpe 33:f87f06292637 8 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
dreschpe 33:f87f06292637 9 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
dreschpe 33:f87f06292637 10 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
dreschpe 33:f87f06292637 11 * THE SOFTWARE.
dreschpe 33:f87f06292637 12 */
dreschpe 33:f87f06292637 13
dreschpe 33:f87f06292637 14 #include "I2C_bus.h"
dreschpe 33:f87f06292637 15
dreschpe 33:f87f06292637 16 I2C_bus::I2C_bus(int Hz, int address, PinName sda, PinName scl)
dreschpe 33:f87f06292637 17 : _i2c(sda,scl)
dreschpe 33:f87f06292637 18 {
dreschpe 33:f87f06292637 19 _i2c.frequency(Hz);
dreschpe 33:f87f06292637 20 _address = address;
dreschpe 33:f87f06292637 21 //hw_reset();
dreschpe 33:f87f06292637 22 }
dreschpe 33:f87f06292637 23
dreschpe 33:f87f06292637 24 void I2C_bus::wr_cmd8(unsigned char cmd)
dreschpe 33:f87f06292637 25 {
dreschpe 33:f87f06292637 26 char tmp[2];
dreschpe 33:f87f06292637 27 tmp[0] = 0x00; //command
dreschpe 33:f87f06292637 28 tmp[1] = cmd;
dreschpe 33:f87f06292637 29 _i2c.write(_address,tmp,2);
dreschpe 33:f87f06292637 30 }
dreschpe 33:f87f06292637 31 void I2C_bus::wr_data8(unsigned char data)
dreschpe 33:f87f06292637 32 {
dreschpe 33:f87f06292637 33 _i2c.write(data); // write 8bit
dreschpe 33:f87f06292637 34 }
dreschpe 33:f87f06292637 35 void I2C_bus::wr_cmd16(unsigned short cmd)
dreschpe 33:f87f06292637 36 {
dreschpe 33:f87f06292637 37 char tmp[3];
dreschpe 33:f87f06292637 38 tmp[0] = 00; //command
dreschpe 33:f87f06292637 39 tmp[1] = cmd>>8;
dreschpe 33:f87f06292637 40 tmp[2] = cmd&0xFF;
dreschpe 33:f87f06292637 41
dreschpe 33:f87f06292637 42 _i2c.write(_address,tmp,3);
dreschpe 33:f87f06292637 43 }
dreschpe 33:f87f06292637 44 void I2C_bus::wr_data16(unsigned short data)
dreschpe 33:f87f06292637 45 {
dreschpe 33:f87f06292637 46 _i2c.write(data>>8); // write 8bit
dreschpe 33:f87f06292637 47 _i2c.write(data&0xFF); // write 8bit
dreschpe 33:f87f06292637 48 }
dreschpe 33:f87f06292637 49 void I2C_bus::wr_gram(unsigned short data)
dreschpe 33:f87f06292637 50 {
dreschpe 33:f87f06292637 51 _i2c.write(data>>8); // write 8bit
dreschpe 33:f87f06292637 52 _i2c.write(data&0xFF); // write 8bit
dreschpe 33:f87f06292637 53 }
dreschpe 33:f87f06292637 54 void I2C_bus::wr_gram(unsigned short data, unsigned int count)
dreschpe 33:f87f06292637 55 {
dreschpe 33:f87f06292637 56 _i2c.start();
dreschpe 33:f87f06292637 57 _i2c.write(_address);
dreschpe 33:f87f06292637 58 _i2c.write(0x40); // data continue
dreschpe 33:f87f06292637 59 if((data>>8)==(data&0xFF))
dreschpe 33:f87f06292637 60 {
dreschpe 33:f87f06292637 61 count<<=1;
dreschpe 33:f87f06292637 62 while(count)
dreschpe 33:f87f06292637 63 {
dreschpe 33:f87f06292637 64 _i2c.write(data); // write 8bit
dreschpe 33:f87f06292637 65 count--;
dreschpe 33:f87f06292637 66 }
dreschpe 33:f87f06292637 67 }
dreschpe 33:f87f06292637 68 else
dreschpe 33:f87f06292637 69 {
dreschpe 33:f87f06292637 70 while(count)
dreschpe 33:f87f06292637 71 {
dreschpe 33:f87f06292637 72 _i2c.write(data>>8); // write 8bit
dreschpe 33:f87f06292637 73 _i2c.write(data&0xFF); // write 8bit
dreschpe 33:f87f06292637 74 count--;
dreschpe 33:f87f06292637 75 }
dreschpe 33:f87f06292637 76 }
dreschpe 33:f87f06292637 77 _i2c.stop();
dreschpe 33:f87f06292637 78 }
dreschpe 33:f87f06292637 79 void I2C_bus::wr_grambuf(unsigned short* data, unsigned int lenght)
dreschpe 33:f87f06292637 80 {
dreschpe 33:f87f06292637 81 _i2c.start();
dreschpe 33:f87f06292637 82 _i2c.write(_address);
dreschpe 33:f87f06292637 83 _i2c.write(0x40); // data continue
dreschpe 33:f87f06292637 84 while(lenght)
dreschpe 33:f87f06292637 85 {
dreschpe 33:f87f06292637 86 _i2c.write((*data)>>8); // write 8bit
dreschpe 33:f87f06292637 87 _i2c.write((*data)&0xFF); // write 8bit
dreschpe 33:f87f06292637 88 data++;
dreschpe 33:f87f06292637 89 lenght--;
dreschpe 33:f87f06292637 90 }
dreschpe 33:f87f06292637 91 _i2c.stop();
dreschpe 33:f87f06292637 92 }
dreschpe 33:f87f06292637 93
dreschpe 33:f87f06292637 94 void I2C_bus::hw_reset()
dreschpe 33:f87f06292637 95 {
dreschpe 33:f87f06292637 96
dreschpe 33:f87f06292637 97 }
dreschpe 33:f87f06292637 98 void I2C_bus::BusEnable(bool enable)
dreschpe 33:f87f06292637 99 {
dreschpe 33:f87f06292637 100 }
dreschpe 33:f87f06292637 101
dreschpe 33:f87f06292637 102 void I2C_bus::reg_select(unsigned char reg, bool forread)
dreschpe 33:f87f06292637 103 {
dreschpe 33:f87f06292637 104 }
dreschpe 33:f87f06292637 105
dreschpe 33:f87f06292637 106 unsigned int I2C_bus::rd_reg_data32(unsigned char reg)
dreschpe 33:f87f06292637 107 {
dreschpe 33:f87f06292637 108 return 0;
dreschpe 33:f87f06292637 109 }
dreschpe 33:f87f06292637 110
dreschpe 33:f87f06292637 111 unsigned int I2C_bus::rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd)
dreschpe 33:f87f06292637 112 {
dreschpe 33:f87f06292637 113 return 0;
dreschpe 33:f87f06292637 114 }
dreschpe 33:f87f06292637 115
dreschpe 33:f87f06292637 116 void I2C_bus::dummyread()
dreschpe 33:f87f06292637 117 {
dreschpe 33:f87f06292637 118 }
dreschpe 33:f87f06292637 119
dreschpe 33:f87f06292637 120 unsigned short I2C_bus::rd_gram(bool convert)
dreschpe 33:f87f06292637 121 {
dreschpe 33:f87f06292637 122 return (0);
dreschpe 33:f87f06292637 123 }
dreschpe 33:f87f06292637 124
dreschpe 33:f87f06292637 125 unsigned short I2C_bus::reg_read(unsigned char reg)
dreschpe 33:f87f06292637 126 {
dreschpe 33:f87f06292637 127 return (0);
dreschpe 33:f87f06292637 128 }
dreschpe 33:f87f06292637 129
dreschpe 33:f87f06292637 130 void I2C_bus::reg_write(unsigned char reg, unsigned short data)
dreschpe 33:f87f06292637 131 {
dreschpe 33:f87f06292637 132 }