La Suno / UniGraphic

Basically i glued Peter Drescher and Simon Ford libs in a GraphicsDisplay class, then derived TFT or LCD class (which inherits Protocols class), then the most derived ones (Inits), which are per-display and are the only part needed to be adapted to diff hw.

Dependents:   afero_poc15_180216 afero_poc15_180223 afero_poc15_180302 afero_poc15_180403R ... more

Fork of UniGraphic by GraphicsDisplay

UniGraphic for La Suno Version.
To go with La Suno, WatchDog Reset functions were added in ILI9341.

Protocols/I2C_bus.h@34:1a148973febe, 2017-12-25 (annotated)

Committer:
Rhyme
Date:
Mon Dec 25 08:33:03 2017 +0000
Revision:
34:1a148973febe
Parent:
33:f87f06292637 
watch dog resets were added in ILI9341

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dreschpe 33:f87f06292637 1 #ifndef I2C_bus_H
dreschpe 33:f87f06292637 2 #define I2C_bus_H
dreschpe 33:f87f06292637 3
dreschpe 33:f87f06292637 4 #include "mbed.h"
dreschpe 33:f87f06292637 5 #include "Protocols.h"
dreschpe 33:f87f06292637 6
dreschpe 33:f87f06292637 7 /** I2C interface
dreschpe 33:f87f06292637 8 */
dreschpe 33:f87f06292637 9 class I2C_bus : public Protocols
dreschpe 33:f87f06292637 10 {
dreschpe 33:f87f06292637 11 public:
dreschpe 33:f87f06292637 12
dreschpe 33:f87f06292637 13 /** Create an I2C display interface
dreschpe 33:f87f06292637 14 *
dreschpe 33:f87f06292637 15 * @param I2C frquency
dreschpe 33:f87f06292637 16 * @param I2C address
dreschpe 33:f87f06292637 17 * @param I2C pin sda
dreschpe 33:f87f06292637 18 * @param I2C pin scl
dreschpe 33:f87f06292637 19 */
dreschpe 33:f87f06292637 20 I2C_bus(int Hz, int address,PinName sda, PinName scl);
dreschpe 33:f87f06292637 21
dreschpe 33:f87f06292637 22 protected:
dreschpe 33:f87f06292637 23
dreschpe 33:f87f06292637 24 /** Send 8bit command to display controller
dreschpe 33:f87f06292637 25 *
dreschpe 33:f87f06292637 26 * @param cmd: byte to send
dreschpe 33:f87f06292637 27 *
dreschpe 33:f87f06292637 28 */
dreschpe 33:f87f06292637 29 virtual void wr_cmd8(unsigned char cmd);
dreschpe 33:f87f06292637 30
dreschpe 33:f87f06292637 31 /** Send 8bit data to display controller
dreschpe 33:f87f06292637 32 *
dreschpe 33:f87f06292637 33 * @param data: byte to send
dreschpe 33:f87f06292637 34 *
dreschpe 33:f87f06292637 35 */
dreschpe 33:f87f06292637 36 virtual void wr_data8(unsigned char data);
dreschpe 33:f87f06292637 37
dreschpe 33:f87f06292637 38 /** Send 2x8bit command to display controller
dreschpe 33:f87f06292637 39 *
dreschpe 33:f87f06292637 40 * @param cmd: halfword to send
dreschpe 33:f87f06292637 41 * @note in SPI_16 mode a single 16bit transfer will be done
dreschpe 33:f87f06292637 42 */
dreschpe 33:f87f06292637 43 virtual void wr_cmd16(unsigned short cmd);
dreschpe 33:f87f06292637 44
dreschpe 33:f87f06292637 45 /** Send 2x8bit data to display controller
dreschpe 33:f87f06292637 46 *
dreschpe 33:f87f06292637 47 * @param data: halfword to send
dreschpe 33:f87f06292637 48 * @note in SPI_16 mode a single 16bit transfer will be done
dreschpe 33:f87f06292637 49 */
dreschpe 33:f87f06292637 50 virtual void wr_data16(unsigned short data);
dreschpe 33:f87f06292637 51
dreschpe 33:f87f06292637 52 /** Send 16bit pixeldata to display controller
dreschpe 33:f87f06292637 53 *
dreschpe 33:f87f06292637 54 * @param data: halfword to send
dreschpe 33:f87f06292637 55 *
dreschpe 33:f87f06292637 56 */
dreschpe 33:f87f06292637 57 virtual void wr_gram(unsigned short data);
dreschpe 33:f87f06292637 58
dreschpe 33:f87f06292637 59 /** Send same 16bit pixeldata to display controller multiple times
dreschpe 33:f87f06292637 60 *
dreschpe 33:f87f06292637 61 * @param data: halfword to send
dreschpe 33:f87f06292637 62 * @param count: how many
dreschpe 33:f87f06292637 63 *
dreschpe 33:f87f06292637 64 */
dreschpe 33:f87f06292637 65 virtual void wr_gram(unsigned short data, unsigned int count);
dreschpe 33:f87f06292637 66
dreschpe 33:f87f06292637 67 /** Send array of pixeldata shorts to display controller
dreschpe 33:f87f06292637 68 *
dreschpe 33:f87f06292637 69 * @param data: unsigned short pixeldata array
dreschpe 33:f87f06292637 70 * @param lenght: lenght (in shorts)
dreschpe 33:f87f06292637 71 *
dreschpe 33:f87f06292637 72 */
dreschpe 33:f87f06292637 73 virtual void wr_grambuf(unsigned short* data, unsigned int lenght);
dreschpe 33:f87f06292637 74
dreschpe 33:f87f06292637 75 /** Read 16bit pixeldata from display controller (with dummy cycle)
dreschpe 33:f87f06292637 76 *
dreschpe 33:f87f06292637 77 * @param convert true/false. Convert 18bit to 16bit, some controllers returns 18bit
dreschpe 33:f87f06292637 78 * @returns 16bit color
dreschpe 33:f87f06292637 79 */
dreschpe 33:f87f06292637 80 virtual unsigned short rd_gram(bool convert);
dreschpe 33:f87f06292637 81
dreschpe 33:f87f06292637 82 /** Read 4x8bit register data (
dreschpe 33:f87f06292637 83 * reading from display ia I2C is not implemented in most controllers !
dreschpe 33:f87f06292637 84 *
dreschpe 33:f87f06292637 85 */
dreschpe 33:f87f06292637 86 virtual unsigned int rd_reg_data32(unsigned char reg);
dreschpe 33:f87f06292637 87
dreschpe 33:f87f06292637 88 /** Read 3x8bit ExtendedCommands register data
dreschpe 33:f87f06292637 89 * reading from display ia I2C is not implemented in most controllers !
dreschpe 33:f87f06292637 90 */
dreschpe 33:f87f06292637 91 virtual unsigned int rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd);
dreschpe 33:f87f06292637 92
dreschpe 33:f87f06292637 93 /** ILI932x specific, does a dummy read cycle, number of bits is protocol dependent
dreschpe 33:f87f06292637 94 * reading from display ia I2C is not implemented in most controllers !
dreschpe 33:f87f06292637 95 */
dreschpe 33:f87f06292637 96 virtual void dummyread ();
dreschpe 33:f87f06292637 97
dreschpe 33:f87f06292637 98 /** ILI932x specific, select register for a successive write or read
dreschpe 33:f87f06292637 99 *
dreschpe 33:f87f06292637 100 * reading from display ia I2C is not implemented in most controllers !
dreschpe 33:f87f06292637 101 */
dreschpe 33:f87f06292637 102 virtual void reg_select(unsigned char reg, bool forread =false);
dreschpe 33:f87f06292637 103
dreschpe 33:f87f06292637 104 /** ILI932x specific, write register with data
dreschpe 33:f87f06292637 105 *
dreschpe 33:f87f06292637 106 * @param reg register to write
dreschpe 33:f87f06292637 107 * @param data 16bit data
dreschpe 33:f87f06292637 108 * not implemented for I2C !
dreschpe 33:f87f06292637 109 */
dreschpe 33:f87f06292637 110 virtual void reg_write(unsigned char reg, unsigned short data);
dreschpe 33:f87f06292637 111
dreschpe 33:f87f06292637 112 /** ILI932x specific, read register
dreschpe 33:f87f06292637 113 *
dreschpe 33:f87f06292637 114 * @param reg register to be read
dreschpe 33:f87f06292637 115 * @returns 16bit register value
dreschpe 33:f87f06292637 116 * not implemented for I2C !
dreschpe 33:f87f06292637 117 */
dreschpe 33:f87f06292637 118 virtual unsigned short reg_read(unsigned char reg);
dreschpe 33:f87f06292637 119
dreschpe 33:f87f06292637 120 /** HW reset sequence (without display init commands)
dreschpe 33:f87f06292637 121 * most I2C displays have no reset signal !
dreschpe 33:f87f06292637 122 */
dreschpe 33:f87f06292637 123 virtual void hw_reset();
dreschpe 33:f87f06292637 124
dreschpe 33:f87f06292637 125 /** Set ChipSelect high or low
dreschpe 33:f87f06292637 126 * @param enable 0/1
dreschpe 33:f87f06292637 127 * not implemented for I2C !
dreschpe 33:f87f06292637 128 */
dreschpe 33:f87f06292637 129 virtual void BusEnable(bool enable);
dreschpe 33:f87f06292637 130
dreschpe 33:f87f06292637 131 private:
dreschpe 33:f87f06292637 132
dreschpe 33:f87f06292637 133 I2C _i2c;
dreschpe 33:f87f06292637 134 int _address;
dreschpe 33:f87f06292637 135
dreschpe 33:f87f06292637 136 };
dreschpe 33:f87f06292637 137
dreschpe 33:f87f06292637 138
dreschpe 33:f87f06292637 139 #endif