Basically i glued Peter Drescher and Simon Ford libs in a GraphicsDisplay class, then derived TFT or LCD class (which inherits Protocols class), then the most derived ones (Inits), which are per-display and are the only part needed to be adapted to diff hw.
Dependents: afero_poc15_180216 afero_poc15_180223 afero_poc15_180302 afero_poc15_180403R ... more
Fork of UniGraphic by
UniGraphic for La Suno Version.
To go with La Suno, WatchDog Reset functions were added in ILI9341.
Protocols/Protocols.h@20:14daa48ffd4c, 2015-03-23 (annotated)
- Committer:
- Geremia
- Date:
- Mon Mar 23 14:08:04 2015 +0000
- Revision:
- 20:14daa48ffd4c
- Parent:
- 11:b842b8e332cb
- Child:
- 21:ae0a4eedfc90
Add ILI 9320/9325/9328 custom TFT932x class, parallel/spi 8/16bit, with orientation, scroll, pixelread, fastwindow.; Par8 and 16 tested, SPI not at all, needs checking if the CS toggle is necessary (see SPI8.cpp SPI16.cpp).
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Geremia | 4:12ba0ecc2c1f | 1 | /* mbed UniGraphic library - Abstract protocol class |
Geremia | 4:12ba0ecc2c1f | 2 | * Copyright (c) 2015 Giuliano Dianda |
Geremia | 4:12ba0ecc2c1f | 3 | * Released under the MIT License: http://mbed.org/license/mit |
Geremia | 4:12ba0ecc2c1f | 4 | */ |
Geremia | 4:12ba0ecc2c1f | 5 | |
Geremia | 0:75ec1b3cde17 | 6 | /** @file Protocols.h |
Geremia | 0:75ec1b3cde17 | 7 | */ |
Geremia | 0:75ec1b3cde17 | 8 | #ifndef Protocols_H |
Geremia | 0:75ec1b3cde17 | 9 | #define Protocols_H |
Geremia | 0:75ec1b3cde17 | 10 | |
Geremia | 0:75ec1b3cde17 | 11 | #include "mbed.h" |
Geremia | 0:75ec1b3cde17 | 12 | |
Geremia | 11:b842b8e332cb | 13 | #define RGB24to16(r,g,b) (((r&0xF8)<<8)|((g&0xFC)<<3)|((b&0xF8)>>3)) //5 red | 6 green | 5 blue |
Geremia | 5:b222a9461d6b | 14 | #define BGR2RGB(color) (((color&0x1F)<<11) | (color&0x7E0) | ((color&0xF800)>>11)) |
Geremia | 5:b222a9461d6b | 15 | |
Geremia | 3:48f3282c2be8 | 16 | //#define USE_CS |
Geremia | 3:48f3282c2be8 | 17 | |
Geremia | 0:75ec1b3cde17 | 18 | /** Protocol types |
Geremia | 0:75ec1b3cde17 | 19 | */ |
Geremia | 0:75ec1b3cde17 | 20 | enum proto_t { |
Geremia | 0:75ec1b3cde17 | 21 | PAR_8 /**< Parallel 8bit, pins 0 to 7 */ |
Geremia | 0:75ec1b3cde17 | 22 | ,PAR_16 /**< Parallel 16bit, pins 0 to 15 */ |
Geremia | 0:75ec1b3cde17 | 23 | ,SPI_8 /**< SPI 8bit */ |
Geremia | 0:75ec1b3cde17 | 24 | ,SPI_16 /**< SPI 16bit */ |
Geremia | 0:75ec1b3cde17 | 25 | }; |
Geremia | 0:75ec1b3cde17 | 26 | |
Geremia | 0:75ec1b3cde17 | 27 | |
Geremia | 6:8356d48a07db | 28 | /** Abstract interface class for spi and parallel protocols |
Geremia | 0:75ec1b3cde17 | 29 | */ |
Geremia | 0:75ec1b3cde17 | 30 | class Protocols |
Geremia | 0:75ec1b3cde17 | 31 | { |
Geremia | 0:75ec1b3cde17 | 32 | public: |
Geremia | 0:75ec1b3cde17 | 33 | |
Geremia | 1:ff019d22b275 | 34 | /** Send 8bit command to display controller |
Geremia | 0:75ec1b3cde17 | 35 | * |
Geremia | 0:75ec1b3cde17 | 36 | * @param cmd: byte to send |
Geremia | 0:75ec1b3cde17 | 37 | * |
Geremia | 0:75ec1b3cde17 | 38 | */ |
Geremia | 1:ff019d22b275 | 39 | virtual void wr_cmd8(unsigned char cmd) = 0; |
Geremia | 0:75ec1b3cde17 | 40 | |
Geremia | 1:ff019d22b275 | 41 | /** Send 8bit data to display controller |
Geremia | 0:75ec1b3cde17 | 42 | * |
Geremia | 1:ff019d22b275 | 43 | * @param data: byte to send |
Geremia | 0:75ec1b3cde17 | 44 | * |
Geremia | 0:75ec1b3cde17 | 45 | */ |
Geremia | 1:ff019d22b275 | 46 | virtual void wr_data8(unsigned char data) = 0; |
Geremia | 0:75ec1b3cde17 | 47 | |
Geremia | 4:12ba0ecc2c1f | 48 | /** Send 2x8bit command to display controller |
Geremia | 1:ff019d22b275 | 49 | * |
Geremia | 1:ff019d22b275 | 50 | * @param cmd: halfword to send |
Geremia | 1:ff019d22b275 | 51 | * |
Geremia | 1:ff019d22b275 | 52 | */ |
Geremia | 1:ff019d22b275 | 53 | virtual void wr_cmd16(unsigned short cmd) = 0; |
Geremia | 1:ff019d22b275 | 54 | |
Geremia | 4:12ba0ecc2c1f | 55 | /** Send 2x8bit data to display controller |
Geremia | 1:ff019d22b275 | 56 | * |
Geremia | 1:ff019d22b275 | 57 | * @param data: halfword to send |
Geremia | 0:75ec1b3cde17 | 58 | * |
Geremia | 0:75ec1b3cde17 | 59 | */ |
Geremia | 1:ff019d22b275 | 60 | virtual void wr_data16(unsigned short data) = 0; |
Geremia | 1:ff019d22b275 | 61 | |
Geremia | 4:12ba0ecc2c1f | 62 | /** Send 16bit pixeldata to display controller |
Geremia | 4:12ba0ecc2c1f | 63 | * |
Geremia | 4:12ba0ecc2c1f | 64 | * @param data: halfword to send |
Geremia | 4:12ba0ecc2c1f | 65 | * |
Geremia | 4:12ba0ecc2c1f | 66 | */ |
Geremia | 4:12ba0ecc2c1f | 67 | virtual void wr_gram(unsigned short data) = 0; |
Geremia | 4:12ba0ecc2c1f | 68 | |
Geremia | 4:12ba0ecc2c1f | 69 | /** Send same 16bit pixeldata to display controller multiple times |
Geremia | 1:ff019d22b275 | 70 | * |
Geremia | 1:ff019d22b275 | 71 | * @param data: halfword to send |
Geremia | 1:ff019d22b275 | 72 | * @param count: how many |
Geremia | 1:ff019d22b275 | 73 | * |
Geremia | 1:ff019d22b275 | 74 | */ |
Geremia | 4:12ba0ecc2c1f | 75 | virtual void wr_gram(unsigned short data, unsigned int count) = 0; |
Geremia | 1:ff019d22b275 | 76 | |
Geremia | 4:12ba0ecc2c1f | 77 | /** Send array of pixeldata shorts to display controller |
Geremia | 1:ff019d22b275 | 78 | * |
Geremia | 4:12ba0ecc2c1f | 79 | * @param data: unsigned short pixeldata array |
Geremia | 1:ff019d22b275 | 80 | * @param lenght: lenght (in shorts) |
Geremia | 1:ff019d22b275 | 81 | * |
Geremia | 1:ff019d22b275 | 82 | */ |
Geremia | 4:12ba0ecc2c1f | 83 | virtual void wr_grambuf(unsigned short* data, unsigned int lenght) = 0; |
Geremia | 0:75ec1b3cde17 | 84 | |
Geremia | 5:b222a9461d6b | 85 | /** Read 16bit pixeldata from display controller (with dummy cycle) |
Geremia | 5:b222a9461d6b | 86 | * |
Geremia | 11:b842b8e332cb | 87 | * @param convert true/false. Convert 18bit to 16bit, some controllers returns 18bit |
Geremia | 5:b222a9461d6b | 88 | * @returns 16bit color |
Geremia | 5:b222a9461d6b | 89 | */ |
Geremia | 11:b842b8e332cb | 90 | virtual unsigned short rd_gram(bool convert) = 0; |
Geremia | 5:b222a9461d6b | 91 | |
Geremia | 7:bb0383b91104 | 92 | /** Read 4x8bit register data (with dummy cycle) |
Geremia | 7:bb0383b91104 | 93 | * @param reg the register to read |
Geremia | 7:bb0383b91104 | 94 | * @returns data as uint |
Geremia | 7:bb0383b91104 | 95 | * |
Geremia | 7:bb0383b91104 | 96 | */ |
Geremia | 7:bb0383b91104 | 97 | virtual unsigned int rd_reg_data32(unsigned char reg) = 0; |
Geremia | 7:bb0383b91104 | 98 | |
Geremia | 7:bb0383b91104 | 99 | /** Read 3x8bit ExtendedCommands register data |
Geremia | 7:bb0383b91104 | 100 | * @param reg the register to read |
Geremia | 7:bb0383b91104 | 101 | * @param SPIreadenablecmd vendor/device specific cmd to read EXTC registers |
Geremia | 7:bb0383b91104 | 102 | * @returns data as uint |
Geremia | 7:bb0383b91104 | 103 | * @note EXTC regs (0xB0 to 0xFF) are read/write registers but needs special cmd to be read in SPI mode |
Geremia | 7:bb0383b91104 | 104 | */ |
Geremia | 7:bb0383b91104 | 105 | virtual unsigned int rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd) = 0; |
Geremia | 7:bb0383b91104 | 106 | |
Geremia | 20:14daa48ffd4c | 107 | /** ILI932x specific, does a dummy read cycle, number of bits is protocol dependent |
Geremia | 20:14daa48ffd4c | 108 | * for PAR protocols: a signle RD bit toggle |
Geremia | 20:14daa48ffd4c | 109 | * for SPI8: 8clocks |
Geremia | 20:14daa48ffd4c | 110 | * for SPI16: 16 clocks |
Geremia | 20:14daa48ffd4c | 111 | */ |
Geremia | 20:14daa48ffd4c | 112 | virtual void dummyread () = 0; |
Geremia | 20:14daa48ffd4c | 113 | |
Geremia | 20:14daa48ffd4c | 114 | /** ILI932x specific, select register for a successive write or read |
Geremia | 20:14daa48ffd4c | 115 | * |
Geremia | 20:14daa48ffd4c | 116 | * @param reg register to be selected |
Geremia | 20:14daa48ffd4c | 117 | * @param forread false = a write next (default), true = a read next |
Geremia | 20:14daa48ffd4c | 118 | * @note forread only used by SPI protocols |
Geremia | 20:14daa48ffd4c | 119 | */ |
Geremia | 20:14daa48ffd4c | 120 | virtual void reg_select(unsigned char reg, bool forread =false) = 0; |
Geremia | 20:14daa48ffd4c | 121 | |
Geremia | 20:14daa48ffd4c | 122 | /** ILI932x specific, write register with data |
Geremia | 20:14daa48ffd4c | 123 | * |
Geremia | 20:14daa48ffd4c | 124 | * @param reg register to write |
Geremia | 20:14daa48ffd4c | 125 | * @param data 16bit data |
Geremia | 20:14daa48ffd4c | 126 | */ |
Geremia | 20:14daa48ffd4c | 127 | virtual void reg_write(unsigned char reg, unsigned short data) = 0; |
Geremia | 20:14daa48ffd4c | 128 | |
Geremia | 20:14daa48ffd4c | 129 | /** ILI932x specific, read register |
Geremia | 20:14daa48ffd4c | 130 | * |
Geremia | 20:14daa48ffd4c | 131 | * @param reg register to be read |
Geremia | 20:14daa48ffd4c | 132 | * @returns 16bit register value |
Geremia | 20:14daa48ffd4c | 133 | */ |
Geremia | 20:14daa48ffd4c | 134 | virtual unsigned short reg_read(unsigned char reg) = 0; |
Geremia | 20:14daa48ffd4c | 135 | |
Geremia | 0:75ec1b3cde17 | 136 | /** HW reset sequence (without display init commands) |
Geremia | 0:75ec1b3cde17 | 137 | */ |
Geremia | 0:75ec1b3cde17 | 138 | virtual void hw_reset() = 0; |
Geremia | 0:75ec1b3cde17 | 139 | |
Geremia | 0:75ec1b3cde17 | 140 | /** Set ChipSelect high or low |
Geremia | 0:75ec1b3cde17 | 141 | * @param enable 0/1 |
Geremia | 0:75ec1b3cde17 | 142 | */ |
Geremia | 0:75ec1b3cde17 | 143 | virtual void BusEnable(bool enable) = 0; |
Geremia | 0:75ec1b3cde17 | 144 | |
Geremia | 0:75ec1b3cde17 | 145 | }; |
Geremia | 0:75ec1b3cde17 | 146 | #endif |