LELEC2811 - I&S / LPS22HH

LPS22HH pressure sensor library

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   X_NUCLEO_IKS01A3

lps22hh_reg.h@1:978cae936ddb, 2019-07-24 (annotated)

Committer:
cparata
Date:
Wed Jul 24 14:19:09 2019 +0000
Revision:
1:978cae936ddb
Parent:
0:c761bc6186e8 
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cparata 0:c761bc6186e8 1 /*
cparata 0:c761bc6186e8 2 ******************************************************************************
cparata 0:c761bc6186e8 3 * @file lps22hh_reg.h
cparata 0:c761bc6186e8 4 * @author Sensors Software Solution Team
cparata 0:c761bc6186e8 5 * @brief This file contains all the functions prototypes for the
cparata 0:c761bc6186e8 6 * lps22hh_reg.c driver.
cparata 0:c761bc6186e8 7 ******************************************************************************
cparata 0:c761bc6186e8 8 * @attention
cparata 0:c761bc6186e8 9 *
cparata 0:c761bc6186e8 10 * <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
cparata 0:c761bc6186e8 11 *
cparata 0:c761bc6186e8 12 * Redistribution and use in source and binary forms, with or without
cparata 0:c761bc6186e8 13 * modification, are permitted provided that the following conditions
cparata 0:c761bc6186e8 14 * are met:
cparata 0:c761bc6186e8 15 * 1. Redistributions of source code must retain the above copyright notice,
cparata 0:c761bc6186e8 16 * this list of conditions and the following disclaimer.
cparata 0:c761bc6186e8 17 * 2. Redistributions in binary form must reproduce the above copyright
cparata 0:c761bc6186e8 18 * notice, this list of conditions and the following disclaimer in the
cparata 0:c761bc6186e8 19 * documentation and/or other materials provided with the distribution.
cparata 0:c761bc6186e8 20 * 3. Neither the name of STMicroelectronics nor the names of its
cparata 0:c761bc6186e8 21 * contributors may be used to endorse or promote products derived from
cparata 0:c761bc6186e8 22 * this software without specific prior written permission.
cparata 0:c761bc6186e8 23 *
cparata 0:c761bc6186e8 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata 0:c761bc6186e8 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata 0:c761bc6186e8 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
cparata 0:c761bc6186e8 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
cparata 0:c761bc6186e8 28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
cparata 0:c761bc6186e8 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
cparata 0:c761bc6186e8 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
cparata 0:c761bc6186e8 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
cparata 0:c761bc6186e8 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
cparata 0:c761bc6186e8 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
cparata 0:c761bc6186e8 34 * POSSIBILITY OF SUCH DAMAGE.
cparata 0:c761bc6186e8 35 *
cparata 0:c761bc6186e8 36 */
cparata 0:c761bc6186e8 37
cparata 0:c761bc6186e8 38 /* Define to prevent recursive inclusion -------------------------------------*/
cparata 0:c761bc6186e8 39 #ifndef LPS22HH_DRIVER_H
cparata 0:c761bc6186e8 40 #define LPS22HH_DRIVER_H
cparata 0:c761bc6186e8 41
cparata 0:c761bc6186e8 42 #ifdef __cplusplus
cparata 1:978cae936ddb 43 extern "C" {
cparata 0:c761bc6186e8 44 #endif
cparata 0:c761bc6186e8 45
cparata 0:c761bc6186e8 46 /* Includes ------------------------------------------------------------------*/
cparata 0:c761bc6186e8 47 #include <stdint.h>
cparata 0:c761bc6186e8 48 #include <math.h>
cparata 0:c761bc6186e8 49
cparata 0:c761bc6186e8 50 /** @addtogroup LPS22HH
cparata 0:c761bc6186e8 51 * @{
cparata 0:c761bc6186e8 52 *
cparata 0:c761bc6186e8 53 */
cparata 0:c761bc6186e8 54
cparata 0:c761bc6186e8 55 /** @defgroup LPS22HH_sensors_common_types
cparata 0:c761bc6186e8 56 * @{
cparata 0:c761bc6186e8 57 *
cparata 0:c761bc6186e8 58 */
cparata 0:c761bc6186e8 59
cparata 0:c761bc6186e8 60 #ifndef MEMS_SHARED_TYPES
cparata 0:c761bc6186e8 61 #define MEMS_SHARED_TYPES
cparata 0:c761bc6186e8 62
cparata 0:c761bc6186e8 63 /**
cparata 0:c761bc6186e8 64 * @defgroup axisXbitXX_t
cparata 0:c761bc6186e8 65 * @brief These unions are useful to represent different sensors data type.
cparata 0:c761bc6186e8 66 * These unions are not need by the driver.
cparata 0:c761bc6186e8 67 *
cparata 0:c761bc6186e8 68 * REMOVING the unions you are compliant with:
cparata 0:c761bc6186e8 69 * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
cparata 0:c761bc6186e8 70 *
cparata 0:c761bc6186e8 71 * @{
cparata 0:c761bc6186e8 72 *
cparata 0:c761bc6186e8 73 */
cparata 0:c761bc6186e8 74
cparata 1:978cae936ddb 75 typedef union {
cparata 1:978cae936ddb 76 int16_t i16bit[3];
cparata 1:978cae936ddb 77 uint8_t u8bit[6];
cparata 0:c761bc6186e8 78 } axis3bit16_t;
cparata 0:c761bc6186e8 79
cparata 1:978cae936ddb 80 typedef union {
cparata 1:978cae936ddb 81 int16_t i16bit;
cparata 1:978cae936ddb 82 uint8_t u8bit[2];
cparata 0:c761bc6186e8 83 } axis1bit16_t;
cparata 0:c761bc6186e8 84
cparata 1:978cae936ddb 85 typedef union {
cparata 1:978cae936ddb 86 int32_t i32bit[3];
cparata 1:978cae936ddb 87 uint8_t u8bit[12];
cparata 0:c761bc6186e8 88 } axis3bit32_t;
cparata 0:c761bc6186e8 89
cparata 1:978cae936ddb 90 typedef union {
cparata 1:978cae936ddb 91 int32_t i32bit;
cparata 1:978cae936ddb 92 uint8_t u8bit[4];
cparata 0:c761bc6186e8 93 } axis1bit32_t;
cparata 0:c761bc6186e8 94
cparata 0:c761bc6186e8 95 /**
cparata 0:c761bc6186e8 96 * @}
cparata 0:c761bc6186e8 97 *
cparata 0:c761bc6186e8 98 */
cparata 0:c761bc6186e8 99
cparata 1:978cae936ddb 100 typedef struct {
cparata 1:978cae936ddb 101 uint8_t bit0 : 1;
cparata 1:978cae936ddb 102 uint8_t bit1 : 1;
cparata 1:978cae936ddb 103 uint8_t bit2 : 1;
cparata 1:978cae936ddb 104 uint8_t bit3 : 1;
cparata 1:978cae936ddb 105 uint8_t bit4 : 1;
cparata 1:978cae936ddb 106 uint8_t bit5 : 1;
cparata 1:978cae936ddb 107 uint8_t bit6 : 1;
cparata 1:978cae936ddb 108 uint8_t bit7 : 1;
cparata 0:c761bc6186e8 109 } bitwise_t;
cparata 0:c761bc6186e8 110
cparata 0:c761bc6186e8 111 #define PROPERTY_DISABLE (0U)
cparata 0:c761bc6186e8 112 #define PROPERTY_ENABLE (1U)
cparata 0:c761bc6186e8 113
cparata 0:c761bc6186e8 114 #endif /* MEMS_SHARED_TYPES */
cparata 0:c761bc6186e8 115
cparata 0:c761bc6186e8 116 /**
cparata 0:c761bc6186e8 117 * @}
cparata 0:c761bc6186e8 118 *
cparata 0:c761bc6186e8 119 */
cparata 0:c761bc6186e8 120
cparata 0:c761bc6186e8 121 /** @addtogroup LPS22HH_Interfaces_Functions
cparata 0:c761bc6186e8 122 * @brief This section provide a set of functions used to read and
cparata 0:c761bc6186e8 123 * write a generic register of the device.
cparata 0:c761bc6186e8 124 * MANDATORY: return 0 -> no Error.
cparata 0:c761bc6186e8 125 * @{
cparata 0:c761bc6186e8 126 *
cparata 0:c761bc6186e8 127 */
cparata 0:c761bc6186e8 128
cparata 1:978cae936ddb 129 typedef int32_t (*lps22hh_write_ptr)(void *, uint8_t, uint8_t *, uint16_t);
cparata 1:978cae936ddb 130 typedef int32_t (*lps22hh_read_ptr)(void *, uint8_t, uint8_t *, uint16_t);
cparata 0:c761bc6186e8 131
cparata 0:c761bc6186e8 132 typedef struct {
cparata 1:978cae936ddb 133 /** Component mandatory fields **/
cparata 1:978cae936ddb 134 lps22hh_write_ptr write_reg;
cparata 1:978cae936ddb 135 lps22hh_read_ptr read_reg;
cparata 1:978cae936ddb 136 /** Customizable optional pointer **/
cparata 1:978cae936ddb 137 void *handle;
cparata 0:c761bc6186e8 138 } lps22hh_ctx_t;
cparata 0:c761bc6186e8 139
cparata 0:c761bc6186e8 140 /**
cparata 0:c761bc6186e8 141 * @}
cparata 0:c761bc6186e8 142 *
cparata 0:c761bc6186e8 143 */
cparata 0:c761bc6186e8 144
cparata 0:c761bc6186e8 145 /** @defgroup LPS22HH_Infos
cparata 0:c761bc6186e8 146 * @{
cparata 0:c761bc6186e8 147 *
cparata 0:c761bc6186e8 148 */
cparata 0:c761bc6186e8 149
cparata 0:c761bc6186e8 150 /** I2C Device Address 8 bit format if SA0=0 -> B9 if SA0=1 -> BB **/
cparata 0:c761bc6186e8 151 #define LPS22HH_I2C_ADD_H 0xBBU
cparata 0:c761bc6186e8 152 #define LPS22HH_I2C_ADD_L 0xB9U
cparata 0:c761bc6186e8 153
cparata 0:c761bc6186e8 154 /** Device Identification (Who am I) **/
cparata 0:c761bc6186e8 155 #define LPS22HH_ID 0xB3U
cparata 0:c761bc6186e8 156
cparata 0:c761bc6186e8 157 /**
cparata 0:c761bc6186e8 158 * @}
cparata 0:c761bc6186e8 159 *
cparata 0:c761bc6186e8 160 */
cparata 0:c761bc6186e8 161
cparata 0:c761bc6186e8 162 /**
cparata 0:c761bc6186e8 163 * @addtogroup LPS22HH_Sensitivity
cparata 0:c761bc6186e8 164 * @brief These macro are maintained for back compatibility.
cparata 0:c761bc6186e8 165 * in order to convert data into engineering units please
cparata 0:c761bc6186e8 166 * use functions:
cparata 0:c761bc6186e8 167 * -> _from_lsb_to_hpa(int16_t lsb)
cparata 0:c761bc6186e8 168 * -> _from_lsb_to_celsius(int16_t lsb);
cparata 0:c761bc6186e8 169 *
cparata 0:c761bc6186e8 170 * REMOVING the MACRO you are compliant with:
cparata 0:c761bc6186e8 171 * MISRA-C 2012 [Dir 4.9] -> " avoid function-like macros "
cparata 0:c761bc6186e8 172 * @{
cparata 0:c761bc6186e8 173 *
cparata 0:c761bc6186e8 174 */
cparata 0:c761bc6186e8 175
cparata 0:c761bc6186e8 176 #define LPS22HH_FROM_LSB_TO_hPa(lsb) (float)( lsb / 4096.0f )
cparata 0:c761bc6186e8 177 #define LPS22HH_FROM_LSB_TO_degC(lsb) (float)( lsb / 100.0f )
cparata 0:c761bc6186e8 178
cparata 0:c761bc6186e8 179 /**
cparata 0:c761bc6186e8 180 * @}
cparata 0:c761bc6186e8 181 *
cparata 0:c761bc6186e8 182 */
cparata 0:c761bc6186e8 183
cparata 0:c761bc6186e8 184 #define LPS22HH_INTERRUPT_CFG 0x0BU
cparata 0:c761bc6186e8 185 typedef struct {
cparata 1:978cae936ddb 186 uint8_t pe : 2; /* ple + phe */
cparata 1:978cae936ddb 187 uint8_t lir : 1;
cparata 1:978cae936ddb 188 uint8_t diff_en : 1;
cparata 1:978cae936ddb 189 uint8_t reset_az : 1;
cparata 1:978cae936ddb 190 uint8_t autozero : 1;
cparata 1:978cae936ddb 191 uint8_t reset_arp : 1;
cparata 1:978cae936ddb 192 uint8_t autorefp : 1;
cparata 0:c761bc6186e8 193 } lps22hh_interrupt_cfg_t;
cparata 0:c761bc6186e8 194
cparata 0:c761bc6186e8 195 #define LPS22HH_THS_P_L 0x0CU
cparata 0:c761bc6186e8 196 typedef struct {
cparata 1:978cae936ddb 197 uint8_t ths : 8;
cparata 0:c761bc6186e8 198 } lps22hh_ths_p_l_t;
cparata 0:c761bc6186e8 199
cparata 0:c761bc6186e8 200 #define LPS22HH_THS_P_H 0x0DU
cparata 0:c761bc6186e8 201 typedef struct {
cparata 1:978cae936ddb 202 uint8_t ths : 7;
cparata 1:978cae936ddb 203 uint8_t not_used_01 : 1;
cparata 0:c761bc6186e8 204 } lps22hh_ths_p_h_t;
cparata 0:c761bc6186e8 205
cparata 0:c761bc6186e8 206 #define LPS22HH_IF_CTRL 0x0EU
cparata 0:c761bc6186e8 207 typedef struct {
cparata 1:978cae936ddb 208 uint8_t i2c_disable : 1;
cparata 1:978cae936ddb 209 uint8_t i3c_disable : 1;
cparata 1:978cae936ddb 210 uint8_t pd_dis_int1 : 1;
cparata 1:978cae936ddb 211 uint8_t sdo_pu_en : 1;
cparata 1:978cae936ddb 212 uint8_t sda_pu_en : 1;
cparata 1:978cae936ddb 213 uint8_t not_used_01 : 2;
cparata 1:978cae936ddb 214 uint8_t int_en_i3c : 1;
cparata 0:c761bc6186e8 215 } lps22hh_if_ctrl_t;
cparata 0:c761bc6186e8 216
cparata 0:c761bc6186e8 217 #define LPS22HH_WHO_AM_I 0x0FU
cparata 0:c761bc6186e8 218 #define LPS22HH_CTRL_REG1 0x10U
cparata 0:c761bc6186e8 219 typedef struct {
cparata 1:978cae936ddb 220 uint8_t sim : 1;
cparata 1:978cae936ddb 221 uint8_t bdu : 1;
cparata 1:978cae936ddb 222 uint8_t lpfp_cfg : 2; /* en_lpfp + lpfp_cfg */
cparata 1:978cae936ddb 223 uint8_t odr : 3;
cparata 1:978cae936ddb 224 uint8_t not_used_01 : 1;
cparata 0:c761bc6186e8 225 } lps22hh_ctrl_reg1_t;
cparata 0:c761bc6186e8 226
cparata 0:c761bc6186e8 227 #define LPS22HH_CTRL_REG2 0x11U
cparata 0:c761bc6186e8 228 typedef struct {
cparata 1:978cae936ddb 229 uint8_t one_shot : 1;
cparata 1:978cae936ddb 230 uint8_t low_noise_en : 1;
cparata 1:978cae936ddb 231 uint8_t swreset : 1;
cparata 1:978cae936ddb 232 uint8_t not_used_01 : 1;
cparata 1:978cae936ddb 233 uint8_t if_add_inc : 1;
cparata 1:978cae936ddb 234 uint8_t pp_od : 1;
cparata 1:978cae936ddb 235 uint8_t int_h_l : 1;
cparata 1:978cae936ddb 236 uint8_t boot : 1;
cparata 0:c761bc6186e8 237 } lps22hh_ctrl_reg2_t;
cparata 0:c761bc6186e8 238
cparata 0:c761bc6186e8 239 #define LPS22HH_CTRL_REG3 0x12U
cparata 0:c761bc6186e8 240 typedef struct {
cparata 1:978cae936ddb 241 uint8_t int_s : 2;
cparata 1:978cae936ddb 242 uint8_t drdy : 1;
cparata 1:978cae936ddb 243 uint8_t int_f_ovr : 1;
cparata 1:978cae936ddb 244 uint8_t int_f_wtm : 1;
cparata 1:978cae936ddb 245 uint8_t int_f_full : 1;
cparata 1:978cae936ddb 246 uint8_t not_used_01 : 2;
cparata 0:c761bc6186e8 247 } lps22hh_ctrl_reg3_t;
cparata 0:c761bc6186e8 248
cparata 0:c761bc6186e8 249 #define LPS22HH_FIFO_CTRL 0x13U
cparata 0:c761bc6186e8 250 typedef struct {
cparata 1:978cae936ddb 251 uint8_t f_mode : 3; /* f_mode + trig_modes */
cparata 1:978cae936ddb 252 uint8_t stop_on_wtm : 1;
cparata 1:978cae936ddb 253 uint8_t not_used_01 : 4;
cparata 0:c761bc6186e8 254 } lps22hh_fifo_ctrl_t;
cparata 0:c761bc6186e8 255
cparata 0:c761bc6186e8 256 #define LPS22HH_FIFO_WTM 0x14U
cparata 0:c761bc6186e8 257 typedef struct {
cparata 1:978cae936ddb 258 uint8_t wtm : 7;
cparata 1:978cae936ddb 259 uint8_t not_used_01 : 1;
cparata 0:c761bc6186e8 260 } lps22hh_fifo_wtm_t;
cparata 0:c761bc6186e8 261
cparata 0:c761bc6186e8 262 #define LPS22HH_REF_P_XL 0x15U
cparata 0:c761bc6186e8 263 #define LPS22HH_REF_P_L 0x16U
cparata 0:c761bc6186e8 264 #define LPS22HH_RPDS_L 0x18U
cparata 0:c761bc6186e8 265 #define LPS22HH_RPDS_H 0x19U
cparata 0:c761bc6186e8 266 #define LPS22HH_INT_SOURCE 0x24U
cparata 0:c761bc6186e8 267 typedef struct {
cparata 1:978cae936ddb 268 uint8_t ph : 1;
cparata 1:978cae936ddb 269 uint8_t pl : 1;
cparata 1:978cae936ddb 270 uint8_t ia : 1;
cparata 1:978cae936ddb 271 uint8_t not_used_01 : 5;
cparata 0:c761bc6186e8 272 } lps22hh_int_source_t;
cparata 0:c761bc6186e8 273
cparata 0:c761bc6186e8 274 #define LPS22HH_FIFO_STATUS1 0x25U
cparata 0:c761bc6186e8 275 #define LPS22HH_FIFO_STATUS2 0x26U
cparata 0:c761bc6186e8 276 typedef struct {
cparata 1:978cae936ddb 277 uint8_t not_used_01 : 5;
cparata 1:978cae936ddb 278 uint8_t fifo_full_ia : 1;
cparata 1:978cae936ddb 279 uint8_t fifo_ovr_ia : 1;
cparata 1:978cae936ddb 280 uint8_t fifo_wtm_ia : 1;
cparata 0:c761bc6186e8 281 } lps22hh_fifo_status2_t;
cparata 0:c761bc6186e8 282
cparata 0:c761bc6186e8 283 #define LPS22HH_STATUS 0x27U
cparata 0:c761bc6186e8 284 typedef struct {
cparata 1:978cae936ddb 285 uint8_t p_da : 1;
cparata 1:978cae936ddb 286 uint8_t t_da : 1;
cparata 1:978cae936ddb 287 uint8_t not_used_01 : 2;
cparata 1:978cae936ddb 288 uint8_t p_or : 1;
cparata 1:978cae936ddb 289 uint8_t t_or : 1;
cparata 1:978cae936ddb 290 uint8_t not_used_02 : 2;
cparata 0:c761bc6186e8 291 } lps22hh_status_t;
cparata 0:c761bc6186e8 292
cparata 0:c761bc6186e8 293 #define LPS22HH_PRESSURE_OUT_XL 0x28U
cparata 0:c761bc6186e8 294 #define LPS22HH_PRESSURE_OUT_L 0x29U
cparata 0:c761bc6186e8 295 #define LPS22HH_PRESSURE_OUT_H 0x2AU
cparata 0:c761bc6186e8 296 #define LPS22HH_TEMP_OUT_L 0x2BU
cparata 0:c761bc6186e8 297 #define LPS22HH_TEMP_OUT_H 0x2CU
cparata 0:c761bc6186e8 298 #define LPS22HH_FIFO_DATA_OUT_PRESS_XL 0x78U
cparata 0:c761bc6186e8 299 #define LPS22HH_FIFO_DATA_OUT_PRESS_L 0x79U
cparata 0:c761bc6186e8 300 #define LPS22HH_FIFO_DATA_OUT_PRESS_H 0x7AU
cparata 0:c761bc6186e8 301 #define LPS22HH_FIFO_DATA_OUT_TEMP_L 0x7BU
cparata 0:c761bc6186e8 302 #define LPS22HH_FIFO_DATA_OUT_TEMP_H 0x7CU
cparata 0:c761bc6186e8 303
cparata 0:c761bc6186e8 304 /**
cparata 0:c761bc6186e8 305 * @defgroup LPS22HH_Register_Union
cparata 0:c761bc6186e8 306 * @brief This union group all the registers that has a bitfield
cparata 0:c761bc6186e8 307 * description.
cparata 0:c761bc6186e8 308 * This union is useful but not need by the driver.
cparata 0:c761bc6186e8 309 *
cparata 0:c761bc6186e8 310 * REMOVING this union you are compliant with:
cparata 0:c761bc6186e8 311 * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
cparata 0:c761bc6186e8 312 *
cparata 0:c761bc6186e8 313 * @{
cparata 0:c761bc6186e8 314 *
cparata 0:c761bc6186e8 315 */
cparata 1:978cae936ddb 316 typedef union {
cparata 1:978cae936ddb 317 lps22hh_interrupt_cfg_t interrupt_cfg;
cparata 1:978cae936ddb 318 lps22hh_if_ctrl_t if_ctrl;
cparata 1:978cae936ddb 319 lps22hh_ctrl_reg1_t ctrl_reg1;
cparata 1:978cae936ddb 320 lps22hh_ctrl_reg2_t ctrl_reg2;
cparata 1:978cae936ddb 321 lps22hh_ctrl_reg3_t ctrl_reg3;
cparata 1:978cae936ddb 322 lps22hh_fifo_ctrl_t fifo_ctrl;
cparata 1:978cae936ddb 323 lps22hh_fifo_wtm_t fifo_wtm;
cparata 1:978cae936ddb 324 lps22hh_int_source_t int_source;
cparata 1:978cae936ddb 325 lps22hh_fifo_status2_t fifo_status2;
cparata 1:978cae936ddb 326 lps22hh_status_t status;
cparata 1:978cae936ddb 327 bitwise_t bitwise;
cparata 1:978cae936ddb 328 uint8_t byte;
cparata 0:c761bc6186e8 329 } lps22hh_reg_t;
cparata 0:c761bc6186e8 330
cparata 0:c761bc6186e8 331 /**
cparata 0:c761bc6186e8 332 * @}
cparata 0:c761bc6186e8 333 *
cparata 0:c761bc6186e8 334 */
cparata 0:c761bc6186e8 335
cparata 1:978cae936ddb 336 int32_t lps22hh_read_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t *data,
cparata 0:c761bc6186e8 337 uint16_t len);
cparata 1:978cae936ddb 338 int32_t lps22hh_write_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t *data,
cparata 0:c761bc6186e8 339 uint16_t len);
cparata 0:c761bc6186e8 340
cparata 0:c761bc6186e8 341 extern float lps22hh_from_lsb_to_hpa(int16_t lsb);
cparata 0:c761bc6186e8 342 extern float lps22hh_from_lsb_to_celsius(int16_t lsb);
cparata 0:c761bc6186e8 343
cparata 0:c761bc6186e8 344 int32_t lps22hh_autozero_rst_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 345 int32_t lps22hh_autozero_rst_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 346
cparata 0:c761bc6186e8 347 int32_t lps22hh_autozero_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 348 int32_t lps22hh_autozero_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 349
cparata 0:c761bc6186e8 350 int32_t lps22hh_pressure_snap_rst_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 351 int32_t lps22hh_pressure_snap_rst_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 352
cparata 0:c761bc6186e8 353 int32_t lps22hh_pressure_snap_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 354 int32_t lps22hh_pressure_snap_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 355
cparata 0:c761bc6186e8 356 int32_t lps22hh_block_data_update_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 357 int32_t lps22hh_block_data_update_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 358
cparata 0:c761bc6186e8 359 typedef enum {
cparata 1:978cae936ddb 360 LPS22HH_POWER_DOWN = 0x00,
cparata 1:978cae936ddb 361 LPS22HH_ONE_SHOOT = 0x08,
cparata 1:978cae936ddb 362 LPS22HH_1_Hz = 0x01,
cparata 1:978cae936ddb 363 LPS22HH_10_Hz = 0x02,
cparata 1:978cae936ddb 364 LPS22HH_25_Hz = 0x03,
cparata 1:978cae936ddb 365 LPS22HH_50_Hz = 0x04,
cparata 1:978cae936ddb 366 LPS22HH_75_Hz = 0x05,
cparata 1:978cae936ddb 367 LPS22HH_1_Hz_LOW_NOISE = 0x11,
cparata 1:978cae936ddb 368 LPS22HH_10_Hz_LOW_NOISE = 0x12,
cparata 1:978cae936ddb 369 LPS22HH_25_Hz_LOW_NOISE = 0x13,
cparata 1:978cae936ddb 370 LPS22HH_50_Hz_LOW_NOISE = 0x14,
cparata 1:978cae936ddb 371 LPS22HH_75_Hz_LOW_NOISE = 0x15,
cparata 1:978cae936ddb 372 LPS22HH_100_Hz = 0x06,
cparata 1:978cae936ddb 373 LPS22HH_200_Hz = 0x07,
cparata 0:c761bc6186e8 374 } lps22hh_odr_t;
cparata 0:c761bc6186e8 375 int32_t lps22hh_data_rate_set(lps22hh_ctx_t *ctx, lps22hh_odr_t val);
cparata 0:c761bc6186e8 376 int32_t lps22hh_data_rate_get(lps22hh_ctx_t *ctx, lps22hh_odr_t *val);
cparata 0:c761bc6186e8 377
cparata 0:c761bc6186e8 378 int32_t lps22hh_pressure_ref_set(lps22hh_ctx_t *ctx, uint8_t *buff);
cparata 0:c761bc6186e8 379 int32_t lps22hh_pressure_ref_get(lps22hh_ctx_t *ctx, uint8_t *buff);
cparata 0:c761bc6186e8 380
cparata 0:c761bc6186e8 381 int32_t lps22hh_pressure_offset_set(lps22hh_ctx_t *ctx, uint8_t *buff);
cparata 0:c761bc6186e8 382 int32_t lps22hh_pressure_offset_get(lps22hh_ctx_t *ctx, uint8_t *buff);
cparata 0:c761bc6186e8 383
cparata 1:978cae936ddb 384 typedef struct {
cparata 1:978cae936ddb 385 lps22hh_int_source_t int_source;
cparata 1:978cae936ddb 386 lps22hh_fifo_status2_t fifo_status2;
cparata 1:978cae936ddb 387 lps22hh_status_t status;
cparata 0:c761bc6186e8 388 } lps22hh_all_sources_t;
cparata 0:c761bc6186e8 389 int32_t lps22hh_all_sources_get(lps22hh_ctx_t *ctx,
cparata 0:c761bc6186e8 390 lps22hh_all_sources_t *val);
cparata 0:c761bc6186e8 391
cparata 0:c761bc6186e8 392 int32_t lps22hh_status_reg_get(lps22hh_ctx_t *ctx, lps22hh_status_t *val);
cparata 0:c761bc6186e8 393
cparata 0:c761bc6186e8 394 int32_t lps22hh_press_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 395
cparata 0:c761bc6186e8 396 int32_t lps22hh_temp_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 397
cparata 0:c761bc6186e8 398 int32_t lps22hh_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff);
cparata 0:c761bc6186e8 399
cparata 0:c761bc6186e8 400 int32_t lps22hh_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff);
cparata 0:c761bc6186e8 401
cparata 0:c761bc6186e8 402 int32_t lps22hh_fifo_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff);
cparata 0:c761bc6186e8 403
cparata 0:c761bc6186e8 404 int32_t lps22hh_fifo_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff);
cparata 0:c761bc6186e8 405
cparata 0:c761bc6186e8 406 int32_t lps22hh_device_id_get(lps22hh_ctx_t *ctx, uint8_t *buff);
cparata 0:c761bc6186e8 407
cparata 0:c761bc6186e8 408 int32_t lps22hh_reset_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 409 int32_t lps22hh_reset_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 410
cparata 0:c761bc6186e8 411 int32_t lps22hh_auto_increment_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 412 int32_t lps22hh_auto_increment_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 413
cparata 0:c761bc6186e8 414 int32_t lps22hh_boot_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 415 int32_t lps22hh_boot_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 416
cparata 0:c761bc6186e8 417 typedef enum {
cparata 1:978cae936ddb 418 LPS22HH_LPF_ODR_DIV_2 = 0,
cparata 1:978cae936ddb 419 LPS22HH_LPF_ODR_DIV_9 = 2,
cparata 1:978cae936ddb 420 LPS22HH_LPF_ODR_DIV_20 = 3,
cparata 0:c761bc6186e8 421 } lps22hh_lpfp_cfg_t;
cparata 0:c761bc6186e8 422 int32_t lps22hh_lp_bandwidth_set(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t val);
cparata 0:c761bc6186e8 423 int32_t lps22hh_lp_bandwidth_get(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t *val);
cparata 0:c761bc6186e8 424
cparata 0:c761bc6186e8 425 typedef enum {
cparata 1:978cae936ddb 426 LPS22HH_I2C_ENABLE = 0,
cparata 1:978cae936ddb 427 LPS22HH_I2C_DISABLE = 1,
cparata 0:c761bc6186e8 428 } lps22hh_i2c_disable_t;
cparata 0:c761bc6186e8 429 int32_t lps22hh_i2c_interface_set(lps22hh_ctx_t *ctx,
cparata 0:c761bc6186e8 430 lps22hh_i2c_disable_t val);
cparata 0:c761bc6186e8 431 int32_t lps22hh_i2c_interface_get(lps22hh_ctx_t *ctx,
cparata 0:c761bc6186e8 432 lps22hh_i2c_disable_t *val);
cparata 0:c761bc6186e8 433
cparata 0:c761bc6186e8 434 typedef enum {
cparata 1:978cae936ddb 435 LPS22HH_I3C_ENABLE = 0x00,
cparata 1:978cae936ddb 436 LPS22HH_I3C_ENABLE_INT_PIN_ENABLE = 0x10,
cparata 1:978cae936ddb 437 LPS22HH_I3C_DISABLE = 0x11,
cparata 0:c761bc6186e8 438 } lps22hh_i3c_disable_t;
cparata 0:c761bc6186e8 439 int32_t lps22hh_i3c_interface_set(lps22hh_ctx_t *ctx,
cparata 0:c761bc6186e8 440 lps22hh_i3c_disable_t val);
cparata 0:c761bc6186e8 441 int32_t lps22hh_i3c_interface_get(lps22hh_ctx_t *ctx,
cparata 0:c761bc6186e8 442 lps22hh_i3c_disable_t *val);
cparata 0:c761bc6186e8 443
cparata 0:c761bc6186e8 444 typedef enum {
cparata 1:978cae936ddb 445 LPS22HH_PULL_UP_DISCONNECT = 0,
cparata 1:978cae936ddb 446 LPS22HH_PULL_UP_CONNECT = 1,
cparata 0:c761bc6186e8 447 } lps22hh_pu_en_t;
cparata 0:c761bc6186e8 448 int32_t lps22hh_sdo_sa0_mode_set(lps22hh_ctx_t *ctx, lps22hh_pu_en_t val);
cparata 0:c761bc6186e8 449 int32_t lps22hh_sdo_sa0_mode_get(lps22hh_ctx_t *ctx, lps22hh_pu_en_t *val);
cparata 0:c761bc6186e8 450 int32_t lps22hh_sda_mode_set(lps22hh_ctx_t *ctx, lps22hh_pu_en_t val);
cparata 0:c761bc6186e8 451 int32_t lps22hh_sda_mode_get(lps22hh_ctx_t *ctx, lps22hh_pu_en_t *val);
cparata 0:c761bc6186e8 452
cparata 0:c761bc6186e8 453 typedef enum {
cparata 1:978cae936ddb 454 LPS22HH_SPI_4_WIRE = 0,
cparata 1:978cae936ddb 455 LPS22HH_SPI_3_WIRE = 1,
cparata 0:c761bc6186e8 456 } lps22hh_sim_t;
cparata 0:c761bc6186e8 457 int32_t lps22hh_spi_mode_set(lps22hh_ctx_t *ctx, lps22hh_sim_t val);
cparata 0:c761bc6186e8 458 int32_t lps22hh_spi_mode_get(lps22hh_ctx_t *ctx, lps22hh_sim_t *val);
cparata 0:c761bc6186e8 459
cparata 0:c761bc6186e8 460 typedef enum {
cparata 1:978cae936ddb 461 LPS22HH_INT_PULSED = 0,
cparata 1:978cae936ddb 462 LPS22HH_INT_LATCHED = 1,
cparata 0:c761bc6186e8 463 } lps22hh_lir_t;
cparata 0:c761bc6186e8 464 int32_t lps22hh_int_notification_set(lps22hh_ctx_t *ctx, lps22hh_lir_t val);
cparata 0:c761bc6186e8 465 int32_t lps22hh_int_notification_get(lps22hh_ctx_t *ctx, lps22hh_lir_t *val);
cparata 0:c761bc6186e8 466
cparata 0:c761bc6186e8 467 typedef enum {
cparata 1:978cae936ddb 468 LPS22HH_PUSH_PULL = 0,
cparata 1:978cae936ddb 469 LPS22HH_OPEN_DRAIN = 1,
cparata 0:c761bc6186e8 470 } lps22hh_pp_od_t;
cparata 0:c761bc6186e8 471 int32_t lps22hh_pin_mode_set(lps22hh_ctx_t *ctx, lps22hh_pp_od_t val);
cparata 0:c761bc6186e8 472 int32_t lps22hh_pin_mode_get(lps22hh_ctx_t *ctx, lps22hh_pp_od_t *val);
cparata 0:c761bc6186e8 473
cparata 0:c761bc6186e8 474 typedef enum {
cparata 1:978cae936ddb 475 LPS22HH_ACTIVE_HIGH = 0,
cparata 1:978cae936ddb 476 LPS22HH_ACTIVE_LOW = 1,
cparata 0:c761bc6186e8 477 } lps22hh_int_h_l_t;
cparata 0:c761bc6186e8 478 int32_t lps22hh_pin_polarity_set(lps22hh_ctx_t *ctx, lps22hh_int_h_l_t val);
cparata 0:c761bc6186e8 479 int32_t lps22hh_pin_polarity_get(lps22hh_ctx_t *ctx, lps22hh_int_h_l_t *val);
cparata 0:c761bc6186e8 480
cparata 0:c761bc6186e8 481 int32_t lps22hh_pin_int_route_set(lps22hh_ctx_t *ctx,
cparata 0:c761bc6186e8 482 lps22hh_ctrl_reg3_t *val);
cparata 0:c761bc6186e8 483 int32_t lps22hh_pin_int_route_get(lps22hh_ctx_t *ctx,
cparata 0:c761bc6186e8 484 lps22hh_ctrl_reg3_t *val);
cparata 0:c761bc6186e8 485
cparata 0:c761bc6186e8 486 typedef enum {
cparata 1:978cae936ddb 487 LPS22HH_NO_THRESHOLD = 0,
cparata 1:978cae936ddb 488 LPS22HH_POSITIVE = 1,
cparata 1:978cae936ddb 489 LPS22HH_NEGATIVE = 2,
cparata 1:978cae936ddb 490 LPS22HH_BOTH = 3,
cparata 0:c761bc6186e8 491 } lps22hh_pe_t;
cparata 0:c761bc6186e8 492 int32_t lps22hh_int_on_threshold_set(lps22hh_ctx_t *ctx, lps22hh_pe_t val);
cparata 0:c761bc6186e8 493 int32_t lps22hh_int_on_threshold_get(lps22hh_ctx_t *ctx, lps22hh_pe_t *val);
cparata 0:c761bc6186e8 494
cparata 0:c761bc6186e8 495 int32_t lps22hh_int_treshold_set(lps22hh_ctx_t *ctx, uint16_t buff);
cparata 0:c761bc6186e8 496 int32_t lps22hh_int_treshold_get(lps22hh_ctx_t *ctx, uint16_t *buff);
cparata 0:c761bc6186e8 497
cparata 0:c761bc6186e8 498 typedef enum {
cparata 1:978cae936ddb 499 LPS22HH_BYPASS_MODE = 0,
cparata 1:978cae936ddb 500 LPS22HH_FIFO_MODE = 1,
cparata 1:978cae936ddb 501 LPS22HH_STREAM_MODE = 2,
cparata 1:978cae936ddb 502 LPS22HH_DYNAMIC_STREAM_MODE = 3,
cparata 1:978cae936ddb 503 LPS22HH_BYPASS_TO_FIFO_MODE = 5,
cparata 1:978cae936ddb 504 LPS22HH_BYPASS_TO_STREAM_MODE = 6,
cparata 1:978cae936ddb 505 LPS22HH_STREAM_TO_FIFO_MODE = 7,
cparata 0:c761bc6186e8 506 } lps22hh_f_mode_t;
cparata 0:c761bc6186e8 507 int32_t lps22hh_fifo_mode_set(lps22hh_ctx_t *ctx, lps22hh_f_mode_t val);
cparata 0:c761bc6186e8 508 int32_t lps22hh_fifo_mode_get(lps22hh_ctx_t *ctx, lps22hh_f_mode_t *val);
cparata 0:c761bc6186e8 509
cparata 0:c761bc6186e8 510 int32_t lps22hh_fifo_stop_on_wtm_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 511 int32_t lps22hh_fifo_stop_on_wtm_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 512
cparata 0:c761bc6186e8 513 int32_t lps22hh_fifo_watermark_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 514 int32_t lps22hh_fifo_watermark_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 515
cparata 0:c761bc6186e8 516 int32_t lps22hh_fifo_data_level_get(lps22hh_ctx_t *ctx, uint8_t *buff);
cparata 0:c761bc6186e8 517
cparata 0:c761bc6186e8 518 int32_t lps22hh_fifo_src_get(lps22hh_ctx_t *ctx, lps22hh_fifo_status2_t *val);
cparata 0:c761bc6186e8 519
cparata 0:c761bc6186e8 520 int32_t lps22hh_fifo_full_flag_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 521
cparata 0:c761bc6186e8 522 int32_t lps22hh_fifo_ovr_flag_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 523
cparata 0:c761bc6186e8 524 int32_t lps22hh_fifo_wtm_flag_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 525
cparata 0:c761bc6186e8 526 int32_t lps22hh_fifo_ovr_on_int_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 527 int32_t lps22hh_fifo_ovr_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 528
cparata 0:c761bc6186e8 529 int32_t lps22hh_fifo_threshold_on_int_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 530 int32_t lps22hh_fifo_threshold_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 531
cparata 0:c761bc6186e8 532 int32_t lps22hh_fifo_full_on_int_set(lps22hh_ctx_t *ctx, uint8_t val);
cparata 0:c761bc6186e8 533 int32_t lps22hh_fifo_full_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val);
cparata 0:c761bc6186e8 534
cparata 0:c761bc6186e8 535 /**
cparata 0:c761bc6186e8 536 * @}
cparata 0:c761bc6186e8 537 *
cparata 0:c761bc6186e8 538 */
cparata 0:c761bc6186e8 539
cparata 0:c761bc6186e8 540 #ifdef __cplusplus
cparata 0:c761bc6186e8 541 }
cparata 0:c761bc6186e8 542 #endif
cparata 0:c761bc6186e8 543
cparata 0:c761bc6186e8 544 #endif /*LPS22HH_REGS_H */
cparata 0:c761bc6186e8 545
cparata 0:c761bc6186e8 546 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/