LIS2MDL magnetometer modified library
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
lis2mdl_reg.c@3:a16e6dd1ee7f, 2019-09-05 (annotated)
- Committer:
- martlefebvre94
- Date:
- Thu Sep 05 15:41:07 2019 +0000
- Revision:
- 3:a16e6dd1ee7f
- Parent:
- 1:8562ae1a0534
Temperature compensation and offset cancellation added to the set/get methods
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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cparata | 0:671edf39d961 | 1 | /* |
cparata | 0:671edf39d961 | 2 | ****************************************************************************** |
cparata | 0:671edf39d961 | 3 | * @file lis2mdl_reg.c |
cparata | 0:671edf39d961 | 4 | * @author Sensors Software Solution Team |
cparata | 0:671edf39d961 | 5 | * @brief LIS2MDL driver file |
cparata | 0:671edf39d961 | 6 | ****************************************************************************** |
cparata | 0:671edf39d961 | 7 | * @attention |
cparata | 0:671edf39d961 | 8 | * |
cparata | 0:671edf39d961 | 9 | * <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2> |
cparata | 0:671edf39d961 | 10 | * |
cparata | 0:671edf39d961 | 11 | * Redistribution and use in source and binary forms, with or without |
cparata | 0:671edf39d961 | 12 | * modification, are permitted provided that the following conditions |
cparata | 0:671edf39d961 | 13 | * are met: |
cparata | 0:671edf39d961 | 14 | * 1. Redistributions of source code must retain the above copyright notice, |
cparata | 0:671edf39d961 | 15 | * this list of conditions and the following disclaimer. |
cparata | 0:671edf39d961 | 16 | * 2. Redistributions in binary form must reproduce the above copyright |
cparata | 0:671edf39d961 | 17 | * notice, this list of conditions and the following disclaimer in the |
cparata | 0:671edf39d961 | 18 | * documentation and/or other materials provided with the distribution. |
cparata | 0:671edf39d961 | 19 | * 3. Neither the name of STMicroelectronics nor the names of its |
cparata | 0:671edf39d961 | 20 | * contributors may be used to endorse or promote products derived from |
cparata | 0:671edf39d961 | 21 | * this software without specific prior written permission. |
cparata | 0:671edf39d961 | 22 | * |
cparata | 0:671edf39d961 | 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
cparata | 0:671edf39d961 | 24 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
cparata | 0:671edf39d961 | 25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
cparata | 0:671edf39d961 | 26 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
cparata | 0:671edf39d961 | 27 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
cparata | 0:671edf39d961 | 28 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
cparata | 0:671edf39d961 | 29 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
cparata | 0:671edf39d961 | 30 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
cparata | 0:671edf39d961 | 31 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
cparata | 0:671edf39d961 | 32 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
cparata | 0:671edf39d961 | 33 | * POSSIBILITY OF SUCH DAMAGE. |
cparata | 0:671edf39d961 | 34 | * |
cparata | 0:671edf39d961 | 35 | */ |
cparata | 0:671edf39d961 | 36 | #include "lis2mdl_reg.h" |
cparata | 0:671edf39d961 | 37 | |
cparata | 0:671edf39d961 | 38 | /** |
cparata | 0:671edf39d961 | 39 | * @defgroup LIS2MDL |
cparata | 0:671edf39d961 | 40 | * @brief This file provides a set of functions needed to drive the |
cparata | 0:671edf39d961 | 41 | * lis2mdl enhanced inertial module. |
cparata | 0:671edf39d961 | 42 | * @{ |
cparata | 0:671edf39d961 | 43 | * |
cparata | 0:671edf39d961 | 44 | */ |
cparata | 0:671edf39d961 | 45 | |
cparata | 0:671edf39d961 | 46 | /** |
cparata | 0:671edf39d961 | 47 | * @defgroup LIS2MDL_Interfaces_Functions |
cparata | 0:671edf39d961 | 48 | * @brief This section provide a set of functions used to read and |
cparata | 0:671edf39d961 | 49 | * write a generic register of the device. |
cparata | 0:671edf39d961 | 50 | * MANDATORY: return 0 -> no Error. |
cparata | 0:671edf39d961 | 51 | * @{ |
cparata | 0:671edf39d961 | 52 | * |
cparata | 0:671edf39d961 | 53 | */ |
cparata | 0:671edf39d961 | 54 | |
cparata | 0:671edf39d961 | 55 | /** |
cparata | 0:671edf39d961 | 56 | * @brief Read generic device register |
cparata | 0:671edf39d961 | 57 | * |
cparata | 0:671edf39d961 | 58 | * @param ctx read / write interface definitions(ptr) |
cparata | 0:671edf39d961 | 59 | * @param reg register to read |
cparata | 0:671edf39d961 | 60 | * @param data pointer to buffer that store the data read(ptr) |
cparata | 0:671edf39d961 | 61 | * @param len number of consecutive register to read |
cparata | 0:671edf39d961 | 62 | * @retval interface status (MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 63 | * |
cparata | 0:671edf39d961 | 64 | */ |
cparata | 1:8562ae1a0534 | 65 | int32_t lis2mdl_read_reg(lis2mdl_ctx_t *ctx, uint8_t reg, uint8_t *data, |
cparata | 0:671edf39d961 | 66 | uint16_t len) |
cparata | 0:671edf39d961 | 67 | { |
cparata | 1:8562ae1a0534 | 68 | int32_t ret; |
cparata | 1:8562ae1a0534 | 69 | ret = ctx->read_reg(ctx->handle, reg, data, len); |
cparata | 1:8562ae1a0534 | 70 | return ret; |
cparata | 0:671edf39d961 | 71 | } |
cparata | 0:671edf39d961 | 72 | |
cparata | 0:671edf39d961 | 73 | /** |
cparata | 0:671edf39d961 | 74 | * @brief Write generic device register |
cparata | 0:671edf39d961 | 75 | * |
cparata | 0:671edf39d961 | 76 | * @param ctx read / write interface definitions(ptr) |
cparata | 0:671edf39d961 | 77 | * @param reg register to write |
cparata | 0:671edf39d961 | 78 | * @param data pointer to data to write in register reg(ptr) |
cparata | 0:671edf39d961 | 79 | * @param len number of consecutive register to write |
cparata | 0:671edf39d961 | 80 | * @retval interface status (MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 81 | * |
cparata | 0:671edf39d961 | 82 | */ |
cparata | 1:8562ae1a0534 | 83 | int32_t lis2mdl_write_reg(lis2mdl_ctx_t *ctx, uint8_t reg, uint8_t *data, |
cparata | 0:671edf39d961 | 84 | uint16_t len) |
cparata | 0:671edf39d961 | 85 | { |
cparata | 1:8562ae1a0534 | 86 | int32_t ret; |
cparata | 1:8562ae1a0534 | 87 | ret = ctx->write_reg(ctx->handle, reg, data, len); |
cparata | 1:8562ae1a0534 | 88 | return ret; |
cparata | 0:671edf39d961 | 89 | } |
cparata | 0:671edf39d961 | 90 | |
cparata | 0:671edf39d961 | 91 | /** |
cparata | 0:671edf39d961 | 92 | * @} |
cparata | 0:671edf39d961 | 93 | * |
cparata | 0:671edf39d961 | 94 | */ |
cparata | 0:671edf39d961 | 95 | |
cparata | 1:8562ae1a0534 | 96 | /** |
cparata | 1:8562ae1a0534 | 97 | * @defgroup LIS2MDL_Sensitivity |
cparata | 1:8562ae1a0534 | 98 | * @brief These functions convert raw-data into engineering units. |
cparata | 1:8562ae1a0534 | 99 | * @{ |
cparata | 1:8562ae1a0534 | 100 | * |
cparata | 1:8562ae1a0534 | 101 | */ |
cparata | 0:671edf39d961 | 102 | float_t lis2mdl_from_lsb_to_mgauss(int16_t lsb) |
cparata | 0:671edf39d961 | 103 | { |
cparata | 1:8562ae1a0534 | 104 | return ((float_t)lsb * 1.5f); |
cparata | 0:671edf39d961 | 105 | } |
cparata | 0:671edf39d961 | 106 | |
cparata | 0:671edf39d961 | 107 | float_t lis2mdl_from_lsb_to_celsius(int16_t lsb) |
cparata | 0:671edf39d961 | 108 | { |
cparata | 1:8562ae1a0534 | 109 | return (((float_t)lsb / 8.0f) + 25.0f); |
cparata | 0:671edf39d961 | 110 | } |
cparata | 0:671edf39d961 | 111 | |
cparata | 0:671edf39d961 | 112 | /** |
cparata | 0:671edf39d961 | 113 | * @} |
cparata | 0:671edf39d961 | 114 | * |
cparata | 0:671edf39d961 | 115 | */ |
cparata | 0:671edf39d961 | 116 | |
cparata | 0:671edf39d961 | 117 | /** |
cparata | 0:671edf39d961 | 118 | * @defgroup LIS2MDL_data_generation |
cparata | 0:671edf39d961 | 119 | * @brief This section group all the functions concerning |
cparata | 0:671edf39d961 | 120 | * data generation |
cparata | 0:671edf39d961 | 121 | * @{ |
cparata | 0:671edf39d961 | 122 | * |
cparata | 0:671edf39d961 | 123 | */ |
cparata | 0:671edf39d961 | 124 | |
cparata | 0:671edf39d961 | 125 | /** |
cparata | 0:671edf39d961 | 126 | * @brief These registers comprise a 3 group of 16-bit number and represent |
cparata | 0:671edf39d961 | 127 | * hard-iron offset in order to compensate environmental effects. |
cparata | 0:671edf39d961 | 128 | * Data format is the same of output data raw: two’s complement |
cparata | 0:671edf39d961 | 129 | * with 1LSb = 1.5mG. These values act on the magnetic output data |
cparata | 0:671edf39d961 | 130 | * value in order to delete the environmental offset.[set] |
cparata | 0:671edf39d961 | 131 | * |
cparata | 0:671edf39d961 | 132 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 133 | * @param buff buffer that contains data to write |
cparata | 0:671edf39d961 | 134 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 135 | * |
cparata | 0:671edf39d961 | 136 | */ |
cparata | 0:671edf39d961 | 137 | int32_t lis2mdl_mag_user_offset_set(lis2mdl_ctx_t *ctx, uint8_t *buff) |
cparata | 0:671edf39d961 | 138 | { |
cparata | 1:8562ae1a0534 | 139 | int32_t ret; |
cparata | 1:8562ae1a0534 | 140 | ret = lis2mdl_write_reg(ctx, LIS2MDL_OFFSET_X_REG_L, buff, 6); |
cparata | 1:8562ae1a0534 | 141 | return ret; |
cparata | 0:671edf39d961 | 142 | } |
cparata | 0:671edf39d961 | 143 | |
cparata | 0:671edf39d961 | 144 | /** |
cparata | 0:671edf39d961 | 145 | * @brief These registers comprise a 3 group of 16-bit number and represent |
cparata | 0:671edf39d961 | 146 | * hard-iron offset in order to compensate environmental effects. |
cparata | 0:671edf39d961 | 147 | * Data format is the same of output data raw: two’s complement |
cparata | 0:671edf39d961 | 148 | * with 1LSb = 1.5mG. These values act on the magnetic output data |
cparata | 0:671edf39d961 | 149 | * value in order to delete the environmental offset.[get] |
cparata | 0:671edf39d961 | 150 | * |
cparata | 0:671edf39d961 | 151 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 152 | * @param buff that stores data read |
cparata | 0:671edf39d961 | 153 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 154 | * |
cparata | 0:671edf39d961 | 155 | */ |
cparata | 0:671edf39d961 | 156 | int32_t lis2mdl_mag_user_offset_get(lis2mdl_ctx_t *ctx, uint8_t *buff) |
cparata | 0:671edf39d961 | 157 | { |
cparata | 1:8562ae1a0534 | 158 | int32_t ret; |
cparata | 1:8562ae1a0534 | 159 | ret = lis2mdl_read_reg(ctx, LIS2MDL_OFFSET_X_REG_L, buff, 6); |
cparata | 1:8562ae1a0534 | 160 | return ret; |
cparata | 0:671edf39d961 | 161 | } |
cparata | 0:671edf39d961 | 162 | |
cparata | 0:671edf39d961 | 163 | /** |
cparata | 0:671edf39d961 | 164 | * @brief Operating mode selection.[set] |
cparata | 0:671edf39d961 | 165 | * |
cparata | 0:671edf39d961 | 166 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 167 | * @param val change the values of md in reg CFG_REG_A |
cparata | 0:671edf39d961 | 168 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 169 | * |
cparata | 0:671edf39d961 | 170 | */ |
cparata | 0:671edf39d961 | 171 | int32_t lis2mdl_operating_mode_set(lis2mdl_ctx_t *ctx, lis2mdl_md_t val) |
cparata | 0:671edf39d961 | 172 | { |
cparata | 1:8562ae1a0534 | 173 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 174 | int32_t ret; |
cparata | 1:8562ae1a0534 | 175 | |
cparata | 1:8562ae1a0534 | 176 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 177 | |
cparata | 1:8562ae1a0534 | 178 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 179 | reg.md = (uint8_t)val; |
cparata | 1:8562ae1a0534 | 180 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 181 | } |
cparata | 1:8562ae1a0534 | 182 | |
cparata | 1:8562ae1a0534 | 183 | return ret; |
cparata | 0:671edf39d961 | 184 | } |
cparata | 0:671edf39d961 | 185 | |
cparata | 0:671edf39d961 | 186 | /** |
cparata | 0:671edf39d961 | 187 | * @brief Operating mode selection.[get] |
cparata | 0:671edf39d961 | 188 | * |
cparata | 0:671edf39d961 | 189 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 190 | * @param val Get the values of md in reg CFG_REG_A.(ptr) |
cparata | 0:671edf39d961 | 191 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 192 | * |
cparata | 0:671edf39d961 | 193 | */ |
cparata | 0:671edf39d961 | 194 | int32_t lis2mdl_operating_mode_get(lis2mdl_ctx_t *ctx, lis2mdl_md_t *val) |
cparata | 0:671edf39d961 | 195 | { |
cparata | 1:8562ae1a0534 | 196 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 197 | int32_t ret; |
cparata | 0:671edf39d961 | 198 | |
cparata | 1:8562ae1a0534 | 199 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 200 | switch (reg.md) { |
cparata | 1:8562ae1a0534 | 201 | case LIS2MDL_POWER_DOWN: |
cparata | 1:8562ae1a0534 | 202 | *val = LIS2MDL_POWER_DOWN; |
cparata | 1:8562ae1a0534 | 203 | break; |
cparata | 1:8562ae1a0534 | 204 | case LIS2MDL_CONTINUOUS_MODE: |
cparata | 1:8562ae1a0534 | 205 | *val = LIS2MDL_CONTINUOUS_MODE; |
cparata | 1:8562ae1a0534 | 206 | break; |
cparata | 1:8562ae1a0534 | 207 | case LIS2MDL_SINGLE_TRIGGER: |
cparata | 1:8562ae1a0534 | 208 | *val = LIS2MDL_SINGLE_TRIGGER; |
cparata | 1:8562ae1a0534 | 209 | break; |
cparata | 1:8562ae1a0534 | 210 | default: |
cparata | 1:8562ae1a0534 | 211 | *val = LIS2MDL_POWER_DOWN; |
cparata | 1:8562ae1a0534 | 212 | break; |
cparata | 1:8562ae1a0534 | 213 | } |
cparata | 0:671edf39d961 | 214 | |
cparata | 1:8562ae1a0534 | 215 | return ret; |
cparata | 0:671edf39d961 | 216 | } |
cparata | 0:671edf39d961 | 217 | |
cparata | 0:671edf39d961 | 218 | /** |
cparata | 1:8562ae1a0534 | 219 | * @brief Output data rate selection.[set] |
cparata | 0:671edf39d961 | 220 | * |
cparata | 0:671edf39d961 | 221 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 222 | * @param val change the values of odr in reg CFG_REG_A |
cparata | 0:671edf39d961 | 223 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 224 | * |
cparata | 0:671edf39d961 | 225 | */ |
cparata | 0:671edf39d961 | 226 | int32_t lis2mdl_data_rate_set(lis2mdl_ctx_t *ctx, lis2mdl_odr_t val) |
cparata | 0:671edf39d961 | 227 | { |
cparata | 1:8562ae1a0534 | 228 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 229 | int32_t ret; |
cparata | 1:8562ae1a0534 | 230 | |
cparata | 1:8562ae1a0534 | 231 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 232 | |
cparata | 1:8562ae1a0534 | 233 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 234 | reg.odr = (uint8_t)val; |
cparata | 1:8562ae1a0534 | 235 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 236 | } |
cparata | 1:8562ae1a0534 | 237 | |
cparata | 1:8562ae1a0534 | 238 | return ret; |
cparata | 0:671edf39d961 | 239 | } |
cparata | 0:671edf39d961 | 240 | |
cparata | 0:671edf39d961 | 241 | /** |
cparata | 1:8562ae1a0534 | 242 | * @brief Output data rate selection.[get] |
cparata | 0:671edf39d961 | 243 | * |
cparata | 0:671edf39d961 | 244 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 245 | * @param val Get the values of odr in reg CFG_REG_A.(ptr) |
cparata | 0:671edf39d961 | 246 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 247 | * |
cparata | 0:671edf39d961 | 248 | */ |
cparata | 0:671edf39d961 | 249 | int32_t lis2mdl_data_rate_get(lis2mdl_ctx_t *ctx, lis2mdl_odr_t *val) |
cparata | 0:671edf39d961 | 250 | { |
cparata | 1:8562ae1a0534 | 251 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 252 | int32_t ret; |
cparata | 0:671edf39d961 | 253 | |
cparata | 1:8562ae1a0534 | 254 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 255 | switch (reg.odr) { |
cparata | 1:8562ae1a0534 | 256 | case LIS2MDL_ODR_10Hz: |
cparata | 1:8562ae1a0534 | 257 | *val = LIS2MDL_ODR_10Hz; |
cparata | 1:8562ae1a0534 | 258 | break; |
cparata | 1:8562ae1a0534 | 259 | case LIS2MDL_ODR_20Hz: |
cparata | 1:8562ae1a0534 | 260 | *val = LIS2MDL_ODR_20Hz; |
cparata | 1:8562ae1a0534 | 261 | break; |
cparata | 1:8562ae1a0534 | 262 | case LIS2MDL_ODR_50Hz: |
cparata | 1:8562ae1a0534 | 263 | *val = LIS2MDL_ODR_50Hz; |
cparata | 1:8562ae1a0534 | 264 | break; |
cparata | 1:8562ae1a0534 | 265 | case LIS2MDL_ODR_100Hz: |
cparata | 1:8562ae1a0534 | 266 | *val = LIS2MDL_ODR_100Hz; |
cparata | 1:8562ae1a0534 | 267 | break; |
cparata | 1:8562ae1a0534 | 268 | default: |
cparata | 1:8562ae1a0534 | 269 | *val = LIS2MDL_ODR_10Hz; |
cparata | 1:8562ae1a0534 | 270 | break; |
cparata | 1:8562ae1a0534 | 271 | } |
cparata | 1:8562ae1a0534 | 272 | return ret; |
cparata | 0:671edf39d961 | 273 | } |
cparata | 0:671edf39d961 | 274 | |
cparata | 0:671edf39d961 | 275 | /** |
cparata | 0:671edf39d961 | 276 | * @brief Enables high-resolution/low-power mode.[set] |
cparata | 0:671edf39d961 | 277 | * |
cparata | 0:671edf39d961 | 278 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 279 | * @param val change the values of lp in reg CFG_REG_A |
cparata | 0:671edf39d961 | 280 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 281 | * |
cparata | 0:671edf39d961 | 282 | */ |
cparata | 0:671edf39d961 | 283 | int32_t lis2mdl_power_mode_set(lis2mdl_ctx_t *ctx, lis2mdl_lp_t val) |
cparata | 0:671edf39d961 | 284 | { |
cparata | 1:8562ae1a0534 | 285 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 286 | int32_t ret; |
cparata | 1:8562ae1a0534 | 287 | |
cparata | 1:8562ae1a0534 | 288 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 289 | |
cparata | 1:8562ae1a0534 | 290 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 291 | reg.lp = (uint8_t)val; |
cparata | 1:8562ae1a0534 | 292 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 293 | } |
cparata | 1:8562ae1a0534 | 294 | |
cparata | 1:8562ae1a0534 | 295 | return ret; |
cparata | 0:671edf39d961 | 296 | } |
cparata | 0:671edf39d961 | 297 | |
cparata | 0:671edf39d961 | 298 | /** |
cparata | 0:671edf39d961 | 299 | * @brief Enables high-resolution/low-power mode.[get] |
cparata | 0:671edf39d961 | 300 | * |
cparata | 0:671edf39d961 | 301 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 302 | * @param val Get the values of lp in reg CFG_REG_A.(ptr) |
cparata | 0:671edf39d961 | 303 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 304 | * |
cparata | 0:671edf39d961 | 305 | */ |
cparata | 0:671edf39d961 | 306 | int32_t lis2mdl_power_mode_get(lis2mdl_ctx_t *ctx, lis2mdl_lp_t *val) |
cparata | 0:671edf39d961 | 307 | { |
cparata | 1:8562ae1a0534 | 308 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 309 | int32_t ret; |
cparata | 0:671edf39d961 | 310 | |
cparata | 1:8562ae1a0534 | 311 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 312 | switch (reg.lp) { |
cparata | 1:8562ae1a0534 | 313 | case LIS2MDL_HIGH_RESOLUTION: |
cparata | 1:8562ae1a0534 | 314 | *val = LIS2MDL_HIGH_RESOLUTION; |
cparata | 1:8562ae1a0534 | 315 | break; |
cparata | 1:8562ae1a0534 | 316 | case LIS2MDL_LOW_POWER: |
cparata | 1:8562ae1a0534 | 317 | *val = LIS2MDL_LOW_POWER; |
cparata | 1:8562ae1a0534 | 318 | break; |
cparata | 1:8562ae1a0534 | 319 | default: |
cparata | 1:8562ae1a0534 | 320 | *val = LIS2MDL_HIGH_RESOLUTION; |
cparata | 1:8562ae1a0534 | 321 | break; |
cparata | 1:8562ae1a0534 | 322 | } |
cparata | 1:8562ae1a0534 | 323 | return ret; |
cparata | 0:671edf39d961 | 324 | } |
cparata | 0:671edf39d961 | 325 | |
cparata | 0:671edf39d961 | 326 | /** |
cparata | 1:8562ae1a0534 | 327 | * @brief Enables the magnetometer temperature compensation.[set] |
cparata | 0:671edf39d961 | 328 | * |
cparata | 0:671edf39d961 | 329 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 330 | * @param val change the values of comp_temp_en in reg CFG_REG_A |
cparata | 0:671edf39d961 | 331 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 332 | * |
cparata | 0:671edf39d961 | 333 | */ |
cparata | 0:671edf39d961 | 334 | int32_t lis2mdl_offset_temp_comp_set(lis2mdl_ctx_t *ctx, uint8_t val) |
cparata | 0:671edf39d961 | 335 | { |
cparata | 1:8562ae1a0534 | 336 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 337 | int32_t ret; |
cparata | 1:8562ae1a0534 | 338 | |
cparata | 1:8562ae1a0534 | 339 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 340 | |
cparata | 1:8562ae1a0534 | 341 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 342 | reg.comp_temp_en = val; |
cparata | 1:8562ae1a0534 | 343 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 344 | } |
cparata | 1:8562ae1a0534 | 345 | |
cparata | 1:8562ae1a0534 | 346 | return ret; |
cparata | 0:671edf39d961 | 347 | } |
cparata | 0:671edf39d961 | 348 | |
cparata | 0:671edf39d961 | 349 | /** |
cparata | 0:671edf39d961 | 350 | * @brief Enables the magnetometer temperature compensation.[get] |
cparata | 0:671edf39d961 | 351 | * |
cparata | 0:671edf39d961 | 352 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 353 | * @param val change the values of comp_temp_en in reg CFG_REG_A.(ptr) |
cparata | 0:671edf39d961 | 354 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 355 | * |
cparata | 0:671edf39d961 | 356 | */ |
cparata | 0:671edf39d961 | 357 | int32_t lis2mdl_offset_temp_comp_get(lis2mdl_ctx_t *ctx, uint8_t *val) |
cparata | 0:671edf39d961 | 358 | { |
cparata | 1:8562ae1a0534 | 359 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 360 | int32_t ret; |
cparata | 0:671edf39d961 | 361 | |
cparata | 1:8562ae1a0534 | 362 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 363 | *val = reg.comp_temp_en; |
cparata | 0:671edf39d961 | 364 | |
cparata | 1:8562ae1a0534 | 365 | return ret; |
cparata | 0:671edf39d961 | 366 | } |
cparata | 0:671edf39d961 | 367 | |
cparata | 0:671edf39d961 | 368 | /** |
cparata | 0:671edf39d961 | 369 | * @brief Low-pass bandwidth selection.[set] |
cparata | 0:671edf39d961 | 370 | * |
cparata | 0:671edf39d961 | 371 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 372 | * @param val change the values of lpf in reg CFG_REG_B |
cparata | 0:671edf39d961 | 373 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 374 | * |
cparata | 0:671edf39d961 | 375 | */ |
cparata | 0:671edf39d961 | 376 | int32_t lis2mdl_low_pass_bandwidth_set(lis2mdl_ctx_t *ctx, |
cparata | 0:671edf39d961 | 377 | lis2mdl_lpf_t val) |
cparata | 0:671edf39d961 | 378 | { |
cparata | 1:8562ae1a0534 | 379 | lis2mdl_cfg_reg_b_t reg; |
cparata | 1:8562ae1a0534 | 380 | int32_t ret; |
cparata | 1:8562ae1a0534 | 381 | |
cparata | 1:8562ae1a0534 | 382 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 383 | |
cparata | 1:8562ae1a0534 | 384 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 385 | reg.lpf = (uint8_t)val; |
cparata | 1:8562ae1a0534 | 386 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 387 | } |
cparata | 1:8562ae1a0534 | 388 | |
cparata | 1:8562ae1a0534 | 389 | return ret; |
cparata | 0:671edf39d961 | 390 | } |
cparata | 0:671edf39d961 | 391 | |
cparata | 0:671edf39d961 | 392 | /** |
cparata | 0:671edf39d961 | 393 | * @brief Low-pass bandwidth selection.[get] |
cparata | 0:671edf39d961 | 394 | * |
cparata | 0:671edf39d961 | 395 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 396 | * @param val Get the values of lpf in reg CFG_REG_B.(ptr) |
cparata | 0:671edf39d961 | 397 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 398 | * |
cparata | 0:671edf39d961 | 399 | */ |
cparata | 0:671edf39d961 | 400 | int32_t lis2mdl_low_pass_bandwidth_get(lis2mdl_ctx_t *ctx, |
cparata | 0:671edf39d961 | 401 | lis2mdl_lpf_t *val) |
cparata | 0:671edf39d961 | 402 | { |
cparata | 1:8562ae1a0534 | 403 | lis2mdl_cfg_reg_b_t reg; |
cparata | 1:8562ae1a0534 | 404 | int32_t ret; |
cparata | 0:671edf39d961 | 405 | |
cparata | 1:8562ae1a0534 | 406 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 407 | switch (reg.lpf) { |
cparata | 1:8562ae1a0534 | 408 | case LIS2MDL_ODR_DIV_2: |
cparata | 1:8562ae1a0534 | 409 | *val = LIS2MDL_ODR_DIV_2; |
cparata | 1:8562ae1a0534 | 410 | break; |
cparata | 1:8562ae1a0534 | 411 | case LIS2MDL_ODR_DIV_4: |
cparata | 1:8562ae1a0534 | 412 | *val = LIS2MDL_ODR_DIV_4; |
cparata | 1:8562ae1a0534 | 413 | break; |
cparata | 1:8562ae1a0534 | 414 | default: |
cparata | 1:8562ae1a0534 | 415 | *val = LIS2MDL_ODR_DIV_2; |
cparata | 1:8562ae1a0534 | 416 | break; |
cparata | 1:8562ae1a0534 | 417 | } |
cparata | 1:8562ae1a0534 | 418 | return ret; |
cparata | 0:671edf39d961 | 419 | } |
cparata | 0:671edf39d961 | 420 | |
cparata | 0:671edf39d961 | 421 | /** |
cparata | 0:671edf39d961 | 422 | * @brief Reset mode.[set] |
cparata | 0:671edf39d961 | 423 | * |
cparata | 0:671edf39d961 | 424 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 425 | * @param val change the values of set_rst in reg CFG_REG_B |
cparata | 0:671edf39d961 | 426 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 427 | * |
cparata | 0:671edf39d961 | 428 | */ |
cparata | 0:671edf39d961 | 429 | int32_t lis2mdl_set_rst_mode_set(lis2mdl_ctx_t *ctx, lis2mdl_set_rst_t val) |
cparata | 0:671edf39d961 | 430 | { |
cparata | 1:8562ae1a0534 | 431 | lis2mdl_cfg_reg_b_t reg; |
cparata | 1:8562ae1a0534 | 432 | int32_t ret; |
cparata | 1:8562ae1a0534 | 433 | |
cparata | 1:8562ae1a0534 | 434 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 435 | |
cparata | 1:8562ae1a0534 | 436 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 437 | reg.set_rst = (uint8_t)val; |
cparata | 1:8562ae1a0534 | 438 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 439 | } |
cparata | 1:8562ae1a0534 | 440 | |
cparata | 1:8562ae1a0534 | 441 | return ret; |
cparata | 0:671edf39d961 | 442 | } |
cparata | 0:671edf39d961 | 443 | |
cparata | 0:671edf39d961 | 444 | /** |
cparata | 0:671edf39d961 | 445 | * @brief Reset mode.[get] |
cparata | 0:671edf39d961 | 446 | * |
cparata | 0:671edf39d961 | 447 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 448 | * @param val Get the values of set_rst in reg CFG_REG_B.(ptr) |
cparata | 0:671edf39d961 | 449 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 450 | * |
cparata | 0:671edf39d961 | 451 | */ |
cparata | 0:671edf39d961 | 452 | int32_t lis2mdl_set_rst_mode_get(lis2mdl_ctx_t *ctx, lis2mdl_set_rst_t *val) |
cparata | 0:671edf39d961 | 453 | { |
cparata | 1:8562ae1a0534 | 454 | lis2mdl_cfg_reg_b_t reg; |
cparata | 1:8562ae1a0534 | 455 | int32_t ret; |
cparata | 0:671edf39d961 | 456 | |
cparata | 1:8562ae1a0534 | 457 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 458 | switch (reg.set_rst) { |
cparata | 1:8562ae1a0534 | 459 | case LIS2MDL_SET_SENS_ODR_DIV_63: |
cparata | 1:8562ae1a0534 | 460 | *val = LIS2MDL_SET_SENS_ODR_DIV_63; |
cparata | 1:8562ae1a0534 | 461 | break; |
cparata | 1:8562ae1a0534 | 462 | case LIS2MDL_SENS_OFF_CANC_EVERY_ODR: |
cparata | 1:8562ae1a0534 | 463 | *val = LIS2MDL_SENS_OFF_CANC_EVERY_ODR; |
cparata | 1:8562ae1a0534 | 464 | break; |
cparata | 1:8562ae1a0534 | 465 | case LIS2MDL_SET_SENS_ONLY_AT_POWER_ON: |
cparata | 1:8562ae1a0534 | 466 | *val = LIS2MDL_SET_SENS_ONLY_AT_POWER_ON; |
cparata | 1:8562ae1a0534 | 467 | break; |
cparata | 1:8562ae1a0534 | 468 | default: |
cparata | 1:8562ae1a0534 | 469 | *val = LIS2MDL_SET_SENS_ODR_DIV_63; |
cparata | 1:8562ae1a0534 | 470 | break; |
cparata | 1:8562ae1a0534 | 471 | } |
cparata | 1:8562ae1a0534 | 472 | return ret; |
cparata | 0:671edf39d961 | 473 | } |
cparata | 0:671edf39d961 | 474 | |
cparata | 0:671edf39d961 | 475 | /** |
cparata | 1:8562ae1a0534 | 476 | * @brief Enables offset cancellation in single measurement mode. |
cparata | 0:671edf39d961 | 477 | * The OFF_CANC bit must be set to 1 when enabling offset |
cparata | 0:671edf39d961 | 478 | * cancellation in single measurement mode this means a |
cparata | 0:671edf39d961 | 479 | * call function: set_rst_mode(SENS_OFF_CANC_EVERY_ODR) |
cparata | 0:671edf39d961 | 480 | * is need.[set] |
cparata | 0:671edf39d961 | 481 | * |
cparata | 0:671edf39d961 | 482 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 483 | * @param val change the values of off_canc_one_shot in reg CFG_REG_B |
cparata | 0:671edf39d961 | 484 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 485 | * |
cparata | 0:671edf39d961 | 486 | */ |
cparata | 0:671edf39d961 | 487 | int32_t lis2mdl_set_rst_sensor_single_set(lis2mdl_ctx_t *ctx, uint8_t val) |
cparata | 0:671edf39d961 | 488 | { |
cparata | 1:8562ae1a0534 | 489 | lis2mdl_cfg_reg_b_t reg; |
cparata | 1:8562ae1a0534 | 490 | int32_t ret; |
cparata | 1:8562ae1a0534 | 491 | |
cparata | 1:8562ae1a0534 | 492 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 493 | |
cparata | 1:8562ae1a0534 | 494 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 495 | reg.off_canc_one_shot = val; |
cparata | 1:8562ae1a0534 | 496 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 497 | } |
cparata | 1:8562ae1a0534 | 498 | |
cparata | 1:8562ae1a0534 | 499 | return ret; |
cparata | 0:671edf39d961 | 500 | } |
cparata | 0:671edf39d961 | 501 | |
cparata | 0:671edf39d961 | 502 | /** |
cparata | 1:8562ae1a0534 | 503 | * @brief Enables offset cancellation in single measurement mode. |
cparata | 0:671edf39d961 | 504 | * The OFF_CANC bit must be set to 1 when enabling offset |
cparata | 0:671edf39d961 | 505 | * cancellation in single measurement mode this means a |
cparata | 0:671edf39d961 | 506 | * call function: set_rst_mode(SENS_OFF_CANC_EVERY_ODR) |
cparata | 0:671edf39d961 | 507 | * is need.[get] |
cparata | 0:671edf39d961 | 508 | * |
cparata | 0:671edf39d961 | 509 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 510 | * @param val change the values of off_canc_one_shot in reg CFG_REG_B.(ptr) |
cparata | 0:671edf39d961 | 511 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 512 | * |
cparata | 0:671edf39d961 | 513 | */ |
cparata | 0:671edf39d961 | 514 | int32_t lis2mdl_set_rst_sensor_single_get(lis2mdl_ctx_t *ctx, uint8_t *val) |
cparata | 0:671edf39d961 | 515 | { |
cparata | 1:8562ae1a0534 | 516 | lis2mdl_cfg_reg_b_t reg; |
cparata | 1:8562ae1a0534 | 517 | int32_t ret; |
cparata | 0:671edf39d961 | 518 | |
cparata | 1:8562ae1a0534 | 519 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 520 | *val = reg.off_canc_one_shot; |
cparata | 0:671edf39d961 | 521 | |
cparata | 1:8562ae1a0534 | 522 | return ret; |
cparata | 0:671edf39d961 | 523 | } |
cparata | 0:671edf39d961 | 524 | |
cparata | 0:671edf39d961 | 525 | /** |
cparata | 0:671edf39d961 | 526 | * @brief Blockdataupdate.[set] |
cparata | 0:671edf39d961 | 527 | * |
cparata | 0:671edf39d961 | 528 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 529 | * @param val change the values of bdu in reg CFG_REG_C |
cparata | 0:671edf39d961 | 530 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 531 | * |
cparata | 0:671edf39d961 | 532 | */ |
cparata | 0:671edf39d961 | 533 | int32_t lis2mdl_block_data_update_set(lis2mdl_ctx_t *ctx, uint8_t val) |
cparata | 0:671edf39d961 | 534 | { |
cparata | 1:8562ae1a0534 | 535 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 536 | int32_t ret; |
cparata | 1:8562ae1a0534 | 537 | |
cparata | 1:8562ae1a0534 | 538 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 539 | |
cparata | 1:8562ae1a0534 | 540 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 541 | reg.bdu = val; |
cparata | 1:8562ae1a0534 | 542 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 543 | } |
cparata | 1:8562ae1a0534 | 544 | |
cparata | 1:8562ae1a0534 | 545 | return ret; |
cparata | 0:671edf39d961 | 546 | } |
cparata | 0:671edf39d961 | 547 | |
cparata | 0:671edf39d961 | 548 | /** |
cparata | 0:671edf39d961 | 549 | * @brief Blockdataupdate.[get] |
cparata | 0:671edf39d961 | 550 | * |
cparata | 0:671edf39d961 | 551 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 552 | * @param val change the values of bdu in reg CFG_REG_C.(ptr) |
cparata | 0:671edf39d961 | 553 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 554 | * |
cparata | 0:671edf39d961 | 555 | */ |
cparata | 0:671edf39d961 | 556 | int32_t lis2mdl_block_data_update_get(lis2mdl_ctx_t *ctx, uint8_t *val) |
cparata | 0:671edf39d961 | 557 | { |
cparata | 1:8562ae1a0534 | 558 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 559 | int32_t ret; |
cparata | 0:671edf39d961 | 560 | |
cparata | 1:8562ae1a0534 | 561 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 562 | *val = reg.bdu; |
cparata | 0:671edf39d961 | 563 | |
cparata | 1:8562ae1a0534 | 564 | return ret; |
cparata | 0:671edf39d961 | 565 | } |
cparata | 0:671edf39d961 | 566 | |
cparata | 0:671edf39d961 | 567 | /** |
cparata | 0:671edf39d961 | 568 | * @brief Magnetic set of data available.[get] |
cparata | 0:671edf39d961 | 569 | * |
cparata | 0:671edf39d961 | 570 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 571 | * @param val change the values of zyxda in reg STATUS_REG.(ptr) |
cparata | 0:671edf39d961 | 572 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 573 | * |
cparata | 0:671edf39d961 | 574 | */ |
cparata | 0:671edf39d961 | 575 | int32_t lis2mdl_mag_data_ready_get(lis2mdl_ctx_t *ctx, uint8_t *val) |
cparata | 0:671edf39d961 | 576 | { |
cparata | 1:8562ae1a0534 | 577 | lis2mdl_status_reg_t reg; |
cparata | 1:8562ae1a0534 | 578 | int32_t ret; |
cparata | 0:671edf39d961 | 579 | |
cparata | 1:8562ae1a0534 | 580 | ret = lis2mdl_read_reg(ctx, LIS2MDL_STATUS_REG, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 581 | *val = reg.zyxda; |
cparata | 0:671edf39d961 | 582 | |
cparata | 1:8562ae1a0534 | 583 | return ret; |
cparata | 0:671edf39d961 | 584 | } |
cparata | 0:671edf39d961 | 585 | |
cparata | 0:671edf39d961 | 586 | /** |
cparata | 0:671edf39d961 | 587 | * @brief Magnetic set of data overrun.[get] |
cparata | 0:671edf39d961 | 588 | * |
cparata | 0:671edf39d961 | 589 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 590 | * @param val change the values of zyxor in reg STATUS_REG.(ptr) |
cparata | 0:671edf39d961 | 591 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 592 | * |
cparata | 0:671edf39d961 | 593 | */ |
cparata | 0:671edf39d961 | 594 | int32_t lis2mdl_mag_data_ovr_get(lis2mdl_ctx_t *ctx, uint8_t *val) |
cparata | 0:671edf39d961 | 595 | { |
cparata | 1:8562ae1a0534 | 596 | lis2mdl_status_reg_t reg; |
cparata | 1:8562ae1a0534 | 597 | int32_t ret; |
cparata | 0:671edf39d961 | 598 | |
cparata | 1:8562ae1a0534 | 599 | ret = lis2mdl_read_reg(ctx, LIS2MDL_STATUS_REG, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 600 | *val = reg.zyxor; |
cparata | 0:671edf39d961 | 601 | |
cparata | 1:8562ae1a0534 | 602 | return ret; |
cparata | 0:671edf39d961 | 603 | } |
cparata | 0:671edf39d961 | 604 | |
cparata | 0:671edf39d961 | 605 | /** |
cparata | 0:671edf39d961 | 606 | * @brief Magnetic output value.[get] |
cparata | 0:671edf39d961 | 607 | * |
cparata | 0:671edf39d961 | 608 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 609 | * @param buff that stores data read |
cparata | 0:671edf39d961 | 610 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 611 | * |
cparata | 0:671edf39d961 | 612 | */ |
cparata | 0:671edf39d961 | 613 | int32_t lis2mdl_magnetic_raw_get(lis2mdl_ctx_t *ctx, uint8_t *buff) |
cparata | 0:671edf39d961 | 614 | { |
cparata | 1:8562ae1a0534 | 615 | int32_t ret; |
cparata | 1:8562ae1a0534 | 616 | ret = lis2mdl_read_reg(ctx, LIS2MDL_OUTX_L_REG, buff, 6); |
cparata | 1:8562ae1a0534 | 617 | return ret; |
cparata | 0:671edf39d961 | 618 | } |
cparata | 0:671edf39d961 | 619 | |
cparata | 0:671edf39d961 | 620 | /** |
cparata | 0:671edf39d961 | 621 | * @brief Temperature output value.[get] |
cparata | 0:671edf39d961 | 622 | * |
cparata | 0:671edf39d961 | 623 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 624 | * @param buff that stores data read |
cparata | 0:671edf39d961 | 625 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 626 | * |
cparata | 0:671edf39d961 | 627 | */ |
cparata | 0:671edf39d961 | 628 | int32_t lis2mdl_temperature_raw_get(lis2mdl_ctx_t *ctx, uint8_t *buff) |
cparata | 0:671edf39d961 | 629 | { |
cparata | 1:8562ae1a0534 | 630 | int32_t ret; |
cparata | 1:8562ae1a0534 | 631 | ret = lis2mdl_read_reg(ctx, LIS2MDL_TEMP_OUT_L_REG, buff, 2); |
cparata | 1:8562ae1a0534 | 632 | return ret; |
cparata | 0:671edf39d961 | 633 | } |
cparata | 0:671edf39d961 | 634 | |
cparata | 0:671edf39d961 | 635 | /** |
cparata | 0:671edf39d961 | 636 | * @} |
cparata | 0:671edf39d961 | 637 | * |
cparata | 0:671edf39d961 | 638 | */ |
cparata | 0:671edf39d961 | 639 | |
cparata | 0:671edf39d961 | 640 | /** |
cparata | 0:671edf39d961 | 641 | * @defgroup LIS2MDL_common |
cparata | 0:671edf39d961 | 642 | * @brief This section group common usefull functions |
cparata | 0:671edf39d961 | 643 | * @{ |
cparata | 0:671edf39d961 | 644 | * |
cparata | 0:671edf39d961 | 645 | */ |
cparata | 0:671edf39d961 | 646 | |
cparata | 0:671edf39d961 | 647 | /** |
cparata | 0:671edf39d961 | 648 | * @brief DeviceWhoamI.[get] |
cparata | 0:671edf39d961 | 649 | * |
cparata | 0:671edf39d961 | 650 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 651 | * @param buff that stores data read |
cparata | 0:671edf39d961 | 652 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 653 | * |
cparata | 0:671edf39d961 | 654 | */ |
cparata | 0:671edf39d961 | 655 | int32_t lis2mdl_device_id_get(lis2mdl_ctx_t *ctx, uint8_t *buff) |
cparata | 0:671edf39d961 | 656 | { |
cparata | 1:8562ae1a0534 | 657 | int32_t ret; |
cparata | 1:8562ae1a0534 | 658 | ret = lis2mdl_read_reg(ctx, LIS2MDL_WHO_AM_I, buff, 1); |
cparata | 1:8562ae1a0534 | 659 | return ret; |
cparata | 0:671edf39d961 | 660 | } |
cparata | 0:671edf39d961 | 661 | |
cparata | 0:671edf39d961 | 662 | /** |
cparata | 0:671edf39d961 | 663 | * @brief Software reset. Restore the default values in user registers.[set] |
cparata | 0:671edf39d961 | 664 | * |
cparata | 0:671edf39d961 | 665 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 666 | * @param val change the values of soft_rst in reg CFG_REG_A |
cparata | 0:671edf39d961 | 667 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 668 | * |
cparata | 0:671edf39d961 | 669 | */ |
cparata | 0:671edf39d961 | 670 | int32_t lis2mdl_reset_set(lis2mdl_ctx_t *ctx, uint8_t val) |
cparata | 0:671edf39d961 | 671 | { |
cparata | 1:8562ae1a0534 | 672 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 673 | int32_t ret; |
cparata | 1:8562ae1a0534 | 674 | |
cparata | 1:8562ae1a0534 | 675 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 676 | |
cparata | 1:8562ae1a0534 | 677 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 678 | reg.soft_rst = val; |
cparata | 1:8562ae1a0534 | 679 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 680 | } |
cparata | 1:8562ae1a0534 | 681 | |
cparata | 1:8562ae1a0534 | 682 | return ret; |
cparata | 0:671edf39d961 | 683 | } |
cparata | 0:671edf39d961 | 684 | |
cparata | 0:671edf39d961 | 685 | /** |
cparata | 0:671edf39d961 | 686 | * @brief Software reset. Restore the default values in user registers.[get] |
cparata | 0:671edf39d961 | 687 | * |
cparata | 0:671edf39d961 | 688 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 689 | * @param val change the values of soft_rst in reg CFG_REG_A.(ptr) |
cparata | 0:671edf39d961 | 690 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 691 | * |
cparata | 0:671edf39d961 | 692 | */ |
cparata | 0:671edf39d961 | 693 | int32_t lis2mdl_reset_get(lis2mdl_ctx_t *ctx, uint8_t *val) |
cparata | 0:671edf39d961 | 694 | { |
cparata | 1:8562ae1a0534 | 695 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 696 | int32_t ret; |
cparata | 0:671edf39d961 | 697 | |
cparata | 1:8562ae1a0534 | 698 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 699 | *val = reg.soft_rst; |
cparata | 0:671edf39d961 | 700 | |
cparata | 1:8562ae1a0534 | 701 | return ret; |
cparata | 0:671edf39d961 | 702 | } |
cparata | 0:671edf39d961 | 703 | |
cparata | 0:671edf39d961 | 704 | /** |
cparata | 1:8562ae1a0534 | 705 | * @brief Reboot memory content. Reload the calibration parameters.[set] |
cparata | 0:671edf39d961 | 706 | * |
cparata | 0:671edf39d961 | 707 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 708 | * @param val change the values of reboot in reg CFG_REG_A |
cparata | 0:671edf39d961 | 709 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 710 | * |
cparata | 0:671edf39d961 | 711 | */ |
cparata | 0:671edf39d961 | 712 | int32_t lis2mdl_boot_set(lis2mdl_ctx_t *ctx, uint8_t val) |
cparata | 0:671edf39d961 | 713 | { |
cparata | 1:8562ae1a0534 | 714 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 715 | int32_t ret; |
cparata | 1:8562ae1a0534 | 716 | |
cparata | 1:8562ae1a0534 | 717 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 718 | |
cparata | 1:8562ae1a0534 | 719 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 720 | reg.reboot = val; |
cparata | 1:8562ae1a0534 | 721 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 722 | } |
cparata | 1:8562ae1a0534 | 723 | |
cparata | 1:8562ae1a0534 | 724 | return ret; |
cparata | 0:671edf39d961 | 725 | } |
cparata | 0:671edf39d961 | 726 | |
cparata | 0:671edf39d961 | 727 | /** |
cparata | 0:671edf39d961 | 728 | * @brief Reboot memory content. Reload the calibration parameters.[get] |
cparata | 0:671edf39d961 | 729 | * |
cparata | 0:671edf39d961 | 730 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 731 | * @param val change the values of reboot in reg CFG_REG_A.(ptr) |
cparata | 0:671edf39d961 | 732 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 733 | * |
cparata | 0:671edf39d961 | 734 | */ |
cparata | 0:671edf39d961 | 735 | int32_t lis2mdl_boot_get(lis2mdl_ctx_t *ctx, uint8_t *val) |
cparata | 0:671edf39d961 | 736 | { |
cparata | 1:8562ae1a0534 | 737 | lis2mdl_cfg_reg_a_t reg; |
cparata | 1:8562ae1a0534 | 738 | int32_t ret; |
cparata | 0:671edf39d961 | 739 | |
cparata | 1:8562ae1a0534 | 740 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_A, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 741 | *val = reg.reboot; |
cparata | 0:671edf39d961 | 742 | |
cparata | 1:8562ae1a0534 | 743 | return ret; |
cparata | 0:671edf39d961 | 744 | } |
cparata | 0:671edf39d961 | 745 | |
cparata | 0:671edf39d961 | 746 | /** |
cparata | 0:671edf39d961 | 747 | * @brief Selftest.[set] |
cparata | 0:671edf39d961 | 748 | * |
cparata | 0:671edf39d961 | 749 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 750 | * @param val change the values of self_test in reg CFG_REG_C |
cparata | 0:671edf39d961 | 751 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 752 | * |
cparata | 0:671edf39d961 | 753 | */ |
cparata | 0:671edf39d961 | 754 | int32_t lis2mdl_self_test_set(lis2mdl_ctx_t *ctx, uint8_t val) |
cparata | 0:671edf39d961 | 755 | { |
cparata | 1:8562ae1a0534 | 756 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 757 | int32_t ret; |
cparata | 1:8562ae1a0534 | 758 | |
cparata | 1:8562ae1a0534 | 759 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 760 | |
cparata | 1:8562ae1a0534 | 761 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 762 | reg.self_test = val; |
cparata | 1:8562ae1a0534 | 763 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 764 | } |
cparata | 1:8562ae1a0534 | 765 | |
cparata | 1:8562ae1a0534 | 766 | return ret; |
cparata | 0:671edf39d961 | 767 | } |
cparata | 0:671edf39d961 | 768 | |
cparata | 0:671edf39d961 | 769 | /** |
cparata | 0:671edf39d961 | 770 | * @brief Selftest.[get] |
cparata | 0:671edf39d961 | 771 | * |
cparata | 0:671edf39d961 | 772 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 773 | * @param val change the values of self_test in reg CFG_REG_C.(ptr) |
cparata | 0:671edf39d961 | 774 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 775 | * |
cparata | 0:671edf39d961 | 776 | */ |
cparata | 0:671edf39d961 | 777 | int32_t lis2mdl_self_test_get(lis2mdl_ctx_t *ctx, uint8_t *val) |
cparata | 0:671edf39d961 | 778 | { |
cparata | 1:8562ae1a0534 | 779 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 780 | int32_t ret; |
cparata | 0:671edf39d961 | 781 | |
cparata | 1:8562ae1a0534 | 782 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 783 | *val = reg.self_test; |
cparata | 0:671edf39d961 | 784 | |
cparata | 1:8562ae1a0534 | 785 | return ret; |
cparata | 0:671edf39d961 | 786 | } |
cparata | 0:671edf39d961 | 787 | |
cparata | 0:671edf39d961 | 788 | /** |
cparata | 0:671edf39d961 | 789 | * @brief Big/Little Endian data selection.[set] |
cparata | 0:671edf39d961 | 790 | * |
cparata | 0:671edf39d961 | 791 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 792 | * @param val change the values of ble in reg CFG_REG_C |
cparata | 0:671edf39d961 | 793 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 794 | * |
cparata | 0:671edf39d961 | 795 | */ |
cparata | 0:671edf39d961 | 796 | int32_t lis2mdl_data_format_set(lis2mdl_ctx_t *ctx, lis2mdl_ble_t val) |
cparata | 0:671edf39d961 | 797 | { |
cparata | 1:8562ae1a0534 | 798 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 799 | int32_t ret; |
cparata | 1:8562ae1a0534 | 800 | |
cparata | 1:8562ae1a0534 | 801 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 802 | |
cparata | 1:8562ae1a0534 | 803 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 804 | reg.ble = (uint8_t)val; |
cparata | 1:8562ae1a0534 | 805 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 806 | } |
cparata | 1:8562ae1a0534 | 807 | |
cparata | 1:8562ae1a0534 | 808 | return ret; |
cparata | 0:671edf39d961 | 809 | } |
cparata | 0:671edf39d961 | 810 | |
cparata | 0:671edf39d961 | 811 | /** |
cparata | 0:671edf39d961 | 812 | * @brief Big/Little Endian data selection.[get] |
cparata | 0:671edf39d961 | 813 | * |
cparata | 0:671edf39d961 | 814 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 815 | * @param val Get the values of ble in reg CFG_REG_C.(ptr) |
cparata | 0:671edf39d961 | 816 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 817 | * |
cparata | 0:671edf39d961 | 818 | */ |
cparata | 0:671edf39d961 | 819 | int32_t lis2mdl_data_format_get(lis2mdl_ctx_t *ctx, lis2mdl_ble_t *val) |
cparata | 0:671edf39d961 | 820 | { |
cparata | 1:8562ae1a0534 | 821 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 822 | int32_t ret; |
cparata | 0:671edf39d961 | 823 | |
cparata | 1:8562ae1a0534 | 824 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 825 | switch (reg.ble) { |
cparata | 1:8562ae1a0534 | 826 | case LIS2MDL_LSB_AT_LOW_ADD: |
cparata | 1:8562ae1a0534 | 827 | *val = LIS2MDL_LSB_AT_LOW_ADD; |
cparata | 1:8562ae1a0534 | 828 | break; |
cparata | 1:8562ae1a0534 | 829 | case LIS2MDL_MSB_AT_LOW_ADD: |
cparata | 1:8562ae1a0534 | 830 | *val = LIS2MDL_MSB_AT_LOW_ADD; |
cparata | 1:8562ae1a0534 | 831 | break; |
cparata | 1:8562ae1a0534 | 832 | default: |
cparata | 1:8562ae1a0534 | 833 | *val = LIS2MDL_LSB_AT_LOW_ADD; |
cparata | 1:8562ae1a0534 | 834 | break; |
cparata | 1:8562ae1a0534 | 835 | } |
cparata | 1:8562ae1a0534 | 836 | return ret; |
cparata | 0:671edf39d961 | 837 | } |
cparata | 0:671edf39d961 | 838 | |
cparata | 0:671edf39d961 | 839 | /** |
cparata | 0:671edf39d961 | 840 | * @brief Info about device status.[get] |
cparata | 0:671edf39d961 | 841 | * |
cparata | 0:671edf39d961 | 842 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 843 | * @param val registers STATUS_REG.(ptr) |
cparata | 0:671edf39d961 | 844 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 845 | * |
cparata | 0:671edf39d961 | 846 | */ |
cparata | 0:671edf39d961 | 847 | int32_t lis2mdl_status_get(lis2mdl_ctx_t *ctx, lis2mdl_status_reg_t *val) |
cparata | 0:671edf39d961 | 848 | { |
cparata | 1:8562ae1a0534 | 849 | int32_t ret; |
cparata | 1:8562ae1a0534 | 850 | ret = lis2mdl_read_reg(ctx, LIS2MDL_STATUS_REG, (uint8_t *) val, 1); |
cparata | 1:8562ae1a0534 | 851 | return ret; |
cparata | 0:671edf39d961 | 852 | } |
cparata | 0:671edf39d961 | 853 | |
cparata | 0:671edf39d961 | 854 | /** |
cparata | 0:671edf39d961 | 855 | * @} |
cparata | 0:671edf39d961 | 856 | * |
cparata | 0:671edf39d961 | 857 | */ |
cparata | 0:671edf39d961 | 858 | |
cparata | 0:671edf39d961 | 859 | /** |
cparata | 0:671edf39d961 | 860 | * @defgroup LIS2MDL_interrupts |
cparata | 0:671edf39d961 | 861 | * @brief This section group all the functions that manage interrupts |
cparata | 0:671edf39d961 | 862 | * @{ |
cparata | 0:671edf39d961 | 863 | * |
cparata | 0:671edf39d961 | 864 | */ |
cparata | 0:671edf39d961 | 865 | |
cparata | 0:671edf39d961 | 866 | /** |
cparata | 0:671edf39d961 | 867 | * @brief The interrupt block recognition checks data after/before the |
cparata | 0:671edf39d961 | 868 | * hard-iron correction to discover the interrupt.[set] |
cparata | 0:671edf39d961 | 869 | * |
cparata | 0:671edf39d961 | 870 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 871 | * @param val change the values of int_on_dataoff in reg CFG_REG_B |
cparata | 0:671edf39d961 | 872 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 873 | * |
cparata | 0:671edf39d961 | 874 | */ |
cparata | 0:671edf39d961 | 875 | int32_t lis2mdl_offset_int_conf_set(lis2mdl_ctx_t *ctx, |
cparata | 0:671edf39d961 | 876 | lis2mdl_int_on_dataoff_t val) |
cparata | 0:671edf39d961 | 877 | { |
cparata | 1:8562ae1a0534 | 878 | lis2mdl_cfg_reg_b_t reg; |
cparata | 1:8562ae1a0534 | 879 | int32_t ret; |
cparata | 1:8562ae1a0534 | 880 | |
cparata | 1:8562ae1a0534 | 881 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 882 | |
cparata | 1:8562ae1a0534 | 883 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 884 | reg.int_on_dataoff = (uint8_t)val; |
cparata | 1:8562ae1a0534 | 885 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 886 | } |
cparata | 1:8562ae1a0534 | 887 | |
cparata | 1:8562ae1a0534 | 888 | return ret; |
cparata | 0:671edf39d961 | 889 | } |
cparata | 0:671edf39d961 | 890 | |
cparata | 0:671edf39d961 | 891 | /** |
cparata | 0:671edf39d961 | 892 | * @brief The interrupt block recognition checks data after/before the |
cparata | 0:671edf39d961 | 893 | * hard-iron correction to discover the interrupt.[get] |
cparata | 0:671edf39d961 | 894 | * |
cparata | 0:671edf39d961 | 895 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 896 | * @param val Get the values of int_on_dataoff in reg CFG_REG_B.(ptr) |
cparata | 0:671edf39d961 | 897 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 898 | * |
cparata | 0:671edf39d961 | 899 | */ |
cparata | 0:671edf39d961 | 900 | int32_t lis2mdl_offset_int_conf_get(lis2mdl_ctx_t *ctx, |
cparata | 0:671edf39d961 | 901 | lis2mdl_int_on_dataoff_t *val) |
cparata | 0:671edf39d961 | 902 | { |
cparata | 1:8562ae1a0534 | 903 | lis2mdl_cfg_reg_b_t reg; |
cparata | 1:8562ae1a0534 | 904 | int32_t ret; |
cparata | 0:671edf39d961 | 905 | |
cparata | 1:8562ae1a0534 | 906 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_B, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 907 | switch (reg.int_on_dataoff) { |
cparata | 1:8562ae1a0534 | 908 | case LIS2MDL_CHECK_BEFORE: |
cparata | 1:8562ae1a0534 | 909 | *val = LIS2MDL_CHECK_BEFORE; |
cparata | 1:8562ae1a0534 | 910 | break; |
cparata | 1:8562ae1a0534 | 911 | case LIS2MDL_CHECK_AFTER: |
cparata | 1:8562ae1a0534 | 912 | *val = LIS2MDL_CHECK_AFTER; |
cparata | 1:8562ae1a0534 | 913 | break; |
cparata | 1:8562ae1a0534 | 914 | default: |
cparata | 1:8562ae1a0534 | 915 | *val = LIS2MDL_CHECK_BEFORE; |
cparata | 1:8562ae1a0534 | 916 | break; |
cparata | 1:8562ae1a0534 | 917 | } |
cparata | 1:8562ae1a0534 | 918 | return ret; |
cparata | 0:671edf39d961 | 919 | } |
cparata | 0:671edf39d961 | 920 | |
cparata | 0:671edf39d961 | 921 | /** |
cparata | 0:671edf39d961 | 922 | * @brief Data-ready signal on INT_DRDY pin.[set] |
cparata | 0:671edf39d961 | 923 | * |
cparata | 0:671edf39d961 | 924 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 925 | * @param val change the values of drdy_on_pin in reg CFG_REG_C |
cparata | 0:671edf39d961 | 926 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 927 | * |
cparata | 0:671edf39d961 | 928 | */ |
cparata | 0:671edf39d961 | 929 | int32_t lis2mdl_drdy_on_pin_set(lis2mdl_ctx_t *ctx, uint8_t val) |
cparata | 0:671edf39d961 | 930 | { |
cparata | 1:8562ae1a0534 | 931 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 932 | int32_t ret; |
cparata | 1:8562ae1a0534 | 933 | |
cparata | 1:8562ae1a0534 | 934 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 935 | |
cparata | 1:8562ae1a0534 | 936 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 937 | reg.drdy_on_pin = val; |
cparata | 1:8562ae1a0534 | 938 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 939 | } |
cparata | 1:8562ae1a0534 | 940 | |
cparata | 1:8562ae1a0534 | 941 | return ret; |
cparata | 0:671edf39d961 | 942 | } |
cparata | 0:671edf39d961 | 943 | |
cparata | 0:671edf39d961 | 944 | /** |
cparata | 0:671edf39d961 | 945 | * @brief Data-ready signal on INT_DRDY pin.[get] |
cparata | 0:671edf39d961 | 946 | * |
cparata | 0:671edf39d961 | 947 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 948 | * @param val change the values of drdy_on_pin in reg CFG_REG_C.(ptr) |
cparata | 0:671edf39d961 | 949 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 950 | * |
cparata | 0:671edf39d961 | 951 | */ |
cparata | 0:671edf39d961 | 952 | int32_t lis2mdl_drdy_on_pin_get(lis2mdl_ctx_t *ctx, uint8_t *val) |
cparata | 0:671edf39d961 | 953 | { |
cparata | 1:8562ae1a0534 | 954 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 955 | int32_t ret; |
cparata | 0:671edf39d961 | 956 | |
cparata | 1:8562ae1a0534 | 957 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 958 | *val = reg.drdy_on_pin; |
cparata | 0:671edf39d961 | 959 | |
cparata | 1:8562ae1a0534 | 960 | return ret; |
cparata | 0:671edf39d961 | 961 | } |
cparata | 0:671edf39d961 | 962 | |
cparata | 0:671edf39d961 | 963 | /** |
cparata | 0:671edf39d961 | 964 | * @brief Interrupt signal on INT_DRDY pin.[set] |
cparata | 0:671edf39d961 | 965 | * |
cparata | 0:671edf39d961 | 966 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 967 | * @param val change the values of int_on_pin in reg CFG_REG_C |
cparata | 0:671edf39d961 | 968 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 969 | * |
cparata | 0:671edf39d961 | 970 | */ |
cparata | 0:671edf39d961 | 971 | int32_t lis2mdl_int_on_pin_set(lis2mdl_ctx_t *ctx, uint8_t val) |
cparata | 0:671edf39d961 | 972 | { |
cparata | 1:8562ae1a0534 | 973 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 974 | int32_t ret; |
cparata | 1:8562ae1a0534 | 975 | |
cparata | 1:8562ae1a0534 | 976 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 977 | |
cparata | 1:8562ae1a0534 | 978 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 979 | reg.int_on_pin = val; |
cparata | 1:8562ae1a0534 | 980 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 981 | } |
cparata | 1:8562ae1a0534 | 982 | |
cparata | 1:8562ae1a0534 | 983 | return ret; |
cparata | 0:671edf39d961 | 984 | } |
cparata | 0:671edf39d961 | 985 | |
cparata | 0:671edf39d961 | 986 | /** |
cparata | 0:671edf39d961 | 987 | * @brief Interrupt signal on INT_DRDY pin.[get] |
cparata | 0:671edf39d961 | 988 | * |
cparata | 0:671edf39d961 | 989 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 990 | * @param val change the values of int_on_pin in reg CFG_REG_C.(ptr) |
cparata | 0:671edf39d961 | 991 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 992 | * |
cparata | 0:671edf39d961 | 993 | */ |
cparata | 0:671edf39d961 | 994 | int32_t lis2mdl_int_on_pin_get(lis2mdl_ctx_t *ctx, uint8_t *val) |
cparata | 0:671edf39d961 | 995 | { |
cparata | 1:8562ae1a0534 | 996 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 997 | int32_t ret; |
cparata | 0:671edf39d961 | 998 | |
cparata | 1:8562ae1a0534 | 999 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 1000 | *val = reg.int_on_pin; |
cparata | 0:671edf39d961 | 1001 | |
cparata | 1:8562ae1a0534 | 1002 | return ret; |
cparata | 0:671edf39d961 | 1003 | } |
cparata | 0:671edf39d961 | 1004 | |
cparata | 0:671edf39d961 | 1005 | /** |
cparata | 0:671edf39d961 | 1006 | * @brief Interrupt generator configuration register.[set] |
cparata | 0:671edf39d961 | 1007 | * |
cparata | 0:671edf39d961 | 1008 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 1009 | * @param val registers INT_CRTL_REG.(ptr) |
cparata | 0:671edf39d961 | 1010 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 1011 | * |
cparata | 0:671edf39d961 | 1012 | */ |
cparata | 0:671edf39d961 | 1013 | int32_t lis2mdl_int_gen_conf_set(lis2mdl_ctx_t *ctx, |
cparata | 0:671edf39d961 | 1014 | lis2mdl_int_crtl_reg_t *val) |
cparata | 0:671edf39d961 | 1015 | { |
cparata | 1:8562ae1a0534 | 1016 | int32_t ret; |
cparata | 1:8562ae1a0534 | 1017 | ret = lis2mdl_write_reg(ctx, LIS2MDL_INT_CRTL_REG, (uint8_t *) val, 1); |
cparata | 1:8562ae1a0534 | 1018 | return ret; |
cparata | 0:671edf39d961 | 1019 | } |
cparata | 0:671edf39d961 | 1020 | |
cparata | 0:671edf39d961 | 1021 | /** |
cparata | 0:671edf39d961 | 1022 | * @brief Interrupt generator configuration register.[get] |
cparata | 0:671edf39d961 | 1023 | * |
cparata | 0:671edf39d961 | 1024 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 1025 | * @param val registers INT_CRTL_REG.(ptr) |
cparata | 0:671edf39d961 | 1026 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 1027 | * |
cparata | 0:671edf39d961 | 1028 | */ |
cparata | 0:671edf39d961 | 1029 | int32_t lis2mdl_int_gen_conf_get(lis2mdl_ctx_t *ctx, |
cparata | 0:671edf39d961 | 1030 | lis2mdl_int_crtl_reg_t *val) |
cparata | 0:671edf39d961 | 1031 | { |
cparata | 1:8562ae1a0534 | 1032 | int32_t ret; |
cparata | 1:8562ae1a0534 | 1033 | ret = lis2mdl_read_reg(ctx, LIS2MDL_INT_CRTL_REG, (uint8_t *) val, 1); |
cparata | 1:8562ae1a0534 | 1034 | return ret; |
cparata | 0:671edf39d961 | 1035 | } |
cparata | 0:671edf39d961 | 1036 | |
cparata | 0:671edf39d961 | 1037 | /** |
cparata | 0:671edf39d961 | 1038 | * @brief Interrupt generator source register.[get] |
cparata | 0:671edf39d961 | 1039 | * |
cparata | 0:671edf39d961 | 1040 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 1041 | * @param val registers INT_SOURCE_REG.(ptr) |
cparata | 0:671edf39d961 | 1042 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 1043 | * |
cparata | 0:671edf39d961 | 1044 | */ |
cparata | 0:671edf39d961 | 1045 | int32_t lis2mdl_int_gen_source_get(lis2mdl_ctx_t *ctx, |
cparata | 0:671edf39d961 | 1046 | lis2mdl_int_source_reg_t *val) |
cparata | 0:671edf39d961 | 1047 | { |
cparata | 1:8562ae1a0534 | 1048 | int32_t ret; |
cparata | 1:8562ae1a0534 | 1049 | ret = lis2mdl_read_reg(ctx, LIS2MDL_INT_SOURCE_REG, (uint8_t *) val, 1); |
cparata | 1:8562ae1a0534 | 1050 | return ret; |
cparata | 0:671edf39d961 | 1051 | } |
cparata | 0:671edf39d961 | 1052 | |
cparata | 0:671edf39d961 | 1053 | /** |
cparata | 0:671edf39d961 | 1054 | * @brief User-defined threshold value for xl interrupt event on generator. |
cparata | 0:671edf39d961 | 1055 | * Data format is the same of output data raw: two’s complement with |
cparata | 0:671edf39d961 | 1056 | * 1LSb = 1.5mG.[set] |
cparata | 0:671edf39d961 | 1057 | * |
cparata | 0:671edf39d961 | 1058 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 1059 | * @param buff that contains data to write |
cparata | 0:671edf39d961 | 1060 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 1061 | * |
cparata | 0:671edf39d961 | 1062 | */ |
cparata | 0:671edf39d961 | 1063 | int32_t lis2mdl_int_gen_treshold_set(lis2mdl_ctx_t *ctx, uint8_t *buff) |
cparata | 0:671edf39d961 | 1064 | { |
cparata | 1:8562ae1a0534 | 1065 | int32_t ret; |
cparata | 1:8562ae1a0534 | 1066 | ret = lis2mdl_write_reg(ctx, LIS2MDL_INT_THS_L_REG, buff, 2); |
cparata | 1:8562ae1a0534 | 1067 | return ret; |
cparata | 0:671edf39d961 | 1068 | } |
cparata | 0:671edf39d961 | 1069 | |
cparata | 0:671edf39d961 | 1070 | /** |
cparata | 0:671edf39d961 | 1071 | * @brief User-defined threshold value for xl interrupt event on generator. |
cparata | 0:671edf39d961 | 1072 | * Data format is the same of output data raw: two’s complement with |
cparata | 0:671edf39d961 | 1073 | * 1LSb = 1.5mG.[get] |
cparata | 0:671edf39d961 | 1074 | * |
cparata | 0:671edf39d961 | 1075 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 1076 | * @param buff that stores data read |
cparata | 0:671edf39d961 | 1077 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 1078 | * |
cparata | 0:671edf39d961 | 1079 | */ |
cparata | 0:671edf39d961 | 1080 | int32_t lis2mdl_int_gen_treshold_get(lis2mdl_ctx_t *ctx, uint8_t *buff) |
cparata | 0:671edf39d961 | 1081 | { |
cparata | 1:8562ae1a0534 | 1082 | int32_t ret; |
cparata | 1:8562ae1a0534 | 1083 | ret = lis2mdl_read_reg(ctx, LIS2MDL_INT_THS_L_REG, buff, 2); |
cparata | 1:8562ae1a0534 | 1084 | return ret; |
cparata | 0:671edf39d961 | 1085 | } |
cparata | 0:671edf39d961 | 1086 | |
cparata | 0:671edf39d961 | 1087 | /** |
cparata | 0:671edf39d961 | 1088 | * @} |
cparata | 0:671edf39d961 | 1089 | * |
cparata | 0:671edf39d961 | 1090 | */ |
cparata | 0:671edf39d961 | 1091 | |
cparata | 0:671edf39d961 | 1092 | /** |
cparata | 0:671edf39d961 | 1093 | * @defgroup LIS2MDL_serial_interface |
cparata | 0:671edf39d961 | 1094 | * @brief This section group all the functions concerning serial |
cparata | 0:671edf39d961 | 1095 | * interface management |
cparata | 0:671edf39d961 | 1096 | * @{ |
cparata | 0:671edf39d961 | 1097 | * |
cparata | 0:671edf39d961 | 1098 | */ |
cparata | 0:671edf39d961 | 1099 | |
cparata | 0:671edf39d961 | 1100 | /** |
cparata | 0:671edf39d961 | 1101 | * @brief Enable/Disable I2C interface.[set] |
cparata | 0:671edf39d961 | 1102 | * |
cparata | 0:671edf39d961 | 1103 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 1104 | * @param val change the values of i2c_dis in reg CFG_REG_C |
cparata | 0:671edf39d961 | 1105 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 1106 | * |
cparata | 0:671edf39d961 | 1107 | */ |
cparata | 0:671edf39d961 | 1108 | int32_t lis2mdl_i2c_interface_set(lis2mdl_ctx_t *ctx, lis2mdl_i2c_dis_t val) |
cparata | 0:671edf39d961 | 1109 | { |
cparata | 1:8562ae1a0534 | 1110 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 1111 | int32_t ret; |
cparata | 1:8562ae1a0534 | 1112 | |
cparata | 1:8562ae1a0534 | 1113 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 0:671edf39d961 | 1114 | |
cparata | 1:8562ae1a0534 | 1115 | if (ret == 0) { |
cparata | 1:8562ae1a0534 | 1116 | reg.i2c_dis = (uint8_t)val; |
cparata | 1:8562ae1a0534 | 1117 | ret = lis2mdl_write_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 1118 | } |
cparata | 1:8562ae1a0534 | 1119 | |
cparata | 1:8562ae1a0534 | 1120 | return ret; |
cparata | 0:671edf39d961 | 1121 | } |
cparata | 0:671edf39d961 | 1122 | |
cparata | 0:671edf39d961 | 1123 | /** |
cparata | 0:671edf39d961 | 1124 | * @brief Enable/Disable I2C interface.[get] |
cparata | 0:671edf39d961 | 1125 | * |
cparata | 0:671edf39d961 | 1126 | * @param ctx read / write interface definitions.(ptr) |
cparata | 0:671edf39d961 | 1127 | * @param val Get the values of i2c_dis in reg CFG_REG_C.(ptr) |
cparata | 0:671edf39d961 | 1128 | * @retval interface status.(MANDATORY: return 0 -> no Error) |
cparata | 0:671edf39d961 | 1129 | * |
cparata | 0:671edf39d961 | 1130 | */ |
cparata | 0:671edf39d961 | 1131 | int32_t lis2mdl_i2c_interface_get(lis2mdl_ctx_t *ctx, lis2mdl_i2c_dis_t *val) |
cparata | 0:671edf39d961 | 1132 | { |
cparata | 1:8562ae1a0534 | 1133 | lis2mdl_cfg_reg_c_t reg; |
cparata | 1:8562ae1a0534 | 1134 | int32_t ret; |
cparata | 0:671edf39d961 | 1135 | |
cparata | 1:8562ae1a0534 | 1136 | ret = lis2mdl_read_reg(ctx, LIS2MDL_CFG_REG_C, (uint8_t *)®, 1); |
cparata | 1:8562ae1a0534 | 1137 | switch (reg.i2c_dis) { |
cparata | 1:8562ae1a0534 | 1138 | case LIS2MDL_I2C_ENABLE: |
cparata | 1:8562ae1a0534 | 1139 | *val = LIS2MDL_I2C_ENABLE; |
cparata | 1:8562ae1a0534 | 1140 | break; |
cparata | 1:8562ae1a0534 | 1141 | case LIS2MDL_I2C_DISABLE: |
cparata | 1:8562ae1a0534 | 1142 | *val = LIS2MDL_I2C_DISABLE; |
cparata | 1:8562ae1a0534 | 1143 | break; |
cparata | 1:8562ae1a0534 | 1144 | default: |
cparata | 1:8562ae1a0534 | 1145 | *val = LIS2MDL_I2C_ENABLE; |
cparata | 1:8562ae1a0534 | 1146 | break; |
cparata | 1:8562ae1a0534 | 1147 | } |
cparata | 1:8562ae1a0534 | 1148 | return ret; |
cparata | 0:671edf39d961 | 1149 | } |
cparata | 0:671edf39d961 | 1150 | |
cparata | 0:671edf39d961 | 1151 | /** |
cparata | 0:671edf39d961 | 1152 | * @} |
cparata | 0:671edf39d961 | 1153 | * |
cparata | 0:671edf39d961 | 1154 | */ |
cparata | 0:671edf39d961 | 1155 | |
cparata | 0:671edf39d961 | 1156 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |