LIS2DW12 accelerometer sensor library
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
lis2dw12_reg.h@2:a94816b14e3d, 2018-11-21 (annotated)
- Committer:
- cparata
- Date:
- Wed Nov 21 15:41:28 2018 +0000
- Revision:
- 2:a94816b14e3d
- Parent:
- 1:94e908301953
- Child:
- 3:111317ba9301
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cparata | 2:a94816b14e3d | 1 | /* |
cparata | 0:dff8803aace7 | 2 | ****************************************************************************** |
cparata | 0:dff8803aace7 | 3 | * @file lis2dw12_reg.h |
cparata | 2:a94816b14e3d | 4 | * @author Sensors Software Solution Team |
cparata | 0:dff8803aace7 | 5 | * @brief This file contains all the functions prototypes for the |
cparata | 0:dff8803aace7 | 6 | * lis2dw12_reg.c driver. |
cparata | 0:dff8803aace7 | 7 | ****************************************************************************** |
cparata | 0:dff8803aace7 | 8 | * @attention |
cparata | 0:dff8803aace7 | 9 | * |
cparata | 0:dff8803aace7 | 10 | * <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2> |
cparata | 0:dff8803aace7 | 11 | * |
cparata | 2:a94816b14e3d | 12 | * Redistribution and use in source and binary forms, with or without |
cparata | 2:a94816b14e3d | 13 | * modification, are permitted provided that the following conditions |
cparata | 2:a94816b14e3d | 14 | * are met: |
cparata | 0:dff8803aace7 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
cparata | 0:dff8803aace7 | 16 | * this list of conditions and the following disclaimer. |
cparata | 2:a94816b14e3d | 17 | * 2. Redistributions in binary form must reproduce the above copyright |
cparata | 2:a94816b14e3d | 18 | * notice, this list of conditions and the following disclaimer in the |
cparata | 2:a94816b14e3d | 19 | * documentation and/or other materials provided with the distribution. |
cparata | 2:a94816b14e3d | 20 | * 3. Neither the name of STMicroelectronics nor the names of its |
cparata | 2:a94816b14e3d | 21 | * contributors may be used to endorse or promote products derived from |
cparata | 2:a94816b14e3d | 22 | * this software without specific prior written permission. |
cparata | 0:dff8803aace7 | 23 | * |
cparata | 0:dff8803aace7 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
cparata | 0:dff8803aace7 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
cparata | 2:a94816b14e3d | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
cparata | 2:a94816b14e3d | 27 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
cparata | 2:a94816b14e3d | 28 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
cparata | 2:a94816b14e3d | 29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
cparata | 2:a94816b14e3d | 30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
cparata | 2:a94816b14e3d | 31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
cparata | 2:a94816b14e3d | 32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
cparata | 2:a94816b14e3d | 33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
cparata | 2:a94816b14e3d | 34 | * POSSIBILITY OF SUCH DAMAGE. |
cparata | 0:dff8803aace7 | 35 | * |
cparata | 0:dff8803aace7 | 36 | */ |
cparata | 0:dff8803aace7 | 37 | |
cparata | 0:dff8803aace7 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
cparata | 2:a94816b14e3d | 39 | #ifndef LIS2DW12_REGS_H |
cparata | 2:a94816b14e3d | 40 | #define LIS2DW12_REGS_H |
cparata | 0:dff8803aace7 | 41 | |
cparata | 0:dff8803aace7 | 42 | #ifdef __cplusplus |
cparata | 0:dff8803aace7 | 43 | extern "C" { |
cparata | 0:dff8803aace7 | 44 | #endif |
cparata | 0:dff8803aace7 | 45 | |
cparata | 0:dff8803aace7 | 46 | /* Includes ------------------------------------------------------------------*/ |
cparata | 0:dff8803aace7 | 47 | #include <stdint.h> |
cparata | 2:a94816b14e3d | 48 | #include <math.h> |
cparata | 0:dff8803aace7 | 49 | |
cparata | 2:a94816b14e3d | 50 | /** @addtogroup LIS2DW12 |
cparata | 2:a94816b14e3d | 51 | * @{ |
cparata | 2:a94816b14e3d | 52 | * |
cparata | 2:a94816b14e3d | 53 | */ |
cparata | 2:a94816b14e3d | 54 | |
cparata | 2:a94816b14e3d | 55 | /** @defgroup LIS2DW12_sensors_common_types |
cparata | 2:a94816b14e3d | 56 | * @{ |
cparata | 2:a94816b14e3d | 57 | * |
cparata | 2:a94816b14e3d | 58 | */ |
cparata | 2:a94816b14e3d | 59 | |
cparata | 0:dff8803aace7 | 60 | #ifndef MEMS_SHARED_TYPES |
cparata | 0:dff8803aace7 | 61 | #define MEMS_SHARED_TYPES |
cparata | 0:dff8803aace7 | 62 | |
cparata | 2:a94816b14e3d | 63 | /** |
cparata | 2:a94816b14e3d | 64 | * @defgroup axisXbitXX_t |
cparata | 2:a94816b14e3d | 65 | * @brief These unions are useful to represent different sensors data type. |
cparata | 2:a94816b14e3d | 66 | * These unions are not need by the driver. |
cparata | 2:a94816b14e3d | 67 | * |
cparata | 2:a94816b14e3d | 68 | * REMOVING the unions you are compliant with: |
cparata | 2:a94816b14e3d | 69 | * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed " |
cparata | 2:a94816b14e3d | 70 | * |
cparata | 0:dff8803aace7 | 71 | * @{ |
cparata | 2:a94816b14e3d | 72 | * |
cparata | 0:dff8803aace7 | 73 | */ |
cparata | 0:dff8803aace7 | 74 | |
cparata | 2:a94816b14e3d | 75 | typedef union{ |
cparata | 0:dff8803aace7 | 76 | int16_t i16bit[3]; |
cparata | 0:dff8803aace7 | 77 | uint8_t u8bit[6]; |
cparata | 0:dff8803aace7 | 78 | } axis3bit16_t; |
cparata | 0:dff8803aace7 | 79 | |
cparata | 2:a94816b14e3d | 80 | typedef union{ |
cparata | 0:dff8803aace7 | 81 | int16_t i16bit; |
cparata | 0:dff8803aace7 | 82 | uint8_t u8bit[2]; |
cparata | 0:dff8803aace7 | 83 | } axis1bit16_t; |
cparata | 0:dff8803aace7 | 84 | |
cparata | 2:a94816b14e3d | 85 | typedef union{ |
cparata | 0:dff8803aace7 | 86 | int32_t i32bit[3]; |
cparata | 0:dff8803aace7 | 87 | uint8_t u8bit[12]; |
cparata | 0:dff8803aace7 | 88 | } axis3bit32_t; |
cparata | 0:dff8803aace7 | 89 | |
cparata | 2:a94816b14e3d | 90 | typedef union{ |
cparata | 0:dff8803aace7 | 91 | int32_t i32bit; |
cparata | 0:dff8803aace7 | 92 | uint8_t u8bit[4]; |
cparata | 0:dff8803aace7 | 93 | } axis1bit32_t; |
cparata | 0:dff8803aace7 | 94 | |
cparata | 2:a94816b14e3d | 95 | /** |
cparata | 2:a94816b14e3d | 96 | * @} |
cparata | 2:a94816b14e3d | 97 | * |
cparata | 2:a94816b14e3d | 98 | */ |
cparata | 2:a94816b14e3d | 99 | |
cparata | 2:a94816b14e3d | 100 | typedef struct{ |
cparata | 0:dff8803aace7 | 101 | uint8_t bit0 : 1; |
cparata | 0:dff8803aace7 | 102 | uint8_t bit1 : 1; |
cparata | 0:dff8803aace7 | 103 | uint8_t bit2 : 1; |
cparata | 0:dff8803aace7 | 104 | uint8_t bit3 : 1; |
cparata | 0:dff8803aace7 | 105 | uint8_t bit4 : 1; |
cparata | 0:dff8803aace7 | 106 | uint8_t bit5 : 1; |
cparata | 0:dff8803aace7 | 107 | uint8_t bit6 : 1; |
cparata | 0:dff8803aace7 | 108 | uint8_t bit7 : 1; |
cparata | 0:dff8803aace7 | 109 | } bitwise_t; |
cparata | 0:dff8803aace7 | 110 | |
cparata | 2:a94816b14e3d | 111 | #define PROPERTY_DISABLE (0U) |
cparata | 2:a94816b14e3d | 112 | #define PROPERTY_ENABLE (1U) |
cparata | 0:dff8803aace7 | 113 | |
cparata | 2:a94816b14e3d | 114 | #endif /* MEMS_SHARED_TYPES */ |
cparata | 0:dff8803aace7 | 115 | |
cparata | 0:dff8803aace7 | 116 | /** |
cparata | 0:dff8803aace7 | 117 | * @} |
cparata | 2:a94816b14e3d | 118 | * |
cparata | 0:dff8803aace7 | 119 | */ |
cparata | 0:dff8803aace7 | 120 | |
cparata | 2:a94816b14e3d | 121 | /** @addtogroup LIS2DW12_Interfaces_Functions |
cparata | 2:a94816b14e3d | 122 | * @brief This section provide a set of functions used to read and |
cparata | 2:a94816b14e3d | 123 | * write a generic register of the device. |
cparata | 2:a94816b14e3d | 124 | * MANDATORY: return 0 -> no Error. |
cparata | 0:dff8803aace7 | 125 | * @{ |
cparata | 2:a94816b14e3d | 126 | * |
cparata | 2:a94816b14e3d | 127 | */ |
cparata | 0:dff8803aace7 | 128 | |
cparata | 0:dff8803aace7 | 129 | typedef int32_t (*lis2dw12_write_ptr)(void *, uint8_t, uint8_t*, uint16_t); |
cparata | 0:dff8803aace7 | 130 | typedef int32_t (*lis2dw12_read_ptr) (void *, uint8_t, uint8_t*, uint16_t); |
cparata | 0:dff8803aace7 | 131 | |
cparata | 0:dff8803aace7 | 132 | typedef struct { |
cparata | 0:dff8803aace7 | 133 | /** Component mandatory fields **/ |
cparata | 0:dff8803aace7 | 134 | lis2dw12_write_ptr write_reg; |
cparata | 0:dff8803aace7 | 135 | lis2dw12_read_ptr read_reg; |
cparata | 0:dff8803aace7 | 136 | /** Customizable optional pointer **/ |
cparata | 0:dff8803aace7 | 137 | void *handle; |
cparata | 0:dff8803aace7 | 138 | } lis2dw12_ctx_t; |
cparata | 0:dff8803aace7 | 139 | |
cparata | 0:dff8803aace7 | 140 | /** |
cparata | 0:dff8803aace7 | 141 | * @} |
cparata | 2:a94816b14e3d | 142 | * |
cparata | 2:a94816b14e3d | 143 | */ |
cparata | 0:dff8803aace7 | 144 | |
cparata | 2:a94816b14e3d | 145 | /** @defgroup LIS2DW12_Infos |
cparata | 0:dff8803aace7 | 146 | * @{ |
cparata | 2:a94816b14e3d | 147 | * |
cparata | 2:a94816b14e3d | 148 | */ |
cparata | 2:a94816b14e3d | 149 | |
cparata | 2:a94816b14e3d | 150 | /** I2C Device Address 8 bit format if SA0=0 -> 31 if SA0=1 -> 33 **/ |
cparata | 2:a94816b14e3d | 151 | #define LIS2DW12_I2C_ADD_L 0x31U |
cparata | 2:a94816b14e3d | 152 | #define LIS2DW12_I2C_ADD_H 0x33U |
cparata | 0:dff8803aace7 | 153 | |
cparata | 0:dff8803aace7 | 154 | /** Device Identification (Who am I) **/ |
cparata | 2:a94816b14e3d | 155 | #define LIS2DW12_ID 0x44U |
cparata | 0:dff8803aace7 | 156 | |
cparata | 0:dff8803aace7 | 157 | /** |
cparata | 0:dff8803aace7 | 158 | * @} |
cparata | 2:a94816b14e3d | 159 | * |
cparata | 0:dff8803aace7 | 160 | */ |
cparata | 0:dff8803aace7 | 161 | |
cparata | 2:a94816b14e3d | 162 | /** |
cparata | 2:a94816b14e3d | 163 | * @addtogroup LIS2DW12_Sensitivity |
cparata | 2:a94816b14e3d | 164 | * @brief These macro are maintained for back compatibility. |
cparata | 2:a94816b14e3d | 165 | * in order to convert data into engineering units please |
cparata | 2:a94816b14e3d | 166 | * use functions: |
cparata | 2:a94816b14e3d | 167 | * -> _from_fs2_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 168 | * -> _from_fs4_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 169 | * -> _from_fs8_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 170 | * -> _from_fs16_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 171 | * -> _from_fs2_lp1_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 172 | * -> _from_fs4_lp1_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 173 | * -> _from_fs8_lp1_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 174 | * -> _from_fs16_lp1_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 175 | * -> _from_lsb_to_celsius(int16_t lsb); |
cparata | 2:a94816b14e3d | 176 | * |
cparata | 2:a94816b14e3d | 177 | * REMOVING the MACRO you are compliant with: |
cparata | 2:a94816b14e3d | 178 | * MISRA-C 2012 [Dir 4.9] -> " avoid function-like macros " |
cparata | 0:dff8803aace7 | 179 | * @{ |
cparata | 2:a94816b14e3d | 180 | * |
cparata | 0:dff8803aace7 | 181 | */ |
cparata | 0:dff8803aace7 | 182 | |
cparata | 0:dff8803aace7 | 183 | #define LIS2DW12_FROM_FS_2g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.244f |
cparata | 0:dff8803aace7 | 184 | #define LIS2DW12_FROM_FS_4g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.488f |
cparata | 0:dff8803aace7 | 185 | #define LIS2DW12_FROM_FS_8g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.976f |
cparata | 0:dff8803aace7 | 186 | #define LIS2DW12_FROM_FS_16g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 1.952f |
cparata | 0:dff8803aace7 | 187 | |
cparata | 2:a94816b14e3d | 188 | #define LIS2DW12_FROM_FS_2g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 0.976f |
cparata | 2:a94816b14e3d | 189 | #define LIS2DW12_FROM_FS_4g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 1.952f |
cparata | 0:dff8803aace7 | 190 | #define LIS2DW12_FROM_FS_8g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 3.904f |
cparata | 0:dff8803aace7 | 191 | #define LIS2DW12_FROM_FS_16g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 7.808f |
cparata | 0:dff8803aace7 | 192 | |
cparata | 0:dff8803aace7 | 193 | #define LIS2DW12_FROM_LSB_TO_degC(lsb) (float)((int16_t)lsb) / 16.0f+25.0f |
cparata | 0:dff8803aace7 | 194 | |
cparata | 0:dff8803aace7 | 195 | /** |
cparata | 0:dff8803aace7 | 196 | * @} |
cparata | 2:a94816b14e3d | 197 | * |
cparata | 0:dff8803aace7 | 198 | */ |
cparata | 0:dff8803aace7 | 199 | |
cparata | 2:a94816b14e3d | 200 | #define LIS2DW12_OUT_T_L 0x0DU |
cparata | 2:a94816b14e3d | 201 | #define LIS2DW12_OUT_T_H 0x0EU |
cparata | 2:a94816b14e3d | 202 | #define LIS2DW12_WHO_AM_I 0x0FU |
cparata | 2:a94816b14e3d | 203 | #define LIS2DW12_CTRL1 0x20U |
cparata | 0:dff8803aace7 | 204 | typedef struct { |
cparata | 0:dff8803aace7 | 205 | uint8_t lp_mode : 2; |
cparata | 0:dff8803aace7 | 206 | uint8_t mode : 2; |
cparata | 0:dff8803aace7 | 207 | uint8_t odr : 4; |
cparata | 0:dff8803aace7 | 208 | } lis2dw12_ctrl1_t; |
cparata | 0:dff8803aace7 | 209 | |
cparata | 2:a94816b14e3d | 210 | #define LIS2DW12_CTRL2 0x21U |
cparata | 0:dff8803aace7 | 211 | typedef struct { |
cparata | 0:dff8803aace7 | 212 | uint8_t sim : 1; |
cparata | 0:dff8803aace7 | 213 | uint8_t i2c_disable : 1; |
cparata | 0:dff8803aace7 | 214 | uint8_t if_add_inc : 1; |
cparata | 0:dff8803aace7 | 215 | uint8_t bdu : 1; |
cparata | 0:dff8803aace7 | 216 | uint8_t cs_pu_disc : 1; |
cparata | 0:dff8803aace7 | 217 | uint8_t not_used_01 : 1; |
cparata | 0:dff8803aace7 | 218 | uint8_t soft_reset : 1; |
cparata | 0:dff8803aace7 | 219 | uint8_t boot : 1; |
cparata | 0:dff8803aace7 | 220 | } lis2dw12_ctrl2_t; |
cparata | 0:dff8803aace7 | 221 | |
cparata | 2:a94816b14e3d | 222 | #define LIS2DW12_CTRL3 0x22U |
cparata | 0:dff8803aace7 | 223 | typedef struct { |
cparata | 0:dff8803aace7 | 224 | uint8_t slp_mode : 2; /* slp_mode_sel + slp_mode_1 */ |
cparata | 0:dff8803aace7 | 225 | uint8_t not_used_01 : 1; |
cparata | 0:dff8803aace7 | 226 | uint8_t h_lactive : 1; |
cparata | 0:dff8803aace7 | 227 | uint8_t lir : 1; |
cparata | 0:dff8803aace7 | 228 | uint8_t pp_od : 1; |
cparata | 0:dff8803aace7 | 229 | uint8_t st : 2; |
cparata | 0:dff8803aace7 | 230 | } lis2dw12_ctrl3_t; |
cparata | 0:dff8803aace7 | 231 | |
cparata | 2:a94816b14e3d | 232 | #define LIS2DW12_CTRL4_INT1_PAD_CTRL 0x23U |
cparata | 0:dff8803aace7 | 233 | typedef struct { |
cparata | 0:dff8803aace7 | 234 | uint8_t int1_drdy : 1; |
cparata | 0:dff8803aace7 | 235 | uint8_t int1_fth : 1; |
cparata | 0:dff8803aace7 | 236 | uint8_t int1_diff5 : 1; |
cparata | 0:dff8803aace7 | 237 | uint8_t int1_tap : 1; |
cparata | 0:dff8803aace7 | 238 | uint8_t int1_ff : 1; |
cparata | 0:dff8803aace7 | 239 | uint8_t int1_wu : 1; |
cparata | 0:dff8803aace7 | 240 | uint8_t int1_single_tap : 1; |
cparata | 0:dff8803aace7 | 241 | uint8_t int1_6d : 1; |
cparata | 0:dff8803aace7 | 242 | } lis2dw12_ctrl4_int1_pad_ctrl_t; |
cparata | 0:dff8803aace7 | 243 | |
cparata | 2:a94816b14e3d | 244 | #define LIS2DW12_CTRL5_INT2_PAD_CTRL 0x24U |
cparata | 0:dff8803aace7 | 245 | typedef struct { |
cparata | 0:dff8803aace7 | 246 | uint8_t int2_drdy : 1; |
cparata | 0:dff8803aace7 | 247 | uint8_t int2_fth : 1; |
cparata | 0:dff8803aace7 | 248 | uint8_t int2_diff5 : 1; |
cparata | 0:dff8803aace7 | 249 | uint8_t int2_ovr : 1; |
cparata | 0:dff8803aace7 | 250 | uint8_t int2_drdy_t : 1; |
cparata | 0:dff8803aace7 | 251 | uint8_t int2_boot : 1; |
cparata | 0:dff8803aace7 | 252 | uint8_t int2_sleep_chg : 1; |
cparata | 0:dff8803aace7 | 253 | uint8_t int2_sleep_state : 1; |
cparata | 0:dff8803aace7 | 254 | } lis2dw12_ctrl5_int2_pad_ctrl_t; |
cparata | 0:dff8803aace7 | 255 | |
cparata | 2:a94816b14e3d | 256 | #define LIS2DW12_CTRL6 0x25U |
cparata | 0:dff8803aace7 | 257 | typedef struct { |
cparata | 0:dff8803aace7 | 258 | uint8_t not_used_01 : 2; |
cparata | 0:dff8803aace7 | 259 | uint8_t low_noise : 1; |
cparata | 0:dff8803aace7 | 260 | uint8_t fds : 1; |
cparata | 0:dff8803aace7 | 261 | uint8_t fs : 2; |
cparata | 0:dff8803aace7 | 262 | uint8_t bw_filt : 2; |
cparata | 0:dff8803aace7 | 263 | } lis2dw12_ctrl6_t; |
cparata | 0:dff8803aace7 | 264 | |
cparata | 2:a94816b14e3d | 265 | #define LIS2DW12_OUT_T 0x26U |
cparata | 2:a94816b14e3d | 266 | #define LIS2DW12_STATUS 0x27U |
cparata | 0:dff8803aace7 | 267 | typedef struct { |
cparata | 0:dff8803aace7 | 268 | uint8_t drdy : 1; |
cparata | 0:dff8803aace7 | 269 | uint8_t ff_ia : 1; |
cparata | 0:dff8803aace7 | 270 | uint8_t _6d_ia : 1; |
cparata | 0:dff8803aace7 | 271 | uint8_t single_tap : 1; |
cparata | 0:dff8803aace7 | 272 | uint8_t double_tap : 1; |
cparata | 0:dff8803aace7 | 273 | uint8_t sleep_state : 1; |
cparata | 0:dff8803aace7 | 274 | uint8_t wu_ia : 1; |
cparata | 0:dff8803aace7 | 275 | uint8_t fifo_ths : 1; |
cparata | 0:dff8803aace7 | 276 | } lis2dw12_status_t; |
cparata | 0:dff8803aace7 | 277 | |
cparata | 2:a94816b14e3d | 278 | #define LIS2DW12_OUT_X_L 0x28U |
cparata | 2:a94816b14e3d | 279 | #define LIS2DW12_OUT_X_H 0x29U |
cparata | 2:a94816b14e3d | 280 | #define LIS2DW12_OUT_Y_L 0x2AU |
cparata | 2:a94816b14e3d | 281 | #define LIS2DW12_OUT_Y_H 0x2BU |
cparata | 2:a94816b14e3d | 282 | #define LIS2DW12_OUT_Z_L 0x2CU |
cparata | 2:a94816b14e3d | 283 | #define LIS2DW12_OUT_Z_H 0x2DU |
cparata | 2:a94816b14e3d | 284 | #define LIS2DW12_FIFO_CTRL 0x2EU |
cparata | 0:dff8803aace7 | 285 | typedef struct { |
cparata | 0:dff8803aace7 | 286 | uint8_t fth : 5; |
cparata | 0:dff8803aace7 | 287 | uint8_t fmode : 3; |
cparata | 0:dff8803aace7 | 288 | } lis2dw12_fifo_ctrl_t; |
cparata | 0:dff8803aace7 | 289 | |
cparata | 2:a94816b14e3d | 290 | #define LIS2DW12_FIFO_SAMPLES 0x2FU |
cparata | 0:dff8803aace7 | 291 | typedef struct { |
cparata | 0:dff8803aace7 | 292 | uint8_t diff : 6; |
cparata | 0:dff8803aace7 | 293 | uint8_t fifo_ovr : 1; |
cparata | 0:dff8803aace7 | 294 | uint8_t fifo_fth : 1; |
cparata | 0:dff8803aace7 | 295 | } lis2dw12_fifo_samples_t; |
cparata | 0:dff8803aace7 | 296 | |
cparata | 2:a94816b14e3d | 297 | #define LIS2DW12_TAP_THS_X 0x30U |
cparata | 0:dff8803aace7 | 298 | typedef struct { |
cparata | 0:dff8803aace7 | 299 | uint8_t tap_thsx : 5; |
cparata | 0:dff8803aace7 | 300 | uint8_t _6d_ths : 2; |
cparata | 0:dff8803aace7 | 301 | uint8_t _4d_en : 1; |
cparata | 0:dff8803aace7 | 302 | } lis2dw12_tap_ths_x_t; |
cparata | 0:dff8803aace7 | 303 | |
cparata | 2:a94816b14e3d | 304 | #define LIS2DW12_TAP_THS_Y 0x31U |
cparata | 0:dff8803aace7 | 305 | typedef struct { |
cparata | 0:dff8803aace7 | 306 | uint8_t tap_thsy : 5; |
cparata | 0:dff8803aace7 | 307 | uint8_t tap_prior : 3; |
cparata | 0:dff8803aace7 | 308 | } lis2dw12_tap_ths_y_t; |
cparata | 0:dff8803aace7 | 309 | |
cparata | 2:a94816b14e3d | 310 | #define LIS2DW12_TAP_THS_Z 0x32U |
cparata | 0:dff8803aace7 | 311 | typedef struct { |
cparata | 0:dff8803aace7 | 312 | uint8_t tap_thsz : 5; |
cparata | 0:dff8803aace7 | 313 | uint8_t tap_z_en : 1; |
cparata | 0:dff8803aace7 | 314 | uint8_t tap_y_en : 1; |
cparata | 0:dff8803aace7 | 315 | uint8_t tap_x_en : 1; |
cparata | 0:dff8803aace7 | 316 | } lis2dw12_tap_ths_z_t; |
cparata | 0:dff8803aace7 | 317 | |
cparata | 2:a94816b14e3d | 318 | #define LIS2DW12_INT_DUR 0x33U |
cparata | 0:dff8803aace7 | 319 | typedef struct { |
cparata | 0:dff8803aace7 | 320 | uint8_t shock : 2; |
cparata | 0:dff8803aace7 | 321 | uint8_t quiet : 2; |
cparata | 0:dff8803aace7 | 322 | uint8_t latency : 4; |
cparata | 0:dff8803aace7 | 323 | } lis2dw12_int_dur_t; |
cparata | 0:dff8803aace7 | 324 | |
cparata | 2:a94816b14e3d | 325 | #define LIS2DW12_WAKE_UP_THS 0x34U |
cparata | 0:dff8803aace7 | 326 | typedef struct { |
cparata | 0:dff8803aace7 | 327 | uint8_t wk_ths : 6; |
cparata | 0:dff8803aace7 | 328 | uint8_t sleep_on : 1; |
cparata | 0:dff8803aace7 | 329 | uint8_t single_double_tap : 1; |
cparata | 0:dff8803aace7 | 330 | } lis2dw12_wake_up_ths_t; |
cparata | 0:dff8803aace7 | 331 | |
cparata | 2:a94816b14e3d | 332 | #define LIS2DW12_WAKE_UP_DUR 0x35U |
cparata | 0:dff8803aace7 | 333 | typedef struct { |
cparata | 0:dff8803aace7 | 334 | uint8_t sleep_dur : 4; |
cparata | 0:dff8803aace7 | 335 | uint8_t stationary : 1; |
cparata | 0:dff8803aace7 | 336 | uint8_t wake_dur : 2; |
cparata | 0:dff8803aace7 | 337 | uint8_t ff_dur : 1; |
cparata | 0:dff8803aace7 | 338 | } lis2dw12_wake_up_dur_t; |
cparata | 0:dff8803aace7 | 339 | |
cparata | 2:a94816b14e3d | 340 | #define LIS2DW12_FREE_FALL 0x36U |
cparata | 0:dff8803aace7 | 341 | typedef struct { |
cparata | 0:dff8803aace7 | 342 | uint8_t ff_ths : 3; |
cparata | 0:dff8803aace7 | 343 | uint8_t ff_dur : 5; |
cparata | 0:dff8803aace7 | 344 | } lis2dw12_free_fall_t; |
cparata | 0:dff8803aace7 | 345 | |
cparata | 2:a94816b14e3d | 346 | #define LIS2DW12_STATUS_DUP 0x37U |
cparata | 0:dff8803aace7 | 347 | typedef struct { |
cparata | 0:dff8803aace7 | 348 | uint8_t drdy : 1; |
cparata | 0:dff8803aace7 | 349 | uint8_t ff_ia : 1; |
cparata | 0:dff8803aace7 | 350 | uint8_t _6d_ia : 1; |
cparata | 0:dff8803aace7 | 351 | uint8_t single_tap : 1; |
cparata | 0:dff8803aace7 | 352 | uint8_t double_tap : 1; |
cparata | 0:dff8803aace7 | 353 | uint8_t sleep_state_ia : 1; |
cparata | 0:dff8803aace7 | 354 | uint8_t drdy_t : 1; |
cparata | 0:dff8803aace7 | 355 | uint8_t ovr : 1; |
cparata | 0:dff8803aace7 | 356 | } lis2dw12_status_dup_t; |
cparata | 0:dff8803aace7 | 357 | |
cparata | 2:a94816b14e3d | 358 | #define LIS2DW12_WAKE_UP_SRC 0x38U |
cparata | 0:dff8803aace7 | 359 | typedef struct { |
cparata | 0:dff8803aace7 | 360 | uint8_t z_wu : 1; |
cparata | 0:dff8803aace7 | 361 | uint8_t y_wu : 1; |
cparata | 0:dff8803aace7 | 362 | uint8_t x_wu : 1; |
cparata | 0:dff8803aace7 | 363 | uint8_t wu_ia : 1; |
cparata | 0:dff8803aace7 | 364 | uint8_t sleep_state_ia : 1; |
cparata | 0:dff8803aace7 | 365 | uint8_t ff_ia : 1; |
cparata | 0:dff8803aace7 | 366 | uint8_t not_used_01 : 2; |
cparata | 0:dff8803aace7 | 367 | } lis2dw12_wake_up_src_t; |
cparata | 0:dff8803aace7 | 368 | |
cparata | 2:a94816b14e3d | 369 | #define LIS2DW12_TAP_SRC 0x39U |
cparata | 0:dff8803aace7 | 370 | typedef struct { |
cparata | 0:dff8803aace7 | 371 | uint8_t z_tap : 1; |
cparata | 0:dff8803aace7 | 372 | uint8_t y_tap : 1; |
cparata | 0:dff8803aace7 | 373 | uint8_t x_tap : 1; |
cparata | 0:dff8803aace7 | 374 | uint8_t tap_sign : 1; |
cparata | 0:dff8803aace7 | 375 | uint8_t double_tap : 1; |
cparata | 0:dff8803aace7 | 376 | uint8_t single_tap : 1; |
cparata | 0:dff8803aace7 | 377 | uint8_t tap_ia : 1; |
cparata | 0:dff8803aace7 | 378 | uint8_t not_used_01 : 1; |
cparata | 0:dff8803aace7 | 379 | } lis2dw12_tap_src_t; |
cparata | 0:dff8803aace7 | 380 | |
cparata | 2:a94816b14e3d | 381 | #define LIS2DW12_SIXD_SRC 0x3AU |
cparata | 0:dff8803aace7 | 382 | typedef struct { |
cparata | 0:dff8803aace7 | 383 | uint8_t xl : 1; |
cparata | 0:dff8803aace7 | 384 | uint8_t xh : 1; |
cparata | 0:dff8803aace7 | 385 | uint8_t yl : 1; |
cparata | 0:dff8803aace7 | 386 | uint8_t yh : 1; |
cparata | 0:dff8803aace7 | 387 | uint8_t zl : 1; |
cparata | 0:dff8803aace7 | 388 | uint8_t zh : 1; |
cparata | 0:dff8803aace7 | 389 | uint8_t _6d_ia : 1; |
cparata | 0:dff8803aace7 | 390 | uint8_t not_used_01 : 1; |
cparata | 0:dff8803aace7 | 391 | } lis2dw12_sixd_src_t; |
cparata | 0:dff8803aace7 | 392 | |
cparata | 2:a94816b14e3d | 393 | #define LIS2DW12_ALL_INT_SRC 0x3BU |
cparata | 0:dff8803aace7 | 394 | typedef struct { |
cparata | 0:dff8803aace7 | 395 | uint8_t ff_ia : 1; |
cparata | 0:dff8803aace7 | 396 | uint8_t wu_ia : 1; |
cparata | 0:dff8803aace7 | 397 | uint8_t single_tap : 1; |
cparata | 0:dff8803aace7 | 398 | uint8_t double_tap : 1; |
cparata | 0:dff8803aace7 | 399 | uint8_t _6d_ia : 1; |
cparata | 0:dff8803aace7 | 400 | uint8_t sleep_change_ia : 1; |
cparata | 0:dff8803aace7 | 401 | uint8_t not_used_01 : 2; |
cparata | 0:dff8803aace7 | 402 | } lis2dw12_all_int_src_t; |
cparata | 0:dff8803aace7 | 403 | |
cparata | 2:a94816b14e3d | 404 | #define LIS2DW12_X_OFS_USR 0x3CU |
cparata | 2:a94816b14e3d | 405 | #define LIS2DW12_Y_OFS_USR 0x3DU |
cparata | 2:a94816b14e3d | 406 | #define LIS2DW12_Z_OFS_USR 0x3EU |
cparata | 2:a94816b14e3d | 407 | #define LIS2DW12_CTRL_REG7 0x3FU |
cparata | 0:dff8803aace7 | 408 | typedef struct { |
cparata | 0:dff8803aace7 | 409 | uint8_t lpass_on6d : 1; |
cparata | 0:dff8803aace7 | 410 | uint8_t hp_ref_mode : 1; |
cparata | 0:dff8803aace7 | 411 | uint8_t usr_off_w : 1; |
cparata | 0:dff8803aace7 | 412 | uint8_t usr_off_on_wu : 1; |
cparata | 0:dff8803aace7 | 413 | uint8_t usr_off_on_out : 1; |
cparata | 0:dff8803aace7 | 414 | uint8_t interrupts_enable : 1; |
cparata | 0:dff8803aace7 | 415 | uint8_t int2_on_int1 : 1; |
cparata | 0:dff8803aace7 | 416 | uint8_t drdy_pulsed : 1; |
cparata | 0:dff8803aace7 | 417 | } lis2dw12_ctrl_reg7_t; |
cparata | 0:dff8803aace7 | 418 | |
cparata | 2:a94816b14e3d | 419 | /** |
cparata | 2:a94816b14e3d | 420 | * @defgroup LIS2DW12_Register_Union |
cparata | 2:a94816b14e3d | 421 | * @brief This union group all the registers that has a bitfield |
cparata | 2:a94816b14e3d | 422 | * description. |
cparata | 2:a94816b14e3d | 423 | * This union is useful but not need by the driver. |
cparata | 2:a94816b14e3d | 424 | * |
cparata | 2:a94816b14e3d | 425 | * REMOVING this union you are compliant with: |
cparata | 2:a94816b14e3d | 426 | * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed " |
cparata | 2:a94816b14e3d | 427 | * |
cparata | 2:a94816b14e3d | 428 | * @{ |
cparata | 2:a94816b14e3d | 429 | * |
cparata | 2:a94816b14e3d | 430 | */ |
cparata | 0:dff8803aace7 | 431 | typedef union{ |
cparata | 0:dff8803aace7 | 432 | lis2dw12_ctrl1_t ctrl1; |
cparata | 0:dff8803aace7 | 433 | lis2dw12_ctrl2_t ctrl2; |
cparata | 0:dff8803aace7 | 434 | lis2dw12_ctrl3_t ctrl3; |
cparata | 0:dff8803aace7 | 435 | lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_pad_ctrl; |
cparata | 0:dff8803aace7 | 436 | lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_pad_ctrl; |
cparata | 0:dff8803aace7 | 437 | lis2dw12_ctrl6_t ctrl6; |
cparata | 0:dff8803aace7 | 438 | lis2dw12_status_t status; |
cparata | 0:dff8803aace7 | 439 | lis2dw12_fifo_ctrl_t fifo_ctrl; |
cparata | 0:dff8803aace7 | 440 | lis2dw12_fifo_samples_t fifo_samples; |
cparata | 0:dff8803aace7 | 441 | lis2dw12_tap_ths_x_t tap_ths_x; |
cparata | 0:dff8803aace7 | 442 | lis2dw12_tap_ths_y_t tap_ths_y; |
cparata | 0:dff8803aace7 | 443 | lis2dw12_tap_ths_z_t tap_ths_z; |
cparata | 0:dff8803aace7 | 444 | lis2dw12_int_dur_t int_dur; |
cparata | 0:dff8803aace7 | 445 | lis2dw12_wake_up_ths_t wake_up_ths; |
cparata | 0:dff8803aace7 | 446 | lis2dw12_wake_up_dur_t wake_up_dur; |
cparata | 0:dff8803aace7 | 447 | lis2dw12_free_fall_t free_fall; |
cparata | 0:dff8803aace7 | 448 | lis2dw12_status_dup_t status_dup; |
cparata | 0:dff8803aace7 | 449 | lis2dw12_wake_up_src_t wake_up_src; |
cparata | 0:dff8803aace7 | 450 | lis2dw12_tap_src_t tap_src; |
cparata | 0:dff8803aace7 | 451 | lis2dw12_sixd_src_t sixd_src; |
cparata | 0:dff8803aace7 | 452 | lis2dw12_all_int_src_t all_int_src; |
cparata | 0:dff8803aace7 | 453 | lis2dw12_ctrl_reg7_t ctrl_reg7; |
cparata | 0:dff8803aace7 | 454 | bitwise_t bitwise; |
cparata | 0:dff8803aace7 | 455 | uint8_t byte; |
cparata | 0:dff8803aace7 | 456 | } lis2dw12_reg_t; |
cparata | 0:dff8803aace7 | 457 | |
cparata | 2:a94816b14e3d | 458 | /** |
cparata | 2:a94816b14e3d | 459 | * @} |
cparata | 2:a94816b14e3d | 460 | * |
cparata | 2:a94816b14e3d | 461 | */ |
cparata | 2:a94816b14e3d | 462 | |
cparata | 0:dff8803aace7 | 463 | int32_t lis2dw12_read_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t* data, |
cparata | 0:dff8803aace7 | 464 | uint16_t len); |
cparata | 0:dff8803aace7 | 465 | int32_t lis2dw12_write_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t* data, |
cparata | 0:dff8803aace7 | 466 | uint16_t len); |
cparata | 2:a94816b14e3d | 467 | |
cparata | 2:a94816b14e3d | 468 | extern float lis2dw12_from_fs2_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 469 | extern float lis2dw12_from_fs4_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 470 | extern float lis2dw12_from_fs8_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 471 | extern float lis2dw12_from_fs16_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 472 | extern float lis2dw12_from_fs2_lp1_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 473 | extern float lis2dw12_from_fs4_lp1_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 474 | extern float lis2dw12_from_fs8_lp1_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 475 | extern float lis2dw12_from_fs16_lp1_to_mg(int16_t lsb); |
cparata | 2:a94816b14e3d | 476 | extern float lis2dw12_from_lsb_to_celsius(int16_t lsb); |
cparata | 0:dff8803aace7 | 477 | |
cparata | 0:dff8803aace7 | 478 | typedef enum { |
cparata | 0:dff8803aace7 | 479 | LIS2DW12_HIGH_PERFORMANCE = 0x04, |
cparata | 0:dff8803aace7 | 480 | LIS2DW12_CONT_LOW_PWR_4 = 0x03, |
cparata | 0:dff8803aace7 | 481 | LIS2DW12_CONT_LOW_PWR_3 = 0x02, |
cparata | 0:dff8803aace7 | 482 | LIS2DW12_CONT_LOW_PWR_2 = 0x01, |
cparata | 0:dff8803aace7 | 483 | LIS2DW12_CONT_LOW_PWR_12bit = 0x00, |
cparata | 0:dff8803aace7 | 484 | LIS2DW12_SINGLE_LOW_PWR_4 = 0x0B, |
cparata | 0:dff8803aace7 | 485 | LIS2DW12_SINGLE_LOW_PWR_3 = 0x0A, |
cparata | 0:dff8803aace7 | 486 | LIS2DW12_SINGLE_LOW_PWR_2 = 0x09, |
cparata | 0:dff8803aace7 | 487 | LIS2DW12_SINGLE_LOW_PWR_12bit = 0x08, |
cparata | 0:dff8803aace7 | 488 | LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE = 0x14, |
cparata | 0:dff8803aace7 | 489 | LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4 = 0x13, |
cparata | 0:dff8803aace7 | 490 | LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3 = 0x12, |
cparata | 0:dff8803aace7 | 491 | LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2 = 0x11, |
cparata | 0:dff8803aace7 | 492 | LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit = 0x10, |
cparata | 0:dff8803aace7 | 493 | LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4 = 0x1B, |
cparata | 0:dff8803aace7 | 494 | LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3 = 0x1A, |
cparata | 0:dff8803aace7 | 495 | LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2 = 0x19, |
cparata | 0:dff8803aace7 | 496 | LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit = 0x18, |
cparata | 0:dff8803aace7 | 497 | } lis2dw12_mode_t; |
cparata | 0:dff8803aace7 | 498 | int32_t lis2dw12_power_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_mode_t val); |
cparata | 0:dff8803aace7 | 499 | int32_t lis2dw12_power_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_mode_t *val); |
cparata | 0:dff8803aace7 | 500 | |
cparata | 0:dff8803aace7 | 501 | typedef enum { |
cparata | 0:dff8803aace7 | 502 | LIS2DW12_XL_ODR_OFF = 0x00, |
cparata | 0:dff8803aace7 | 503 | LIS2DW12_XL_ODR_1Hz6_LP_ONLY = 0x01, |
cparata | 0:dff8803aace7 | 504 | LIS2DW12_XL_ODR_12Hz5 = 0x02, |
cparata | 0:dff8803aace7 | 505 | LIS2DW12_XL_ODR_25Hz = 0x03, |
cparata | 0:dff8803aace7 | 506 | LIS2DW12_XL_ODR_50Hz = 0x04, |
cparata | 0:dff8803aace7 | 507 | LIS2DW12_XL_ODR_100Hz = 0x05, |
cparata | 0:dff8803aace7 | 508 | LIS2DW12_XL_ODR_200Hz = 0x06, |
cparata | 0:dff8803aace7 | 509 | LIS2DW12_XL_ODR_400Hz = 0x07, |
cparata | 0:dff8803aace7 | 510 | LIS2DW12_XL_ODR_800Hz = 0x08, |
cparata | 0:dff8803aace7 | 511 | LIS2DW12_XL_ODR_1k6Hz = 0x09, |
cparata | 0:dff8803aace7 | 512 | LIS2DW12_XL_SET_SW_TRIG = 0x10, /* Use this only in SINGLE mode */ |
cparata | 0:dff8803aace7 | 513 | LIS2DW12_XL_SET_PIN_TRIG = 0x20, /* Use this only in SINGLE mode */ |
cparata | 0:dff8803aace7 | 514 | } lis2dw12_odr_t; |
cparata | 0:dff8803aace7 | 515 | int32_t lis2dw12_data_rate_set(lis2dw12_ctx_t *ctx, lis2dw12_odr_t val); |
cparata | 0:dff8803aace7 | 516 | int32_t lis2dw12_data_rate_get(lis2dw12_ctx_t *ctx, lis2dw12_odr_t *val); |
cparata | 0:dff8803aace7 | 517 | |
cparata | 0:dff8803aace7 | 518 | int32_t lis2dw12_block_data_update_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 519 | int32_t lis2dw12_block_data_update_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 520 | |
cparata | 0:dff8803aace7 | 521 | typedef enum { |
cparata | 0:dff8803aace7 | 522 | LIS2DW12_2g = 0, |
cparata | 0:dff8803aace7 | 523 | LIS2DW12_4g = 1, |
cparata | 0:dff8803aace7 | 524 | LIS2DW12_8g = 2, |
cparata | 0:dff8803aace7 | 525 | LIS2DW12_16g = 3, |
cparata | 0:dff8803aace7 | 526 | } lis2dw12_fs_t; |
cparata | 0:dff8803aace7 | 527 | int32_t lis2dw12_full_scale_set(lis2dw12_ctx_t *ctx, lis2dw12_fs_t val); |
cparata | 0:dff8803aace7 | 528 | int32_t lis2dw12_full_scale_get(lis2dw12_ctx_t *ctx, lis2dw12_fs_t *val); |
cparata | 0:dff8803aace7 | 529 | |
cparata | 0:dff8803aace7 | 530 | int32_t lis2dw12_status_reg_get(lis2dw12_ctx_t *ctx, lis2dw12_status_t *val); |
cparata | 0:dff8803aace7 | 531 | |
cparata | 0:dff8803aace7 | 532 | int32_t lis2dw12_flag_data_ready_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 533 | |
cparata | 0:dff8803aace7 | 534 | typedef struct{ |
cparata | 0:dff8803aace7 | 535 | lis2dw12_status_dup_t status_dup; |
cparata | 0:dff8803aace7 | 536 | lis2dw12_wake_up_src_t wake_up_src; |
cparata | 0:dff8803aace7 | 537 | lis2dw12_tap_src_t tap_src; |
cparata | 0:dff8803aace7 | 538 | lis2dw12_sixd_src_t sixd_src; |
cparata | 0:dff8803aace7 | 539 | lis2dw12_all_int_src_t all_int_src; |
cparata | 0:dff8803aace7 | 540 | } lis2dw12_all_sources_t; |
cparata | 0:dff8803aace7 | 541 | int32_t lis2dw12_all_sources_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 542 | lis2dw12_all_sources_t *val); |
cparata | 0:dff8803aace7 | 543 | |
cparata | 0:dff8803aace7 | 544 | int32_t lis2dw12_usr_offset_x_set(lis2dw12_ctx_t *ctx, uint8_t *buff); |
cparata | 0:dff8803aace7 | 545 | int32_t lis2dw12_usr_offset_x_get(lis2dw12_ctx_t *ctx, uint8_t *buff); |
cparata | 0:dff8803aace7 | 546 | |
cparata | 0:dff8803aace7 | 547 | int32_t lis2dw12_usr_offset_y_set(lis2dw12_ctx_t *ctx, uint8_t *buff); |
cparata | 0:dff8803aace7 | 548 | int32_t lis2dw12_usr_offset_y_get(lis2dw12_ctx_t *ctx, uint8_t *buff); |
cparata | 0:dff8803aace7 | 549 | |
cparata | 0:dff8803aace7 | 550 | int32_t lis2dw12_usr_offset_z_set(lis2dw12_ctx_t *ctx, uint8_t *buff); |
cparata | 0:dff8803aace7 | 551 | int32_t lis2dw12_usr_offset_z_get(lis2dw12_ctx_t *ctx, uint8_t *buff); |
cparata | 0:dff8803aace7 | 552 | |
cparata | 0:dff8803aace7 | 553 | typedef enum { |
cparata | 0:dff8803aace7 | 554 | LIS2DW12_LSb_977ug = 0, |
cparata | 0:dff8803aace7 | 555 | LIS2DW12_LSb_15mg6 = 1, |
cparata | 0:dff8803aace7 | 556 | } lis2dw12_usr_off_w_t; |
cparata | 0:dff8803aace7 | 557 | int32_t lis2dw12_offset_weight_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 558 | lis2dw12_usr_off_w_t val); |
cparata | 0:dff8803aace7 | 559 | int32_t lis2dw12_offset_weight_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 560 | lis2dw12_usr_off_w_t *val); |
cparata | 0:dff8803aace7 | 561 | |
cparata | 0:dff8803aace7 | 562 | int32_t lis2dw12_temperature_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff); |
cparata | 0:dff8803aace7 | 563 | |
cparata | 0:dff8803aace7 | 564 | int32_t lis2dw12_acceleration_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff); |
cparata | 0:dff8803aace7 | 565 | |
cparata | 0:dff8803aace7 | 566 | int32_t lis2dw12_device_id_get(lis2dw12_ctx_t *ctx, uint8_t *buff); |
cparata | 0:dff8803aace7 | 567 | |
cparata | 0:dff8803aace7 | 568 | int32_t lis2dw12_auto_increment_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 569 | int32_t lis2dw12_auto_increment_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 570 | |
cparata | 0:dff8803aace7 | 571 | int32_t lis2dw12_reset_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 572 | int32_t lis2dw12_reset_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 573 | |
cparata | 0:dff8803aace7 | 574 | int32_t lis2dw12_boot_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 575 | int32_t lis2dw12_boot_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 576 | |
cparata | 0:dff8803aace7 | 577 | typedef enum { |
cparata | 0:dff8803aace7 | 578 | LIS2DW12_XL_ST_DISABLE = 0, |
cparata | 0:dff8803aace7 | 579 | LIS2DW12_XL_ST_POSITIVE = 1, |
cparata | 0:dff8803aace7 | 580 | LIS2DW12_XL_ST_NEGATIVE = 2, |
cparata | 0:dff8803aace7 | 581 | } lis2dw12_st_t; |
cparata | 0:dff8803aace7 | 582 | int32_t lis2dw12_self_test_set(lis2dw12_ctx_t *ctx, lis2dw12_st_t val); |
cparata | 0:dff8803aace7 | 583 | int32_t lis2dw12_self_test_get(lis2dw12_ctx_t *ctx, lis2dw12_st_t *val); |
cparata | 0:dff8803aace7 | 584 | |
cparata | 0:dff8803aace7 | 585 | typedef enum { |
cparata | 0:dff8803aace7 | 586 | LIS2DW12_DRDY_LATCHED = 0, |
cparata | 0:dff8803aace7 | 587 | LIS2DW12_DRDY_PULSED = 1, |
cparata | 0:dff8803aace7 | 588 | } lis2dw12_drdy_pulsed_t; |
cparata | 0:dff8803aace7 | 589 | int32_t lis2dw12_data_ready_mode_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 590 | lis2dw12_drdy_pulsed_t val); |
cparata | 0:dff8803aace7 | 591 | int32_t lis2dw12_data_ready_mode_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 592 | lis2dw12_drdy_pulsed_t *val); |
cparata | 0:dff8803aace7 | 593 | |
cparata | 0:dff8803aace7 | 594 | typedef enum { |
cparata | 0:dff8803aace7 | 595 | LIS2DW12_LPF_ON_OUT = 0x00, |
cparata | 0:dff8803aace7 | 596 | LIS2DW12_USER_OFFSET_ON_OUT = 0x01, |
cparata | 0:dff8803aace7 | 597 | LIS2DW12_HIGH_PASS_ON_OUT = 0x10, |
cparata | 0:dff8803aace7 | 598 | } lis2dw12_fds_t; |
cparata | 0:dff8803aace7 | 599 | int32_t lis2dw12_filter_path_set(lis2dw12_ctx_t *ctx, lis2dw12_fds_t val); |
cparata | 0:dff8803aace7 | 600 | int32_t lis2dw12_filter_path_get(lis2dw12_ctx_t *ctx, lis2dw12_fds_t *val); |
cparata | 0:dff8803aace7 | 601 | |
cparata | 0:dff8803aace7 | 602 | typedef enum { |
cparata | 0:dff8803aace7 | 603 | LIS2DW12_ODR_DIV_2 = 0, |
cparata | 0:dff8803aace7 | 604 | LIS2DW12_ODR_DIV_4 = 1, |
cparata | 0:dff8803aace7 | 605 | LIS2DW12_ODR_DIV_10 = 2, |
cparata | 0:dff8803aace7 | 606 | LIS2DW12_ODR_DIV_20 = 3, |
cparata | 0:dff8803aace7 | 607 | } lis2dw12_bw_filt_t; |
cparata | 0:dff8803aace7 | 608 | int32_t lis2dw12_filter_bandwidth_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 609 | lis2dw12_bw_filt_t val); |
cparata | 0:dff8803aace7 | 610 | int32_t lis2dw12_filter_bandwidth_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 611 | lis2dw12_bw_filt_t *val); |
cparata | 0:dff8803aace7 | 612 | |
cparata | 0:dff8803aace7 | 613 | int32_t lis2dw12_reference_mode_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 614 | int32_t lis2dw12_reference_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 615 | |
cparata | 0:dff8803aace7 | 616 | typedef enum { |
cparata | 0:dff8803aace7 | 617 | LIS2DW12_SPI_4_WIRE = 0, |
cparata | 0:dff8803aace7 | 618 | LIS2DW12_SPI_3_WIRE = 1, |
cparata | 0:dff8803aace7 | 619 | } lis2dw12_sim_t; |
cparata | 0:dff8803aace7 | 620 | int32_t lis2dw12_spi_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sim_t val); |
cparata | 0:dff8803aace7 | 621 | int32_t lis2dw12_spi_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sim_t *val); |
cparata | 0:dff8803aace7 | 622 | |
cparata | 0:dff8803aace7 | 623 | typedef enum { |
cparata | 0:dff8803aace7 | 624 | LIS2DW12_I2C_ENABLE = 0, |
cparata | 0:dff8803aace7 | 625 | LIS2DW12_I2C_DISABLE = 1, |
cparata | 0:dff8803aace7 | 626 | } lis2dw12_i2c_disable_t; |
cparata | 0:dff8803aace7 | 627 | int32_t lis2dw12_i2c_interface_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 628 | lis2dw12_i2c_disable_t val); |
cparata | 0:dff8803aace7 | 629 | int32_t lis2dw12_i2c_interface_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 630 | lis2dw12_i2c_disable_t *val); |
cparata | 0:dff8803aace7 | 631 | |
cparata | 0:dff8803aace7 | 632 | typedef enum { |
cparata | 0:dff8803aace7 | 633 | LIS2DW12_PULL_UP_CONNECT = 0, |
cparata | 0:dff8803aace7 | 634 | LIS2DW12_PULL_UP_DISCONNECT = 1, |
cparata | 0:dff8803aace7 | 635 | } lis2dw12_cs_pu_disc_t; |
cparata | 0:dff8803aace7 | 636 | int32_t lis2dw12_cs_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t val); |
cparata | 0:dff8803aace7 | 637 | int32_t lis2dw12_cs_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t *val); |
cparata | 0:dff8803aace7 | 638 | |
cparata | 0:dff8803aace7 | 639 | typedef enum { |
cparata | 0:dff8803aace7 | 640 | LIS2DW12_ACTIVE_HIGH = 0, |
cparata | 0:dff8803aace7 | 641 | LIS2DW12_ACTIVE_LOW = 1, |
cparata | 0:dff8803aace7 | 642 | } lis2dw12_h_lactive_t; |
cparata | 0:dff8803aace7 | 643 | int32_t lis2dw12_pin_polarity_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 644 | lis2dw12_h_lactive_t val); |
cparata | 0:dff8803aace7 | 645 | int32_t lis2dw12_pin_polarity_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 646 | lis2dw12_h_lactive_t *val); |
cparata | 0:dff8803aace7 | 647 | |
cparata | 0:dff8803aace7 | 648 | typedef enum { |
cparata | 0:dff8803aace7 | 649 | LIS2DW12_INT_PULSED = 0, |
cparata | 0:dff8803aace7 | 650 | LIS2DW12_INT_LATCHED = 1, |
cparata | 0:dff8803aace7 | 651 | } lis2dw12_lir_t; |
cparata | 0:dff8803aace7 | 652 | int32_t lis2dw12_int_notification_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 653 | lis2dw12_lir_t val); |
cparata | 0:dff8803aace7 | 654 | int32_t lis2dw12_int_notification_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 655 | lis2dw12_lir_t *val); |
cparata | 0:dff8803aace7 | 656 | |
cparata | 0:dff8803aace7 | 657 | typedef enum { |
cparata | 0:dff8803aace7 | 658 | LIS2DW12_PUSH_PULL = 0, |
cparata | 0:dff8803aace7 | 659 | LIS2DW12_OPEN_DRAIN = 1, |
cparata | 0:dff8803aace7 | 660 | } lis2dw12_pp_od_t; |
cparata | 0:dff8803aace7 | 661 | int32_t lis2dw12_pin_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t val); |
cparata | 0:dff8803aace7 | 662 | int32_t lis2dw12_pin_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t *val); |
cparata | 0:dff8803aace7 | 663 | |
cparata | 0:dff8803aace7 | 664 | int32_t lis2dw12_pin_int1_route_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 665 | lis2dw12_ctrl4_int1_pad_ctrl_t *val); |
cparata | 0:dff8803aace7 | 666 | int32_t lis2dw12_pin_int1_route_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 667 | lis2dw12_ctrl4_int1_pad_ctrl_t *val); |
cparata | 0:dff8803aace7 | 668 | |
cparata | 0:dff8803aace7 | 669 | int32_t lis2dw12_pin_int2_route_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 670 | lis2dw12_ctrl5_int2_pad_ctrl_t *val); |
cparata | 0:dff8803aace7 | 671 | int32_t lis2dw12_pin_int2_route_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 672 | lis2dw12_ctrl5_int2_pad_ctrl_t *val); |
cparata | 0:dff8803aace7 | 673 | |
cparata | 0:dff8803aace7 | 674 | int32_t lis2dw12_all_on_int1_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 675 | int32_t lis2dw12_all_on_int1_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 676 | |
cparata | 0:dff8803aace7 | 677 | int32_t lis2dw12_wkup_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 678 | int32_t lis2dw12_wkup_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 679 | |
cparata | 0:dff8803aace7 | 680 | int32_t lis2dw12_wkup_dur_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 681 | int32_t lis2dw12_wkup_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 682 | |
cparata | 0:dff8803aace7 | 683 | typedef enum { |
cparata | 0:dff8803aace7 | 684 | LIS2DW12_HP_FEED = 0, |
cparata | 0:dff8803aace7 | 685 | LIS2DW12_USER_OFFSET_FEED = 1, |
cparata | 0:dff8803aace7 | 686 | } lis2dw12_usr_off_on_wu_t; |
cparata | 0:dff8803aace7 | 687 | int32_t lis2dw12_wkup_feed_data_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 688 | lis2dw12_usr_off_on_wu_t val); |
cparata | 0:dff8803aace7 | 689 | int32_t lis2dw12_wkup_feed_data_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 690 | lis2dw12_usr_off_on_wu_t *val); |
cparata | 0:dff8803aace7 | 691 | |
cparata | 0:dff8803aace7 | 692 | typedef enum { |
cparata | 0:dff8803aace7 | 693 | LIS2DW12_NO_DETECTION = 0, |
cparata | 0:dff8803aace7 | 694 | LIS2DW12_DETECT_ACT_INACT = 1, |
cparata | 0:dff8803aace7 | 695 | LIS2DW12_DETECT_STAT_MOTION = 3, |
cparata | 0:dff8803aace7 | 696 | } lis2dw12_sleep_on_t; |
cparata | 0:dff8803aace7 | 697 | int32_t lis2dw12_act_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t val); |
cparata | 0:dff8803aace7 | 698 | int32_t lis2dw12_act_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t *val); |
cparata | 0:dff8803aace7 | 699 | |
cparata | 0:dff8803aace7 | 700 | int32_t lis2dw12_act_sleep_dur_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 701 | int32_t lis2dw12_act_sleep_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 702 | |
cparata | 0:dff8803aace7 | 703 | int32_t lis2dw12_tap_threshold_x_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 704 | int32_t lis2dw12_tap_threshold_x_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 705 | |
cparata | 0:dff8803aace7 | 706 | int32_t lis2dw12_tap_threshold_y_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 707 | int32_t lis2dw12_tap_threshold_y_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 708 | |
cparata | 0:dff8803aace7 | 709 | typedef enum { |
cparata | 0:dff8803aace7 | 710 | LIS2DW12_XYZ = 0, |
cparata | 0:dff8803aace7 | 711 | LIS2DW12_YXZ = 1, |
cparata | 0:dff8803aace7 | 712 | LIS2DW12_XZY = 2, |
cparata | 0:dff8803aace7 | 713 | LIS2DW12_ZYX = 3, |
cparata | 0:dff8803aace7 | 714 | LIS2DW12_YZX = 5, |
cparata | 0:dff8803aace7 | 715 | LIS2DW12_ZXY = 6, |
cparata | 0:dff8803aace7 | 716 | } lis2dw12_tap_prior_t; |
cparata | 0:dff8803aace7 | 717 | int32_t lis2dw12_tap_axis_priority_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 718 | lis2dw12_tap_prior_t val); |
cparata | 0:dff8803aace7 | 719 | int32_t lis2dw12_tap_axis_priority_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 720 | lis2dw12_tap_prior_t *val); |
cparata | 0:dff8803aace7 | 721 | |
cparata | 0:dff8803aace7 | 722 | int32_t lis2dw12_tap_threshold_z_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 723 | int32_t lis2dw12_tap_threshold_z_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 724 | |
cparata | 0:dff8803aace7 | 725 | int32_t lis2dw12_tap_detection_on_z_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 726 | int32_t lis2dw12_tap_detection_on_z_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 727 | |
cparata | 0:dff8803aace7 | 728 | int32_t lis2dw12_tap_detection_on_y_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 729 | int32_t lis2dw12_tap_detection_on_y_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 730 | |
cparata | 0:dff8803aace7 | 731 | int32_t lis2dw12_tap_detection_on_x_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 732 | int32_t lis2dw12_tap_detection_on_x_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 733 | |
cparata | 0:dff8803aace7 | 734 | int32_t lis2dw12_tap_shock_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 735 | int32_t lis2dw12_tap_shock_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 736 | |
cparata | 0:dff8803aace7 | 737 | int32_t lis2dw12_tap_quiet_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 738 | int32_t lis2dw12_tap_quiet_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 739 | |
cparata | 0:dff8803aace7 | 740 | int32_t lis2dw12_tap_dur_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 741 | int32_t lis2dw12_tap_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 742 | |
cparata | 0:dff8803aace7 | 743 | typedef enum { |
cparata | 0:dff8803aace7 | 744 | LIS2DW12_ONLY_SINGLE = 0, |
cparata | 0:dff8803aace7 | 745 | LIS2DW12_BOTH_SINGLE_DOUBLE = 1, |
cparata | 0:dff8803aace7 | 746 | } lis2dw12_single_double_tap_t; |
cparata | 0:dff8803aace7 | 747 | int32_t lis2dw12_tap_mode_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 748 | lis2dw12_single_double_tap_t val); |
cparata | 0:dff8803aace7 | 749 | int32_t lis2dw12_tap_mode_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 750 | lis2dw12_single_double_tap_t *val); |
cparata | 0:dff8803aace7 | 751 | |
cparata | 0:dff8803aace7 | 752 | int32_t lis2dw12_tap_src_get(lis2dw12_ctx_t *ctx, lis2dw12_tap_src_t *val); |
cparata | 0:dff8803aace7 | 753 | |
cparata | 0:dff8803aace7 | 754 | int32_t lis2dw12_6d_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 755 | int32_t lis2dw12_6d_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 756 | |
cparata | 0:dff8803aace7 | 757 | int32_t lis2dw12_4d_mode_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 758 | int32_t lis2dw12_4d_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 759 | |
cparata | 0:dff8803aace7 | 760 | int32_t lis2dw12_6d_src_get(lis2dw12_ctx_t *ctx, lis2dw12_sixd_src_t *val); |
cparata | 0:dff8803aace7 | 761 | |
cparata | 0:dff8803aace7 | 762 | typedef enum { |
cparata | 0:dff8803aace7 | 763 | LIS2DW12_ODR_DIV_2_FEED = 0, |
cparata | 0:dff8803aace7 | 764 | LIS2DW12_LPF2_FEED = 1, |
cparata | 0:dff8803aace7 | 765 | } lis2dw12_lpass_on6d_t; |
cparata | 0:dff8803aace7 | 766 | int32_t lis2dw12_6d_feed_data_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 767 | lis2dw12_lpass_on6d_t val); |
cparata | 0:dff8803aace7 | 768 | int32_t lis2dw12_6d_feed_data_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 769 | lis2dw12_lpass_on6d_t *val); |
cparata | 0:dff8803aace7 | 770 | |
cparata | 0:dff8803aace7 | 771 | int32_t lis2dw12_ff_dur_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 772 | int32_t lis2dw12_ff_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 773 | |
cparata | 0:dff8803aace7 | 774 | typedef enum { |
cparata | 0:dff8803aace7 | 775 | LIS2DW12_FF_TSH_5LSb_FS2g = 0, |
cparata | 0:dff8803aace7 | 776 | LIS2DW12_FF_TSH_7LSb_FS2g = 1, |
cparata | 0:dff8803aace7 | 777 | LIS2DW12_FF_TSH_8LSb_FS2g = 2, |
cparata | 0:dff8803aace7 | 778 | LIS2DW12_FF_TSH_10LSb_FS2g = 3, |
cparata | 0:dff8803aace7 | 779 | LIS2DW12_FF_TSH_11LSb_FS2g = 4, |
cparata | 0:dff8803aace7 | 780 | LIS2DW12_FF_TSH_13LSb_FS2g = 5, |
cparata | 0:dff8803aace7 | 781 | LIS2DW12_FF_TSH_15LSb_FS2g = 6, |
cparata | 0:dff8803aace7 | 782 | LIS2DW12_FF_TSH_16LSb_FS2g = 7, |
cparata | 0:dff8803aace7 | 783 | } lis2dw12_ff_ths_t; |
cparata | 0:dff8803aace7 | 784 | int32_t lis2dw12_ff_threshold_set(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 785 | lis2dw12_ff_ths_t val); |
cparata | 0:dff8803aace7 | 786 | int32_t lis2dw12_ff_threshold_get(lis2dw12_ctx_t *ctx, |
cparata | 0:dff8803aace7 | 787 | lis2dw12_ff_ths_t *val); |
cparata | 0:dff8803aace7 | 788 | |
cparata | 0:dff8803aace7 | 789 | int32_t lis2dw12_fifo_watermark_set(lis2dw12_ctx_t *ctx, uint8_t val); |
cparata | 0:dff8803aace7 | 790 | int32_t lis2dw12_fifo_watermark_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 791 | |
cparata | 0:dff8803aace7 | 792 | typedef enum { |
cparata | 0:dff8803aace7 | 793 | LIS2DW12_BYPASS_MODE = 0, |
cparata | 0:dff8803aace7 | 794 | LIS2DW12_FIFO_MODE = 1, |
cparata | 0:dff8803aace7 | 795 | LIS2DW12_STREAM_TO_FIFO_MODE = 3, |
cparata | 0:dff8803aace7 | 796 | LIS2DW12_BYPASS_TO_STREAM_MODE = 4, |
cparata | 0:dff8803aace7 | 797 | LIS2DW12_STREAM_MODE = 6, |
cparata | 0:dff8803aace7 | 798 | } lis2dw12_fmode_t; |
cparata | 0:dff8803aace7 | 799 | int32_t lis2dw12_fifo_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t val); |
cparata | 0:dff8803aace7 | 800 | int32_t lis2dw12_fifo_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t *val); |
cparata | 0:dff8803aace7 | 801 | |
cparata | 0:dff8803aace7 | 802 | int32_t lis2dw12_fifo_data_level_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 803 | |
cparata | 0:dff8803aace7 | 804 | int32_t lis2dw12_fifo_ovr_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 805 | |
cparata | 0:dff8803aace7 | 806 | int32_t lis2dw12_fifo_wtm_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val); |
cparata | 0:dff8803aace7 | 807 | |
cparata | 0:dff8803aace7 | 808 | /** |
cparata | 0:dff8803aace7 | 809 | * @} |
cparata | 2:a94816b14e3d | 810 | * |
cparata | 2:a94816b14e3d | 811 | */ |
cparata | 0:dff8803aace7 | 812 | |
cparata | 0:dff8803aace7 | 813 | #ifdef __cplusplus |
cparata | 0:dff8803aace7 | 814 | } |
cparata | 0:dff8803aace7 | 815 | #endif |
cparata | 0:dff8803aace7 | 816 | |
cparata | 2:a94816b14e3d | 817 | #endif /*LIS2DW12_REGS_H */ |
cparata | 0:dff8803aace7 | 818 | |
cparata | 0:dff8803aace7 | 819 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |