Interactive Device Design / Mbed 2 deprecated air_zuma

Control the wondrous spinning-frog game of Zuma's Revenge with a rotating chair and an Airzooka. Maps compass rotation, flex sensor and push button input to USB actions to control Zuma's Revenge (http://www.popcap.com/games/zumas-revenge/online)

Dependencies:   LSM303DLHC mbed

Note that content for USB HID and USB Device is actually from the USBDevice mbed library. However, we made a couple of small changes to this library (allowing USB clicks at a particular location) that required us to break it off from the main project if we wanted to publish without pushing upstream.

USBDevice/USBHAL_LPC17.cpp@0:4df415dde990, 2014-09-29 (annotated)

Committer:
andrewhead
Date:
Mon Sep 29 01:12:20 2014 +0000
Revision:
0:4df415dde990
Initial Commit.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
andrewhead 0:4df415dde990 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
andrewhead 0:4df415dde990 2 *
andrewhead 0:4df415dde990 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
andrewhead 0:4df415dde990 4 * and associated documentation files (the "Software"), to deal in the Software without
andrewhead 0:4df415dde990 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
andrewhead 0:4df415dde990 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
andrewhead 0:4df415dde990 7 * Software is furnished to do so, subject to the following conditions:
andrewhead 0:4df415dde990 8 *
andrewhead 0:4df415dde990 9 * The above copyright notice and this permission notice shall be included in all copies or
andrewhead 0:4df415dde990 10 * substantial portions of the Software.
andrewhead 0:4df415dde990 11 *
andrewhead 0:4df415dde990 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
andrewhead 0:4df415dde990 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
andrewhead 0:4df415dde990 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
andrewhead 0:4df415dde990 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
andrewhead 0:4df415dde990 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
andrewhead 0:4df415dde990 17 */
andrewhead 0:4df415dde990 18
andrewhead 0:4df415dde990 19 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
andrewhead 0:4df415dde990 20
andrewhead 0:4df415dde990 21 #include "USBHAL.h"
andrewhead 0:4df415dde990 22
andrewhead 0:4df415dde990 23
andrewhead 0:4df415dde990 24 // Get endpoint direction
andrewhead 0:4df415dde990 25 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
andrewhead 0:4df415dde990 26 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
andrewhead 0:4df415dde990 27
andrewhead 0:4df415dde990 28 // Convert physical endpoint number to register bit
andrewhead 0:4df415dde990 29 #define EP(endpoint) (1UL<<endpoint)
andrewhead 0:4df415dde990 30
andrewhead 0:4df415dde990 31 // Power Control for Peripherals register
andrewhead 0:4df415dde990 32 #define PCUSB (1UL<<31)
andrewhead 0:4df415dde990 33
andrewhead 0:4df415dde990 34 // USB Clock Control register
andrewhead 0:4df415dde990 35 #define DEV_CLK_EN (1UL<<1)
andrewhead 0:4df415dde990 36 #define AHB_CLK_EN (1UL<<4)
andrewhead 0:4df415dde990 37
andrewhead 0:4df415dde990 38 // USB Clock Status register
andrewhead 0:4df415dde990 39 #define DEV_CLK_ON (1UL<<1)
andrewhead 0:4df415dde990 40 #define AHB_CLK_ON (1UL<<4)
andrewhead 0:4df415dde990 41
andrewhead 0:4df415dde990 42 // USB Device Interupt registers
andrewhead 0:4df415dde990 43 #define FRAME (1UL<<0)
andrewhead 0:4df415dde990 44 #define EP_FAST (1UL<<1)
andrewhead 0:4df415dde990 45 #define EP_SLOW (1UL<<2)
andrewhead 0:4df415dde990 46 #define DEV_STAT (1UL<<3)
andrewhead 0:4df415dde990 47 #define CCEMPTY (1UL<<4)
andrewhead 0:4df415dde990 48 #define CDFULL (1UL<<5)
andrewhead 0:4df415dde990 49 #define RxENDPKT (1UL<<6)
andrewhead 0:4df415dde990 50 #define TxENDPKT (1UL<<7)
andrewhead 0:4df415dde990 51 #define EP_RLZED (1UL<<8)
andrewhead 0:4df415dde990 52 #define ERR_INT (1UL<<9)
andrewhead 0:4df415dde990 53
andrewhead 0:4df415dde990 54 // USB Control register
andrewhead 0:4df415dde990 55 #define RD_EN (1<<0)
andrewhead 0:4df415dde990 56 #define WR_EN (1<<1)
andrewhead 0:4df415dde990 57 #define LOG_ENDPOINT(endpoint) ((endpoint>>1)<<2)
andrewhead 0:4df415dde990 58
andrewhead 0:4df415dde990 59 // USB Receive Packet Length register
andrewhead 0:4df415dde990 60 #define DV (1UL<<10)
andrewhead 0:4df415dde990 61 #define PKT_RDY (1UL<<11)
andrewhead 0:4df415dde990 62 #define PKT_LNGTH_MASK (0x3ff)
andrewhead 0:4df415dde990 63
andrewhead 0:4df415dde990 64 // Serial Interface Engine (SIE)
andrewhead 0:4df415dde990 65 #define SIE_WRITE (0x01)
andrewhead 0:4df415dde990 66 #define SIE_READ (0x02)
andrewhead 0:4df415dde990 67 #define SIE_COMMAND (0x05)
andrewhead 0:4df415dde990 68 #define SIE_CMD_CODE(phase, data) ((phase<<8)|(data<<16))
andrewhead 0:4df415dde990 69
andrewhead 0:4df415dde990 70 // SIE Command codes
andrewhead 0:4df415dde990 71 #define SIE_CMD_SET_ADDRESS (0xD0)
andrewhead 0:4df415dde990 72 #define SIE_CMD_CONFIGURE_DEVICE (0xD8)
andrewhead 0:4df415dde990 73 #define SIE_CMD_SET_MODE (0xF3)
andrewhead 0:4df415dde990 74 #define SIE_CMD_READ_FRAME_NUMBER (0xF5)
andrewhead 0:4df415dde990 75 #define SIE_CMD_READ_TEST_REGISTER (0xFD)
andrewhead 0:4df415dde990 76 #define SIE_CMD_SET_DEVICE_STATUS (0xFE)
andrewhead 0:4df415dde990 77 #define SIE_CMD_GET_DEVICE_STATUS (0xFE)
andrewhead 0:4df415dde990 78 #define SIE_CMD_GET_ERROR_CODE (0xFF)
andrewhead 0:4df415dde990 79 #define SIE_CMD_READ_ERROR_STATUS (0xFB)
andrewhead 0:4df415dde990 80
andrewhead 0:4df415dde990 81 #define SIE_CMD_SELECT_ENDPOINT(endpoint) (0x00+endpoint)
andrewhead 0:4df415dde990 82 #define SIE_CMD_SELECT_ENDPOINT_CLEAR_INTERRUPT(endpoint) (0x40+endpoint)
andrewhead 0:4df415dde990 83 #define SIE_CMD_SET_ENDPOINT_STATUS(endpoint) (0x40+endpoint)
andrewhead 0:4df415dde990 84
andrewhead 0:4df415dde990 85 #define SIE_CMD_CLEAR_BUFFER (0xF2)
andrewhead 0:4df415dde990 86 #define SIE_CMD_VALIDATE_BUFFER (0xFA)
andrewhead 0:4df415dde990 87
andrewhead 0:4df415dde990 88 // SIE Device Status register
andrewhead 0:4df415dde990 89 #define SIE_DS_CON (1<<0)
andrewhead 0:4df415dde990 90 #define SIE_DS_CON_CH (1<<1)
andrewhead 0:4df415dde990 91 #define SIE_DS_SUS (1<<2)
andrewhead 0:4df415dde990 92 #define SIE_DS_SUS_CH (1<<3)
andrewhead 0:4df415dde990 93 #define SIE_DS_RST (1<<4)
andrewhead 0:4df415dde990 94
andrewhead 0:4df415dde990 95 // SIE Device Set Address register
andrewhead 0:4df415dde990 96 #define SIE_DSA_DEV_EN (1<<7)
andrewhead 0:4df415dde990 97
andrewhead 0:4df415dde990 98 // SIE Configue Device register
andrewhead 0:4df415dde990 99 #define SIE_CONF_DEVICE (1<<0)
andrewhead 0:4df415dde990 100
andrewhead 0:4df415dde990 101 // Select Endpoint register
andrewhead 0:4df415dde990 102 #define SIE_SE_FE (1<<0)
andrewhead 0:4df415dde990 103 #define SIE_SE_ST (1<<1)
andrewhead 0:4df415dde990 104 #define SIE_SE_STP (1<<2)
andrewhead 0:4df415dde990 105 #define SIE_SE_PO (1<<3)
andrewhead 0:4df415dde990 106 #define SIE_SE_EPN (1<<4)
andrewhead 0:4df415dde990 107 #define SIE_SE_B_1_FULL (1<<5)
andrewhead 0:4df415dde990 108 #define SIE_SE_B_2_FULL (1<<6)
andrewhead 0:4df415dde990 109
andrewhead 0:4df415dde990 110 // Set Endpoint Status command
andrewhead 0:4df415dde990 111 #define SIE_SES_ST (1<<0)
andrewhead 0:4df415dde990 112 #define SIE_SES_DA (1<<5)
andrewhead 0:4df415dde990 113 #define SIE_SES_RF_MO (1<<6)
andrewhead 0:4df415dde990 114 #define SIE_SES_CND_ST (1<<7)
andrewhead 0:4df415dde990 115
andrewhead 0:4df415dde990 116
andrewhead 0:4df415dde990 117 USBHAL * USBHAL::instance;
andrewhead 0:4df415dde990 118
andrewhead 0:4df415dde990 119 static volatile int epComplete;
andrewhead 0:4df415dde990 120 static uint32_t endpointStallState;
andrewhead 0:4df415dde990 121
andrewhead 0:4df415dde990 122 static void SIECommand(uint32_t command) {
andrewhead 0:4df415dde990 123 // The command phase of a SIE transaction
andrewhead 0:4df415dde990 124 LPC_USB->USBDevIntClr = CCEMPTY;
andrewhead 0:4df415dde990 125 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_COMMAND, command);
andrewhead 0:4df415dde990 126 while (!(LPC_USB->USBDevIntSt & CCEMPTY));
andrewhead 0:4df415dde990 127 }
andrewhead 0:4df415dde990 128
andrewhead 0:4df415dde990 129 static void SIEWriteData(uint8_t data) {
andrewhead 0:4df415dde990 130 // The data write phase of a SIE transaction
andrewhead 0:4df415dde990 131 LPC_USB->USBDevIntClr = CCEMPTY;
andrewhead 0:4df415dde990 132 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_WRITE, data);
andrewhead 0:4df415dde990 133 while (!(LPC_USB->USBDevIntSt & CCEMPTY));
andrewhead 0:4df415dde990 134 }
andrewhead 0:4df415dde990 135
andrewhead 0:4df415dde990 136 static uint8_t SIEReadData(uint32_t command) {
andrewhead 0:4df415dde990 137 // The data read phase of a SIE transaction
andrewhead 0:4df415dde990 138 LPC_USB->USBDevIntClr = CDFULL;
andrewhead 0:4df415dde990 139 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_READ, command);
andrewhead 0:4df415dde990 140 while (!(LPC_USB->USBDevIntSt & CDFULL));
andrewhead 0:4df415dde990 141 return (uint8_t)LPC_USB->USBCmdData;
andrewhead 0:4df415dde990 142 }
andrewhead 0:4df415dde990 143
andrewhead 0:4df415dde990 144 static void SIEsetDeviceStatus(uint8_t status) {
andrewhead 0:4df415dde990 145 // Write SIE device status register
andrewhead 0:4df415dde990 146 SIECommand(SIE_CMD_SET_DEVICE_STATUS);
andrewhead 0:4df415dde990 147 SIEWriteData(status);
andrewhead 0:4df415dde990 148 }
andrewhead 0:4df415dde990 149
andrewhead 0:4df415dde990 150 static uint8_t SIEgetDeviceStatus(void) {
andrewhead 0:4df415dde990 151 // Read SIE device status register
andrewhead 0:4df415dde990 152 SIECommand(SIE_CMD_GET_DEVICE_STATUS);
andrewhead 0:4df415dde990 153 return SIEReadData(SIE_CMD_GET_DEVICE_STATUS);
andrewhead 0:4df415dde990 154 }
andrewhead 0:4df415dde990 155
andrewhead 0:4df415dde990 156 void SIEsetAddress(uint8_t address) {
andrewhead 0:4df415dde990 157 // Write SIE device address register
andrewhead 0:4df415dde990 158 SIECommand(SIE_CMD_SET_ADDRESS);
andrewhead 0:4df415dde990 159 SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN);
andrewhead 0:4df415dde990 160 }
andrewhead 0:4df415dde990 161
andrewhead 0:4df415dde990 162 static uint8_t SIEselectEndpoint(uint8_t endpoint) {
andrewhead 0:4df415dde990 163 // SIE select endpoint command
andrewhead 0:4df415dde990 164 SIECommand(SIE_CMD_SELECT_ENDPOINT(endpoint));
andrewhead 0:4df415dde990 165 return SIEReadData(SIE_CMD_SELECT_ENDPOINT(endpoint));
andrewhead 0:4df415dde990 166 }
andrewhead 0:4df415dde990 167
andrewhead 0:4df415dde990 168 static uint8_t SIEclearBuffer(void) {
andrewhead 0:4df415dde990 169 // SIE clear buffer command
andrewhead 0:4df415dde990 170 SIECommand(SIE_CMD_CLEAR_BUFFER);
andrewhead 0:4df415dde990 171 return SIEReadData(SIE_CMD_CLEAR_BUFFER);
andrewhead 0:4df415dde990 172 }
andrewhead 0:4df415dde990 173
andrewhead 0:4df415dde990 174 static void SIEvalidateBuffer(void) {
andrewhead 0:4df415dde990 175 // SIE validate buffer command
andrewhead 0:4df415dde990 176 SIECommand(SIE_CMD_VALIDATE_BUFFER);
andrewhead 0:4df415dde990 177 }
andrewhead 0:4df415dde990 178
andrewhead 0:4df415dde990 179 static void SIEsetEndpointStatus(uint8_t endpoint, uint8_t status) {
andrewhead 0:4df415dde990 180 // SIE set endpoint status command
andrewhead 0:4df415dde990 181 SIECommand(SIE_CMD_SET_ENDPOINT_STATUS(endpoint));
andrewhead 0:4df415dde990 182 SIEWriteData(status);
andrewhead 0:4df415dde990 183 }
andrewhead 0:4df415dde990 184
andrewhead 0:4df415dde990 185 static uint16_t SIEgetFrameNumber(void) __attribute__ ((unused));
andrewhead 0:4df415dde990 186 static uint16_t SIEgetFrameNumber(void) {
andrewhead 0:4df415dde990 187 // Read current frame number
andrewhead 0:4df415dde990 188 uint16_t lowByte;
andrewhead 0:4df415dde990 189 uint16_t highByte;
andrewhead 0:4df415dde990 190
andrewhead 0:4df415dde990 191 SIECommand(SIE_CMD_READ_FRAME_NUMBER);
andrewhead 0:4df415dde990 192 lowByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
andrewhead 0:4df415dde990 193 highByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
andrewhead 0:4df415dde990 194
andrewhead 0:4df415dde990 195 return (highByte << 8) | lowByte;
andrewhead 0:4df415dde990 196 }
andrewhead 0:4df415dde990 197
andrewhead 0:4df415dde990 198 static void SIEconfigureDevice(void) {
andrewhead 0:4df415dde990 199 // SIE Configure device command
andrewhead 0:4df415dde990 200 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
andrewhead 0:4df415dde990 201 SIEWriteData(SIE_CONF_DEVICE);
andrewhead 0:4df415dde990 202 }
andrewhead 0:4df415dde990 203
andrewhead 0:4df415dde990 204 static void SIEunconfigureDevice(void) {
andrewhead 0:4df415dde990 205 // SIE Configure device command
andrewhead 0:4df415dde990 206 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
andrewhead 0:4df415dde990 207 SIEWriteData(0);
andrewhead 0:4df415dde990 208 }
andrewhead 0:4df415dde990 209
andrewhead 0:4df415dde990 210 static void SIEconnect(void) {
andrewhead 0:4df415dde990 211 // Connect USB device
andrewhead 0:4df415dde990 212 uint8_t status = SIEgetDeviceStatus();
andrewhead 0:4df415dde990 213 SIEsetDeviceStatus(status | SIE_DS_CON);
andrewhead 0:4df415dde990 214 }
andrewhead 0:4df415dde990 215
andrewhead 0:4df415dde990 216
andrewhead 0:4df415dde990 217 static void SIEdisconnect(void) {
andrewhead 0:4df415dde990 218 // Disconnect USB device
andrewhead 0:4df415dde990 219 uint8_t status = SIEgetDeviceStatus();
andrewhead 0:4df415dde990 220 SIEsetDeviceStatus(status & ~SIE_DS_CON);
andrewhead 0:4df415dde990 221 }
andrewhead 0:4df415dde990 222
andrewhead 0:4df415dde990 223
andrewhead 0:4df415dde990 224 static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) {
andrewhead 0:4df415dde990 225 // Implemented using using EP_INT_CLR.
andrewhead 0:4df415dde990 226 LPC_USB->USBEpIntClr = EP(endpoint);
andrewhead 0:4df415dde990 227 while (!(LPC_USB->USBDevIntSt & CDFULL));
andrewhead 0:4df415dde990 228 return (uint8_t)LPC_USB->USBCmdData;
andrewhead 0:4df415dde990 229 }
andrewhead 0:4df415dde990 230
andrewhead 0:4df415dde990 231
andrewhead 0:4df415dde990 232 static void enableEndpointEvent(uint8_t endpoint) {
andrewhead 0:4df415dde990 233 // Enable an endpoint interrupt
andrewhead 0:4df415dde990 234 LPC_USB->USBEpIntEn |= EP(endpoint);
andrewhead 0:4df415dde990 235 }
andrewhead 0:4df415dde990 236
andrewhead 0:4df415dde990 237 static void disableEndpointEvent(uint8_t endpoint) __attribute__ ((unused));
andrewhead 0:4df415dde990 238 static void disableEndpointEvent(uint8_t endpoint) {
andrewhead 0:4df415dde990 239 // Disable an endpoint interrupt
andrewhead 0:4df415dde990 240 LPC_USB->USBEpIntEn &= ~EP(endpoint);
andrewhead 0:4df415dde990 241 }
andrewhead 0:4df415dde990 242
andrewhead 0:4df415dde990 243 static volatile uint32_t __attribute__((used)) dummyRead;
andrewhead 0:4df415dde990 244 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
andrewhead 0:4df415dde990 245 // Read from an OUT endpoint
andrewhead 0:4df415dde990 246 uint32_t size;
andrewhead 0:4df415dde990 247 uint32_t i;
andrewhead 0:4df415dde990 248 uint32_t data = 0;
andrewhead 0:4df415dde990 249 uint8_t offset;
andrewhead 0:4df415dde990 250
andrewhead 0:4df415dde990 251 LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | RD_EN;
andrewhead 0:4df415dde990 252 while (!(LPC_USB->USBRxPLen & PKT_RDY));
andrewhead 0:4df415dde990 253
andrewhead 0:4df415dde990 254 size = LPC_USB->USBRxPLen & PKT_LNGTH_MASK;
andrewhead 0:4df415dde990 255
andrewhead 0:4df415dde990 256 offset = 0;
andrewhead 0:4df415dde990 257
andrewhead 0:4df415dde990 258 if (size > 0) {
andrewhead 0:4df415dde990 259 for (i=0; i<size; i++) {
andrewhead 0:4df415dde990 260 if (offset==0) {
andrewhead 0:4df415dde990 261 // Fetch up to four bytes of data as a word
andrewhead 0:4df415dde990 262 data = LPC_USB->USBRxData;
andrewhead 0:4df415dde990 263 }
andrewhead 0:4df415dde990 264
andrewhead 0:4df415dde990 265 // extract a byte
andrewhead 0:4df415dde990 266 *buffer = (data>>offset) & 0xff;
andrewhead 0:4df415dde990 267 buffer++;
andrewhead 0:4df415dde990 268
andrewhead 0:4df415dde990 269 // move on to the next byte
andrewhead 0:4df415dde990 270 offset = (offset + 8) % 32;
andrewhead 0:4df415dde990 271 }
andrewhead 0:4df415dde990 272 } else {
andrewhead 0:4df415dde990 273 dummyRead = LPC_USB->USBRxData;
andrewhead 0:4df415dde990 274 }
andrewhead 0:4df415dde990 275
andrewhead 0:4df415dde990 276 LPC_USB->USBCtrl = 0;
andrewhead 0:4df415dde990 277
andrewhead 0:4df415dde990 278 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
andrewhead 0:4df415dde990 279 SIEselectEndpoint(endpoint);
andrewhead 0:4df415dde990 280 SIEclearBuffer();
andrewhead 0:4df415dde990 281 }
andrewhead 0:4df415dde990 282
andrewhead 0:4df415dde990 283 return size;
andrewhead 0:4df415dde990 284 }
andrewhead 0:4df415dde990 285
andrewhead 0:4df415dde990 286 static void endpointWritecore(uint8_t endpoint, uint8_t *buffer, uint32_t size) {
andrewhead 0:4df415dde990 287 // Write to an IN endpoint
andrewhead 0:4df415dde990 288 uint32_t temp, data;
andrewhead 0:4df415dde990 289 uint8_t offset;
andrewhead 0:4df415dde990 290
andrewhead 0:4df415dde990 291 LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | WR_EN;
andrewhead 0:4df415dde990 292
andrewhead 0:4df415dde990 293 LPC_USB->USBTxPLen = size;
andrewhead 0:4df415dde990 294 offset = 0;
andrewhead 0:4df415dde990 295 data = 0;
andrewhead 0:4df415dde990 296
andrewhead 0:4df415dde990 297 if (size>0) {
andrewhead 0:4df415dde990 298 do {
andrewhead 0:4df415dde990 299 // Fetch next data byte into a word-sized temporary variable
andrewhead 0:4df415dde990 300 temp = *buffer++;
andrewhead 0:4df415dde990 301
andrewhead 0:4df415dde990 302 // Add to current data word
andrewhead 0:4df415dde990 303 temp = temp << offset;
andrewhead 0:4df415dde990 304 data = data | temp;
andrewhead 0:4df415dde990 305
andrewhead 0:4df415dde990 306 // move on to the next byte
andrewhead 0:4df415dde990 307 offset = (offset + 8) % 32;
andrewhead 0:4df415dde990 308 size--;
andrewhead 0:4df415dde990 309
andrewhead 0:4df415dde990 310 if ((offset==0) || (size==0)) {
andrewhead 0:4df415dde990 311 // Write the word to the endpoint
andrewhead 0:4df415dde990 312 LPC_USB->USBTxData = data;
andrewhead 0:4df415dde990 313 data = 0;
andrewhead 0:4df415dde990 314 }
andrewhead 0:4df415dde990 315 } while (size>0);
andrewhead 0:4df415dde990 316 } else {
andrewhead 0:4df415dde990 317 LPC_USB->USBTxData = 0;
andrewhead 0:4df415dde990 318 }
andrewhead 0:4df415dde990 319
andrewhead 0:4df415dde990 320 // Clear WR_EN to cover zero length packet case
andrewhead 0:4df415dde990 321 LPC_USB->USBCtrl=0;
andrewhead 0:4df415dde990 322
andrewhead 0:4df415dde990 323 SIEselectEndpoint(endpoint);
andrewhead 0:4df415dde990 324 SIEvalidateBuffer();
andrewhead 0:4df415dde990 325 }
andrewhead 0:4df415dde990 326
andrewhead 0:4df415dde990 327 USBHAL::USBHAL(void) {
andrewhead 0:4df415dde990 328 // Disable IRQ
andrewhead 0:4df415dde990 329 NVIC_DisableIRQ(USB_IRQn);
andrewhead 0:4df415dde990 330
andrewhead 0:4df415dde990 331 // fill in callback array
andrewhead 0:4df415dde990 332 epCallback[0] = &USBHAL::EP1_OUT_callback;
andrewhead 0:4df415dde990 333 epCallback[1] = &USBHAL::EP1_IN_callback;
andrewhead 0:4df415dde990 334 epCallback[2] = &USBHAL::EP2_OUT_callback;
andrewhead 0:4df415dde990 335 epCallback[3] = &USBHAL::EP2_IN_callback;
andrewhead 0:4df415dde990 336 epCallback[4] = &USBHAL::EP3_OUT_callback;
andrewhead 0:4df415dde990 337 epCallback[5] = &USBHAL::EP3_IN_callback;
andrewhead 0:4df415dde990 338 epCallback[6] = &USBHAL::EP4_OUT_callback;
andrewhead 0:4df415dde990 339 epCallback[7] = &USBHAL::EP4_IN_callback;
andrewhead 0:4df415dde990 340 epCallback[8] = &USBHAL::EP5_OUT_callback;
andrewhead 0:4df415dde990 341 epCallback[9] = &USBHAL::EP5_IN_callback;
andrewhead 0:4df415dde990 342 epCallback[10] = &USBHAL::EP6_OUT_callback;
andrewhead 0:4df415dde990 343 epCallback[11] = &USBHAL::EP6_IN_callback;
andrewhead 0:4df415dde990 344 epCallback[12] = &USBHAL::EP7_OUT_callback;
andrewhead 0:4df415dde990 345 epCallback[13] = &USBHAL::EP7_IN_callback;
andrewhead 0:4df415dde990 346 epCallback[14] = &USBHAL::EP8_OUT_callback;
andrewhead 0:4df415dde990 347 epCallback[15] = &USBHAL::EP8_IN_callback;
andrewhead 0:4df415dde990 348 epCallback[16] = &USBHAL::EP9_OUT_callback;
andrewhead 0:4df415dde990 349 epCallback[17] = &USBHAL::EP9_IN_callback;
andrewhead 0:4df415dde990 350 epCallback[18] = &USBHAL::EP10_OUT_callback;
andrewhead 0:4df415dde990 351 epCallback[19] = &USBHAL::EP10_IN_callback;
andrewhead 0:4df415dde990 352 epCallback[20] = &USBHAL::EP11_OUT_callback;
andrewhead 0:4df415dde990 353 epCallback[21] = &USBHAL::EP11_IN_callback;
andrewhead 0:4df415dde990 354 epCallback[22] = &USBHAL::EP12_OUT_callback;
andrewhead 0:4df415dde990 355 epCallback[23] = &USBHAL::EP12_IN_callback;
andrewhead 0:4df415dde990 356 epCallback[24] = &USBHAL::EP13_OUT_callback;
andrewhead 0:4df415dde990 357 epCallback[25] = &USBHAL::EP13_IN_callback;
andrewhead 0:4df415dde990 358 epCallback[26] = &USBHAL::EP14_OUT_callback;
andrewhead 0:4df415dde990 359 epCallback[27] = &USBHAL::EP14_IN_callback;
andrewhead 0:4df415dde990 360 epCallback[28] = &USBHAL::EP15_OUT_callback;
andrewhead 0:4df415dde990 361 epCallback[29] = &USBHAL::EP15_IN_callback;
andrewhead 0:4df415dde990 362
andrewhead 0:4df415dde990 363 // Enable power to USB device controller
andrewhead 0:4df415dde990 364 LPC_SC->PCONP |= PCUSB;
andrewhead 0:4df415dde990 365
andrewhead 0:4df415dde990 366 // Enable USB clocks
andrewhead 0:4df415dde990 367 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
andrewhead 0:4df415dde990 368 while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON));
andrewhead 0:4df415dde990 369
andrewhead 0:4df415dde990 370 // Configure pins P0.29 and P0.30 to be USB D+ and USB D-
andrewhead 0:4df415dde990 371 LPC_PINCON->PINSEL1 &= 0xc3ffffff;
andrewhead 0:4df415dde990 372 LPC_PINCON->PINSEL1 |= 0x14000000;
andrewhead 0:4df415dde990 373
andrewhead 0:4df415dde990 374 // Disconnect USB device
andrewhead 0:4df415dde990 375 SIEdisconnect();
andrewhead 0:4df415dde990 376
andrewhead 0:4df415dde990 377 // Configure pin P2.9 to be Connect
andrewhead 0:4df415dde990 378 LPC_PINCON->PINSEL4 &= 0xfffcffff;
andrewhead 0:4df415dde990 379 LPC_PINCON->PINSEL4 |= 0x00040000;
andrewhead 0:4df415dde990 380
andrewhead 0:4df415dde990 381 // Connect must be low for at least 2.5uS
andrewhead 0:4df415dde990 382 wait(0.3);
andrewhead 0:4df415dde990 383
andrewhead 0:4df415dde990 384 // Set the maximum packet size for the control endpoints
andrewhead 0:4df415dde990 385 realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
andrewhead 0:4df415dde990 386 realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
andrewhead 0:4df415dde990 387
andrewhead 0:4df415dde990 388 // Attach IRQ
andrewhead 0:4df415dde990 389 instance = this;
andrewhead 0:4df415dde990 390 NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
andrewhead 0:4df415dde990 391
andrewhead 0:4df415dde990 392 // Enable interrupts for device events and EP0
andrewhead 0:4df415dde990 393 LPC_USB->USBDevIntEn = EP_SLOW | DEV_STAT | FRAME;
andrewhead 0:4df415dde990 394 enableEndpointEvent(EP0IN);
andrewhead 0:4df415dde990 395 enableEndpointEvent(EP0OUT);
andrewhead 0:4df415dde990 396 }
andrewhead 0:4df415dde990 397
andrewhead 0:4df415dde990 398 USBHAL::~USBHAL(void) {
andrewhead 0:4df415dde990 399 // Ensure device disconnected
andrewhead 0:4df415dde990 400 SIEdisconnect();
andrewhead 0:4df415dde990 401 // Disable USB interrupts
andrewhead 0:4df415dde990 402 NVIC_DisableIRQ(USB_IRQn);
andrewhead 0:4df415dde990 403 }
andrewhead 0:4df415dde990 404
andrewhead 0:4df415dde990 405 void USBHAL::connect(void) {
andrewhead 0:4df415dde990 406 NVIC_EnableIRQ(USB_IRQn);
andrewhead 0:4df415dde990 407 // Connect USB device
andrewhead 0:4df415dde990 408 SIEconnect();
andrewhead 0:4df415dde990 409 }
andrewhead 0:4df415dde990 410
andrewhead 0:4df415dde990 411 void USBHAL::disconnect(void) {
andrewhead 0:4df415dde990 412 NVIC_DisableIRQ(USB_IRQn);
andrewhead 0:4df415dde990 413 // Disconnect USB device
andrewhead 0:4df415dde990 414 SIEdisconnect();
andrewhead 0:4df415dde990 415 }
andrewhead 0:4df415dde990 416
andrewhead 0:4df415dde990 417 void USBHAL::configureDevice(void) {
andrewhead 0:4df415dde990 418 SIEconfigureDevice();
andrewhead 0:4df415dde990 419 }
andrewhead 0:4df415dde990 420
andrewhead 0:4df415dde990 421 void USBHAL::unconfigureDevice(void) {
andrewhead 0:4df415dde990 422 SIEunconfigureDevice();
andrewhead 0:4df415dde990 423 }
andrewhead 0:4df415dde990 424
andrewhead 0:4df415dde990 425 void USBHAL::setAddress(uint8_t address) {
andrewhead 0:4df415dde990 426 SIEsetAddress(address);
andrewhead 0:4df415dde990 427 }
andrewhead 0:4df415dde990 428
andrewhead 0:4df415dde990 429 void USBHAL::EP0setup(uint8_t *buffer) {
andrewhead 0:4df415dde990 430 endpointReadcore(EP0OUT, buffer);
andrewhead 0:4df415dde990 431 }
andrewhead 0:4df415dde990 432
andrewhead 0:4df415dde990 433 void USBHAL::EP0read(void) {
andrewhead 0:4df415dde990 434 // Not required
andrewhead 0:4df415dde990 435 }
andrewhead 0:4df415dde990 436
andrewhead 0:4df415dde990 437 void USBHAL::EP0readStage(void) {
andrewhead 0:4df415dde990 438 // Not required
andrewhead 0:4df415dde990 439 }
andrewhead 0:4df415dde990 440
andrewhead 0:4df415dde990 441 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
andrewhead 0:4df415dde990 442 return endpointReadcore(EP0OUT, buffer);
andrewhead 0:4df415dde990 443 }
andrewhead 0:4df415dde990 444
andrewhead 0:4df415dde990 445 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
andrewhead 0:4df415dde990 446 endpointWritecore(EP0IN, buffer, size);
andrewhead 0:4df415dde990 447 }
andrewhead 0:4df415dde990 448
andrewhead 0:4df415dde990 449 void USBHAL::EP0getWriteResult(void) {
andrewhead 0:4df415dde990 450 // Not required
andrewhead 0:4df415dde990 451 }
andrewhead 0:4df415dde990 452
andrewhead 0:4df415dde990 453 void USBHAL::EP0stall(void) {
andrewhead 0:4df415dde990 454 // This will stall both control endpoints
andrewhead 0:4df415dde990 455 stallEndpoint(EP0OUT);
andrewhead 0:4df415dde990 456 }
andrewhead 0:4df415dde990 457
andrewhead 0:4df415dde990 458 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
andrewhead 0:4df415dde990 459 return EP_PENDING;
andrewhead 0:4df415dde990 460 }
andrewhead 0:4df415dde990 461
andrewhead 0:4df415dde990 462 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
andrewhead 0:4df415dde990 463
andrewhead 0:4df415dde990 464 //for isochronous endpoint, we don't wait an interrupt
andrewhead 0:4df415dde990 465 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
andrewhead 0:4df415dde990 466 if (!(epComplete & EP(endpoint)))
andrewhead 0:4df415dde990 467 return EP_PENDING;
andrewhead 0:4df415dde990 468 }
andrewhead 0:4df415dde990 469
andrewhead 0:4df415dde990 470 *bytesRead = endpointReadcore(endpoint, buffer);
andrewhead 0:4df415dde990 471 epComplete &= ~EP(endpoint);
andrewhead 0:4df415dde990 472 return EP_COMPLETED;
andrewhead 0:4df415dde990 473 }
andrewhead 0:4df415dde990 474
andrewhead 0:4df415dde990 475 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
andrewhead 0:4df415dde990 476 if (getEndpointStallState(endpoint)) {
andrewhead 0:4df415dde990 477 return EP_STALLED;
andrewhead 0:4df415dde990 478 }
andrewhead 0:4df415dde990 479
andrewhead 0:4df415dde990 480 epComplete &= ~EP(endpoint);
andrewhead 0:4df415dde990 481
andrewhead 0:4df415dde990 482 endpointWritecore(endpoint, data, size);
andrewhead 0:4df415dde990 483 return EP_PENDING;
andrewhead 0:4df415dde990 484 }
andrewhead 0:4df415dde990 485
andrewhead 0:4df415dde990 486 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
andrewhead 0:4df415dde990 487 if (epComplete & EP(endpoint)) {
andrewhead 0:4df415dde990 488 epComplete &= ~EP(endpoint);
andrewhead 0:4df415dde990 489 return EP_COMPLETED;
andrewhead 0:4df415dde990 490 }
andrewhead 0:4df415dde990 491
andrewhead 0:4df415dde990 492 return EP_PENDING;
andrewhead 0:4df415dde990 493 }
andrewhead 0:4df415dde990 494
andrewhead 0:4df415dde990 495 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
andrewhead 0:4df415dde990 496 // Realise an endpoint
andrewhead 0:4df415dde990 497 LPC_USB->USBDevIntClr = EP_RLZED;
andrewhead 0:4df415dde990 498 LPC_USB->USBReEp |= EP(endpoint);
andrewhead 0:4df415dde990 499 LPC_USB->USBEpInd = endpoint;
andrewhead 0:4df415dde990 500 LPC_USB->USBMaxPSize = maxPacket;
andrewhead 0:4df415dde990 501
andrewhead 0:4df415dde990 502 while (!(LPC_USB->USBDevIntSt & EP_RLZED));
andrewhead 0:4df415dde990 503 LPC_USB->USBDevIntClr = EP_RLZED;
andrewhead 0:4df415dde990 504
andrewhead 0:4df415dde990 505 // Clear stall state
andrewhead 0:4df415dde990 506 endpointStallState &= ~EP(endpoint);
andrewhead 0:4df415dde990 507
andrewhead 0:4df415dde990 508 enableEndpointEvent(endpoint);
andrewhead 0:4df415dde990 509 return true;
andrewhead 0:4df415dde990 510 }
andrewhead 0:4df415dde990 511
andrewhead 0:4df415dde990 512 void USBHAL::stallEndpoint(uint8_t endpoint) {
andrewhead 0:4df415dde990 513 // Stall an endpoint
andrewhead 0:4df415dde990 514 if ( (endpoint==EP0IN) || (endpoint==EP0OUT) ) {
andrewhead 0:4df415dde990 515 // Conditionally stall both control endpoints
andrewhead 0:4df415dde990 516 SIEsetEndpointStatus(EP0OUT, SIE_SES_CND_ST);
andrewhead 0:4df415dde990 517 } else {
andrewhead 0:4df415dde990 518 SIEsetEndpointStatus(endpoint, SIE_SES_ST);
andrewhead 0:4df415dde990 519
andrewhead 0:4df415dde990 520 // Update stall state
andrewhead 0:4df415dde990 521 endpointStallState |= EP(endpoint);
andrewhead 0:4df415dde990 522 }
andrewhead 0:4df415dde990 523 }
andrewhead 0:4df415dde990 524
andrewhead 0:4df415dde990 525 void USBHAL::unstallEndpoint(uint8_t endpoint) {
andrewhead 0:4df415dde990 526 // Unstall an endpoint. The endpoint will also be reinitialised
andrewhead 0:4df415dde990 527 SIEsetEndpointStatus(endpoint, 0);
andrewhead 0:4df415dde990 528
andrewhead 0:4df415dde990 529 // Update stall state
andrewhead 0:4df415dde990 530 endpointStallState &= ~EP(endpoint);
andrewhead 0:4df415dde990 531 }
andrewhead 0:4df415dde990 532
andrewhead 0:4df415dde990 533 bool USBHAL::getEndpointStallState(uint8_t endpoint) {
andrewhead 0:4df415dde990 534 // Returns true if endpoint stalled
andrewhead 0:4df415dde990 535 return endpointStallState & EP(endpoint);
andrewhead 0:4df415dde990 536 }
andrewhead 0:4df415dde990 537
andrewhead 0:4df415dde990 538 void USBHAL::remoteWakeup(void) {
andrewhead 0:4df415dde990 539 // Remote wakeup
andrewhead 0:4df415dde990 540 uint8_t status;
andrewhead 0:4df415dde990 541
andrewhead 0:4df415dde990 542 // Enable USB clocks
andrewhead 0:4df415dde990 543 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
andrewhead 0:4df415dde990 544 while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON));
andrewhead 0:4df415dde990 545
andrewhead 0:4df415dde990 546 status = SIEgetDeviceStatus();
andrewhead 0:4df415dde990 547 SIEsetDeviceStatus(status & ~SIE_DS_SUS);
andrewhead 0:4df415dde990 548 }
andrewhead 0:4df415dde990 549
andrewhead 0:4df415dde990 550 void USBHAL::_usbisr(void) {
andrewhead 0:4df415dde990 551 instance->usbisr();
andrewhead 0:4df415dde990 552 }
andrewhead 0:4df415dde990 553
andrewhead 0:4df415dde990 554
andrewhead 0:4df415dde990 555 void USBHAL::usbisr(void) {
andrewhead 0:4df415dde990 556 uint8_t devStat;
andrewhead 0:4df415dde990 557
andrewhead 0:4df415dde990 558 if (LPC_USB->USBDevIntSt & FRAME) {
andrewhead 0:4df415dde990 559 // Start of frame event
andrewhead 0:4df415dde990 560 SOF(SIEgetFrameNumber());
andrewhead 0:4df415dde990 561 // Clear interrupt status flag
andrewhead 0:4df415dde990 562 LPC_USB->USBDevIntClr = FRAME;
andrewhead 0:4df415dde990 563 }
andrewhead 0:4df415dde990 564
andrewhead 0:4df415dde990 565 if (LPC_USB->USBDevIntSt & DEV_STAT) {
andrewhead 0:4df415dde990 566 // Device Status interrupt
andrewhead 0:4df415dde990 567 // Must clear the interrupt status flag before reading the device status from the SIE
andrewhead 0:4df415dde990 568 LPC_USB->USBDevIntClr = DEV_STAT;
andrewhead 0:4df415dde990 569
andrewhead 0:4df415dde990 570 // Read device status from SIE
andrewhead 0:4df415dde990 571 devStat = SIEgetDeviceStatus();
andrewhead 0:4df415dde990 572 //printf("devStat: %d\r\n", devStat);
andrewhead 0:4df415dde990 573
andrewhead 0:4df415dde990 574 if (devStat & SIE_DS_SUS_CH) {
andrewhead 0:4df415dde990 575 // Suspend status changed
andrewhead 0:4df415dde990 576 if((devStat & SIE_DS_SUS) != 0) {
andrewhead 0:4df415dde990 577 suspendStateChanged(0);
andrewhead 0:4df415dde990 578 }
andrewhead 0:4df415dde990 579 }
andrewhead 0:4df415dde990 580
andrewhead 0:4df415dde990 581 if (devStat & SIE_DS_RST) {
andrewhead 0:4df415dde990 582 // Bus reset
andrewhead 0:4df415dde990 583 if((devStat & SIE_DS_SUS) == 0) {
andrewhead 0:4df415dde990 584 suspendStateChanged(1);
andrewhead 0:4df415dde990 585 }
andrewhead 0:4df415dde990 586 busReset();
andrewhead 0:4df415dde990 587 }
andrewhead 0:4df415dde990 588 }
andrewhead 0:4df415dde990 589
andrewhead 0:4df415dde990 590 if (LPC_USB->USBDevIntSt & EP_SLOW) {
andrewhead 0:4df415dde990 591 // (Slow) Endpoint Interrupt
andrewhead 0:4df415dde990 592
andrewhead 0:4df415dde990 593 // Process each endpoint interrupt
andrewhead 0:4df415dde990 594 if (LPC_USB->USBEpIntSt & EP(EP0OUT)) {
andrewhead 0:4df415dde990 595 if (selectEndpointClearInterrupt(EP0OUT) & SIE_SE_STP) {
andrewhead 0:4df415dde990 596 // this is a setup packet
andrewhead 0:4df415dde990 597 EP0setupCallback();
andrewhead 0:4df415dde990 598 } else {
andrewhead 0:4df415dde990 599 EP0out();
andrewhead 0:4df415dde990 600 }
andrewhead 0:4df415dde990 601 LPC_USB->USBDevIntClr = EP_SLOW;
andrewhead 0:4df415dde990 602 }
andrewhead 0:4df415dde990 603
andrewhead 0:4df415dde990 604 if (LPC_USB->USBEpIntSt & EP(EP0IN)) {
andrewhead 0:4df415dde990 605 selectEndpointClearInterrupt(EP0IN);
andrewhead 0:4df415dde990 606 LPC_USB->USBDevIntClr = EP_SLOW;
andrewhead 0:4df415dde990 607 EP0in();
andrewhead 0:4df415dde990 608 }
andrewhead 0:4df415dde990 609
andrewhead 0:4df415dde990 610 for (uint8_t num = 2; num < 16*2; num++) {
andrewhead 0:4df415dde990 611 if (LPC_USB->USBEpIntSt & EP(num)) {
andrewhead 0:4df415dde990 612 selectEndpointClearInterrupt(num);
andrewhead 0:4df415dde990 613 epComplete |= EP(num);
andrewhead 0:4df415dde990 614 LPC_USB->USBDevIntClr = EP_SLOW;
andrewhead 0:4df415dde990 615 if ((instance->*(epCallback[num - 2]))()) {
andrewhead 0:4df415dde990 616 epComplete &= ~EP(num);
andrewhead 0:4df415dde990 617 }
andrewhead 0:4df415dde990 618 }
andrewhead 0:4df415dde990 619 }
andrewhead 0:4df415dde990 620 }
andrewhead 0:4df415dde990 621 }
andrewhead 0:4df415dde990 622
andrewhead 0:4df415dde990 623 #endif