Intelligent Systems / mbed-src

This fork of the MBED Library allows you to use counters on the external counter pins (15/16 for Timer 3, 29/30 for Timer 2) by switching internal timing functions in MBED to utilize Timer 0

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC11UXX/sleep.c@13:0645d8841f51, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 14:12:34 2013 +0300
Revision:
13:0645d8841f51
Parent:
vendor/NXP/LPC11U24/hal/sleep.c@10:3bc89ef62ce7
Child:
75:99bf659e4489
Update mbed sources to revision 64

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #include "sleep_api.h"
emilmont 10:3bc89ef62ce7 17 #include "cmsis.h"
emilmont 10:3bc89ef62ce7 18 #include "mbed_interface.h"
emilmont 10:3bc89ef62ce7 19
emilmont 10:3bc89ef62ce7 20 void sleep(void) {
emilmont 10:3bc89ef62ce7 21 // ensure debug is disconnected
emilmont 10:3bc89ef62ce7 22 mbed_interface_disconnect();
emilmont 10:3bc89ef62ce7 23
emilmont 10:3bc89ef62ce7 24 // PCON[PD] set to sleep
emilmont 10:3bc89ef62ce7 25 LPC_PMU->PCON = 0x0;
emilmont 10:3bc89ef62ce7 26
emilmont 10:3bc89ef62ce7 27 // SRC[SLEEPDEEP] set to 0 = sleep
emilmont 10:3bc89ef62ce7 28 SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
emilmont 10:3bc89ef62ce7 29
emilmont 10:3bc89ef62ce7 30 // wait for interrupt
emilmont 10:3bc89ef62ce7 31 __WFI();
emilmont 10:3bc89ef62ce7 32 }
emilmont 10:3bc89ef62ce7 33
emilmont 10:3bc89ef62ce7 34 /*
emilmont 10:3bc89ef62ce7 35 * The mbed lpc1768 does not support the deepsleep mode
emilmont 10:3bc89ef62ce7 36 * as a debugger is connected to it (the mbed interface).
emilmont 10:3bc89ef62ce7 37 *
emilmont 10:3bc89ef62ce7 38 * As mentionned in an application note from NXP:
emilmont 10:3bc89ef62ce7 39 *
emilmont 10:3bc89ef62ce7 40 * http://www.po-star.com/public/uploads/20120319123122_141.pdf
emilmont 10:3bc89ef62ce7 41 *
emilmont 10:3bc89ef62ce7 42 * {{{
emilmont 10:3bc89ef62ce7 43 * The user should be aware of certain limitations during debugging.
emilmont 10:3bc89ef62ce7 44 * The most important is that, due to limitations of the Cortex-M3
emilmont 10:3bc89ef62ce7 45 * integration, the LPC17xx cannot wake up in the usual manner from
emilmont 10:3bc89ef62ce7 46 * Deep Sleep and Power-down modes. It is recommended not to use these
emilmont 10:3bc89ef62ce7 47 * modes during debug. Once an application is downloaded via JTAG/SWD
emilmont 10:3bc89ef62ce7 48 * interface, the USB to SWD/JTAG debug adapter (Keil ULINK2 for example)
emilmont 10:3bc89ef62ce7 49 * should be removed from the target board, and thereafter, power cycle
emilmont 10:3bc89ef62ce7 50 * the LPC17xx to allow wake-up from deep sleep and power-down modes
emilmont 10:3bc89ef62ce7 51 * }}}
emilmont 10:3bc89ef62ce7 52 *
emilmont 10:3bc89ef62ce7 53 * As the interface firmware does not reset the target when a
emilmont 10:3bc89ef62ce7 54 * mbed_interface_disconnect() semihosting call is made, the
emilmont 10:3bc89ef62ce7 55 * core cannot wake-up from deepsleep.
emilmont 10:3bc89ef62ce7 56 *
emilmont 10:3bc89ef62ce7 57 * We treat a deepsleep() as a normal sleep().
emilmont 10:3bc89ef62ce7 58 */
emilmont 10:3bc89ef62ce7 59
emilmont 10:3bc89ef62ce7 60 void deepsleep(void) {
emilmont 10:3bc89ef62ce7 61 // ensure debug is disconnected
emilmont 10:3bc89ef62ce7 62 mbed_interface_disconnect();
emilmont 10:3bc89ef62ce7 63
emilmont 10:3bc89ef62ce7 64 // PCON[PD] set to deepsleep
emilmont 10:3bc89ef62ce7 65 LPC_PMU->PCON = 0x1;
emilmont 10:3bc89ef62ce7 66
emilmont 10:3bc89ef62ce7 67 // SRC[SLEEPDEEP] set to 1 = deep sleep
emilmont 10:3bc89ef62ce7 68 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
emilmont 10:3bc89ef62ce7 69
emilmont 10:3bc89ef62ce7 70 // Power up everything after powerdown
emilmont 10:3bc89ef62ce7 71 LPC_SYSCON->PDAWAKECFG &= 0xFFFFF800;
emilmont 10:3bc89ef62ce7 72
emilmont 10:3bc89ef62ce7 73 // wait for interrupt
emilmont 10:3bc89ef62ce7 74 __WFI();
emilmont 10:3bc89ef62ce7 75 }