This fork of the MBED Library allows you to use counters on the external counter pins (15/16 for Timer 3, 29/30 for Timer 2) by switching internal timing functions in MBED to utilize Timer 0
Fork of mbed-src by
targets/hal/TARGET_NXP/TARGET_LPC81X/sleep.c@47:02833c62d054, 2013-11-21 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Nov 21 10:00:05 2013 +0000
- Revision:
- 47:02833c62d054
Synchronized with git revision 6a5335a40ed97c7edd719e209bda5f3b5d9d997e
Full URL: https://github.com/mbedmicro/mbed/commit/6a5335a40ed97c7edd719e209bda5f3b5d9d997e/
Added sleep to LPC81x
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 47:02833c62d054 | 1 | /* mbed Microcontroller Library |
mbed_official | 47:02833c62d054 | 2 | * Copyright (c) 2006-2013 ARM Limited |
mbed_official | 47:02833c62d054 | 3 | * |
mbed_official | 47:02833c62d054 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
mbed_official | 47:02833c62d054 | 5 | * you may not use this file except in compliance with the License. |
mbed_official | 47:02833c62d054 | 6 | * You may obtain a copy of the License at |
mbed_official | 47:02833c62d054 | 7 | * |
mbed_official | 47:02833c62d054 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
mbed_official | 47:02833c62d054 | 9 | * |
mbed_official | 47:02833c62d054 | 10 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 47:02833c62d054 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 47:02833c62d054 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 47:02833c62d054 | 13 | * See the License for the specific language governing permissions and |
mbed_official | 47:02833c62d054 | 14 | * limitations under the License. |
mbed_official | 47:02833c62d054 | 15 | */ |
mbed_official | 47:02833c62d054 | 16 | #include "sleep_api.h" |
mbed_official | 47:02833c62d054 | 17 | #include "cmsis.h" |
mbed_official | 47:02833c62d054 | 18 | |
mbed_official | 47:02833c62d054 | 19 | |
mbed_official | 47:02833c62d054 | 20 | //#define DEEPSLEEP |
mbed_official | 47:02833c62d054 | 21 | #define POWERDOWN |
mbed_official | 47:02833c62d054 | 22 | |
mbed_official | 47:02833c62d054 | 23 | void sleep(void) { |
mbed_official | 47:02833c62d054 | 24 | //Normal sleep mode for PCON: |
mbed_official | 47:02833c62d054 | 25 | LPC_PMU->PCON &= ~0x03; |
mbed_official | 47:02833c62d054 | 26 | |
mbed_official | 47:02833c62d054 | 27 | //Normal sleep mode for ARM core: |
mbed_official | 47:02833c62d054 | 28 | SCB->SCR = 0; |
mbed_official | 47:02833c62d054 | 29 | |
mbed_official | 47:02833c62d054 | 30 | //And go to sleep |
mbed_official | 47:02833c62d054 | 31 | __WFI(); |
mbed_official | 47:02833c62d054 | 32 | } |
mbed_official | 47:02833c62d054 | 33 | |
mbed_official | 47:02833c62d054 | 34 | |
mbed_official | 47:02833c62d054 | 35 | |
mbed_official | 47:02833c62d054 | 36 | //Deepsleep/powerdown modes assume the device is configured to use its internal RC oscillator directly |
mbed_official | 47:02833c62d054 | 37 | |
mbed_official | 47:02833c62d054 | 38 | #ifdef DEEPSLEEP |
mbed_official | 47:02833c62d054 | 39 | void deepsleep(void) { |
mbed_official | 47:02833c62d054 | 40 | //Deep sleep in PCON |
mbed_official | 47:02833c62d054 | 41 | LPC_PMU->PCON &= ~0x03; |
mbed_official | 47:02833c62d054 | 42 | LPC_PMU->PCON |= 0x01; |
mbed_official | 47:02833c62d054 | 43 | |
mbed_official | 47:02833c62d054 | 44 | //If brownout detection and WDT are enabled, keep them enabled during sleep |
mbed_official | 47:02833c62d054 | 45 | LPC_SYSCON->PDSLEEPCFG = LPC_SYSCON->PDRUNCFG; |
mbed_official | 47:02833c62d054 | 46 | |
mbed_official | 47:02833c62d054 | 47 | //After wakeup same stuff as currently enabled: |
mbed_official | 47:02833c62d054 | 48 | LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG; |
mbed_official | 47:02833c62d054 | 49 | |
mbed_official | 47:02833c62d054 | 50 | //All interrupts may wake up: |
mbed_official | 47:02833c62d054 | 51 | LPC_SYSCON->STARTERP0 = 0xFF; |
mbed_official | 47:02833c62d054 | 52 | LPC_SYSCON->STARTERP1 = 0xFFFF; |
mbed_official | 47:02833c62d054 | 53 | |
mbed_official | 47:02833c62d054 | 54 | //Deep sleep for ARM core: |
mbed_official | 47:02833c62d054 | 55 | SCB->SCR = 1<<2; |
mbed_official | 47:02833c62d054 | 56 | |
mbed_official | 47:02833c62d054 | 57 | __WFI(); |
mbed_official | 47:02833c62d054 | 58 | } |
mbed_official | 47:02833c62d054 | 59 | #endif |
mbed_official | 47:02833c62d054 | 60 | |
mbed_official | 47:02833c62d054 | 61 | #ifdef POWERDOWN |
mbed_official | 47:02833c62d054 | 62 | void deepsleep(void) { |
mbed_official | 47:02833c62d054 | 63 | //Powerdown in PCON |
mbed_official | 47:02833c62d054 | 64 | LPC_PMU->PCON &= ~0x03; |
mbed_official | 47:02833c62d054 | 65 | LPC_PMU->PCON |= 0x02; |
mbed_official | 47:02833c62d054 | 66 | |
mbed_official | 47:02833c62d054 | 67 | //If brownout detection and WDT are enabled, keep them enabled during sleep |
mbed_official | 47:02833c62d054 | 68 | LPC_SYSCON->PDSLEEPCFG = LPC_SYSCON->PDRUNCFG; |
mbed_official | 47:02833c62d054 | 69 | |
mbed_official | 47:02833c62d054 | 70 | //After wakeup same stuff as currently enabled: |
mbed_official | 47:02833c62d054 | 71 | LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG; |
mbed_official | 47:02833c62d054 | 72 | |
mbed_official | 47:02833c62d054 | 73 | //All interrupts may wake up: |
mbed_official | 47:02833c62d054 | 74 | LPC_SYSCON->STARTERP0 = 0xFF; |
mbed_official | 47:02833c62d054 | 75 | LPC_SYSCON->STARTERP1 = 0xFFFF; |
mbed_official | 47:02833c62d054 | 76 | |
mbed_official | 47:02833c62d054 | 77 | //Deep sleep for ARM core: |
mbed_official | 47:02833c62d054 | 78 | SCB->SCR = 1<<2; |
mbed_official | 47:02833c62d054 | 79 | |
mbed_official | 47:02833c62d054 | 80 | __WFI(); |
mbed_official | 47:02833c62d054 | 81 | } |
mbed_official | 47:02833c62d054 | 82 | #endif |