IUT DE CACHAN GE1 / Encoder_Nucleo_16_bits

Modification du la bibliothèque de base

Fork of Encoder_Nucleo_32_bits by Pierre David

EncoderMspInitL1.cpp@2:916d277f09a1, 2017-06-04 (annotated)

Committer:
haarkon
Date:
Sun Jun 04 15:13:39 2017 +0000
Branch:
Haarkon_Way
Revision:
2:916d277f09a1
Parent:
0:ebd170807e11 
Same as original without debugging Printf

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kkoichy 0:ebd170807e11 1 #include "mbed.h"
kkoichy 0:ebd170807e11 2 /*
kkoichy 0:ebd170807e11 3 * HAL_TIM_Encoder_MspInit()
kkoichy 0:ebd170807e11 4 * Overrides the __weak function stub in stm32l4xx_hal_tim.h
kkoichy 0:ebd170807e11 5 *
kkoichy 0:ebd170807e11 6 * Edit the below for your preferred pin wiring & pullup/down
kkoichy 0:ebd170807e11 7 * I have encoder common at 3V3, using GPIO_PULLDOWN on inputs.
kkoichy 0:ebd170807e11 8 * Encoder A&B outputs connected directly to GPIOs.
kkoichy 0:ebd170807e11 9 *
kkoichy 0:ebd170807e11 10 * http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00098321.pdf
kkoichy 0:ebd170807e11 11 * Table 9 has GPIO alternate function pinout mappings.
kkoichy 0:ebd170807e11 12 *
kkoichy 0:ebd170807e11 13 * TIM2_CH1: AF1 @ PA_0, PA_5, PA_15, PE_9
kkoichy 0:ebd170807e11 14 * TIM2_CH2: AF1 @ PA_1, PB_3, PE_10
kkoichy 0:ebd170807e11 15 *
kkoichy 0:ebd170807e11 16 * TIM3_CH1: AF2 @ PA_6, PB_4, PC_6, PE_3
kkoichy 0:ebd170807e11 17 * TIM3_CH2: AF2 @ PA_7, PB_5, PC_7, PE_4
kkoichy 0:ebd170807e11 18 *
kkoichy 0:ebd170807e11 19 * TIM4_CH1: AF2 @ PB_6, PD_12
kkoichy 0:ebd170807e11 20 * TIM4_CH2: AF2 @ PB_7, PD_13
kkoichy 0:ebd170807e11 21 *
kkoichy 0:ebd170807e11 22 * TIM5_CH1: AF2 @ PA_0* *TIM5 used by mbed system ticker so unavailable
kkoichy 0:ebd170807e11 23 * TIM5_CH2: AF2 @ PA_1*
kkoichy 0:ebd170807e11 24 *
kkoichy 0:ebd170807e11 25 */
kkoichy 0:ebd170807e11 26
kkoichy 0:ebd170807e11 27 #ifdef TARGET_STM32L1
kkoichy 0:ebd170807e11 28 void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim)
kkoichy 0:ebd170807e11 29 {
kkoichy 0:ebd170807e11 30 GPIO_InitTypeDef GPIO_InitStruct;
kkoichy 0:ebd170807e11 31
kkoichy 0:ebd170807e11 32 if (htim->Instance == TIM2) { //PA0 PA1 = Nucleo A0 A1
kkoichy 0:ebd170807e11 33 __TIM2_CLK_ENABLE();
kkoichy 0:ebd170807e11 34 __GPIOA_CLK_ENABLE();
kkoichy 0:ebd170807e11 35 GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1;
kkoichy 0:ebd170807e11 36 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
kkoichy 0:ebd170807e11 37 GPIO_InitStruct.Pull = GPIO_PULLDOWN;
kkoichy 0:ebd170807e11 38 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
kkoichy 0:ebd170807e11 39 GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
kkoichy 0:ebd170807e11 40 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
kkoichy 0:ebd170807e11 41 }
kkoichy 0:ebd170807e11 42 else if (htim->Instance == TIM3) { //PB4 PB5 = Nucleo D5 D4
kkoichy 0:ebd170807e11 43 __TIM3_CLK_ENABLE();
kkoichy 0:ebd170807e11 44 __GPIOB_CLK_ENABLE();
kkoichy 0:ebd170807e11 45 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5;
kkoichy 0:ebd170807e11 46 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
kkoichy 0:ebd170807e11 47 GPIO_InitStruct.Pull = GPIO_PULLDOWN;
kkoichy 0:ebd170807e11 48 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
kkoichy 0:ebd170807e11 49 GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
kkoichy 0:ebd170807e11 50 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
kkoichy 0:ebd170807e11 51 }
kkoichy 0:ebd170807e11 52 else if (htim->Instance == TIM4) { // PB6 PB7 = Nucleo D10 MORPHO_PB7
kkoichy 0:ebd170807e11 53 __TIM4_CLK_ENABLE();
kkoichy 0:ebd170807e11 54 __GPIOB_CLK_ENABLE();
kkoichy 0:ebd170807e11 55 GPIO_InitStruct.Pin = GPIO_PIN_6 | GPIO_PIN_7;
kkoichy 0:ebd170807e11 56 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
kkoichy 0:ebd170807e11 57 GPIO_InitStruct.Pull = GPIO_PULLDOWN;
kkoichy 0:ebd170807e11 58 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
kkoichy 0:ebd170807e11 59 GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
kkoichy 0:ebd170807e11 60 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
kkoichy 0:ebd170807e11 61 }
kkoichy 0:ebd170807e11 62 }
kkoichy 0:ebd170807e11 63 #endif