ISEN Nimes CSI3 / RF24

no modif

Dependents:   ISEN_RF24Network_Node_01 ISEN_RF24Network_Node_02

nRF24L01.h@10:2b68b1fe6538, 2021-05-20 (annotated)

Committer:
Giamarchi
Date:
Thu May 20 09:26:32 2021 +0000
Revision:
10:2b68b1fe6538
Parent:
2:3bdf0d9bb71f
Child:
6:5cc7136648d1
no modif

Who changed what in which revision?

UserRevisionLine numberNew contents of line
akashvibhute 2:3bdf0d9bb71f 1 /*
akashvibhute 2:3bdf0d9bb71f 2 Copyright (c) 2007 Stefan Engelke <mbox@stefanengelke.de>
akashvibhute 2:3bdf0d9bb71f 3 Portions Copyright (C) 2011 Greg Copeland
akashvibhute 2:3bdf0d9bb71f 4
akashvibhute 2:3bdf0d9bb71f 5 Permission is hereby granted, free of charge, to any person
akashvibhute 2:3bdf0d9bb71f 6 obtaining a copy of this software and associated documentation
akashvibhute 2:3bdf0d9bb71f 7 files (the "Software"), to deal in the Software without
akashvibhute 2:3bdf0d9bb71f 8 restriction, including without limitation the rights to use, copy,
akashvibhute 2:3bdf0d9bb71f 9 modify, merge, publish, distribute, sublicense, and/or sell copies
akashvibhute 2:3bdf0d9bb71f 10 of the Software, and to permit persons to whom the Software is
akashvibhute 2:3bdf0d9bb71f 11 furnished to do so, subject to the following conditions:
akashvibhute 2:3bdf0d9bb71f 12
akashvibhute 2:3bdf0d9bb71f 13 The above copyright notice and this permission notice shall be
akashvibhute 2:3bdf0d9bb71f 14 included in all copies or substantial portions of the Software.
akashvibhute 2:3bdf0d9bb71f 15
akashvibhute 2:3bdf0d9bb71f 16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
akashvibhute 2:3bdf0d9bb71f 17 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
akashvibhute 2:3bdf0d9bb71f 18 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
akashvibhute 2:3bdf0d9bb71f 19 NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
akashvibhute 2:3bdf0d9bb71f 20 HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
akashvibhute 2:3bdf0d9bb71f 21 WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
akashvibhute 2:3bdf0d9bb71f 22 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
akashvibhute 2:3bdf0d9bb71f 23 DEALINGS IN THE SOFTWARE.
akashvibhute 2:3bdf0d9bb71f 24 */
akashvibhute 2:3bdf0d9bb71f 25
akashvibhute 2:3bdf0d9bb71f 26 /* Memory Map */
akashvibhute 2:3bdf0d9bb71f 27 #define CONFIG 0x00
akashvibhute 2:3bdf0d9bb71f 28 #define EN_AA 0x01
akashvibhute 2:3bdf0d9bb71f 29 #define EN_RXADDR 0x02
akashvibhute 2:3bdf0d9bb71f 30 #define SETUP_AW 0x03
akashvibhute 2:3bdf0d9bb71f 31 #define SETUP_RETR 0x04
akashvibhute 2:3bdf0d9bb71f 32 #define RF_CH 0x05
akashvibhute 2:3bdf0d9bb71f 33 #define RF_SETUP 0x06
akashvibhute 2:3bdf0d9bb71f 34 #define NRF_STATUS 0x07
akashvibhute 2:3bdf0d9bb71f 35 #define OBSERVE_TX 0x08
akashvibhute 2:3bdf0d9bb71f 36 #define CD 0x09
akashvibhute 2:3bdf0d9bb71f 37 #define RX_ADDR_P0 0x0A
akashvibhute 2:3bdf0d9bb71f 38 #define RX_ADDR_P1 0x0B
akashvibhute 2:3bdf0d9bb71f 39 #define RX_ADDR_P2 0x0C
akashvibhute 2:3bdf0d9bb71f 40 #define RX_ADDR_P3 0x0D
akashvibhute 2:3bdf0d9bb71f 41 #define RX_ADDR_P4 0x0E
akashvibhute 2:3bdf0d9bb71f 42 #define RX_ADDR_P5 0x0F
akashvibhute 2:3bdf0d9bb71f 43 #define TX_ADDR 0x10
akashvibhute 2:3bdf0d9bb71f 44 #define RX_PW_P0 0x11
akashvibhute 2:3bdf0d9bb71f 45 #define RX_PW_P1 0x12
akashvibhute 2:3bdf0d9bb71f 46 #define RX_PW_P2 0x13
akashvibhute 2:3bdf0d9bb71f 47 #define RX_PW_P3 0x14
akashvibhute 2:3bdf0d9bb71f 48 #define RX_PW_P4 0x15
akashvibhute 2:3bdf0d9bb71f 49 #define RX_PW_P5 0x16
akashvibhute 2:3bdf0d9bb71f 50 #define FIFO_STATUS 0x17
akashvibhute 2:3bdf0d9bb71f 51 #define DYNPD 0x1C
akashvibhute 2:3bdf0d9bb71f 52 #define FEATURE 0x1D
akashvibhute 2:3bdf0d9bb71f 53
akashvibhute 2:3bdf0d9bb71f 54 /* Bit Mnemonics */
akashvibhute 2:3bdf0d9bb71f 55 #define MASK_RX_DR 6
akashvibhute 2:3bdf0d9bb71f 56 #define MASK_TX_DS 5
akashvibhute 2:3bdf0d9bb71f 57 #define MASK_MAX_RT 4
akashvibhute 2:3bdf0d9bb71f 58 #define EN_CRC 3
akashvibhute 2:3bdf0d9bb71f 59 #define CRCO 2
akashvibhute 2:3bdf0d9bb71f 60 #define PWR_UP 1
akashvibhute 2:3bdf0d9bb71f 61 #define PRIM_RX 0
akashvibhute 2:3bdf0d9bb71f 62 #define ENAA_P5 5
akashvibhute 2:3bdf0d9bb71f 63 #define ENAA_P4 4
akashvibhute 2:3bdf0d9bb71f 64 #define ENAA_P3 3
akashvibhute 2:3bdf0d9bb71f 65 #define ENAA_P2 2
akashvibhute 2:3bdf0d9bb71f 66 #define ENAA_P1 1
akashvibhute 2:3bdf0d9bb71f 67 #define ENAA_P0 0
akashvibhute 2:3bdf0d9bb71f 68 #define ERX_P5 5
akashvibhute 2:3bdf0d9bb71f 69 #define ERX_P4 4
akashvibhute 2:3bdf0d9bb71f 70 #define ERX_P3 3
akashvibhute 2:3bdf0d9bb71f 71 #define ERX_P2 2
akashvibhute 2:3bdf0d9bb71f 72 #define ERX_P1 1
akashvibhute 2:3bdf0d9bb71f 73 #define ERX_P0 0
akashvibhute 2:3bdf0d9bb71f 74 #define AW 0
akashvibhute 2:3bdf0d9bb71f 75 #define ARD 4
akashvibhute 2:3bdf0d9bb71f 76 #define ARC 0
akashvibhute 2:3bdf0d9bb71f 77 #define PLL_LOCK 4
akashvibhute 2:3bdf0d9bb71f 78 #define RF_DR 3
akashvibhute 2:3bdf0d9bb71f 79 #define RF_PWR 6
akashvibhute 2:3bdf0d9bb71f 80 #define RX_DR 6
akashvibhute 2:3bdf0d9bb71f 81 #define TX_DS 5
akashvibhute 2:3bdf0d9bb71f 82 #define MAX_RT 4
akashvibhute 2:3bdf0d9bb71f 83 #define RX_P_NO 1
akashvibhute 2:3bdf0d9bb71f 84 #define TX_FULL 0
akashvibhute 2:3bdf0d9bb71f 85 #define PLOS_CNT 4
akashvibhute 2:3bdf0d9bb71f 86 #define ARC_CNT 0
akashvibhute 2:3bdf0d9bb71f 87 #define TX_REUSE 6
akashvibhute 2:3bdf0d9bb71f 88 #define FIFO_FULL 5
akashvibhute 2:3bdf0d9bb71f 89 #define TX_EMPTY 4
akashvibhute 2:3bdf0d9bb71f 90 #define RX_FULL 1
akashvibhute 2:3bdf0d9bb71f 91 #define RX_EMPTY 0
akashvibhute 2:3bdf0d9bb71f 92 #define DPL_P5 5
akashvibhute 2:3bdf0d9bb71f 93 #define DPL_P4 4
akashvibhute 2:3bdf0d9bb71f 94 #define DPL_P3 3
akashvibhute 2:3bdf0d9bb71f 95 #define DPL_P2 2
akashvibhute 2:3bdf0d9bb71f 96 #define DPL_P1 1
akashvibhute 2:3bdf0d9bb71f 97 #define DPL_P0 0
akashvibhute 2:3bdf0d9bb71f 98 #define EN_DPL 2
akashvibhute 2:3bdf0d9bb71f 99 #define EN_ACK_PAY 1
akashvibhute 2:3bdf0d9bb71f 100 #define EN_DYN_ACK 0
akashvibhute 2:3bdf0d9bb71f 101
akashvibhute 2:3bdf0d9bb71f 102 /* Instruction Mnemonics */
akashvibhute 2:3bdf0d9bb71f 103 #define R_REGISTER 0x00
akashvibhute 2:3bdf0d9bb71f 104 #define W_REGISTER 0x20
akashvibhute 2:3bdf0d9bb71f 105 #define REGISTER_MASK 0x1F
akashvibhute 2:3bdf0d9bb71f 106 #define ACTIVATE 0x50
akashvibhute 2:3bdf0d9bb71f 107 #define R_RX_PL_WID 0x60
akashvibhute 2:3bdf0d9bb71f 108 #define R_RX_PAYLOAD 0x61
akashvibhute 2:3bdf0d9bb71f 109 #define W_TX_PAYLOAD 0xA0
akashvibhute 2:3bdf0d9bb71f 110 #define W_ACK_PAYLOAD 0xA8
akashvibhute 2:3bdf0d9bb71f 111 #define FLUSH_TX 0xE1
akashvibhute 2:3bdf0d9bb71f 112 #define FLUSH_RX 0xE2
akashvibhute 2:3bdf0d9bb71f 113 #define REUSE_TX_PL 0xE3
akashvibhute 2:3bdf0d9bb71f 114 #define NOP 0xFF
akashvibhute 2:3bdf0d9bb71f 115
akashvibhute 2:3bdf0d9bb71f 116 /* Non-P omissions */
akashvibhute 2:3bdf0d9bb71f 117 #define LNA_HCURR 0
akashvibhute 2:3bdf0d9bb71f 118
akashvibhute 2:3bdf0d9bb71f 119 /* P model memory Map */
akashvibhute 2:3bdf0d9bb71f 120 #define RPD 0x09
akashvibhute 2:3bdf0d9bb71f 121 #define W_TX_PAYLOAD_NO_ACK 0xB0
akashvibhute 2:3bdf0d9bb71f 122
akashvibhute 2:3bdf0d9bb71f 123 /* P model bit Mnemonics */
akashvibhute 2:3bdf0d9bb71f 124 #define RF_DR_LOW 5
akashvibhute 2:3bdf0d9bb71f 125 #define RF_DR_HIGH 3
akashvibhute 2:3bdf0d9bb71f 126 #define RF_PWR_LOW 1
akashvibhute 2:3bdf0d9bb71f 127 #define RF_PWR_HIGH 2