test

Dependencies:   F7_Ethernet mbed BSP_DISCO_F746NG SDFileSystem RF24

Committer:
lowlowry
Date:
Tue Jun 08 16:21:16 2021 +0000
Revision:
3:1c6da30ca347
Parent:
0:d984976f1f1c
test final

Who changed what in which revision?

UserRevisionLine numberNew contents of line
leo44 0:d984976f1f1c 1 /*----------------------------------------------------------------------------
leo44 0:d984976f1f1c 2 * RL-ARM - RTX
leo44 0:d984976f1f1c 3 *----------------------------------------------------------------------------
leo44 0:d984976f1f1c 4 * Name: RT_HAL_CM.H
leo44 0:d984976f1f1c 5 * Purpose: Hardware Abstraction Layer for Cortex-M definitions
leo44 0:d984976f1f1c 6 * Rev.: V4.60
leo44 0:d984976f1f1c 7 *----------------------------------------------------------------------------
leo44 0:d984976f1f1c 8 *
leo44 0:d984976f1f1c 9 * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH
leo44 0:d984976f1f1c 10 * All rights reserved.
leo44 0:d984976f1f1c 11 * Redistribution and use in source and binary forms, with or without
leo44 0:d984976f1f1c 12 * modification, are permitted provided that the following conditions are met:
leo44 0:d984976f1f1c 13 * - Redistributions of source code must retain the above copyright
leo44 0:d984976f1f1c 14 * notice, this list of conditions and the following disclaimer.
leo44 0:d984976f1f1c 15 * - Redistributions in binary form must reproduce the above copyright
leo44 0:d984976f1f1c 16 * notice, this list of conditions and the following disclaimer in the
leo44 0:d984976f1f1c 17 * documentation and/or other materials provided with the distribution.
leo44 0:d984976f1f1c 18 * - Neither the name of ARM nor the names of its contributors may be used
leo44 0:d984976f1f1c 19 * to endorse or promote products derived from this software without
leo44 0:d984976f1f1c 20 * specific prior written permission.
leo44 0:d984976f1f1c 21 *
leo44 0:d984976f1f1c 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
leo44 0:d984976f1f1c 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
leo44 0:d984976f1f1c 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
leo44 0:d984976f1f1c 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
leo44 0:d984976f1f1c 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
leo44 0:d984976f1f1c 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
leo44 0:d984976f1f1c 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
leo44 0:d984976f1f1c 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
leo44 0:d984976f1f1c 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
leo44 0:d984976f1f1c 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
leo44 0:d984976f1f1c 32 * POSSIBILITY OF SUCH DAMAGE.
leo44 0:d984976f1f1c 33 *---------------------------------------------------------------------------*/
leo44 0:d984976f1f1c 34
leo44 0:d984976f1f1c 35 #include "cmsis.h"
leo44 0:d984976f1f1c 36 /* Definitions */
leo44 0:d984976f1f1c 37 #define INITIAL_xPSR 0x10000000
leo44 0:d984976f1f1c 38 #define DEMCR_TRCENA 0x01000000
leo44 0:d984976f1f1c 39 #define ITM_ITMENA 0x00000001
leo44 0:d984976f1f1c 40 #define MAGIC_WORD 0xE25A2EA5
leo44 0:d984976f1f1c 41
leo44 0:d984976f1f1c 42 #define SYS_TICK_IRQn TIMER0_IRQn
leo44 0:d984976f1f1c 43
leo44 0:d984976f1f1c 44 extern void rt_set_PSP (U32 stack);
leo44 0:d984976f1f1c 45 extern U32 rt_get_PSP (void);
leo44 0:d984976f1f1c 46 extern void os_set_env (void);
leo44 0:d984976f1f1c 47 extern void SysTick_Handler (void);
leo44 0:d984976f1f1c 48 extern void *_alloc_box (void *box_mem);
leo44 0:d984976f1f1c 49 extern int _free_box (void *box_mem, void *box);
leo44 0:d984976f1f1c 50
leo44 0:d984976f1f1c 51 extern void rt_init_stack (P_TCB p_TCB, FUNCP task_body);
leo44 0:d984976f1f1c 52 extern void rt_ret_val (P_TCB p_TCB, U32 v0);
leo44 0:d984976f1f1c 53 extern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1);
leo44 0:d984976f1f1c 54
leo44 0:d984976f1f1c 55 extern void dbg_init (void);
leo44 0:d984976f1f1c 56 extern void dbg_task_notify (P_TCB p_tcb, BOOL create);
leo44 0:d984976f1f1c 57 extern void dbg_task_switch (U32 task_id);
leo44 0:d984976f1f1c 58
leo44 0:d984976f1f1c 59
leo44 0:d984976f1f1c 60 #if defined (__CC_ARM) /* ARM Compiler */
leo44 0:d984976f1f1c 61
leo44 0:d984976f1f1c 62 #if ((__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M) && !NO_EXCLUSIVE_ACCESS)
leo44 0:d984976f1f1c 63 #define __USE_EXCLUSIVE_ACCESS
leo44 0:d984976f1f1c 64 #else
leo44 0:d984976f1f1c 65 #undef __USE_EXCLUSIVE_ACCESS
leo44 0:d984976f1f1c 66 #endif
leo44 0:d984976f1f1c 67
leo44 0:d984976f1f1c 68 #elif defined (__GNUC__) /* GNU Compiler */
leo44 0:d984976f1f1c 69
leo44 0:d984976f1f1c 70 #undef __USE_EXCLUSIVE_ACCESS
leo44 0:d984976f1f1c 71
leo44 0:d984976f1f1c 72 #if defined (__CORTEX_M0) || defined (__CORTEX_M0PLUS)
leo44 0:d984976f1f1c 73 #define __TARGET_ARCH_6S_M 1
leo44 0:d984976f1f1c 74 #else
leo44 0:d984976f1f1c 75 #define __TARGET_ARCH_6S_M 0
leo44 0:d984976f1f1c 76 #endif
leo44 0:d984976f1f1c 77
leo44 0:d984976f1f1c 78 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
leo44 0:d984976f1f1c 79 #define __TARGET_FPU_VFP 1
leo44 0:d984976f1f1c 80 #else
leo44 0:d984976f1f1c 81 #define __TARGET_FPU_VFP 0
leo44 0:d984976f1f1c 82 #endif
leo44 0:d984976f1f1c 83
leo44 0:d984976f1f1c 84 #define __inline inline
leo44 0:d984976f1f1c 85 #define __weak __attribute__((weak))
leo44 0:d984976f1f1c 86
leo44 0:d984976f1f1c 87
leo44 0:d984976f1f1c 88 #elif defined (__ICCARM__) /* IAR Compiler */
leo44 0:d984976f1f1c 89
leo44 0:d984976f1f1c 90 #undef __USE_EXCLUSIVE_ACCESS
leo44 0:d984976f1f1c 91
leo44 0:d984976f1f1c 92 #if (__CORE__ == __ARM6M__)
leo44 0:d984976f1f1c 93 #define __TARGET_ARCH_6S_M 1
leo44 0:d984976f1f1c 94 #else
leo44 0:d984976f1f1c 95 #define __TARGET_ARCH_6S_M 0
leo44 0:d984976f1f1c 96 #endif
leo44 0:d984976f1f1c 97
leo44 0:d984976f1f1c 98 #if defined __ARMVFP__
leo44 0:d984976f1f1c 99 #define __TARGET_FPU_VFP 1
leo44 0:d984976f1f1c 100 #else
leo44 0:d984976f1f1c 101 #define __TARGET_FPU_VFP 0
leo44 0:d984976f1f1c 102 #endif
leo44 0:d984976f1f1c 103
leo44 0:d984976f1f1c 104 #define __inline inline
leo44 0:d984976f1f1c 105
leo44 0:d984976f1f1c 106 #endif
leo44 0:d984976f1f1c 107
leo44 0:d984976f1f1c 108
leo44 0:d984976f1f1c 109 /* NVIC registers */
leo44 0:d984976f1f1c 110
leo44 0:d984976f1f1c 111 #define OS_PEND_IRQ() NVIC_PendIRQ(SYS_TICK_IRQn)
leo44 0:d984976f1f1c 112 #define OS_PENDING NVIC_PendingIRQ(SYS_TICK_IRQn)
leo44 0:d984976f1f1c 113 #define OS_UNPEND(fl) NVIC_UnpendIRQ(SYS_TICK_IRQn)
leo44 0:d984976f1f1c 114 #define OS_PEND(fl,p) NVIC_PendIRQ(SYS_TICK_IRQn)
leo44 0:d984976f1f1c 115 #define OS_LOCK() NVIC_DisableIRQ(SYS_TICK_IRQn)
leo44 0:d984976f1f1c 116 #define OS_UNLOCK() NVIC_EnableIRQ(SYS_TICK_IRQn)
leo44 0:d984976f1f1c 117
leo44 0:d984976f1f1c 118 #define OS_X_PENDING NVIC_PendingIRQ(SYS_TICK_IRQn)
leo44 0:d984976f1f1c 119 #define OS_X_UNPEND(fl) NVIC_UnpendIRQ(SYS_TICK_IRQn)
leo44 0:d984976f1f1c 120 #define OS_X_PEND(fl,p) NVIC_PendIRQ(SYS_TICK_IRQn)
leo44 0:d984976f1f1c 121
leo44 0:d984976f1f1c 122 #define OS_X_INIT(n) NVIC_EnableIRQ(n)
leo44 0:d984976f1f1c 123 #define OS_X_LOCK(n) NVIC_DisableIRQ(n)
leo44 0:d984976f1f1c 124 #define OS_X_UNLOCK(n) NVIC_EnableIRQ(n)
leo44 0:d984976f1f1c 125
leo44 0:d984976f1f1c 126 /* Variables */
leo44 0:d984976f1f1c 127 extern BIT dbg_msg;
leo44 0:d984976f1f1c 128
leo44 0:d984976f1f1c 129 /* Functions */
leo44 0:d984976f1f1c 130 #ifdef __USE_EXCLUSIVE_ACCESS
leo44 0:d984976f1f1c 131 #define rt_inc(p) while(__strex((__ldrex(p)+1),p))
leo44 0:d984976f1f1c 132 #define rt_dec(p) while(__strex((__ldrex(p)-1),p))
leo44 0:d984976f1f1c 133 #else
leo44 0:d984976f1f1c 134 #define rt_inc(p) __disable_irq();(*p)++;__enable_irq();
leo44 0:d984976f1f1c 135 #define rt_dec(p) __disable_irq();(*p)--;__enable_irq();
leo44 0:d984976f1f1c 136 #endif
leo44 0:d984976f1f1c 137
leo44 0:d984976f1f1c 138 __inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) {
leo44 0:d984976f1f1c 139 U32 cnt,c2;
leo44 0:d984976f1f1c 140 #ifdef __USE_EXCLUSIVE_ACCESS
leo44 0:d984976f1f1c 141 do {
leo44 0:d984976f1f1c 142 if ((cnt = __ldrex(count)) == size) {
leo44 0:d984976f1f1c 143 __clrex();
leo44 0:d984976f1f1c 144 return (cnt); }
leo44 0:d984976f1f1c 145 } while (__strex(cnt+1, count));
leo44 0:d984976f1f1c 146 do {
leo44 0:d984976f1f1c 147 c2 = (cnt = __ldrex(first)) + 1;
leo44 0:d984976f1f1c 148 if (c2 == size) c2 = 0;
leo44 0:d984976f1f1c 149 } while (__strex(c2, first));
leo44 0:d984976f1f1c 150 #else
leo44 0:d984976f1f1c 151 __disable_irq();
leo44 0:d984976f1f1c 152 if ((cnt = *count) < size) {
leo44 0:d984976f1f1c 153 *count = cnt+1;
leo44 0:d984976f1f1c 154 c2 = (cnt = *first) + 1;
leo44 0:d984976f1f1c 155 if (c2 == size) c2 = 0;
leo44 0:d984976f1f1c 156 *first = c2;
leo44 0:d984976f1f1c 157 }
leo44 0:d984976f1f1c 158 __enable_irq ();
leo44 0:d984976f1f1c 159 #endif
leo44 0:d984976f1f1c 160 return (cnt);
leo44 0:d984976f1f1c 161 }
leo44 0:d984976f1f1c 162
leo44 0:d984976f1f1c 163 __inline static void rt_systick_init (void) {
leo44 0:d984976f1f1c 164 #if SYS_TICK_IRQn == TIMER0_IRQn
leo44 0:d984976f1f1c 165 #define SYS_TICK_TIMER LPC_TIM0
leo44 0:d984976f1f1c 166 LPC_SC->PCONP |= (1 << PCTIM0);
leo44 0:d984976f1f1c 167 LPC_SC->PCLKSEL0 = (LPC_SC->PCLKSEL0 & (~(1<<3))) | (1<<2); //PCLK == CPUCLK
leo44 0:d984976f1f1c 168 #elif SYS_TICK_IRQn == TIMER1_IRQn
leo44 0:d984976f1f1c 169 #define SYS_TICK_TIMER LPC_TIM1
leo44 0:d984976f1f1c 170 LPC_SC->PCONP |= (1 << PCTIM1);
leo44 0:d984976f1f1c 171 LPC_SC->PCLKSEL0 = (LPC_SC->PCLKSEL0 & (~(1<<5))) | (1<<4); //PCLK == CPUCLK
leo44 0:d984976f1f1c 172 #elif SYS_TICK_IRQn == TIMER2_IRQn
leo44 0:d984976f1f1c 173 #define SYS_TICK_TIMER LPC_TIM2
leo44 0:d984976f1f1c 174 LPC_SC->PCONP |= (1 << PCTIM2);
leo44 0:d984976f1f1c 175 LPC_SC->PCLKSEL1 = (LPC_SC->PCLKSEL1 & (~(1<<13))) | (1<<12); //PCLK == CPUCLK
leo44 0:d984976f1f1c 176 #else
leo44 0:d984976f1f1c 177 #define SYS_TICK_TIMER LPC_TIM3
leo44 0:d984976f1f1c 178 LPC_SC->PCONP |= (1 << PCTIM3);
leo44 0:d984976f1f1c 179 LPC_SC->PCLKSEL1 = (LPC_SC->PCLKSEL1 & (~(1<<15))) | (1<<14); //PCLK == CPUCLK
leo44 0:d984976f1f1c 180 #endif
leo44 0:d984976f1f1c 181
leo44 0:d984976f1f1c 182 // setup Timer to count forever
leo44 0:d984976f1f1c 183 //interrupt_reg
leo44 0:d984976f1f1c 184 SYS_TICK_TIMER->TCR = 2; // reset & disable timer 0
leo44 0:d984976f1f1c 185 SYS_TICK_TIMER->TC = os_trv;
leo44 0:d984976f1f1c 186 SYS_TICK_TIMER->PR = 0; // set the prescale divider
leo44 0:d984976f1f1c 187 //Reset of TC and Interrupt when MR3 MR2 matches TC
leo44 0:d984976f1f1c 188 SYS_TICK_TIMER->MCR = (1 << 9) |(1 << 10); //TMCR_MR3_R_Msk | TMCR_MR3_I_Msk
leo44 0:d984976f1f1c 189 SYS_TICK_TIMER->MR3 = os_trv; // match registers
leo44 0:d984976f1f1c 190 SYS_TICK_TIMER->CCR = 0; // disable compare registers
leo44 0:d984976f1f1c 191 SYS_TICK_TIMER->EMR = 0; // disable external match register
leo44 0:d984976f1f1c 192 // initialize the interrupt vector
leo44 0:d984976f1f1c 193 NVIC_SetVector(SYS_TICK_IRQn, (uint32_t)&SysTick_Handler);
leo44 0:d984976f1f1c 194 SYS_TICK_TIMER->TCR = 1; // enable timer 0
leo44 0:d984976f1f1c 195 }
leo44 0:d984976f1f1c 196
leo44 0:d984976f1f1c 197 __inline static void rt_svc_init (void) {
leo44 0:d984976f1f1c 198 // TODO: add svcInit
leo44 0:d984976f1f1c 199
leo44 0:d984976f1f1c 200 }
leo44 0:d984976f1f1c 201
leo44 0:d984976f1f1c 202 #ifdef DBG_MSG
leo44 0:d984976f1f1c 203 #define DBG_INIT() dbg_init()
leo44 0:d984976f1f1c 204 #define DBG_TASK_NOTIFY(p_tcb,create) if (dbg_msg) dbg_task_notify(p_tcb,create)
leo44 0:d984976f1f1c 205 #define DBG_TASK_SWITCH(task_id) if (dbg_msg && (os_tsk.new_tsk != os_tsk.run)) \
leo44 0:d984976f1f1c 206 dbg_task_switch(task_id)
leo44 0:d984976f1f1c 207 #else
leo44 0:d984976f1f1c 208 #define DBG_INIT()
leo44 0:d984976f1f1c 209 #define DBG_TASK_NOTIFY(p_tcb,create)
leo44 0:d984976f1f1c 210 #define DBG_TASK_SWITCH(task_id)
leo44 0:d984976f1f1c 211 #endif
leo44 0:d984976f1f1c 212
leo44 0:d984976f1f1c 213 /*----------------------------------------------------------------------------
leo44 0:d984976f1f1c 214 * end of file
leo44 0:d984976f1f1c 215 *---------------------------------------------------------------------------*/
leo44 0:d984976f1f1c 216