test

Dependencies:   F7_Ethernet mbed BSP_DISCO_F746NG SDFileSystem RF24

Committer:
lowlowry
Date:
Tue Jun 08 16:21:16 2021 +0000
Revision:
3:1c6da30ca347
Parent:
0:d984976f1f1c
test final

Who changed what in which revision?

UserRevisionLine numberNew contents of line
leo44 0:d984976f1f1c 1 /*----------------------------------------------------------------------------
leo44 0:d984976f1f1c 2 * RL-ARM - RTX
leo44 0:d984976f1f1c 3 *----------------------------------------------------------------------------
leo44 0:d984976f1f1c 4 * Name: HAL_CM.C
leo44 0:d984976f1f1c 5 * Purpose: Hardware Abstraction Layer for ARM7TDMI
leo44 0:d984976f1f1c 6 * Rev.: V1.0
leo44 0:d984976f1f1c 7 *----------------------------------------------------------------------------
leo44 0:d984976f1f1c 8 *
leo44 0:d984976f1f1c 9 * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH
leo44 0:d984976f1f1c 10 * All rights reserved.
leo44 0:d984976f1f1c 11 * Redistribution and use in source and binary forms, with or without
leo44 0:d984976f1f1c 12 * modification, are permitted provided that the following conditions are met:
leo44 0:d984976f1f1c 13 * - Redistributions of source code must retain the above copyright
leo44 0:d984976f1f1c 14 * notice, this list of conditions and the following disclaimer.
leo44 0:d984976f1f1c 15 * - Redistributions in binary form must reproduce the above copyright
leo44 0:d984976f1f1c 16 * notice, this list of conditions and the following disclaimer in the
leo44 0:d984976f1f1c 17 * documentation and/or other materials provided with the distribution.
leo44 0:d984976f1f1c 18 * - Neither the name of ARM nor the names of its contributors may be used
leo44 0:d984976f1f1c 19 * to endorse or promote products derived from this software without
leo44 0:d984976f1f1c 20 * specific prior written permission.
leo44 0:d984976f1f1c 21 *
leo44 0:d984976f1f1c 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
leo44 0:d984976f1f1c 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
leo44 0:d984976f1f1c 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
leo44 0:d984976f1f1c 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
leo44 0:d984976f1f1c 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
leo44 0:d984976f1f1c 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
leo44 0:d984976f1f1c 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
leo44 0:d984976f1f1c 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
leo44 0:d984976f1f1c 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
leo44 0:d984976f1f1c 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
leo44 0:d984976f1f1c 32 * POSSIBILITY OF SUCH DAMAGE.
leo44 0:d984976f1f1c 33 *---------------------------------------------------------------------------*/
leo44 0:d984976f1f1c 34
leo44 0:d984976f1f1c 35 #include "rt_TypeDef.h"
leo44 0:d984976f1f1c 36 #include "RTX_Conf.h"
leo44 0:d984976f1f1c 37 #include "rt_HAL_CM.h"
leo44 0:d984976f1f1c 38
leo44 0:d984976f1f1c 39
leo44 0:d984976f1f1c 40 /*----------------------------------------------------------------------------
leo44 0:d984976f1f1c 41 * Global Variables
leo44 0:d984976f1f1c 42 *---------------------------------------------------------------------------*/
leo44 0:d984976f1f1c 43
leo44 0:d984976f1f1c 44 #ifdef DBG_MSG
leo44 0:d984976f1f1c 45 BIT dbg_msg;
leo44 0:d984976f1f1c 46 #endif
leo44 0:d984976f1f1c 47
leo44 0:d984976f1f1c 48 /*----------------------------------------------------------------------------
leo44 0:d984976f1f1c 49 * Functions
leo44 0:d984976f1f1c 50 *---------------------------------------------------------------------------*/
leo44 0:d984976f1f1c 51
leo44 0:d984976f1f1c 52
leo44 0:d984976f1f1c 53 /*--------------------------- rt_init_stack ---------------------------------*/
leo44 0:d984976f1f1c 54
leo44 0:d984976f1f1c 55 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
leo44 0:d984976f1f1c 56 /* Prepare TCB and saved context for a first time start of a task. */
leo44 0:d984976f1f1c 57 U32 *stk,i,size;
leo44 0:d984976f1f1c 58
leo44 0:d984976f1f1c 59 /* Prepare a complete interrupt frame for first task start */
leo44 0:d984976f1f1c 60 size = p_TCB->priv_stack >> 2;
leo44 0:d984976f1f1c 61
leo44 0:d984976f1f1c 62 /* Write to the top of stack. */
leo44 0:d984976f1f1c 63 stk = &p_TCB->stack[size];
leo44 0:d984976f1f1c 64
leo44 0:d984976f1f1c 65 /* Auto correct to 8-byte ARM stack alignment. */
leo44 0:d984976f1f1c 66 if ((U32)stk & 0x04) {
leo44 0:d984976f1f1c 67 stk--;
leo44 0:d984976f1f1c 68 }
leo44 0:d984976f1f1c 69
leo44 0:d984976f1f1c 70 stk -= 16;
leo44 0:d984976f1f1c 71
leo44 0:d984976f1f1c 72 /* Default xPSR and initial PC */
leo44 0:d984976f1f1c 73 stk[15] = (U32)task_body + 4; /* add 4 byte offset because SUB PC, LR - 4 */
leo44 0:d984976f1f1c 74 stk[0] = INITIAL_xPSR;
leo44 0:d984976f1f1c 75
leo44 0:d984976f1f1c 76 /* Clear R0-R13/LR registers. */
leo44 0:d984976f1f1c 77 for (i = 1; i < 14; i++) {
leo44 0:d984976f1f1c 78 stk[i] = 0;
leo44 0:d984976f1f1c 79 }
leo44 0:d984976f1f1c 80
leo44 0:d984976f1f1c 81 /* Assign a void pointer to R0. */
leo44 0:d984976f1f1c 82 stk[TCB_STACK_R0_OFFSET_DWORDS] = (U32)p_TCB->msg;
leo44 0:d984976f1f1c 83
leo44 0:d984976f1f1c 84 /* Initial Task stack pointer. */
leo44 0:d984976f1f1c 85 p_TCB->tsk_stack = (U32)stk;
leo44 0:d984976f1f1c 86
leo44 0:d984976f1f1c 87 /* Task entry point. */
leo44 0:d984976f1f1c 88 p_TCB->ptask = task_body;
leo44 0:d984976f1f1c 89
leo44 0:d984976f1f1c 90 /* Set a magic word for checking of stack overflow.
leo44 0:d984976f1f1c 91 For the main thread (ID: 0x01) the stack is in a memory area shared with the
leo44 0:d984976f1f1c 92 heap, therefore the last word of the stack is a moving target.
leo44 0:d984976f1f1c 93 We want to do stack/heap collision detection instead.
leo44 0:d984976f1f1c 94 */
leo44 0:d984976f1f1c 95 if (p_TCB->task_id != 0x01)
leo44 0:d984976f1f1c 96 p_TCB->stack[0] = MAGIC_WORD;
leo44 0:d984976f1f1c 97 }
leo44 0:d984976f1f1c 98
leo44 0:d984976f1f1c 99
leo44 0:d984976f1f1c 100 /*--------------------------- rt_ret_val ----------------------------------*/
leo44 0:d984976f1f1c 101
leo44 0:d984976f1f1c 102 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
leo44 0:d984976f1f1c 103 /* Get pointer to task return value registers (R0..R3) in Stack */
leo44 0:d984976f1f1c 104
leo44 0:d984976f1f1c 105 /* Stack Frame: CPSR,R0-R13,PC */
leo44 0:d984976f1f1c 106 return (U32 *)(p_TCB->tsk_stack + TCB_STACK_R0_OFFSET_BYTES);
leo44 0:d984976f1f1c 107 }
leo44 0:d984976f1f1c 108
leo44 0:d984976f1f1c 109 void rt_ret_val (P_TCB p_TCB, U32 v0) {
leo44 0:d984976f1f1c 110 U32 *ret;
leo44 0:d984976f1f1c 111
leo44 0:d984976f1f1c 112 ret = rt_ret_regs(p_TCB);
leo44 0:d984976f1f1c 113 ret[0] = v0;
leo44 0:d984976f1f1c 114 }
leo44 0:d984976f1f1c 115
leo44 0:d984976f1f1c 116 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
leo44 0:d984976f1f1c 117 U32 *ret;
leo44 0:d984976f1f1c 118
leo44 0:d984976f1f1c 119 ret = rt_ret_regs(p_TCB);
leo44 0:d984976f1f1c 120 ret[0] = v0;
leo44 0:d984976f1f1c 121 ret[1] = v1;
leo44 0:d984976f1f1c 122 }
leo44 0:d984976f1f1c 123
leo44 0:d984976f1f1c 124
leo44 0:d984976f1f1c 125 /*--------------------------- dbg_init --------------------------------------*/
leo44 0:d984976f1f1c 126
leo44 0:d984976f1f1c 127 #ifdef DBG_MSG
leo44 0:d984976f1f1c 128 void dbg_init (void) {
leo44 0:d984976f1f1c 129 if ((DEMCR & DEMCR_TRCENA) &&
leo44 0:d984976f1f1c 130 (ITM_CONTROL & ITM_ITMENA) &&
leo44 0:d984976f1f1c 131 (ITM_ENABLE & (1UL << 31))) {
leo44 0:d984976f1f1c 132 dbg_msg = __TRUE;
leo44 0:d984976f1f1c 133 }
leo44 0:d984976f1f1c 134 }
leo44 0:d984976f1f1c 135 #endif
leo44 0:d984976f1f1c 136
leo44 0:d984976f1f1c 137 /*--------------------------- dbg_task_notify -------------------------------*/
leo44 0:d984976f1f1c 138
leo44 0:d984976f1f1c 139 #ifdef DBG_MSG
leo44 0:d984976f1f1c 140 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
leo44 0:d984976f1f1c 141 while (ITM_PORT31_U32 == 0);
leo44 0:d984976f1f1c 142 ITM_PORT31_U32 = (U32)p_tcb->ptask;
leo44 0:d984976f1f1c 143 while (ITM_PORT31_U32 == 0);
leo44 0:d984976f1f1c 144 ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
leo44 0:d984976f1f1c 145 }
leo44 0:d984976f1f1c 146 #endif
leo44 0:d984976f1f1c 147
leo44 0:d984976f1f1c 148 /*--------------------------- dbg_task_switch -------------------------------*/
leo44 0:d984976f1f1c 149
leo44 0:d984976f1f1c 150 #ifdef DBG_MSG
leo44 0:d984976f1f1c 151 void dbg_task_switch (U32 task_id) {
leo44 0:d984976f1f1c 152 while (ITM_PORT31_U32 == 0);
leo44 0:d984976f1f1c 153 ITM_PORT31_U8 = task_id;
leo44 0:d984976f1f1c 154 }
leo44 0:d984976f1f1c 155 #endif
leo44 0:d984976f1f1c 156
leo44 0:d984976f1f1c 157
leo44 0:d984976f1f1c 158 /*----------------------------------------------------------------------------
leo44 0:d984976f1f1c 159 * end of file
leo44 0:d984976f1f1c 160 *---------------------------------------------------------------------------*/
leo44 0:d984976f1f1c 161