File content as of revision 6:3c510c297e2f:

///* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
//    Filename:       interruptHandler.cpp
//    Description:    Handles interrupt from TRF7970
//    Copyright (C)   2015 Gymtrack, Inc.
//    Author:         Ron Clough
//    Date:           2015-03-03
//    
//    Changes:
//    Rev     Date        Who     Details
//    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
//    0.0     2015-03-03  RWC     Original version.
//    
//* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
//
//#include    "mbed.h"
////#include    "main.h"
//#include    "interruptStuff.h"
//#include    "readerComm.h"
//
//InterruptIn readerInt(p7);              // Interrupt from TRF7970
////DigitalIn   irqPin(p7, PullDown);
//extern  DigitalOut  debug1LED;     // "Debug" LED
//extern  DigitalOut  debug2LED;
//extern  DigitalOut  heartbeatLED;
//extern  DigitalOut  testPin;
//extern  Serial      pc;                 // main.cpp
//extern  DigitalOut  ISO15693LED;
//extern  uint8_t irqRegister;    // Interrupt register (main.cpp)
//extern  uint8_t buf[300];
//extern  int16_t nfc_state;
//extern  uint8_t nfc_protocol;
//extern  uint8_t active;
//extern  int8_t  rxtxState;
//extern  uint8_t rxErrorFlag;
//extern  uint8_t tagFlag;
//volatile extern  uint8_t irqFlag;
//extern uint8_t irqCount;
//
//extern  uint8_t     buffer;
//
//extern  uint8_t     debugBuffer[1000];  // Capture data for analysis
//extern  uint8_t     bufIdx;
//
//void trf797xSetupIrq(void)
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
////  trf797xSetupIrq()
////  Description:    Interrupt from TRF7970 appears at pin 7 of 
////                  on nRF51-DK eval board. trf7970IrqHandler() is called 
////                  when a rising edge is detected.
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
//{   
//    readerInt.rise(&trf797xIrqHandler);    // Interrupt on rising edge, call trf7970IrqHandler()
//    readerInt.disable_irq();
//}   // End of trf797xSetupIrq()
//
//void trf797xReadIrqStatus(uint8_t *buffer)
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
////  trf797xReadIrqStatus()
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
//{
//    *buffer = IRQ_STATUS;
//    *(buffer + 1) = IRQ_MASK;
//    trf797xReadContinuous(buffer, 2);
//}   // End of trf797xReadIrqStatus()
//
//void trf797xResetIrqStatus(void)
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
////  trf797xResetIrqStatus()
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
//{ 
//    uint8_t irq_status[4];
//    
//    irq_status[0] = IRQ_STATUS;
//    irq_status[1] = IRQ_MASK;
//    trf797xReadContinuous(irq_status, 2);   // Read second register as dummy read
//}   // End of trf797xResetIrqStatus()
//
//
//
///*======================================nfc mode SG
//void trf797xNfcModeIsr(uint8_t *Register)
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
////  trf797xNfcModeIsr()
////  bit0 - RF collision avoidance error
////  bit1 - RF collision avoidance OK
////  bit2 - Change in RF field level
////  bit3 - SDD OK
////  bit4 - Communication error
////  bit5 - FIFO high/low
////  bit6 - RX
////  bit7 - TX
////
////  irqRegister is used for signaling to the protocol functions
////  irqRegister = 0x00 - OK
////  irqRegister = 0x01 - progress
////  irqRegister = 0x02 - error
////  irqRegister = 0xFF - end of RX
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
//{
//    if (*Register == BIT0) {
//        irqRegister = 0x02;
//    }
//    else if (*Register == BIT1) {
//        irqRegister = 0x00;
//    }
//    else if (*Register == BIT3) {
//        irqRegister = 0x00;
//    }
//    else if ((*Register  & BIT4) == BIT4) {
//        *Register = RX_SPECIAL_SETTINGS;        // Check filter and gain
//        trf797xReadSingle(Register, 1);
//        trf797xStopDecoders();
//        irqRegister = 0x02;
//    }
//    else if (*Register == BIT7) {              // TX complete
//        irqRegister = 0x00;
//        trf797xReset();
//    }
//    else if (*Register == 0x40 || *Register == 0x44) {  // RX flag means that EOF has been received and
//                                                        // the number of unread bytes is in FIFOstatus register
//        *Register = RX_SPECIAL_SETTINGS;                // Check filter and gain
//        trf797xReadSingle(Register, 1);
//        *Register = FIFO_CONTROL;
//        trf797xReadSingle(Register, 1);
//        *Register = 0x7F & *Register;
//        buf[nfc_state] = FIFO;                          // Write the received bytes to the correct place in the buffer
//        trf797xReadContinuous(&buf[nfc_state], *Register);
//        nfc_state = nfc_state + *Register;
//        trf797xReset();                                 // Reset the FIFO after last byte has been read out
//        irqRegister = 0xFF;                             // Signal to the receive function that these are the last bytes
//        trf797xResetIrqStatus();
//    }
//    else if ((*Register == 0x60) || (*Register == 0x64)) {  // RX and FIFO interrupt
//        irqRegister = 0x01;
//    }
//    else if (*Register == 0x48) {                       // SDD complete
//        irqRegister = 0x00;
//    }
//}   // End of trf797xNfcModeIsr()
//*/
//
///*==============================================================================target SG
//void trf797xTargetIsr(uint8_t *Register)
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
////  trf797xTargetIsr()
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
//{
//    uint8_t command, i;
//    
//    if (*Register == 0x48) {
//        TargetProtocol:
//        // Determine the NFC target protocol
//        command = NFC_TARGET_PROTOCOL;
//        trf797xReadSingle(&command, 1);         //read the NFCtargetprotocol register
//        command &= 0x3F;
//        buf[50] = ISO_CONTROL;
//        if (command == 0x09) {
//            nfc_protocol = 0x01;
//            *Register = FIFO_CONTROL;
//            trf797xReadSingle(Register, 1);     // Determine the number of bytes left in FIFO
//            *Register = 0x7F & *Register;
//            buf[nfc_state] = FIFO;          // Write the received bytes to the correct place in the buffer
//            trf797xReadContinuous(&buf[nfc_state], *Register);
//            nfc_state = nfc_state + *Register;
//            irqRegister = 0xFF;
//        }
//        else {
//            *Register = FIFO_CONTROL;
//            trf797xReadSingle(Register, 1);     // Determine the number of bytes left in FIFO
//            *Register = 0x7F & *Register;
//            buf[nfc_state] = FIFO;          // Write the received bytes to the correct place in the buffer
//            trf797xReadContinuous(&buf[nfc_state], *Register);
//            nfc_state = nfc_state + *Register;
//            irqRegister = 0xFF;
//            if ((command == 0x01)) {         // 14443A - active
//                buf[51] = NFC106AC;
//                trf797xWriteSingle(&buf[50], 2);
//                nfc_protocol = 0x02;
//                active = 0xFF;
//            }
//            else if (command == 0x05) {     // 14443B - tag emulation
//                buf[51] = TAG14443B;
//                trf797xWriteSingle(&buf[50], 2);
//                nfc_protocol = 0x07;
//                active = 0x00;
//            }
//            else if (command == 0x12) {
//                if(buf[1] == 0x06) {        // Felica 212 - passive
//                    buf[51] = NFC212PA;
//                    trf797xWriteSingle(&buf[50], 2);
//                    nfc_protocol = 0x03;
//                    active = 0x00;
//                }
//                else {                          // Felica 212 - active
//                    buf[51] = NFC212AC;
//                    trf797xWriteSingle(&buf[50], 2);
//                    nfc_protocol = 0x04;
//                    active = 0xFF;
//                }
//            } // if (command == 0x12)
//            else if (command == 0x13) {
//                if(buf[1] == 0x06) {            //Felica 424 - passive
//                    buf[51] = NFC424PA;
//                    trf797xWriteSingle(&buf[50], 2);
//                    nfc_protocol = 0x05;
//                    active = 0x00;
//                }
//                else {                          // Felica 424 - active
//                    buf[51] = NFC424AC;
//                    trf797xWriteSingle(&buf[50], 2);
//                    nfc_protocol = 0x06;
//                    active = 0xFF;
//                } // if (buf[1] == 0x06)
//            } // if (command == 0x13)
//        } // if (command == 0x09)
//    } // if (*Register == 0x48)
//    else if (*Register == 0x60) {
//        irqRegister = 0x01;
//        buf[nfc_state] = FIFO;
//        trf797xReadContinuous(&buf[nfc_state], FIFO_MORE);  // Read FIFO_MORE bytes from FIFO
//        nfc_state = nfc_state + FIFO_MORE;
//        trf797xResetIrqStatus();
//    }
//    else if ((*Register & BIT3) == BIT3) {     // SDD finished
//        irqRegister = 0xFF;
//        for(i = 0; i < 255; i++);
//        nfc_protocol = 0x01;
//        trf797xReset();
//        trf797xStopDecoders();
//        trf797xRunDecoders();
//    }
//    else if (*Register == 0x44) {
//        trf797xReadIrqStatus(Register);
//        if (*Register == 0x40) {
//            goto TargetProtocol;
//        }
//        else if (*Register == 0x00) {
//            goto RFfieldChange;
//        }
//    }
//    else if (*Register == BIT2) {                       // RF field change
//        RFfieldChange:
//        trf797xReset();
//        trf797xStopDecoders();
//        trf797xRunDecoders();
//    }
//    trf797xResetIrqStatus();
//}   // End of trf797xTargetIsr()
//*/
//void trf797xISR(uint8_t *irq_status)
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
////  trf797xISR()
////  Description:    The Interrupt Handler determines how the IRQ should
////                  be handled. The Trf797x IRQ status register is read
////                  to determine the cause of the IRQ.
////                  Conditions are checked and appropriate actions taken. 
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
//{ 
//
//debug2LED = LED_ON;
//printf(" IRQ_STATUS %d \r\n",irq_status[0]);
//  printf(" IRQ_MASK %d \r\n",irq_status[1]); 
//    if (*irq_status == 0xA0) {  printf( "BIT5 and BIT7, TX active and only 3 bytes left in FIFO \r\n");              // BIT5 and BIT7, TX active and only 3 bytes left in FIFO
//        irqRegister = 0x00;
//    }
//    else if (*irq_status == BIT7) {  printf( " TX complete \r\n");          // TX complete // always comes here SG 
//       
//        irqRegister = 0x00;
//       trf797xReset();                      // Reset the FIFO after TX
//   }
//    else if ((*irq_status & BIT1) == BIT1) {printf( "Collision error \r\n"); // Collision error // comes here when tag is detected SG 
//       
//       irqRegister = 0x02;                  // RX complete
//        trf797xStopDecoders();
//       trf797xReset();
//        trf797xResetIrqStatus();
////        //  IRQ_CLR;
//    }
//   else if (*irq_status == BIT6) {   printf( "BIT6 INTERRUPT \r\n");    // RX flag means that EOF has been received // does not come here 3G
//                                            // and the number of unread bytes is in FIFOstatus register
//        
//       if (rxErrorFlag == 0x02) {
//            irqRegister = 0x02;
//           return;
//        }
//        *irq_status = FIFO_CONTROL;
//        trf797xReadSingle(irq_status, 1);       // Determine the number of bytes left in FIFO
//        *irq_status = 0x7F & *irq_status;
//        buf[rxtxState] = FIFO;              // Write the received bytes to the correct place in the buffer
//        trf797xReadContinuous(&buf[rxtxState], *irq_status);
//       rxtxState = rxtxState + *irq_status;
//        trf797xReset();                     // Reset the FIFO after last byte has been read out
//        irqRegister = 0xFF;                 // Signal to the receive funnction that these are the last bytes
//    }
//   else if (*irq_status == 0x60) { printf( "RX active and 9 bytes already in FIFO \r\n");         // RX active and 9 bytes already in FIFO
//       
//        irqRegister = 0x01;
//        buf[rxtxState] = FIFO;
//        trf797xReadContinuous(&buf[rxtxState], 86); // Read 86 bytes from FIFO
//        rxtxState = rxtxState + 86;
//        if (readerInt) {  //ISO15693LED = LED_ON;                         // If IRQ pin high         // chnaged irqpin to readerInt
//           trf797xReadIrqStatus(irq_status);
////            // IRQ_CLR
//            if (*irq_status == 0x40) {                          // End of recieve
//                *irq_status = FIFO_CONTROL;
//                trf797xReadSingle(irq_status, 1);                   // Determine the number of bytes left in FIFO
//                *irq_status = 0x7F & *irq_status;
//                buf[rxtxState] = FIFO;                          // Write the received bytes to the correct place in the buffer
//                trf797xReadContinuous(&buf[rxtxState], *irq_status);
//                rxtxState = rxtxState + *irq_status;
//               irqRegister = 0xFF;                             // Signal to the receive funnction that these are the last bytes
//               trf797xReset();                                 // Reset the FIFO after last byte has been read out
//            }
//            else if(*irq_status == 0x50) { printf( "End of receive and error \r\n");                        // End of receive and error
//                irqRegister = 0x02;
//           }
//        }
//        else {
//            trf797xReadIrqStatus(irq_status);
//           if(irq_status[0] == 0x00) {
//               irqRegister = 0xFF;
//           }
//       }
//    }
//   else if ((*irq_status & BIT4) == BIT4) {   printf( "BIT4 INTERRUPT \r\n");    // CRC error
//        if ((*irq_status & BIT5) == BIT5) {  printf( "BIT5 INTERRUPT \r\n");   
//           irqRegister = 0x01;                 // RX active
//            rxErrorFlag = 0x02;
//        }
//       if ((*irq_status & BIT6) == BIT6) { printf( "BIT4/BIT 6 INTERRUPT \r\n");     // 4 Bit receive
//            buf[200] = FIFO;                    // Write the received bytes to the correct place in the buffer
//           trf797xReadContinuous(&buf[200], 1);
//            trf797xReset();
//           irqRegister = 0x02;                 // End of RX
//            rxErrorFlag = 0x02;
//        }
//       else
//       {
//            irqRegister = 0x02;                 // End of RX
//        }
//   }
//    else if ((*irq_status & BIT2) == BIT2) { printf( "BIT2 INTERRUPT \r\n");  // Byte framing error
//        if ((*irq_status & BIT5) == BIT5) {
//            irqRegister = 0x01;                 // RX active
//            rxErrorFlag = 0x02;
//        }
//       else
//            irqRegister = 0x02;                 // End of RX
//    }
//    else if ((*irq_status == BIT0)) {printf( "No response interrupt \r\n");          // No response interrupt
//        irqRegister = 0x00;
//    }
//    else {                                     // Interrupt register not properly set
//        printf ("Interrupt Error\r\n");
//
//        irqRegister = 0x02;
//        trf797xStopDecoders();                         // Reset the FIFO after TX
//        trf797xReset();
//        trf797xResetIrqStatus();
//        //  Original code clears the IRQ flag here.
//    }
//  //  wait_ms(10);
////debug2LED = LED_OFF;
////=================================================================================
//}   // End of trf797xISR()
//
//
////============================interrupt call back test
//void trf797xIrqHandlerCallback(void)  
// {  wait_ms(10);
//    debug1LED = LED_OFF; 
//    
//    }
////==============================SG   
//
//
//
//
//
//void trf797xIrqHandler(void)
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
////  trf7970IrqHandler()
////  __interrupt void Trf797xPortB(void) in original source file trf797x.c
//// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
//{   //======================works $SG
//    debug1LED = LED_ON; 
//   // uint8_t    irqStatus[2], iso_control;
//    irqFlag = 0x02;
//  // trf797xIrqHandlerCallback();
//  //=====================================================================================
// // do {
////        
////       iso_control = ISO_CONTROL;
////        trf797xReadSingle(&iso_control, 1);
////       trf797xReadIrqStatus(irqStatus);  //reads IRQ_STATUS register SG
////       
////      if (*irqStatus == 0xA0) {                   // TX active and only 3 bytes left in FIFO
////           break;
////       }
////        
////       if ((iso_control & BIT5) != BIT5) {         // RFID mode
////          
////           trf797xISR(irqStatus);}
//     
//     //==========================================================================     
//     //  }
////       else {                                      // NFC mode
////          if ((iso_control & BIT2) == BIT2) { 
////             // Tag emulation
////               tagFlag = 1;
////                trf797xNfcModeIsr(irqStatus);
////                
////            }
////            else {
////               if ((iso_control & BIT4) == BIT4) { // Active mode
////                   
////                    trf797xNfcModeIsr(irqStatus);
////                    
////              }
////               else {                             // Passive mode
////                    trf797xTargetIsr(irqStatus);
////                    
////              }
////           }
////        }
//   // } while(readerInt);    // While IRQ pin is high ********** chnaged irq to readerInt
//   
// // wait_ms(10);
// debug1LED = LED_OFF;
// 
//}
//    
// 
//    
//    
//