Gymtrack / RFIDTestNFC

interrupt handling

Dependencies:  

readerComm.h@7:96baf1b2fd07, 2015-04-07 (annotated)

Committer:
soumi_ghsoh
Date:
Tue Apr 07 20:06:51 2015 +0000
Revision:
7:96baf1b2fd07
Parent:
6:3c510c297e2f
Child:
9:9266e0109d26
added PollNFC(), MemReadReqNFC(), InventoryReqNFC()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rwclough 1:1eb96189824d 1
rwclough 1:1eb96189824d 2 // Prototypes
soumi_ghsoh 7:96baf1b2fd07 3 //void SpiInit1(void); // SPI 250 Khz
soumi_ghsoh 7:96baf1b2fd07 4 void SpiInit(void); // SPI 1Mhz
soumi_ghsoh 7:96baf1b2fd07 5 void trf797xDirectCommand(uint8_t *buffer); // send direct command to trf7970a
soumi_ghsoh 7:96baf1b2fd07 6 void trf797xWriteSingle(uint8_t *buffer, uint8_t length); // write to trf7970a register
soumi_ghsoh 7:96baf1b2fd07 7 void trf797xReadSingle(uint8_t *buffer, uint8_t number); // read trf7970a register
soumi_ghsoh 7:96baf1b2fd07 8 void trf797xReadContinuous(uint8_t *buffer, uint8_t length); // read continuous bytes from trf7970a
soumi_ghsoh 7:96baf1b2fd07 9 void trf797xRawWrite(uint8_t *buffer, uint8_t length); // raw write to trf7970a FIFO
soumi_ghsoh 7:96baf1b2fd07 10 void PowerUpNFC(void); // powerup trf7970a
soumi_ghsoh 7:96baf1b2fd07 11 void PowerDownNFC(void); // powerdown trf7970a
soumi_ghsoh 7:96baf1b2fd07 12 void NFCInit(void); // initialize trf7970 iso control =0x02, chip status control=0x20, modulator=0x21
soumi_ghsoh 7:96baf1b2fd07 13 void RegisterReInitNFC(void); // reinitialize nfc status registers
soumi_ghsoh 7:96baf1b2fd07 14 void RegistersReadNFC(void); // read nfc status registers
soumi_ghsoh 7:96baf1b2fd07 15 void InventoryReqNFC(void); // inventory request to trf7970a
soumi_ghsoh 7:96baf1b2fd07 16 void MemReadReqNFC(void); // memory read request to trf7970a
soumi_ghsoh 7:96baf1b2fd07 17 void ReadNFC(void); // read teag ID/Single Read
soumi_ghsoh 7:96baf1b2fd07 18 void PollNFC(uint8_t *irqStatus); // read rx complete irq from trf7970a.
soumi_ghsoh 7:96baf1b2fd07 19 void handlerNFC(void); // trf7970 irq handler
soumi_ghsoh 5:93c612f43ec2 20 // Booleans
rwclough 1:1eb96189824d 21 #define DESELECT 1
rwclough 1:1eb96189824d 22 #define SELECT 0
rwclough 1:1eb96189824d 23 #define ADDRESS 0
rwclough 1:1eb96189824d 24 #define COMMAND 1
rwclough 1:1eb96189824d 25 #define WRITE 0
rwclough 1:1eb96189824d 26 #define READ 1
soumi_ghsoh 5:93c612f43ec2 27 //led
soumi_ghsoh 5:93c612f43ec2 28 #define LED_ON 0
soumi_ghsoh 5:93c612f43ec2 29 #define LED_OFF 1
soumi_ghsoh 5:93c612f43ec2 30 #define FALSE 0
soumi_ghsoh 5:93c612f43ec2 31 #define TRUE 1
rwclough 1:1eb96189824d 32
soumi_ghsoh 5:93c612f43ec2 33 // Direct commands for trf797x
rwclough 1:1eb96189824d 34 #define IDLE 0x00
rwclough 1:1eb96189824d 35 #define SOFT_INIT 0x03
rwclough 1:1eb96189824d 36 #define INITIAL_RF_COLLISION 0x04
rwclough 1:1eb96189824d 37 #define RESPONSE_RF_COLLISION_N 0x05
rwclough 1:1eb96189824d 38 #define RESPONSE_RF_COLLISION_0 0x06
rwclough 1:1eb96189824d 39 #define RESET 0x0F
rwclough 1:1eb96189824d 40 #define TRANSMIT_NO_CRC 0x10
rwclough 1:1eb96189824d 41 #define TRANSMIT_CRC 0x11
rwclough 1:1eb96189824d 42 #define DELAY_TRANSMIT_NO_CRC 0x12
rwclough 1:1eb96189824d 43 #define DELAY_TRANSMIT_CRC 0x13
rwclough 1:1eb96189824d 44 #define TRANSMIT_NEXT_SLOT 0x14
rwclough 1:1eb96189824d 45 #define CLOSE_SLOT_SEQUENCE 0x15
rwclough 1:1eb96189824d 46 #define STOP_DECODERS 0x16
rwclough 1:1eb96189824d 47 #define RUN_DECODERS 0x17
rwclough 1:1eb96189824d 48 #define CHECK_INTERNAL_RF 0x18
rwclough 1:1eb96189824d 49 #define CHECK_EXTERNAL_RF 0x19
rwclough 1:1eb96189824d 50 #define ADJUST_GAIN 0x1A
rwclough 1:1eb96189824d 51
soumi_ghsoh 5:93c612f43ec2 52 // Registers for trf797x
rwclough 1:1eb96189824d 53 #define CHIP_STATUS_CONTROL 0x00
rwclough 1:1eb96189824d 54 #define ISO_CONTROL 0x01
rwclough 1:1eb96189824d 55 #define ISO_14443B_OPTIONS 0x02
rwclough 1:1eb96189824d 56 #define ISO_14443A_OPTIONS 0x03
rwclough 1:1eb96189824d 57 #define TX_TIMER_EPC_HIGH 0x04
rwclough 1:1eb96189824d 58 #define TX_TIMER_EPC_LOW 0x05
rwclough 1:1eb96189824d 59 #define TX_PULSE_LENGTH_CONTROL 0x06
rwclough 1:1eb96189824d 60 #define RX_NO_RESPONSE_WAIT_TIME 0x07
rwclough 1:1eb96189824d 61 #define RX_WAIT_TIME 0x08
rwclough 1:1eb96189824d 62 #define MODULATOR_CONTROL 0x09
rwclough 1:1eb96189824d 63 #define RX_SPECIAL_SETTINGS 0x0A
rwclough 1:1eb96189824d 64 #define REGULATOR_CONTROL 0x0B
rwclough 1:1eb96189824d 65 #define IRQ_STATUS 0x0C
rwclough 1:1eb96189824d 66 #define IRQ_MASK 0x0D
rwclough 1:1eb96189824d 67 #define COLLISION_POSITION 0x0E
rwclough 1:1eb96189824d 68 #define RSSI_LEVELS 0x0F
rwclough 1:1eb96189824d 69 #define SPECIAL_FUNCTION_1 0x10
rwclough 1:1eb96189824d 70 #define SPECIAL_FUNCTION_2 0x11
rwclough 1:1eb96189824d 71 #define RAM_0 0x12
rwclough 1:1eb96189824d 72 #define RAM_1 0x13
rwclough 1:1eb96189824d 73 #define FIFO_IRQ_LEVELS_ADJ 0x14
rwclough 1:1eb96189824d 74 #define RESERVED 0x15
rwclough 1:1eb96189824d 75 #define NFC_LOW_DETECTION 0x16
rwclough 2:bd5afc5aa139 76 #define NFCID 0x17
rwclough 1:1eb96189824d 77 #define NFC_TARGET_LEVEL 0x18
rwclough 1:1eb96189824d 78 #define NFC_TARGET_PROTOCOL 0x19
rwclough 1:1eb96189824d 79 #define TEST_SETTINGS_1 0x1A
rwclough 1:1eb96189824d 80 #define TEST_SETTINGS_2 0x1B
soumi_ghsoh 7:96baf1b2fd07 81 #define FIFO_COUNTER 0x1C
rwclough 2:bd5afc5aa139 82 #define TX_LENGTH_BYTE_1 0x1D
rwclough 2:bd5afc5aa139 83 #define TX_LENGTH_BYTE_2 0x1E
rwclough 2:bd5afc5aa139 84 #define FIFO 0x1F
rwclough 2:bd5afc5aa139 85
rwclough 2:bd5afc5aa139 86 // BITs
rwclough 2:bd5afc5aa139 87 #define BIT0 0x01 // 0b00000001
rwclough 2:bd5afc5aa139 88 #define BIT1 0x02 // 0b00000010
rwclough 2:bd5afc5aa139 89 #define BIT2 0x40 // 0b00000100
rwclough 2:bd5afc5aa139 90 #define BIT3 0x08 // 0b00001000
rwclough 2:bd5afc5aa139 91 #define BIT4 0x10 // 0b00010000
rwclough 2:bd5afc5aa139 92 #define BIT5 0x20 // 0b00100000
rwclough 2:bd5afc5aa139 93 #define BIT6 0x40 // 0b01000000
rwclough 2:bd5afc5aa139 94 #define BIT7 0x80 // 0b10000000
rwclough 2:bd5afc5aa139 95
rwclough 2:bd5afc5aa139 96 // Misc
rwclough 2:bd5afc5aa139 97 #define SIXTEEN_SLOTS 0x06
rwclough 2:bd5afc5aa139 98 #define ONE_SLOT 0x26
soumi_ghsoh 5:93c612f43ec2 99