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Dependencies:   mbed

MRF24J40/MRF24J40.cpp@6:1fe84e29b486, 2015-11-11 (annotated)

Committer:
mfrede
Date:
Wed Nov 11 00:46:15 2015 +0000
Revision:
6:1fe84e29b486
Parent:
1:019a3be50b96 
added headers back in...not sure if we need them

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mfrede 1:019a3be50b96 1 /* mbed MRF24J40 (IEEE 802.15.4 tranceiver) Library
mfrede 1:019a3be50b96 2 * Copyright (c) 2011 Jeroen Hilgers
mfrede 1:019a3be50b96 3 *
mfrede 1:019a3be50b96 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
mfrede 1:019a3be50b96 5 * of this software and associated documentation files (the "Software"), to deal
mfrede 1:019a3be50b96 6 * in the Software without restriction, including without limitation the rights
mfrede 1:019a3be50b96 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
mfrede 1:019a3be50b96 8 * copies of the Software, and to permit persons to whom the Software is
mfrede 1:019a3be50b96 9 * furnished to do so, subject to the following conditions:
mfrede 1:019a3be50b96 10 *
mfrede 1:019a3be50b96 11 * The above copyright notice and this permission notice shall be included in
mfrede 1:019a3be50b96 12 * all copies or substantial portions of the Software.
mfrede 1:019a3be50b96 13 *
mfrede 1:019a3be50b96 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
mfrede 1:019a3be50b96 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
mfrede 1:019a3be50b96 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
mfrede 1:019a3be50b96 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
mfrede 1:019a3be50b96 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
mfrede 1:019a3be50b96 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
mfrede 1:019a3be50b96 20 * THE SOFTWARE.
mfrede 1:019a3be50b96 21 */
mfrede 1:019a3be50b96 22
mfrede 1:019a3be50b96 23 #include "MRF24J40.h"
mfrede 1:019a3be50b96 24
mfrede 1:019a3be50b96 25 // MRF20J40 Short address control register mapping.
mfrede 1:019a3be50b96 26 #define RXMCR 0x00
mfrede 1:019a3be50b96 27 #define PANIDL 0x01
mfrede 1:019a3be50b96 28 #define PANIDH 0x02
mfrede 1:019a3be50b96 29 #define SADRL 0x03
mfrede 1:019a3be50b96 30 #define SADRH 0x04
mfrede 1:019a3be50b96 31 #define EADR0 0x05
mfrede 1:019a3be50b96 32 #define EADR1 0x06
mfrede 1:019a3be50b96 33 #define EADR2 0x07
mfrede 1:019a3be50b96 34 #define EADR3 0x08
mfrede 1:019a3be50b96 35 #define EADR4 0x09
mfrede 1:019a3be50b96 36 #define EADR5 0x0a
mfrede 1:019a3be50b96 37 #define EADR6 0x0b
mfrede 1:019a3be50b96 38 #define EADR7 0x0c
mfrede 1:019a3be50b96 39 #define RXFLUSH 0x0d
mfrede 1:019a3be50b96 40
mfrede 1:019a3be50b96 41 #define TXNMTRIG 0x1b
mfrede 1:019a3be50b96 42 #define TXSR 0x24
mfrede 1:019a3be50b96 43
mfrede 1:019a3be50b96 44 #define ISRSTS 0x31
mfrede 1:019a3be50b96 45 #define INTMSK 0x32
mfrede 1:019a3be50b96 46 #define GPIO 0x33
mfrede 1:019a3be50b96 47 #define TRISGPIO 0x34
mfrede 1:019a3be50b96 48
mfrede 1:019a3be50b96 49 #define RFCTL 0x36
mfrede 1:019a3be50b96 50
mfrede 1:019a3be50b96 51 #define BBREG2 0x3A
mfrede 1:019a3be50b96 52
mfrede 1:019a3be50b96 53 #define BBREG6 0x3E
mfrede 1:019a3be50b96 54 #define RSSITHCCA 0x3F
mfrede 1:019a3be50b96 55
mfrede 1:019a3be50b96 56 // MRF20J40 Long address control register mapping.
mfrede 1:019a3be50b96 57 #define RFCTRL0 0x200
mfrede 1:019a3be50b96 58
mfrede 1:019a3be50b96 59 #define RFCTRL2 0x202
mfrede 1:019a3be50b96 60 #define RFCTRL3 0x203
mfrede 1:019a3be50b96 61
mfrede 1:019a3be50b96 62 #define RFCTRL6 0x206
mfrede 1:019a3be50b96 63 #define RFCTRL7 0x207
mfrede 1:019a3be50b96 64 #define RFCTRL8 0x208
mfrede 1:019a3be50b96 65
mfrede 1:019a3be50b96 66 #define CLKINTCR 0x211
mfrede 1:019a3be50b96 67 #define CLCCTRL 0x220
mfrede 1:019a3be50b96 68
mfrede 1:019a3be50b96 69 MRF24J40::MRF24J40(PinName mosi, PinName miso, PinName sck, PinName cs, PinName reset) ://, PinName irq, PinName wake) :
mfrede 1:019a3be50b96 70 mSpi(mosi, miso, sck), // mosi, miso, sclk
mfrede 1:019a3be50b96 71 mCs(cs),
mfrede 1:019a3be50b96 72 mReset(reset)
mfrede 1:019a3be50b96 73 // mIrq(irq),
mfrede 1:019a3be50b96 74 // mWake(wake)
mfrede 1:019a3be50b96 75 {
mfrede 1:019a3be50b96 76 mSpi.format(8, 0); // 8 bits, cpol=0; cpha=0
mfrede 1:019a3be50b96 77 mSpi.frequency(500000);
mfrede 1:019a3be50b96 78 Reset();
mfrede 1:019a3be50b96 79 }
mfrede 1:019a3be50b96 80
mfrede 1:019a3be50b96 81 /*
mfrede 1:019a3be50b96 82 void MRF24J40::DebugDump(Serial &ser)
mfrede 1:019a3be50b96 83 {
mfrede 1:019a3be50b96 84 ser.printf("MRF24J40 registers:\r");
mfrede 1:019a3be50b96 85 ser.printf("RXMCR=0x%X\r", MrfReadShort(RXMCR));
mfrede 1:019a3be50b96 86 ser.printf("RXFLUSH=0x%X\r", MrfReadShort(RXFLUSH));
mfrede 1:019a3be50b96 87 ser.printf("TXNMTRIG=0x%X\r", MrfReadShort(TXNMTRIG));
mfrede 1:019a3be50b96 88 ser.printf("TXSR=0x%X\r", MrfReadShort(TXSR));
mfrede 1:019a3be50b96 89 ser.printf("ISRSTS=0x%X\r", MrfReadShort(ISRSTS));
mfrede 1:019a3be50b96 90 ser.printf("INTMSK=0x%X\r", MrfReadShort(INTMSK));
mfrede 1:019a3be50b96 91 ser.printf("GPIO=0x%X\r", MrfReadShort(GPIO));
mfrede 1:019a3be50b96 92 ser.printf("TRISGPIO=0x%X\r", MrfReadShort(TRISGPIO));
mfrede 1:019a3be50b96 93 ser.printf("RFCTL=0x%X\r", MrfReadShort(RFCTL));
mfrede 1:019a3be50b96 94 ser.printf("BBREG2=0x%X\r", MrfReadShort(BBREG2));
mfrede 1:019a3be50b96 95 ser.printf("BBREG6=0x%X\r", MrfReadShort(BBREG6));
mfrede 1:019a3be50b96 96 ser.printf("RSSITHCCA=0x%X\r", MrfReadShort(RSSITHCCA));
mfrede 1:019a3be50b96 97
mfrede 1:019a3be50b96 98
mfrede 1:019a3be50b96 99 ser.printf("RFCTRL0=0x%X\r", MrfReadLong(RFCTRL0));
mfrede 1:019a3be50b96 100 ser.printf("RFCTRL2=0x%X\r", MrfReadLong(RFCTRL2));
mfrede 1:019a3be50b96 101 ser.printf("RFCTRL3=0x%X\r", MrfReadLong(RFCTRL3));
mfrede 1:019a3be50b96 102 ser.printf("RFCTRL6=0x%X\r", MrfReadLong(RFCTRL6));
mfrede 1:019a3be50b96 103 ser.printf("RFCTRL7=0x%X\r", MrfReadLong(RFCTRL7));
mfrede 1:019a3be50b96 104 ser.printf("RFCTRL8=0x%X\r", MrfReadLong(RFCTRL8));
mfrede 1:019a3be50b96 105 ser.printf("CLKINTCR=0x%X\r", MrfReadLong(CLKINTCR));
mfrede 1:019a3be50b96 106 ser.printf("CLCCTRL=0x%X\r", MrfReadLong(CLCCTRL));
mfrede 1:019a3be50b96 107 ser.printf("\r");
mfrede 1:019a3be50b96 108 }
mfrede 1:019a3be50b96 109 */
mfrede 1:019a3be50b96 110
mfrede 1:019a3be50b96 111 void MRF24J40::Reset(void)
mfrede 1:019a3be50b96 112 {
mfrede 1:019a3be50b96 113 mCs = 1;
mfrede 1:019a3be50b96 114 // Pulse hardware reset.
mfrede 1:019a3be50b96 115 mReset = 0;
mfrede 1:019a3be50b96 116 wait_us(100);
mfrede 1:019a3be50b96 117 mReset = 1;
mfrede 1:019a3be50b96 118 wait_us(100);
mfrede 1:019a3be50b96 119
mfrede 1:019a3be50b96 120 // Reset RF module.
mfrede 1:019a3be50b96 121 WriteShort(RFCTL, 0x04);
mfrede 1:019a3be50b96 122 WriteShort(RFCTL, 0x00);
mfrede 1:019a3be50b96 123
mfrede 1:019a3be50b96 124 WriteShort(RFCTL, 0x00);
mfrede 1:019a3be50b96 125
mfrede 1:019a3be50b96 126 WriteShort(PANIDL, 0xAA);
mfrede 1:019a3be50b96 127 WriteShort(PANIDH, 0xAA);
mfrede 1:019a3be50b96 128 WriteShort(SADRL, 0xAA);
mfrede 1:019a3be50b96 129 WriteShort(SADRH, 0xAA);
mfrede 1:019a3be50b96 130
mfrede 1:019a3be50b96 131 // Flush RX fifo.
mfrede 1:019a3be50b96 132 WriteShort(RXFLUSH, 0x01);
mfrede 1:019a3be50b96 133
mfrede 1:019a3be50b96 134 // Write MAC addresses here. We don't care.
mfrede 1:019a3be50b96 135
mfrede 1:019a3be50b96 136 WriteLong(RFCTRL2, 0x80); // Enable RF PLL.
mfrede 1:019a3be50b96 137
mfrede 1:019a3be50b96 138 WriteLong(RFCTRL3, 0x00); // Full power.
mfrede 1:019a3be50b96 139 WriteLong(RFCTRL6, 0x80); // Enable TX filter (recommended)
mfrede 1:019a3be50b96 140 WriteLong(RFCTRL8, 0x10); // Enhanced VCO (recommended)
mfrede 1:019a3be50b96 141
mfrede 1:019a3be50b96 142 WriteShort(BBREG2,0x78); // Clear Channel Assesment use carrier sense.
mfrede 1:019a3be50b96 143 WriteShort(BBREG6,0x40); // Calculate RSSI for Rx packet.
mfrede 1:019a3be50b96 144 WriteShort(RSSITHCCA,0x00);// RSSI threshold for CCA.
mfrede 1:019a3be50b96 145
mfrede 1:019a3be50b96 146 WriteLong(RFCTRL0, 0x00); // Channel 11.
mfrede 1:019a3be50b96 147
mfrede 1:019a3be50b96 148 WriteShort(RXMCR, 0x01); // Don't check address upon reception.
mfrede 1:019a3be50b96 149 // MrfWriteShort(RXMCR, 0x00); // Check address upon reception.
mfrede 1:019a3be50b96 150
mfrede 1:019a3be50b96 151 // Reset RF module with new settings.
mfrede 1:019a3be50b96 152 WriteShort(RFCTL, 0x04);
mfrede 1:019a3be50b96 153 WriteShort(RFCTL, 0x00);
mfrede 1:019a3be50b96 154 }
mfrede 1:019a3be50b96 155
mfrede 1:019a3be50b96 156 void MRF24J40::Send(uint8_t *data, uint8_t length)
mfrede 1:019a3be50b96 157 {
mfrede 1:019a3be50b96 158 uint8_t i;
mfrede 1:019a3be50b96 159
mfrede 1:019a3be50b96 160 WriteLong(0x000, 0); // No addresses in header.
mfrede 1:019a3be50b96 161 WriteLong(0x001, length); // 11 bytes
mfrede 1:019a3be50b96 162 for(i=0; i<length; i++)
mfrede 1:019a3be50b96 163 WriteLong(0x002+i, data[i]);
mfrede 1:019a3be50b96 164
mfrede 1:019a3be50b96 165 WriteShort(TXNMTRIG, 0x01);
mfrede 1:019a3be50b96 166 }
mfrede 1:019a3be50b96 167
mfrede 1:019a3be50b96 168 uint8_t MRF24J40::Receive(uint8_t *data, uint8_t maxLength)
mfrede 1:019a3be50b96 169 {
mfrede 1:019a3be50b96 170 uint8_t i, length;
mfrede 1:019a3be50b96 171 uint8_t lqi, rssi;
mfrede 1:019a3be50b96 172
mfrede 1:019a3be50b96 173 if(ReadShort(ISRSTS)& 0x08)
mfrede 1:019a3be50b96 174 {
mfrede 1:019a3be50b96 175 length = ReadLong(0x300);
mfrede 1:019a3be50b96 176 lqi = ReadLong(0x301 + length);
mfrede 1:019a3be50b96 177 rssi = ReadLong(0x302 + length);
mfrede 1:019a3be50b96 178 for(i=0; i<length; i++)
mfrede 1:019a3be50b96 179 if(i<maxLength)
mfrede 1:019a3be50b96 180 *data++ = ReadLong(0x301 + (uint16_t)i);
mfrede 1:019a3be50b96 181 else
mfrede 1:019a3be50b96 182 ReadLong(0x301 + (uint16_t)i);
mfrede 1:019a3be50b96 183 if(length < maxLength)
mfrede 1:019a3be50b96 184 return length;
mfrede 1:019a3be50b96 185 }
mfrede 1:019a3be50b96 186 return 0;
mfrede 1:019a3be50b96 187 }
mfrede 1:019a3be50b96 188
mfrede 1:019a3be50b96 189 uint8_t MRF24J40::ReadShort (uint8_t address)
mfrede 1:019a3be50b96 190 {
mfrede 1:019a3be50b96 191 uint8_t value;
mfrede 1:019a3be50b96 192 mCs = 0;
mfrede 1:019a3be50b96 193 wait_us(1);
mfrede 1:019a3be50b96 194 mSpi.write((address<<1) & 0x7E);
mfrede 1:019a3be50b96 195 wait_us(1);
mfrede 1:019a3be50b96 196 value = mSpi.write(0xFF);
mfrede 1:019a3be50b96 197 wait_us(1);
mfrede 1:019a3be50b96 198 mCs = 1;
mfrede 1:019a3be50b96 199 wait_us(1);
mfrede 1:019a3be50b96 200 return value;
mfrede 1:019a3be50b96 201 }
mfrede 1:019a3be50b96 202
mfrede 1:019a3be50b96 203 void MRF24J40::WriteShort (uint8_t address, uint8_t data)
mfrede 1:019a3be50b96 204 {
mfrede 1:019a3be50b96 205 mCs = 0;
mfrede 1:019a3be50b96 206 wait_us(1);
mfrede 1:019a3be50b96 207 mSpi.write(((address<<1) & 0x7E) | 0x01);
mfrede 1:019a3be50b96 208 wait_us(1);
mfrede 1:019a3be50b96 209 mSpi.write(data);
mfrede 1:019a3be50b96 210 wait_us(1);
mfrede 1:019a3be50b96 211 mCs = 1;
mfrede 1:019a3be50b96 212 wait_us(1);
mfrede 1:019a3be50b96 213 }
mfrede 1:019a3be50b96 214
mfrede 1:019a3be50b96 215 uint8_t MRF24J40::ReadLong (uint16_t address)
mfrede 1:019a3be50b96 216 {
mfrede 1:019a3be50b96 217 uint8_t value;
mfrede 1:019a3be50b96 218 mCs = 0;
mfrede 1:019a3be50b96 219 wait_us(1);
mfrede 1:019a3be50b96 220 mSpi.write((address>>3) | 0x80);
mfrede 1:019a3be50b96 221 wait_us(1);
mfrede 1:019a3be50b96 222 mSpi.write((address<<5) & 0xE0);
mfrede 1:019a3be50b96 223 wait_us(1);
mfrede 1:019a3be50b96 224 value = mSpi.write(0xFF);
mfrede 1:019a3be50b96 225 wait_us(1);
mfrede 1:019a3be50b96 226 mCs = 1;
mfrede 1:019a3be50b96 227 wait_us(1);
mfrede 1:019a3be50b96 228 return value;
mfrede 1:019a3be50b96 229 }
mfrede 1:019a3be50b96 230
mfrede 1:019a3be50b96 231 void MRF24J40::WriteLong (uint16_t address, uint8_t data)
mfrede 1:019a3be50b96 232 {
mfrede 1:019a3be50b96 233 mCs = 0;
mfrede 1:019a3be50b96 234 wait_us(1);
mfrede 1:019a3be50b96 235 mSpi.write((address>>3) | 0x80);
mfrede 1:019a3be50b96 236 wait_us(1);
mfrede 1:019a3be50b96 237 mSpi.write(((address<<5) & 0xE0) | 0x10);
mfrede 1:019a3be50b96 238 wait_us(1);
mfrede 1:019a3be50b96 239 mSpi.write(data);
mfrede 1:019a3be50b96 240 wait_us(1);
mfrede 1:019a3be50b96 241 mCs = 1;
mfrede 1:019a3be50b96 242 wait_us(1);
mfrede 1:019a3be50b96 243 }
mfrede 1:019a3be50b96 244
mfrede 1:019a3be50b96 245 void MRF24J40::SetChannel(uint8_t channel)
mfrede 1:019a3be50b96 246 {
mfrede 1:019a3be50b96 247 WriteLong(RFCTRL0, (channel & 0x0F)<<4 | 0x03); // Set channel, leave RFOPT bits at recommended
mfrede 1:019a3be50b96 248
mfrede 1:019a3be50b96 249 //Reset the board by first writing a 4 to RFCTL, then writing a 0
mfrede 1:019a3be50b96 250 WriteShort(RFCTL, 0x04);
mfrede 1:019a3be50b96 251 WriteShort(RFCTL, 0x00);
mfrede 1:019a3be50b96 252 wait(0.5);
mfrede 1:019a3be50b96 253 }