Basically i glued Peter Drescher and Simon Ford libs in a GraphicsDisplay class, then derived TFT or LCD class (which inherits Protocols class), then the most derived ones (Inits), which are per-display and are the only part needed to be adapted to diff hw.

Dependents:   testUniGraphic_150217 maze_TFT_MMA8451Q TFT_test_frdm-kl25z TFT_test_NUCLEO-F411RE ... more

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Show/hide line numbers ILI9341.cpp Source File

ILI9341.cpp

00001  /* mbed UniGraphic library - Device specific class
00002  * Copyright (c) 2015 Giuliano Dianda
00003  * Released under the MIT License: http://mbed.org/license/mit
00004  */
00005  
00006 #include "Protocols.h "
00007 #include "ILI9341.h"
00008 
00009 //////////////////////////////////////////////////////////////////////////////////
00010 // display settings ///////////////////////////////////////////////////////
00011 /////////////////////////////////////////////////////////////////////////
00012 
00013 // put in constructor
00014 //#define LCDSIZE_X       240 // display X pixels, TFTs are usually portrait view
00015 //#define LCDSIZE_Y       320  // display Y pixels 
00016 
00017 
00018 
00019 ILI9341::ILI9341(proto_t displayproto, PortName port, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD, const char *name, unsigned int LCDSIZE_X, unsigned  int LCDSIZE_Y)
00020     : TFT(displayproto, port, CS, reset, DC, WR, RD, LCDSIZE_X, LCDSIZE_Y, name)
00021 {
00022     hw_reset();
00023     BusEnable(true);
00024     identify(); // will collect tftID and set mipistd flag
00025     init();
00026     auto_gram_read_format();
00027     set_orientation(0);
00028     cls();
00029     FastWindow(true); // most but not all controllers support this, even if datasheet tells they should. 
00030     locate(0,0); 
00031 }
00032 ILI9341::ILI9341(proto_t displayproto, PinName* buspins, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD, const char *name, unsigned int LCDSIZE_X, unsigned  int LCDSIZE_Y)
00033     : TFT(displayproto, buspins, CS, reset, DC, WR, RD, LCDSIZE_X, LCDSIZE_Y, name)
00034 {
00035     hw_reset();
00036     BusEnable(true);
00037     identify(); // will collect tftID and set mipistd flag
00038     init();
00039     auto_gram_read_format();
00040     set_orientation(0);
00041     cls();
00042     FastWindow(true); // most but not all controllers support this, even if datasheet tells they should. 
00043     locate(0,0); 
00044 }
00045 ILI9341::ILI9341(proto_t displayproto, int Hz, PinName mosi, PinName miso, PinName sclk, PinName CS, PinName reset, PinName DC, const char *name, unsigned int LCDSIZE_X , unsigned  int LCDSIZE_Y)
00046     : TFT(displayproto, Hz, mosi, miso, sclk, CS, reset, DC, LCDSIZE_X, LCDSIZE_Y, name)
00047 {
00048     hw_reset(); //TFT class forwards to Protocol class
00049     BusEnable(true); //TFT class forwards to Protocol class
00050     identify(); // will collect tftID and set mipistd flag
00051     init(); // per display custom init cmd sequence, implemented here
00052     auto_gram_read_format();// try to get read gram pixel format, could be 16bit or 18bit, RGB or BGR. Will set flags accordingly
00053     set_orientation(0); //TFT class does for MIPI standard and some ILIxxx
00054     FastWindow(true); // most but not all controllers support this, even if datasheet tells they should. 
00055     cls();
00056     locate(0,0); 
00057 }
00058 // reset and init the lcd controller
00059 void ILI9341::init()
00060 {
00061     /* Start Initial Sequence ----------------------------------------------------*/
00062     
00063     wr_cmd8(0xCB);  // POWER_ON_SEQ_CONTROL             
00064      wr_data8(0x39);
00065      wr_data8(0x2C);
00066      wr_data8(0x00);
00067      wr_data8(0x34);
00068      wr_data8(0x02);
00069      
00070     wr_cmd8(0xCF);  // POWER_CONTROL_B              
00071      wr_data8(0x00);
00072      wr_data8(0xC1);  // Applic Notes 81, was 83, C1 enables PCEQ: PC and EQ operation for power saving
00073      wr_data8(0x30);
00074      
00075      wr_cmd8(0xE8);  // DRIVER_TIMING_CONTROL_A               
00076      wr_data8(0x85);
00077      wr_data8(0x00);  // AN 10, was 01
00078      wr_data8(0x78);  // AN 7A, was 79
00079      
00080      wr_cmd8(0xEA);  // DRIVER_TIMING_CONTROL_B                    
00081      wr_data8(0x00);
00082      wr_data8(0x00);
00083      
00084      wr_cmd8(0xED);                     
00085      wr_data8(0x64);
00086      wr_data8(0x03);
00087      wr_data8(0x12);
00088      wr_data8(0x81);
00089      
00090      wr_cmd8(0xF7);  // PUMP_RATIO_CONTROL                   
00091      wr_data8(0x20);
00092      
00093      wr_cmd8(0xC0);                     // POWER_CONTROL_1
00094      wr_data8(0x23);  // AN 21, was 26
00095      
00096      wr_cmd8(0xC1);                     // POWER_CONTROL_2
00097      wr_data8(0x10);  // AN 11, was 11
00098      
00099      wr_cmd8(0xC5);                     // VCOM_CONTROL_1
00100      wr_data8(0x3E);  // AN 3F, was 35
00101      wr_data8(0x28);  // AN 3C, was 3E
00102      
00103      wr_cmd8(0xC7);                     // VCOM_CONTROL_2
00104      wr_data8(0x86);  // AN A7, was BE
00105      
00106      
00107      
00108      wr_cmd8(0xB1);                     // Frame Rate
00109      wr_data8(0x00);
00110      wr_data8(0x18);  // AN 1B, was 1B  1B=70hz             
00111      
00112      wr_cmd8(0xB6);                       // display function control, INTERESTING
00113      wr_data8(0x08);  // AN 0A, was 0A
00114      wr_data8(0x82);  // AN A2
00115      wr_data8(0x27);  // AN not present
00116   //   wr_data8(0x00);  // was present
00117      
00118      wr_cmd8(0xF2);                     // Gamma Function Disable
00119      wr_data8(0x00);  // AN 00, was 08
00120      
00121      wr_cmd8(0x26);                     
00122      wr_data8(0x01);                 // gamma set for curve 01/2/04/08
00123      
00124      wr_cmd8(0xE0);                     // positive gamma correction
00125      wr_data8(0x0F); 
00126      wr_data8(0x31); 
00127      wr_data8(0x2B); 
00128      wr_data8(0x0C); 
00129      wr_data8(0x0E); 
00130      wr_data8(0x08); 
00131      wr_data8(0x4E); 
00132      wr_data8(0xF1); 
00133      wr_data8(0x37); 
00134      wr_data8(0x07); 
00135      wr_data8(0x10); 
00136      wr_data8(0x03); 
00137      wr_data8(0x0E);
00138      wr_data8(0x09); 
00139      wr_data8(0x00);
00140      
00141      wr_cmd8(0xE1);                     // negativ gamma correction
00142      wr_data8(0x00); 
00143      wr_data8(0x0E); 
00144      wr_data8(0x14); 
00145      wr_data8(0x03); 
00146      wr_data8(0x11); 
00147      wr_data8(0x07); 
00148      wr_data8(0x31); 
00149      wr_data8(0xC1); 
00150      wr_data8(0x48); 
00151      wr_data8(0x08); 
00152      wr_data8(0x0F); 
00153      wr_data8(0x0C); 
00154      wr_data8(0x31);
00155      wr_data8(0x36); 
00156      wr_data8(0x0F);
00157      
00158      //wr_cmd8(0x34);                     // tearing effect off
00159      
00160      //wr_cmd8(0x35);                     // tearing effect on
00161       
00162   //   wr_cmd8(0xB7);                       // ENTRY_MODE_SET
00163   //   wr_data8(0x07);
00164   
00165     wr_cmd8(0x36);      // MEMORY_ACCESS_CONTROL (orientation stuff)
00166     wr_data8(0x48);
00167      
00168     wr_cmd8(0x3A);      // COLMOD_PIXEL_FORMAT_SET
00169     wr_data8(0x55);     // 16 bit pixel 
00170 
00171     wr_cmd8(0x13); // Nomal Displaymode
00172     
00173      wr_cmd8(0x11);                     // sleep out
00174      thread_sleep_for(150);
00175      
00176      wr_cmd8(0x29);                     // display on
00177      thread_sleep_for(150);
00178 
00179 }