Basically i glued Peter Drescher and Simon Ford libs in a GraphicsDisplay class, then derived TFT or LCD class (which inherits Protocols class), then the most derived ones (Inits), which are per-display and are the only part needed to be adapted to diff hw.

Dependents:   testUniGraphic_150217 maze_TFT_MMA8451Q TFT_test_frdm-kl25z TFT_test_NUCLEO-F411RE ... more

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Show/hide line numbers ILI932x.cpp Source File

ILI932x.cpp

00001  /* mbed UniGraphic library - Device specific class
00002  * Copyright (c) 2015 Giuliano Dianda
00003  * Released under the MIT License: http://mbed.org/license/mit
00004  */
00005  
00006 #include "Protocols.h "
00007 #include "ILI932x.h"
00008 
00009 //////////////////////////////////////////////////////////////////////////////////
00010 // display settings ///////////////////////////////////////////////////////
00011 /////////////////////////////////////////////////////////////////////////
00012 
00013 
00014 ILI932x::ILI932x(proto_t displayproto, PortName port, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD, const char *name , unsigned int LCDSIZE_X, unsigned  int LCDSIZE_Y)
00015     : TFT932x(displayproto, port, CS, reset, DC, WR, RD, LCDSIZE_X, LCDSIZE_Y, name)
00016 {
00017     hw_reset();
00018     BusEnable(true);  //set CS low, will stay low untill manually set high with BusEnable(false);
00019     identify(); // will collect tftID
00020     if(tftID==0x9325) init9325();
00021     else if(tftID==0x9320) init9320();
00022     auto_gram_read_format();// try to get read gram pixel format, could be 16bit or 18bit, RGB or BGR. Will set flags accordingly
00023     set_orientation(0);
00024     FastWindow(true); // most but not all controllers support this, even if datasheet tells they should. 
00025     cls();
00026     locate(0,0); 
00027 }
00028 ILI932x::ILI932x(proto_t displayproto, PinName* buspins, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD, const char *name , unsigned int LCDSIZE_X, unsigned  int LCDSIZE_Y)
00029     : TFT932x(displayproto, buspins, CS, reset, DC, WR, RD, LCDSIZE_X, LCDSIZE_Y, name)
00030 {
00031     hw_reset();
00032     BusEnable(true);  //set CS low, will stay low untill manually set high with BusEnable(false);
00033     identify(); // will collect tftID
00034     if(tftID==0x9325) init9325();
00035     else if(tftID==0x9320) init9320();
00036     auto_gram_read_format();// try to get read gram pixel format, could be 16bit or 18bit, RGB or BGR. Will set flags accordingly
00037     set_orientation(0);
00038     FastWindow(true); // most but not all controllers support this, even if datasheet tells they should. 
00039     cls();
00040     locate(0,0); 
00041 }
00042 ILI932x::ILI932x(proto_t displayproto, int Hz, PinName mosi, PinName miso, PinName sclk, PinName CS, PinName reset, const char *name, unsigned int LCDSIZE_X, unsigned  int LCDSIZE_Y)
00043     : TFT932x(displayproto, Hz, mosi, miso, sclk, CS, reset, LCDSIZE_X, LCDSIZE_Y, name)
00044 {
00045     hw_reset(); //TFT class forwards to Protocol class
00046     BusEnable(true); //set CS low, TFT932x class will toggle CS every transfer
00047     identify(); // will collect tftID
00048     if(tftID==0x9325) init9325();
00049     else if(tftID==0x9320) init9320();
00050     auto_gram_read_format();// try to get read gram pixel format, could be 16bit or 18bit, RGB or BGR. Will set flags accordingly
00051     set_orientation(0); 
00052     FastWindow(true); // most but not all controllers support this, even if datasheet tells they should. 
00053     cls();
00054     locate(0,0); 
00055 }
00056 // reset and init the lcd controller
00057 
00058 void ILI932x::init9325()
00059 {
00060     /* Example for ILI9325 ----------------------------------------------------*/
00061 
00062  flipped=FLIP_NONE; // FLIP_NONE, FLIP_X, FLIP_Y, FLIP_X|FLIP_Y
00063  
00064  reg_write(0x0001,0x0100); 
00065  reg_write(0x0002,0x0700); 
00066  reg_write(0x0003,0x1030); 
00067  reg_write(0x0004,0x0000); 
00068  reg_write(0x0008,0x0207);  
00069  reg_write(0x0009,0x0000);
00070  reg_write(0x000A,0x0000); 
00071  reg_write(0x000C,0x0000); 
00072  reg_write(0x000D,0x0000);
00073  reg_write(0x000F,0x0000);
00074 //power on sequence VGHVGL
00075  reg_write(0x0010,0x0000);   
00076  reg_write(0x0011,0x0007);  
00077  reg_write(0x0012,0x0000);  
00078  reg_write(0x0013,0x0000); 
00079  reg_write(0x0007,0x0001);
00080 thread_sleep_for(200);
00081 //vgh 
00082  reg_write(0x0010,0x1290);   
00083  reg_write(0x0011,0x0227);
00084 thread_sleep_for(50);
00085  //vregiout 
00086  reg_write(0x0012,0x001d); //0x001b
00087  thread_sleep_for(50);
00088  //vom amplitude
00089  reg_write(0x0013,0x1500);
00090  thread_sleep_for(50); 
00091  //vom H
00092  reg_write(0x0029,0x0018); 
00093  reg_write(0x002B,0x000D); 
00094 thread_sleep_for(50);
00095 //gamma
00096  reg_write(0x0030,0x0004);
00097  reg_write(0x0031,0x0307);
00098  reg_write(0x0032,0x0002);// 0006
00099  reg_write(0x0035,0x0206);
00100  reg_write(0x0036,0x0408);
00101  reg_write(0x0037,0x0507); 
00102  reg_write(0x0038,0x0204);//0200
00103  reg_write(0x0039,0x0707); 
00104  reg_write(0x003C,0x0405);// 0504
00105  reg_write(0x003D,0x0F02); 
00106  //ram
00107  reg_write(0x0050,0x0000); 
00108  reg_write(0x0051,0x00EF);
00109  reg_write(0x0052,0x0000); 
00110  reg_write(0x0053,0x013F);  
00111  reg_write(0x0060,0xA700); 
00112  reg_write(0x0061,0x0001); 
00113  reg_write(0x006A,0x0000); 
00114  //
00115  reg_write(0x0080,0x0000); 
00116  reg_write(0x0081,0x0000); 
00117  reg_write(0x0082,0x0000); 
00118  reg_write(0x0083,0x0000); 
00119  reg_write(0x0084,0x0000); 
00120  reg_write(0x0085,0x0000); 
00121  //
00122  reg_write(0x0090,0x0010); 
00123  reg_write(0x0092,0x0600); 
00124  reg_write(0x0093,0x0003); 
00125  reg_write(0x0095,0x0110); 
00126  reg_write(0x0097,0x0000); 
00127  reg_write(0x0098,0x0000);
00128  
00129  reg_write(0x0007,0x0133); // display on
00130 
00131 }
00132 void ILI932x::init9320()
00133 {
00134     /* Example for ILI9320 ----------------------------------------------------*/
00135 
00136  flipped=FLIP_X; // FLIP_NONE, FLIP_X, FLIP_Y, FLIP_X|FLIP_Y
00137  
00138  reg_write(0x0001,0x0100); 
00139  reg_write(0x0002,0x0700); 
00140  reg_write(0x0003,0x1030); 
00141  reg_write(0x0004,0x0000); 
00142  reg_write(0x0008,0x0202);  
00143  reg_write(0x0009,0x0000);
00144  reg_write(0x000A,0x0000); 
00145  reg_write(0x000C,0x0000); 
00146  reg_write(0x000D,0x0000);
00147  reg_write(0x000F,0x0000);
00148 //power on sequence
00149  reg_write(0x0010,0x0000);   
00150  reg_write(0x0011,0x0007);  
00151  reg_write(0x0012,0x0000);  
00152  reg_write(0x0013,0x0000); 
00153  reg_write(0x0007,0x0001);
00154 thread_sleep_for(200);
00155 
00156  reg_write(0x0010,0x10C0);   
00157  reg_write(0x0011,0x0007);
00158 thread_sleep_for(50);
00159 
00160  reg_write(0x0012,0x0110);
00161  thread_sleep_for(50);
00162 
00163  reg_write(0x0013,0x0b00);
00164  thread_sleep_for(50); 
00165 
00166  reg_write(0x0029,0x0000); 
00167  reg_write(0x002B,0x4010); // bit 14???
00168 thread_sleep_for(50);
00169 //gamma
00170 /*
00171  reg_write(0x0030,0x0004);
00172  reg_write(0x0031,0x0307);
00173  reg_write(0x0032,0x0002);// 0006
00174  reg_write(0x0035,0x0206);
00175  reg_write(0x0036,0x0408);
00176  reg_write(0x0037,0x0507); 
00177  reg_write(0x0038,0x0204);//0200
00178  reg_write(0x0039,0x0707); 
00179  reg_write(0x003C,0x0405);// 0504
00180  reg_write(0x003D,0x0F02);
00181  */
00182  //ram
00183  reg_write(0x0050,0x0000); 
00184  reg_write(0x0051,0x00EF);
00185  reg_write(0x0052,0x0000); 
00186  reg_write(0x0053,0x013F);  
00187  reg_write(0x0060,0x2700); 
00188  reg_write(0x0061,0x0001); 
00189  reg_write(0x006A,0x0000); 
00190  //
00191  reg_write(0x0080,0x0000); 
00192  reg_write(0x0081,0x0000); 
00193  reg_write(0x0082,0x0000); 
00194  reg_write(0x0083,0x0000); 
00195  reg_write(0x0084,0x0000); 
00196  reg_write(0x0085,0x0000); 
00197  //
00198  reg_write(0x0090,0x0000); 
00199  reg_write(0x0092,0x0000); 
00200  reg_write(0x0093,0x0001); 
00201  reg_write(0x0095,0x0110); 
00202  reg_write(0x0097,0x0000); 
00203  reg_write(0x0098,0x0000);
00204  
00205  reg_write(0x0007,0x0133); // display on
00206 
00207 }