Diff: cpp/bq79606.cpp

Revision:

2:9ca50d384b62

Parent:

1:6231121f9e19

--- a/cpp/bq79606.cpp	Mon Dec 21 10:34:18 2020 +0000
+++ b/cpp/bq79606.cpp	Mon Dec 21 14:20:29 2020 +0000
@@ -1,38 +1,23 @@
-/*
- *  @file bq79606.c
- *
- *  @author Vince Toledo - Texas Instruments Inc.
- *  @date August 2019
- *  @version 2.0
- *  @note Built with CCS for Hercules Version: 8.1.0.00011
- */
-
-/*****************************************************************************
- **
- **  Copyright (c) 2011-2017 Texas Instruments
- **
- ******************************************************************************/
 #include "bq79606.h"
 
 extern int UART_RX_RDY;
 extern int RTI_TIMEOUT;
-int bRes = 0;
-int count = 10000;
-uint8 pFrame[(MAXBYTES+6)*TOTALBOARDS];
-BYTE bBuf[8];
-BYTE bReturn = 0;
-BYTE response_frame2[(MAXBYTES+6)*TOTALBOARDS];
-BYTE bFrame[(2+6)*TOTALBOARDS];
-int nCurrentBoard = 0;
+
+
+static volatile struct g_sciTransfer
+{
+    uint32_t   mode;         /* Used to check for TX interrupt Enable */  
+    uint32_t   tx_length;    /* Transmit data length in number of Bytes */
+    uint32_t   rx_length;    /* Receive data length in number of Bytes */  
+    uint8_t    * tx_data;    /* Transmit data pointer */      
+    uint8_t    * rx_data;    /* Receive data pointer */  
+} g_sciTransfer_t;
+
+
 
 //******
 //PINGS
 //******
-void WakeUp() {
-    bmsLVWakeUp=0;//active low
-    delayus(250);//wait min 250us
-    bmsLVWakeUp=1;//de-assert, done with toggle in code example
-    delayms(7);  //tsu(wake) 7ms delay PER BOARD before beginning communication  
 
 void CommClear(void) {
     int baudRate;
@@ -42,7 +27,7 @@
     scilinREG->PIO0 &= ~(1U << 2U); // disable transmit function - now a GPIO
     scilinREG->PIO3 &= ~(1U << 2U); // set output to low
 
-    delayus(baudRate * 2); // ~= 1/BAUDRATE/16*(155+1)*1.01
+    wait_us(baudRate * 2); // ~= 1/BAUDRATE/16*(155+1)*1.01
     sciInit();
     sciSetBaudrate(scilinREG, BAUDRATE);
 }
@@ -52,7 +37,7 @@
     scilinREG->PIO0 &= ~(1U << 2U); // disable transmit function - now a GPIO
     scilinREG->PIO3 &= ~(1U << 2U); // set output to low
 
-    delayus(250); // 250us to 300us, same as wake
+    wait_us(250); // 250us to 300us, same as wake
     sciInit();
     sciSetBaudrate(scilinREG, BAUDRATE);
 }
@@ -63,13 +48,13 @@
     scilinREG->PIO0 &= ~(1U << 2U); // disable transmit function - now a GPIO
     scilinREG->PIO3 &= ~(1U << 2U); // set output to low
 
-    delayus(500); // should cover any possible baud rate
+    wait_us(500); // should cover any possible baud rate
     sciInit();
 
     //BASE DEVICE NOW AT 250K BAUDRATE, STACK DEVICES ARE WHATEVER BAUDRATE THEY WERE BEFORE
 
     //wait a bit just to make sure the microcontroller is ready
-    delayus(100);
+    wait_us(100);
 
     //set microcontroller to 250k to talk to base
     sciSetBaudrate(scilinREG, 250000);
@@ -108,7 +93,7 @@
         sciSetBaudrate(scilinREG, 1000000);
     }
 
-    delayus(100);
+    wait_us(100);
 }
 //**********
 //END PINGS
@@ -171,7 +156,7 @@
 //************************
 //WRITE AND READ FUNCTIONS
 //************************
-int WriteReg(BYTE bID, uint16 wAddr, uint64 dwData, BYTE bLen, BYTE bWriteType) {
+int WriteReg(BYTE bID, uint16_t wAddr, uint64_t dwData, BYTE bLen, BYTE bWriteType) {
     // device address, register start address, data bytes, data length, write type (single, broadcast, stack)
     bRes = 0;
     memset(bBuf,0,sizeof(bBuf));
@@ -242,10 +227,10 @@
     return bRes;
 }
 
-int WriteFrame(BYTE bID, uint16 wAddr, BYTE * pData, BYTE bLen, BYTE bWriteType) {
+int WriteFrame(BYTE bID, uint16_t wAddr, BYTE * pData, BYTE bLen, BYTE bWriteType) {
     int bPktLen = 0;
-    uint8 * pBuf = pFrame;
-    uint16 wCRC;
+    uint8_t * pBuf = pFrame;
+    uint16_t wCRC;
     memset(pFrame, 0x7F, sizeof(pFrame));
     *pBuf++ = 0x80 | (bWriteType) | ((bWriteType & 0x10) ? bLen - 0x01 : 0x00); //Only include blen if it is a write; Writes are 0x90, 0xB0, 0xD0
     if (bWriteType == FRMWRT_SGL_R || bWriteType == FRMWRT_SGL_NR)
@@ -264,23 +249,20 @@
     *pBuf++ = wCRC & 0x00FF;
     *pBuf++ = (wCRC & 0xFF00) >> 8;
     bPktLen += 2;
-    //THIS SEEMS to occasionally drop bytes from the frame. Sometimes is not sending the last frame of the CRC.
-    //(Seems to be caused by stack overflow, so take precautions to reduce stack usage in function calls)
-    sciSend(scilinREG, bPktLen, pFrame);
 
     return bPktLen;
 }
 
-int ReadReg(BYTE bID, uint16 wAddr, BYTE * pData, BYTE bLen, uint32 dwTimeOut,
+/*int ReadReg(BYTE bID, uint16_t wAddr, BYTE * pData, BYTE bLen, uint32_t dwTimeOut,
         BYTE bWriteType) {
     bRes = 0;
-    count = 100000;
+    int count = 100000;
     if (bWriteType == FRMWRT_SGL_R) {
         ReadFrameReq(bID, wAddr, bLen, bWriteType);
         memset(pData, 0, sizeof(pData));
         sciEnableNotification(scilinREG, SCI_RX_INT);
         sciReceive(scilinREG, bLen + 6, pData);
-        while(UART_RX_RDY == 0U && count>0) count--; /*wait*/
+        while(UART_RX_RDY == 0U && count>0) count--; //wait
         //if(count == 0) printf("COUNT REACHED 0\n");
         UART_RX_RDY = 0;
         bRes = bLen + 6;
@@ -289,7 +271,7 @@
         memset(pData, 0, sizeof(pData));
         sciEnableNotification(scilinREG, SCI_RX_INT);
         sciReceive(scilinREG, (bLen + 6) * (TOTALBOARDS - 1), pData);
-        while(UART_RX_RDY == 0U && count>0) count--; /*wait*/
+        while(UART_RX_RDY == 0U && count>0) count--; //wait
         UART_RX_RDY = 0;
         bRes = (bLen + 6) * (TOTALBOARDS - 1);
     } else if (bWriteType == FRMWRT_ALL_R) {
@@ -297,16 +279,16 @@
         memset(pData, 0, sizeof(pData));
         sciEnableNotification(scilinREG, SCI_RX_INT);
         sciReceive(scilinREG, (bLen + 6) * TOTALBOARDS, pData);
-        while(UART_RX_RDY == 0U && count>0) count--; /*wait*/
+        while(UART_RX_RDY == 0U && count>0) count--; //wait
         UART_RX_RDY = 0;
         bRes = (bLen + 6) * TOTALBOARDS;
     } else {
         bRes = 0;
     }
     return bRes;
-}
+}*/
 
-int ReadFrameReq(BYTE bID, uint16 wAddr, BYTE bByteToReturn, BYTE bWriteType) {
+int ReadFrameReq(BYTE bID, uint16_t wAddr, BYTE bByteToReturn, BYTE bWriteType) {
     bReturn = bByteToReturn - 1;
 
     if (bReturn > 127)
@@ -317,7 +299,7 @@
 
 // CRC16 TABLE
 // ITU_T polynomial: x^16 + x^15 + x^2 + 1
-const uint16 crc16_table[256] = { 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301,
+const uint16_t crc16_table[256] = { 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301,
         0x03C0, 0x0280, 0xC241, 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1,
         0xC481, 0x0440, 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81,
         0x0E40, 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
@@ -347,8 +329,8 @@
         0x8C41, 0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641,
         0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040 };
 
-uint16 CRC16(BYTE *pBuf, int nLen) {
-    uint16 wCRC = 0xFFFF;
+uint16_t CRC16(BYTE *pBuf, int nLen) {
+    uint16_t wCRC = 0xFFFF;
     int i;
 
     for (i = 0; i < nLen; i++) {
@@ -365,7 +347,7 @@
 //************************
 //MISCELLANEOUS FUNCTIONS
 //************************
-void delayus(uint16 us) {
+/*void wait_us(uint16_t us) {
     if (us == 0)
        return;
     else
@@ -399,9 +381,9 @@
         //RESET COUNTER FOR THE NEXT TIME WE DO A DELAY
         rtiResetCounter(rtiCOUNTER_BLOCK0);
     }
-}
+}*/
 
-void delayms(uint16 ms) {
+/*void delayms(uint16_t ms) {
     if (ms == 0)
        return;
     else
@@ -416,8 +398,8 @@
         rtiStopCounter(rtiCOUNTER_BLOCK0);
         rtiResetCounter(rtiCOUNTER_BLOCK0);
     }
-}
-
+}*/
+/*
 float Complement(uint16 rawData, float multiplier)
 {
     return -1*(~rawData+1)*multiplier;
@@ -428,12 +410,101 @@
     if (!gioGetBit(gioPORTA, 1))
         return 0;
     return 1;
+}*/
+
+void sciInit(void)
+{
+/* USER CODE BEGIN (2) */
+/* USER CODE END */
+
+    /** @b initialize @b SCILIN */
+
+    /** - bring SCI out of reset */
+    scilinREG->GCR0 = 0U;
+    scilinREG->GCR0 = 1U;
+
+    /** - Disable all interrupts */
+    scilinREG->CLEARINT    = 0xFFFFFFFFU;
+    scilinREG->CLEARINTLVL = 0xFFFFFFFFU;
+
+    /** - global control 1 */
+    scilinREG->GCR1 = (uint32_t)((uint32_t)1U << 25U)  /* enable transmit */
+                    | (uint32_t)((uint32_t)1U << 24U)  /* enable receive */
+                    | (uint32_t)((uint32_t)1U << 5U)   /* internal clock (device has no clock pin) */
+                    | (uint32_t)((uint32_t)(2U-1U) << 4U)  /* number of stop bits */
+                    | (uint32_t)((uint32_t)0U << 3U)  /* even parity, otherwise odd */
+                    | (uint32_t)((uint32_t)0U << 2U)  /* enable parity */
+                    | (uint32_t)((uint32_t)1U << 1U);  /* asynchronous timing mode */
+                    
+    /** - set baudrate */
+    scilinREG->BRS = 4U;  /* baudrate */
+
+    /** - transmission length */
+    scilinREG->FORMAT = 8U - 1U;  /* length */
+
+    /** - set SCI pins functional mode */
+    scilinREG->PIO0 = (uint32_t)((uint32_t)1U << 2U)  /* tx pin */
+                    | (uint32_t)((uint32_t)1U << 1U); /* rx pin */
+
+
+    /** - set SCI pins default output value */
+    scilinREG->PIO3 = (uint32_t)((uint32_t)1U << 2U)  /* tx pin */
+                    | (uint32_t)((uint32_t)1U << 1U); /* rx pin */
+
+
+    /** - set SCI pins output direction */
+    scilinREG->PIO1 = (uint32_t)((uint32_t)1U << 2U)  /* tx pin */
+                    | (uint32_t)((uint32_t)0U << 1U); /* rx pin */
+
+
+    /** - set SCI pins open drain enable */
+    scilinREG->PIO6 = (uint32_t)((uint32_t)0U << 2U)  /* tx pin */
+                    | (uint32_t)((uint32_t)0U << 1U); /* rx pin */
+
+
+    /** - set SCI pins pullup/pulldown enable */
+    scilinREG->PIO7 = (uint32_t)((uint32_t)0U << 2U)  /* tx pin */
+                    | (uint32_t)((uint32_t)0U << 1U); /* rx pin */
+
+
+    /** - set SCI pins pullup/pulldown select */
+    scilinREG->PIO8 = (uint32_t)((uint32_t)1U << 2U)  /* tx pin */
+                    | (uint32_t)((uint32_t)1U << 1U); /* rx pin */
+
+
+    /** - set interrupt level */
+    scilinREG->SETINTLVL = (uint32_t)((uint32_t)0U << 26U)  /* Framing error */
+                         | (uint32_t)((uint32_t)0U << 25U)  /* Overrun error */
+                         | (uint32_t)((uint32_t)0U << 24U)  /* Parity error */
+                         | (uint32_t)((uint32_t)1U << 9U)  /* Receive */
+                         | (uint32_t)((uint32_t)1U << 8U)  /* Transmit */
+                         | (uint32_t)((uint32_t)0U << 1U)  /* Wakeup */
+                         | (uint32_t)((uint32_t)0U << 0U);  /* Break detect */
+
+    /** - set interrupt enable */
+    scilinREG->SETINT = (uint32_t)((uint32_t)0U << 26U)  /* Framing error */
+                      | (uint32_t)((uint32_t)0U << 25U)  /* Overrun error */
+                      | (uint32_t)((uint32_t)0U << 24U)  /* Parity error */
+                      | (uint32_t)((uint32_t)1U << 9U)  /* Receive */
+                      | (uint32_t)((uint32_t)0U << 1U)  /* Wakeup */
+                      | (uint32_t)((uint32_t)0U);  /* Break detect */
+
+    /** - initialize global transfer variables */
+    g_sciTransfer_t.mode      = (uint32_t)0U << 8U;
+    g_sciTransfer_t.tx_length = 0U;
+    g_sciTransfer_t.rx_length = 0U;
+
+    /** - Finaly start SCILIN */
+    scilinREG->GCR1 |= 0x80U;
+
+/* USER CODE BEGIN (3) */
+/* USER CODE END */
 }
 
 void InitDevices() {
     /*******Optional examples of some initialization functions*****/
 
-    delayms(1);
+    wait_ms(1);
     WriteReg(0, COMM_TO, 0x00, 1, FRMWRT_ALL_NR); //Communication timeout disabled
     WriteReg(0, TX_HOLD_OFF, 0x00, 1, FRMWRT_ALL_NR); //no transmit delay after stop bit
 
@@ -481,34 +552,34 @@
     //enable continuous sampling. Otherwise, single conversions with CONTROL2[CELL_ADC_GO]
     //WriteReg(0,CELL_ADC_CONF2, 0x0A,1,FRMWRT_ALL_NR);//continuous sampling with 5ms interval
     WriteReg(0, CONTROL2, 0x10, 1, FRMWRT_ALL_NR);// enable TSREF to give enough settling time
-    delayms(2); // provides settling time for TSREF
+    wait_ms(2); // provides settling time for TSREF
 
     for (nCurrentBoard = 0; nCurrentBoard < TOTALBOARDS; nCurrentBoard++) {
         //read PARTID
         ReadReg(nCurrentBoard, PARTID, bFrame, 1, 0, FRMWRT_SGL_R);
-        delayus(500);
+        wait_us(500);
     }
     for (nCurrentBoard = 0; nCurrentBoard < TOTALBOARDS; nCurrentBoard++) {
         //read DEV_STAT
         ReadReg(nCurrentBoard, DEV_STAT, bFrame, 1, 0, FRMWRT_SGL_R);
-        delayus(500);
+        wait_us(500);
     }
     for (nCurrentBoard = 0; nCurrentBoard < TOTALBOARDS; nCurrentBoard++) {
         //read LOOP_STAT
         ReadReg(nCurrentBoard, LOOP_STAT, bFrame, 1, 0, FRMWRT_SGL_R);
-        delayus(500);
+        wait_us(500);
     }
-    delayus(100);
+    wait_us(100);
     for (nCurrentBoard = 0; nCurrentBoard < TOTALBOARDS; nCurrentBoard++) {
         //read FAULT_SUM
         ReadReg(nCurrentBoard, FAULT_SUM, bFrame, 1, 0, FRMWRT_SGL_R);
-        delayus(500);
+        wait_us(500);
     }
-    delayus(100);
+    wait_us(100);
     for (nCurrentBoard = 0; nCurrentBoard < TOTALBOARDS; nCurrentBoard++) {
         //read cust_crc_rslt high and low byte
         ReadReg(nCurrentBoard, CUST_CRC_RSLTH, bFrame, 2, 0, FRMWRT_SGL_R); //read Customer CRC result and update
-        delayms(1);
+        wait_ms(1);
         WriteReg(nCurrentBoard, CUST_CRCH, bFrame[5], 1, FRMWRT_SGL_NR); //update high byte
         WriteReg(nCurrentBoard, CUST_CRCL, bFrame[6], 1, FRMWRT_SGL_NR); //update low byte
     }
@@ -517,13 +588,13 @@
     WriteReg(0, AUX_ADC_CTRL1, 0x01, 1, FRMWRT_ALL_NR); //convert BAT with AUX ADC
     WriteReg(0, AUX_ADC_CTRL2, 0x00, 1, FRMWRT_ALL_NR); //No AUX ADC measurements from this  register
     WriteReg(0, AUX_ADC_CTRL3, 0x00, 1, FRMWRT_ALL_NR); //No AUX ADC measurements from this register
-    delayus(100);
+    wait_us(100);
     for (nCurrentBoard = 0; nCurrentBoard < TOTALBOARDS; nCurrentBoard++) {
         //read CB_SW_STAT
         ReadReg(nCurrentBoard, CB_SW_STAT, bFrame, 1, 0, FRMWRT_SGL_R);
-        delayus(500);
+        wait_us(500);
     }
-    delayus(100);
+    wait_us(100);
     WriteReg(0, DIAG_CTRL2, 0x41, 1, FRMWRT_ALL_NR); //set AUX ADC to measure  cell 1
 
     //configure cell  balancing
@@ -536,7 +607,7 @@
     WriteReg(0, CB_CELL5_CTRL, 0x03, 1, FRMWRT_ALL_NR); // 3 minute balance timer to all but base device
     WriteReg(0, CB_CELL6_CTRL, 0x03, 1, FRMWRT_ALL_NR); // 3 minute balance timer to all but base device
 
-    delayms(2);
+    wait_ms(2);
 //end init sequence
 }
 //***************************