Garbage Collectors / Mbed 2 deprecated C027_PowerControl

minimizing power on C027

Dependencies:   C027_Support mbed

Fork of PowerControl by Michael Wei

PowerControl/PowerControl.h@1:21401fc44382, 2015-05-27 (annotated)

Committer:
coyotebush
Date:
Wed May 27 05:59:21 2015 +0000
Revision:
1:21401fc44382
Parent:
0:9bd5f1bdb845 
Test C027 features

Who changed what in which revision?

UserRevisionLine numberNew contents of line
no2chem 0:9bd5f1bdb845 1 /* mbed PowerControl Library
no2chem 0:9bd5f1bdb845 2 * Copyright (c) 2010 Michael Wei
no2chem 0:9bd5f1bdb845 3 */
no2chem 0:9bd5f1bdb845 4
no2chem 0:9bd5f1bdb845 5 #ifndef MBED_POWERCONTROL_H
no2chem 0:9bd5f1bdb845 6 #define MBED_POWERCONTROL_H
no2chem 0:9bd5f1bdb845 7
no2chem 0:9bd5f1bdb845 8 //shouldn't have to include, but fixes weird problems with defines
coyotebush 1:21401fc44382 9 //#include "LPC1768/LPC17xx.h"
coyotebush 1:21401fc44382 10 #include "C027_api.h"
no2chem 0:9bd5f1bdb845 11
no2chem 0:9bd5f1bdb845 12 //System Control Register
no2chem 0:9bd5f1bdb845 13 // bit 0: Reserved
no2chem 0:9bd5f1bdb845 14 // bit 1: Sleep on Exit
no2chem 0:9bd5f1bdb845 15 #define LPC1768_SCR_SLEEPONEXIT 0x2
no2chem 0:9bd5f1bdb845 16 // bit 2: Deep Sleep
no2chem 0:9bd5f1bdb845 17 #define LPC1768_SCR_SLEEPDEEP 0x4
no2chem 0:9bd5f1bdb845 18 // bit 3: Resereved
no2chem 0:9bd5f1bdb845 19 // bit 4: Send on Pending
no2chem 0:9bd5f1bdb845 20 #define LPC1768_SCR_SEVONPEND 0x10
no2chem 0:9bd5f1bdb845 21 // bit 5-31: Reserved
no2chem 0:9bd5f1bdb845 22
no2chem 0:9bd5f1bdb845 23 //Power Control Register
no2chem 0:9bd5f1bdb845 24 // bit 0: Power mode control bit 0 (power-down mode)
no2chem 0:9bd5f1bdb845 25 #define LPC1768_PCON_PM0 0x1
no2chem 0:9bd5f1bdb845 26 // bit 1: Power mode control bit 1 (deep power-down mode)
no2chem 0:9bd5f1bdb845 27 #define LPC1768_PCON_PM1 0x2
no2chem 0:9bd5f1bdb845 28 // bit 2: Brown-out reduced power mode
no2chem 0:9bd5f1bdb845 29 #define LPC1768_PCON_BODRPM 0x4
no2chem 0:9bd5f1bdb845 30 // bit 3: Brown-out global disable
no2chem 0:9bd5f1bdb845 31 #define LPC1768_PCON_BOGD 0x8
no2chem 0:9bd5f1bdb845 32 // bit 4: Brown-out reset disable
no2chem 0:9bd5f1bdb845 33 #define LPC1768_PCON_BORD 0x10
no2chem 0:9bd5f1bdb845 34 // bit 5-7 : Reserved
no2chem 0:9bd5f1bdb845 35 // bit 8: Sleep Mode Entry Flag
no2chem 0:9bd5f1bdb845 36 #define LPC1768_PCON_SMFLAG 0x100
no2chem 0:9bd5f1bdb845 37 // bit 9: Deep Sleep Entry Flag
no2chem 0:9bd5f1bdb845 38 #define LPC1768_PCON_DSFLAG 0x200
no2chem 0:9bd5f1bdb845 39 // bit 10: Power Down Entry Flag
no2chem 0:9bd5f1bdb845 40 #define LPC1768_PCON_PDFLAG 0x400
no2chem 0:9bd5f1bdb845 41 // bit 11: Deep Power Down Entry Flag
no2chem 0:9bd5f1bdb845 42 #define LPC1768_PCON_DPDFLAG 0x800
no2chem 0:9bd5f1bdb845 43 // bit 12-31: Reserved
no2chem 0:9bd5f1bdb845 44
no2chem 0:9bd5f1bdb845 45 //"Sleep Mode" (WFI).
no2chem 0:9bd5f1bdb845 46 inline void Sleep(void)
no2chem 0:9bd5f1bdb845 47 {
no2chem 0:9bd5f1bdb845 48 __WFI();
no2chem 0:9bd5f1bdb845 49 }
no2chem 0:9bd5f1bdb845 50
no2chem 0:9bd5f1bdb845 51 //"Deep Sleep" Mode
no2chem 0:9bd5f1bdb845 52 inline void DeepSleep(void)
no2chem 0:9bd5f1bdb845 53 {
no2chem 0:9bd5f1bdb845 54 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
no2chem 0:9bd5f1bdb845 55 __WFI();
no2chem 0:9bd5f1bdb845 56 }
no2chem 0:9bd5f1bdb845 57
no2chem 0:9bd5f1bdb845 58 //"Power-Down" Mode
no2chem 0:9bd5f1bdb845 59 inline void PowerDown(void)
no2chem 0:9bd5f1bdb845 60 {
no2chem 0:9bd5f1bdb845 61 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
no2chem 0:9bd5f1bdb845 62 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
no2chem 0:9bd5f1bdb845 63 LPC_SC->PCON |= LPC1768_PCON_PM0;
no2chem 0:9bd5f1bdb845 64 __WFI();
no2chem 0:9bd5f1bdb845 65 //reset back to normal
no2chem 0:9bd5f1bdb845 66 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
no2chem 0:9bd5f1bdb845 67 }
no2chem 0:9bd5f1bdb845 68
no2chem 0:9bd5f1bdb845 69 //"Deep Power-Down" Mode
no2chem 0:9bd5f1bdb845 70 inline void DeepPowerDown(void)
no2chem 0:9bd5f1bdb845 71 {
no2chem 0:9bd5f1bdb845 72 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
no2chem 0:9bd5f1bdb845 73 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
no2chem 0:9bd5f1bdb845 74 __WFI();
no2chem 0:9bd5f1bdb845 75 //reset back to normal
no2chem 0:9bd5f1bdb845 76 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
no2chem 0:9bd5f1bdb845 77 }
no2chem 0:9bd5f1bdb845 78
no2chem 0:9bd5f1bdb845 79 //shut down BOD during power-down/deep sleep
no2chem 0:9bd5f1bdb845 80 inline void BrownOut_ReducedPowerMode_Enable(void)
no2chem 0:9bd5f1bdb845 81 {
no2chem 0:9bd5f1bdb845 82 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
no2chem 0:9bd5f1bdb845 83 }
no2chem 0:9bd5f1bdb845 84
no2chem 0:9bd5f1bdb845 85 //turn on BOD during power-down/deep sleep
no2chem 0:9bd5f1bdb845 86 inline void BrownOut_ReducedPowerMode_Disable(void)
no2chem 0:9bd5f1bdb845 87 {
no2chem 0:9bd5f1bdb845 88 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
no2chem 0:9bd5f1bdb845 89 }
no2chem 0:9bd5f1bdb845 90
no2chem 0:9bd5f1bdb845 91 //turn off brown out circutry
no2chem 0:9bd5f1bdb845 92 inline void BrownOut_Global_Disable(void)
no2chem 0:9bd5f1bdb845 93 {
no2chem 0:9bd5f1bdb845 94 LPC_SC->PCON |= LPC1768_PCON_BOGD;
no2chem 0:9bd5f1bdb845 95 }
no2chem 0:9bd5f1bdb845 96
no2chem 0:9bd5f1bdb845 97 //turn on brown out circutry
no2chem 0:9bd5f1bdb845 98 inline void BrownOut_Global_Enable(void)
no2chem 0:9bd5f1bdb845 99 {
no2chem 0:9bd5f1bdb845 100 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
no2chem 0:9bd5f1bdb845 101 }
no2chem 0:9bd5f1bdb845 102
no2chem 0:9bd5f1bdb845 103 //turn off brown out reset circutry
no2chem 0:9bd5f1bdb845 104 inline void BrownOut_Reset_Disable(void)
no2chem 0:9bd5f1bdb845 105 {
no2chem 0:9bd5f1bdb845 106 LPC_SC->PCON |= LPC1768_PCON_BORD;
no2chem 0:9bd5f1bdb845 107 }
no2chem 0:9bd5f1bdb845 108
no2chem 0:9bd5f1bdb845 109 //turn on brown outreset circutry
no2chem 0:9bd5f1bdb845 110 inline void BrownOut_Reset_Enable(void)
no2chem 0:9bd5f1bdb845 111 {
no2chem 0:9bd5f1bdb845 112 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
no2chem 0:9bd5f1bdb845 113 }
no2chem 0:9bd5f1bdb845 114 //Peripheral Control Register
no2chem 0:9bd5f1bdb845 115 // bit 0: Reserved
no2chem 0:9bd5f1bdb845 116 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
no2chem 0:9bd5f1bdb845 117 #define LPC1768_PCONP_PCTIM0 0x2
no2chem 0:9bd5f1bdb845 118 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
no2chem 0:9bd5f1bdb845 119 #define LPC1768_PCONP_PCTIM1 0x4
no2chem 0:9bd5f1bdb845 120 // bit 3: PCUART0: UART 0 power/clock enable
no2chem 0:9bd5f1bdb845 121 #define LPC1768_PCONP_PCUART0 0x8
no2chem 0:9bd5f1bdb845 122 // bit 4: PCUART1: UART 1 power/clock enable
no2chem 0:9bd5f1bdb845 123 #define LPC1768_PCONP_PCUART1 0x10
no2chem 0:9bd5f1bdb845 124 // bit 5: Reserved
no2chem 0:9bd5f1bdb845 125 // bit 6: PCPWM1: PWM 1 power/clock enable
no2chem 0:9bd5f1bdb845 126 #define LPC1768_PCONP_PCPWM1 0x40
no2chem 0:9bd5f1bdb845 127 // bit 7: PCI2C0: I2C interface 0 power/clock enable
no2chem 0:9bd5f1bdb845 128 #define LPC1768_PCONP_PCI2C0 0x80
no2chem 0:9bd5f1bdb845 129 // bit 8: PCSPI: SPI interface power/clock enable
no2chem 0:9bd5f1bdb845 130 #define LPC1768_PCONP_PCSPI 0x100
no2chem 0:9bd5f1bdb845 131 // bit 9: PCRTC: RTC power/clock enable
no2chem 0:9bd5f1bdb845 132 #define LPC1768_PCONP_PCRTC 0x200
no2chem 0:9bd5f1bdb845 133 // bit 10: PCSSP1: SSP interface 1 power/clock enable
no2chem 0:9bd5f1bdb845 134 #define LPC1768_PCONP_PCSSP1 0x400
no2chem 0:9bd5f1bdb845 135 // bit 11: Reserved
no2chem 0:9bd5f1bdb845 136 // bit 12: PCADC: A/D converter power/clock enable
no2chem 0:9bd5f1bdb845 137 #define LPC1768_PCONP_PCADC 0x1000
no2chem 0:9bd5f1bdb845 138 // bit 13: PCCAN1: CAN controller 1 power/clock enable
no2chem 0:9bd5f1bdb845 139 #define LPC1768_PCONP_PCCAN1 0x2000
no2chem 0:9bd5f1bdb845 140 // bit 14: PCCAN2: CAN controller 2 power/clock enable
no2chem 0:9bd5f1bdb845 141 #define LPC1768_PCONP_PCCAN2 0x4000
no2chem 0:9bd5f1bdb845 142 // bit 15: PCGPIO: GPIOs power/clock enable
no2chem 0:9bd5f1bdb845 143 #define LPC1768_PCONP_PCGPIO 0x8000
no2chem 0:9bd5f1bdb845 144 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
no2chem 0:9bd5f1bdb845 145 #define LPC1768_PCONP_PCRIT 0x10000
no2chem 0:9bd5f1bdb845 146 // bit 17: PCMCPWM: Motor control PWM power/clock enable
no2chem 0:9bd5f1bdb845 147 #define LPC1768_PCONP_PCMCPWM 0x20000
no2chem 0:9bd5f1bdb845 148 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
no2chem 0:9bd5f1bdb845 149 #define LPC1768_PCONP_PCQEI 0x40000
no2chem 0:9bd5f1bdb845 150 // bit 19: PCI2C1: I2C interface 1 power/clock enable
no2chem 0:9bd5f1bdb845 151 #define LPC1768_PCONP_PCI2C1 0x80000
no2chem 0:9bd5f1bdb845 152 // bit 20: Reserved
no2chem 0:9bd5f1bdb845 153 // bit 21: PCSSP0: SSP interface 0 power/clock enable
no2chem 0:9bd5f1bdb845 154 #define LPC1768_PCONP_PCSSP0 0x200000
no2chem 0:9bd5f1bdb845 155 // bit 22: PCTIM2: Timer 2 power/clock enable
no2chem 0:9bd5f1bdb845 156 #define LPC1768_PCONP_PCTIM2 0x400000
no2chem 0:9bd5f1bdb845 157 // bit 23: PCTIM3: Timer 3 power/clock enable
no2chem 0:9bd5f1bdb845 158 #define LPC1768_PCONP_PCQTIM3 0x800000
no2chem 0:9bd5f1bdb845 159 // bit 24: PCUART2: UART 2 power/clock enable
no2chem 0:9bd5f1bdb845 160 #define LPC1768_PCONP_PCUART2 0x1000000
no2chem 0:9bd5f1bdb845 161 // bit 25: PCUART3: UART 3 power/clock enable
no2chem 0:9bd5f1bdb845 162 #define LPC1768_PCONP_PCUART3 0x2000000
no2chem 0:9bd5f1bdb845 163 // bit 26: PCI2C2: I2C interface 2 power/clock enable
no2chem 0:9bd5f1bdb845 164 #define LPC1768_PCONP_PCI2C2 0x4000000
no2chem 0:9bd5f1bdb845 165 // bit 27: PCI2S: I2S interface power/clock enable
no2chem 0:9bd5f1bdb845 166 #define LPC1768_PCONP_PCI2S 0x8000000
no2chem 0:9bd5f1bdb845 167 // bit 28: Reserved
no2chem 0:9bd5f1bdb845 168 // bit 29: PCGPDMA: GP DMA function power/clock enable
no2chem 0:9bd5f1bdb845 169 #define LPC1768_PCONP_PCGPDMA 0x20000000
no2chem 0:9bd5f1bdb845 170 // bit 30: PCENET: Ethernet block power/clock enable
no2chem 0:9bd5f1bdb845 171 #define LPC1768_PCONP_PCENET 0x40000000
no2chem 0:9bd5f1bdb845 172 // bit 31: PCUSB: USB interface power/clock enable
no2chem 0:9bd5f1bdb845 173 #define LPC1768_PCONP_PCUSB 0x80000000
no2chem 0:9bd5f1bdb845 174
no2chem 0:9bd5f1bdb845 175 //Powers Up specified Peripheral(s)
no2chem 0:9bd5f1bdb845 176 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
no2chem 0:9bd5f1bdb845 177 {
no2chem 0:9bd5f1bdb845 178 return LPC_SC->PCONP |= bitMask;
no2chem 0:9bd5f1bdb845 179 }
no2chem 0:9bd5f1bdb845 180
no2chem 0:9bd5f1bdb845 181 //Powers Down specified Peripheral(s)
no2chem 0:9bd5f1bdb845 182 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
no2chem 0:9bd5f1bdb845 183 {
no2chem 0:9bd5f1bdb845 184 return LPC_SC->PCONP &= ~bitMask;
no2chem 0:9bd5f1bdb845 185 }
no2chem 0:9bd5f1bdb845 186
no2chem 0:9bd5f1bdb845 187 //returns if the peripheral is on or off
no2chem 0:9bd5f1bdb845 188 inline bool Peripheral_GetStatus(unsigned int peripheral)
no2chem 0:9bd5f1bdb845 189 {
no2chem 0:9bd5f1bdb845 190 return (LPC_SC->PCONP & peripheral) ? true : false;
no2chem 0:9bd5f1bdb845 191 }
no2chem 0:9bd5f1bdb845 192
no2chem 0:9bd5f1bdb845 193 #endif