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I2C_MemMap Struct Reference
[I2C]
I2C - Peripheral register structure. More...
#include <MKL25Z4.h>
Data Fields | |
| uint8_t | A1 |
| I2C Address Register 1, offset: 0x0. | |
| uint8_t | F |
| I2C Frequency Divider register, offset: 0x1. | |
| uint8_t | C1 |
| I2C Control Register 1, offset: 0x2. | |
| uint8_t | S |
| I2C Status register, offset: 0x3. | |
| uint8_t | D |
| I2C Data I/O register, offset: 0x4. | |
| uint8_t | C2 |
| I2C Control Register 2, offset: 0x5. | |
| uint8_t | FLT |
| I2C Programmable Input Glitch Filter register, offset: 0x6. | |
| uint8_t | RA |
| I2C Range Address register, offset: 0x7. | |
| uint8_t | SMB |
| I2C SMBus Control and Status register, offset: 0x8. | |
| uint8_t | A2 |
| I2C Address Register 2, offset: 0x9. | |
| uint8_t | SLTH |
| I2C SCL Low Timeout Register High, offset: 0xA. | |
| uint8_t | SLTL |
| I2C SCL Low Timeout Register Low, offset: 0xB. | |
Detailed Description
I2C - Peripheral register structure.
Definition at line 1898 of file MKL25Z4.h.
Field Documentation
| uint8_t FLT |
| uint8_t SLTH |
| uint8_t SLTL |
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