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RM25C512C-L_driver
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rm25c512cl.cpp@6:0434e89c2d68, 2018-09-13 (annotated)
- Committer:
- ianaherne
- Date:
- Thu Sep 13 12:17:25 2018 +0000
- Revision:
- 6:0434e89c2d68
- Parent:
- 4:17e602b21ac5
- Child:
- 7:c562fe4d48de
added write enable success checking and write bytes time out working
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| ianaherne | 0:890f322344f2 | 1 | #include "rm25c512cl.h" |
| ianaherne | 0:890f322344f2 | 2 | |
| ianaherne | 0:890f322344f2 | 3 | |
| ianaherne | 0:890f322344f2 | 4 | rm25c512cl::rm25c512cl(PinName MOSI,PinName MISO,PinName SCLK,PinName CS): _spi(MOSI,MISO,SCLK),_cs(CS){ |
| ianaherne | 1:67d99e4ce310 | 5 | |
| ianaherne | 4:17e602b21ac5 | 6 | _cs = HIGH; // always set chip select to initial state of high |
| ianaherne | 0:890f322344f2 | 7 | |
| ianaherne | 0:890f322344f2 | 8 | } |
| ianaherne | 0:890f322344f2 | 9 | |
| ianaherne | 1:67d99e4ce310 | 10 | /** |
| ianaherne | 1:67d99e4ce310 | 11 | * @brief write_enable() |
| ianaherne | 1:67d99e4ce310 | 12 | * @details Sets write enable latch to 1 to enable writing to eeprom uses the WREN opcode |
| ianaherne | 1:67d99e4ce310 | 13 | * @param NA |
| ianaherne | 6:0434e89c2d68 | 14 | * @return Success or failure of command |
| ianaherne | 1:67d99e4ce310 | 15 | * @warning Write or erase instructions will be ignored if this instruction is not issued first |
| ianaherne | 1:67d99e4ce310 | 16 | * |
| ianaherne | 1:67d99e4ce310 | 17 | */ |
| ianaherne | 1:67d99e4ce310 | 18 | |
| ianaherne | 6:0434e89c2d68 | 19 | bool rm25c512cl :: write_enable(){ |
| ianaherne | 0:890f322344f2 | 20 | |
| ianaherne | 1:67d99e4ce310 | 21 | char cmd[1]; |
| ianaherne | 1:67d99e4ce310 | 22 | char data_buffer[1];// not used here but required for spi.write() as a parameter |
| ianaherne | 6:0434e89c2d68 | 23 | char status; |
| ianaherne | 1:67d99e4ce310 | 24 | |
| ianaherne | 1:67d99e4ce310 | 25 | cmd[0] = WREN; |
| ianaherne | 1:67d99e4ce310 | 26 | |
| ianaherne | 1:67d99e4ce310 | 27 | _spi.lock(); |
| ianaherne | 1:67d99e4ce310 | 28 | |
| ianaherne | 4:17e602b21ac5 | 29 | _cs = LOW; |
| ianaherne | 1:67d99e4ce310 | 30 | |
| ianaherne | 1:67d99e4ce310 | 31 | _spi.write(&cmd[0],1,&data_buffer[0],0); |
| ianaherne | 1:67d99e4ce310 | 32 | |
| ianaherne | 4:17e602b21ac5 | 33 | _cs = HIGH; |
| ianaherne | 1:67d99e4ce310 | 34 | |
| ianaherne | 1:67d99e4ce310 | 35 | _spi.unlock(); |
| ianaherne | 1:67d99e4ce310 | 36 | |
| ianaherne | 6:0434e89c2d68 | 37 | status = read_status_reg(); |
| ianaherne | 6:0434e89c2d68 | 38 | status = status & 0x2; |
| ianaherne | 6:0434e89c2d68 | 39 | |
| ianaherne | 6:0434e89c2d68 | 40 | /* make sure write enable is completed, if not somthing is wrong with device*/ |
| ianaherne | 1:67d99e4ce310 | 41 | |
| ianaherne | 6:0434e89c2d68 | 42 | if(status == 2){ // device is enabled WEL bit = 1 |
| ianaherne | 6:0434e89c2d68 | 43 | |
| ianaherne | 6:0434e89c2d68 | 44 | return SUCCESS; |
| ianaherne | 6:0434e89c2d68 | 45 | |
| ianaherne | 6:0434e89c2d68 | 46 | } |
| ianaherne | 6:0434e89c2d68 | 47 | else{// WEL bit is 0 device is dissabled |
| ianaherne | 6:0434e89c2d68 | 48 | |
| ianaherne | 6:0434e89c2d68 | 49 | return FAILURE; |
| ianaherne | 6:0434e89c2d68 | 50 | |
| ianaherne | 6:0434e89c2d68 | 51 | } |
| ianaherne | 0:890f322344f2 | 52 | |
| ianaherne | 0:890f322344f2 | 53 | } |
| ianaherne | 0:890f322344f2 | 54 | |
| ianaherne | 1:67d99e4ce310 | 55 | /** |
| ianaherne | 1:67d99e4ce310 | 56 | * @brief read_status_reg() |
| ianaherne | 1:67d99e4ce310 | 57 | * @details Reads the status register of EEprom using the RDSR opcode, the register |
| ianaherne | 1:67d99e4ce310 | 58 | * read can be used to determine if a write has completed, or the write protection status |
| ianaherne | 1:67d99e4ce310 | 59 | * @param NA |
| ianaherne | 1:67d99e4ce310 | 60 | * @return Current eight bit value of register |
| ianaherne | 1:67d99e4ce310 | 61 | * @warning |
| ianaherne | 1:67d99e4ce310 | 62 | * |
| ianaherne | 1:67d99e4ce310 | 63 | */ |
| ianaherne | 1:67d99e4ce310 | 64 | |
| ianaherne | 1:67d99e4ce310 | 65 | char rm25c512cl :: read_status_reg(){ |
| ianaherne | 1:67d99e4ce310 | 66 | |
| ianaherne | 1:67d99e4ce310 | 67 | char cmd[1]; |
| ianaherne | 1:67d99e4ce310 | 68 | char data_buffer[1]; // to store value returned from EEprom status register |
| ianaherne | 1:67d99e4ce310 | 69 | |
| ianaherne | 1:67d99e4ce310 | 70 | |
| ianaherne | 1:67d99e4ce310 | 71 | cmd[0] = RDSR; |
| ianaherne | 1:67d99e4ce310 | 72 | |
| ianaherne | 1:67d99e4ce310 | 73 | _spi.lock(); |
| ianaherne | 1:67d99e4ce310 | 74 | |
| ianaherne | 4:17e602b21ac5 | 75 | _cs = LOW; |
| ianaherne | 1:67d99e4ce310 | 76 | |
| ianaherne | 1:67d99e4ce310 | 77 | _spi.write(&cmd[0],1,&data_buffer[0],0); |
| ianaherne | 1:67d99e4ce310 | 78 | |
| ianaherne | 1:67d99e4ce310 | 79 | cmd[0] = 0xFF; // write garbage to read something back |
| ianaherne | 1:67d99e4ce310 | 80 | |
| ianaherne | 1:67d99e4ce310 | 81 | _spi.write(&cmd[0],1,&data_buffer[0],1); |
| ianaherne | 1:67d99e4ce310 | 82 | |
| ianaherne | 4:17e602b21ac5 | 83 | _cs = HIGH; |
| ianaherne | 1:67d99e4ce310 | 84 | |
| ianaherne | 1:67d99e4ce310 | 85 | _spi.unlock(); |
| ianaherne | 1:67d99e4ce310 | 86 | |
| ianaherne | 1:67d99e4ce310 | 87 | wait_us(20); |
| ianaherne | 1:67d99e4ce310 | 88 | |
| ianaherne | 1:67d99e4ce310 | 89 | return data_buffer[0]; |
| ianaherne | 1:67d99e4ce310 | 90 | |
| ianaherne | 1:67d99e4ce310 | 91 | |
| ianaherne | 1:67d99e4ce310 | 92 | } |
| ianaherne | 1:67d99e4ce310 | 93 | |
| ianaherne | 1:67d99e4ce310 | 94 | /** |
| ianaherne | 1:67d99e4ce310 | 95 | * @brief write_bytes() |
| ianaherne | 1:67d99e4ce310 | 96 | * @details Writes multiple bytes to the specified address given. |
| ianaherne | 1:67d99e4ce310 | 97 | * @param Starting address to write to. |
| ianaherne | 1:67d99e4ce310 | 98 | * @param Pointer to the data array containg bytes to be stored. |
| ianaherne | 2:183d1d96f917 | 99 | * @param Size of the data array in bytes. |
| ianaherne | 6:0434e89c2d68 | 100 | * @return Sucess or failure of write |
| ianaherne | 1:67d99e4ce310 | 101 | * @warning A page write(128 bytes) can take up to 5 ms to complete |
| ianaherne | 1:67d99e4ce310 | 102 | * |
| ianaherne | 1:67d99e4ce310 | 103 | */ |
| ianaherne | 1:67d99e4ce310 | 104 | |
| ianaherne | 6:0434e89c2d68 | 105 | bool rm25c512cl :: write_bytes(uint16_t address, char* data, uint16_t data_size){ |
| ianaherne | 1:67d99e4ce310 | 106 | |
| ianaherne | 1:67d99e4ce310 | 107 | char cmd[3]; |
| ianaherne | 1:67d99e4ce310 | 108 | char data_buffer[1];// not used here but required for spi.write() as a parameter |
| ianaherne | 6:0434e89c2d68 | 109 | char status; |
| ianaherne | 6:0434e89c2d68 | 110 | uint32_t i = TIMEOUT_BYTES; |
| ianaherne | 6:0434e89c2d68 | 111 | |
| ianaherne | 0:890f322344f2 | 112 | |
| ianaherne | 1:67d99e4ce310 | 113 | cmd[0] = WR; |
| ianaherne | 1:67d99e4ce310 | 114 | cmd[1] = address >> 8; |
| ianaherne | 1:67d99e4ce310 | 115 | cmd[2] = address & 0x00FF; |
| ianaherne | 1:67d99e4ce310 | 116 | |
| ianaherne | 1:67d99e4ce310 | 117 | _spi.lock(); |
| ianaherne | 1:67d99e4ce310 | 118 | |
| ianaherne | 4:17e602b21ac5 | 119 | _cs = LOW; |
| ianaherne | 1:67d99e4ce310 | 120 | |
| ianaherne | 1:67d99e4ce310 | 121 | _spi.write(&cmd[0],3,&data_buffer[0],0); |
| ianaherne | 2:183d1d96f917 | 122 | _spi.write(&data[0],data_size,&data_buffer[0],0); |
| ianaherne | 1:67d99e4ce310 | 123 | |
| ianaherne | 4:17e602b21ac5 | 124 | _cs = HIGH; |
| ianaherne | 1:67d99e4ce310 | 125 | |
| ianaherne | 1:67d99e4ce310 | 126 | _spi.unlock(); |
| ianaherne | 1:67d99e4ce310 | 127 | |
| ianaherne | 6:0434e89c2d68 | 128 | /* make sure data has been written sucessfully by reading bit zero in status register*/ |
| ianaherne | 6:0434e89c2d68 | 129 | |
| ianaherne | 6:0434e89c2d68 | 130 | do{ |
| ianaherne | 6:0434e89c2d68 | 131 | |
| ianaherne | 6:0434e89c2d68 | 132 | status = read_status_reg(); |
| ianaherne | 6:0434e89c2d68 | 133 | status = status & 0x1; |
| ianaherne | 0:890f322344f2 | 134 | |
| ianaherne | 6:0434e89c2d68 | 135 | i--; |
| ianaherne | 6:0434e89c2d68 | 136 | |
| ianaherne | 6:0434e89c2d68 | 137 | }while(status == 1 && i>0); |
| ianaherne | 6:0434e89c2d68 | 138 | |
| ianaherne | 6:0434e89c2d68 | 139 | /* if timeout elapses*/ |
| ianaherne | 6:0434e89c2d68 | 140 | |
| ianaherne | 6:0434e89c2d68 | 141 | if( i < 1){ |
| ianaherne | 6:0434e89c2d68 | 142 | |
| ianaherne | 6:0434e89c2d68 | 143 | return FAILURE; |
| ianaherne | 6:0434e89c2d68 | 144 | } |
| ianaherne | 6:0434e89c2d68 | 145 | else { |
| ianaherne | 6:0434e89c2d68 | 146 | return SUCCESS; |
| ianaherne | 6:0434e89c2d68 | 147 | } |
| ianaherne | 0:890f322344f2 | 148 | |
| ianaherne | 0:890f322344f2 | 149 | } |
| ianaherne | 0:890f322344f2 | 150 | |
| ianaherne | 1:67d99e4ce310 | 151 | /** |
| ianaherne | 1:67d99e4ce310 | 152 | * @brief write_byte() |
| ianaherne | 1:67d99e4ce310 | 153 | * @details Writes a single byte to EEprom at the given address |
| ianaherne | 1:67d99e4ce310 | 154 | * @param Address to write to |
| ianaherne | 1:67d99e4ce310 | 155 | * @param Value to write in given address |
| ianaherne | 1:67d99e4ce310 | 156 | * @return NA |
| ianaherne | 1:67d99e4ce310 | 157 | * @warning Byte write can take up to 100 us to complete |
| ianaherne | 1:67d99e4ce310 | 158 | * |
| ianaherne | 1:67d99e4ce310 | 159 | */ |
| ianaherne | 1:67d99e4ce310 | 160 | |
| ianaherne | 1:67d99e4ce310 | 161 | void rm25c512cl :: write_byte(uint16_t address,char value){ |
| ianaherne | 1:67d99e4ce310 | 162 | |
| ianaherne | 1:67d99e4ce310 | 163 | char cmd[4]; |
| ianaherne | 1:67d99e4ce310 | 164 | char data_buffer[1]; // not used here but required for spi.write() as a parameter |
| ianaherne | 1:67d99e4ce310 | 165 | |
| ianaherne | 1:67d99e4ce310 | 166 | cmd[0] = WR; |
| ianaherne | 1:67d99e4ce310 | 167 | cmd[1] = address >> 8; |
| ianaherne | 1:67d99e4ce310 | 168 | cmd[2] = address & 0x00FF; |
| ianaherne | 1:67d99e4ce310 | 169 | cmd[3] = value; |
| ianaherne | 1:67d99e4ce310 | 170 | |
| ianaherne | 1:67d99e4ce310 | 171 | _spi.lock(); |
| ianaherne | 1:67d99e4ce310 | 172 | |
| ianaherne | 4:17e602b21ac5 | 173 | _cs = LOW; |
| ianaherne | 1:67d99e4ce310 | 174 | |
| ianaherne | 1:67d99e4ce310 | 175 | _spi.write(&cmd[0],4,&data_buffer[0],0); |
| ianaherne | 1:67d99e4ce310 | 176 | |
| ianaherne | 4:17e602b21ac5 | 177 | _cs = HIGH; |
| ianaherne | 1:67d99e4ce310 | 178 | |
| ianaherne | 1:67d99e4ce310 | 179 | _spi.unlock(); |
| ianaherne | 1:67d99e4ce310 | 180 | |
| ianaherne | 1:67d99e4ce310 | 181 | wait_us(100); |
| ianaherne | 0:890f322344f2 | 182 | |
| ianaherne | 0:890f322344f2 | 183 | } |
| ianaherne | 0:890f322344f2 | 184 | |
| ianaherne | 1:67d99e4ce310 | 185 | /** |
| ianaherne | 1:67d99e4ce310 | 186 | * @brief read_bytes() |
| ianaherne | 3:e846980a1536 | 187 | * @details Reads multiple bytes starting at given address. |
| ianaherne | 1:67d99e4ce310 | 188 | * @param Page Address to start reading from. |
| ianaherne | 2:183d1d96f917 | 189 | * @param Pointer to data buffer to store multiple bytes read from EEprom. |
| ianaherne | 2:183d1d96f917 | 190 | * @param Size of the data buffer in bytes. |
| ianaherne | 1:67d99e4ce310 | 191 | * @return |
| ianaherne | 1:67d99e4ce310 | 192 | * @warning Data buffer must be of size 128 bytes to read entire page. |
| ianaherne | 1:67d99e4ce310 | 193 | * |
| ianaherne | 1:67d99e4ce310 | 194 | */ |
| ianaherne | 1:67d99e4ce310 | 195 | |
| ianaherne | 2:183d1d96f917 | 196 | void rm25c512cl :: read_bytes(uint16_t address, char* data_buffer, uint16_t data_buffer_size){ |
| ianaherne | 1:67d99e4ce310 | 197 | |
| ianaherne | 1:67d99e4ce310 | 198 | char cmd[3]; |
| ianaherne | 1:67d99e4ce310 | 199 | |
| ianaherne | 1:67d99e4ce310 | 200 | |
| ianaherne | 1:67d99e4ce310 | 201 | cmd[0] = READ; |
| ianaherne | 1:67d99e4ce310 | 202 | cmd[1] = address >> 8; |
| ianaherne | 1:67d99e4ce310 | 203 | cmd[2] = address & 0x00FF; |
| ianaherne | 1:67d99e4ce310 | 204 | |
| ianaherne | 1:67d99e4ce310 | 205 | |
| ianaherne | 1:67d99e4ce310 | 206 | _spi.lock(); |
| ianaherne | 1:67d99e4ce310 | 207 | |
| ianaherne | 4:17e602b21ac5 | 208 | _cs = LOW; |
| ianaherne | 1:67d99e4ce310 | 209 | |
| ianaherne | 1:67d99e4ce310 | 210 | _spi.write(&cmd[0],3,&data_buffer[0],0); |
| ianaherne | 1:67d99e4ce310 | 211 | |
| ianaherne | 1:67d99e4ce310 | 212 | cmd[0] = 0xFF; |
| ianaherne | 1:67d99e4ce310 | 213 | |
| ianaherne | 2:183d1d96f917 | 214 | _spi.write(&cmd[0],1,&data_buffer[0],data_buffer_size); |
| ianaherne | 1:67d99e4ce310 | 215 | |
| ianaherne | 4:17e602b21ac5 | 216 | _cs = HIGH; |
| ianaherne | 1:67d99e4ce310 | 217 | |
| ianaherne | 1:67d99e4ce310 | 218 | _spi.unlock(); |
| ianaherne | 0:890f322344f2 | 219 | |
| ianaherne | 0:890f322344f2 | 220 | |
| ianaherne | 0:890f322344f2 | 221 | } |
| ianaherne | 0:890f322344f2 | 222 | |
| ianaherne | 1:67d99e4ce310 | 223 | /** |
| ianaherne | 1:67d99e4ce310 | 224 | * @brief read_byte() |
| ianaherne | 1:67d99e4ce310 | 225 | * @details Reads a byte of data at given address. |
| ianaherne | 1:67d99e4ce310 | 226 | * @param Address to read byte from. |
| ianaherne | 1:67d99e4ce310 | 227 | * @return Byte of data read from address. |
| ianaherne | 1:67d99e4ce310 | 228 | * @warning |
| ianaherne | 1:67d99e4ce310 | 229 | * |
| ianaherne | 1:67d99e4ce310 | 230 | */ |
| ianaherne | 1:67d99e4ce310 | 231 | |
| ianaherne | 1:67d99e4ce310 | 232 | char rm25c512cl :: read_byte(uint16_t address){ |
| ianaherne | 1:67d99e4ce310 | 233 | |
| ianaherne | 1:67d99e4ce310 | 234 | char cmd[3]; |
| ianaherne | 1:67d99e4ce310 | 235 | char data_buffer[1];// To store data byte returned from EEprom |
| ianaherne | 1:67d99e4ce310 | 236 | |
| ianaherne | 1:67d99e4ce310 | 237 | cmd[0] = READ; |
| ianaherne | 1:67d99e4ce310 | 238 | cmd[1] = address >> 8; |
| ianaherne | 1:67d99e4ce310 | 239 | cmd[2] = address & 0x00FF; |
| ianaherne | 1:67d99e4ce310 | 240 | |
| ianaherne | 1:67d99e4ce310 | 241 | _spi.lock(); |
| ianaherne | 1:67d99e4ce310 | 242 | |
| ianaherne | 4:17e602b21ac5 | 243 | _cs = LOW; |
| ianaherne | 1:67d99e4ce310 | 244 | |
| ianaherne | 1:67d99e4ce310 | 245 | _spi.write(&cmd[0],3,&data_buffer[0],0); |
| ianaherne | 1:67d99e4ce310 | 246 | |
| ianaherne | 1:67d99e4ce310 | 247 | cmd[0] = 0xFF; |
| ianaherne | 1:67d99e4ce310 | 248 | |
| ianaherne | 1:67d99e4ce310 | 249 | _spi.write(&cmd[0],1,&data_buffer[0],1); |
| ianaherne | 1:67d99e4ce310 | 250 | |
| ianaherne | 4:17e602b21ac5 | 251 | _cs = HIGH; |
| ianaherne | 1:67d99e4ce310 | 252 | |
| ianaherne | 1:67d99e4ce310 | 253 | _spi.unlock(); |
| ianaherne | 1:67d99e4ce310 | 254 | |
| ianaherne | 1:67d99e4ce310 | 255 | return data_buffer[0]; |
| ianaherne | 0:890f322344f2 | 256 | |
| ianaherne | 3:e846980a1536 | 257 | } |
| ianaherne | 3:e846980a1536 | 258 | |
| ianaherne | 3:e846980a1536 | 259 | /** |
| ianaherne | 3:e846980a1536 | 260 | * @brief page_erase() |
| ianaherne | 3:e846980a1536 | 261 | * @details 128 byte erase at page address |
| ianaherne | 3:e846980a1536 | 262 | * @param Page address |
| ianaherne | 3:e846980a1536 | 263 | * @return NA |
| ianaherne | 3:e846980a1536 | 264 | * @warning write enable must be called prior to calling this function or or |
| ianaherne | 3:e846980a1536 | 265 | * instruction will be ignored. |
| ianaherne | 3:e846980a1536 | 266 | * |
| ianaherne | 3:e846980a1536 | 267 | */ |
| ianaherne | 3:e846980a1536 | 268 | |
| ianaherne | 3:e846980a1536 | 269 | |
| ianaherne | 3:e846980a1536 | 270 | void rm25c512cl :: page_erase(uint16_t address){ |
| ianaherne | 3:e846980a1536 | 271 | |
| ianaherne | 3:e846980a1536 | 272 | char cmd[3]; |
| ianaherne | 3:e846980a1536 | 273 | char data_buffer[1];// not used here but required as function parameter |
| ianaherne | 3:e846980a1536 | 274 | |
| ianaherne | 3:e846980a1536 | 275 | cmd[0] = PERS; |
| ianaherne | 3:e846980a1536 | 276 | cmd[1] = address >> 8; |
| ianaherne | 3:e846980a1536 | 277 | cmd[2] = address & 0x00FF; |
| ianaherne | 3:e846980a1536 | 278 | |
| ianaherne | 3:e846980a1536 | 279 | _spi.lock(); |
| ianaherne | 3:e846980a1536 | 280 | |
| ianaherne | 4:17e602b21ac5 | 281 | _cs = LOW; |
| ianaherne | 3:e846980a1536 | 282 | |
| ianaherne | 3:e846980a1536 | 283 | _spi.write(&cmd[0],3,&data_buffer[0],0); |
| ianaherne | 3:e846980a1536 | 284 | |
| ianaherne | 4:17e602b21ac5 | 285 | _cs = HIGH; |
| ianaherne | 3:e846980a1536 | 286 | |
| ianaherne | 3:e846980a1536 | 287 | _spi.unlock(); |
| ianaherne | 3:e846980a1536 | 288 | |
| ianaherne | 3:e846980a1536 | 289 | |
| ianaherne | 3:e846980a1536 | 290 | |
| ianaherne | 3:e846980a1536 | 291 | } |
| ianaherne | 3:e846980a1536 | 292 | |
| ianaherne | 3:e846980a1536 | 293 | /** |
| ianaherne | 3:e846980a1536 | 294 | * @brief chip_erase() |
| ianaherne | 3:e846980a1536 | 295 | * @details erases all memory on chip |
| ianaherne | 3:e846980a1536 | 296 | * @param NA |
| ianaherne | 3:e846980a1536 | 297 | * @return NA |
| ianaherne | 3:e846980a1536 | 298 | * @warning write enable must be called prior to calling this function or or |
| ianaherne | 3:e846980a1536 | 299 | * instruction will be ignored. |
| ianaherne | 3:e846980a1536 | 300 | * |
| ianaherne | 3:e846980a1536 | 301 | */ |
| ianaherne | 3:e846980a1536 | 302 | |
| ianaherne | 3:e846980a1536 | 303 | void rm25c512cl :: chip_erase(){ |
| ianaherne | 3:e846980a1536 | 304 | |
| ianaherne | 3:e846980a1536 | 305 | char cmd[1]; |
| ianaherne | 3:e846980a1536 | 306 | char data_buffer[1];// not used here but required as function parameter |
| ianaherne | 3:e846980a1536 | 307 | |
| ianaherne | 3:e846980a1536 | 308 | cmd[0] = CERS; |
| ianaherne | 3:e846980a1536 | 309 | |
| ianaherne | 3:e846980a1536 | 310 | _spi.lock(); |
| ianaherne | 3:e846980a1536 | 311 | |
| ianaherne | 4:17e602b21ac5 | 312 | _cs = LOW; |
| ianaherne | 3:e846980a1536 | 313 | |
| ianaherne | 3:e846980a1536 | 314 | _spi.write(&cmd[0],1,&data_buffer[0],0); |
| ianaherne | 3:e846980a1536 | 315 | |
| ianaherne | 4:17e602b21ac5 | 316 | _cs = HIGH; |
| ianaherne | 3:e846980a1536 | 317 | |
| ianaherne | 3:e846980a1536 | 318 | _spi.unlock(); |
| ianaherne | 3:e846980a1536 | 319 | |
| ianaherne | 3:e846980a1536 | 320 | |
| ianaherne | 3:e846980a1536 | 321 | |
| ianaherne | 3:e846980a1536 | 322 | } |
| ianaherne | 3:e846980a1536 | 323 |