FMF-ART / mbed-dev-lib

lib

Fork of mbed-dev by mbed official

targets/TARGET_Silicon_Labs/TARGET_EFM32/objects.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/objects.h@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file objects.h
<> 144:ef7eb2e8f9f7 3 *******************************************************************************
<> 144:ef7eb2e8f9f7 4 * @section License
<> 144:ef7eb2e8f9f7 5 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
<> 144:ef7eb2e8f9f7 6 *******************************************************************************
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * SPDX-License-Identifier: Apache-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Licensed under the Apache License, Version 2.0 (the "License"); you may
<> 144:ef7eb2e8f9f7 11 * not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 12 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 17 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
<> 144:ef7eb2e8f9f7 18 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 19 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 20 * limitations under the License.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 ******************************************************************************/
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 #ifndef MBED_OBJECTS_H
<> 144:ef7eb2e8f9f7 25 #define MBED_OBJECTS_H
<> 144:ef7eb2e8f9f7 26
<> 144:ef7eb2e8f9f7 27 #include "PinNames.h"
<> 144:ef7eb2e8f9f7 28 #include "PeripheralNames.h"
<> 144:ef7eb2e8f9f7 29 #include "PortNames.h"
<> 144:ef7eb2e8f9f7 30 #include "em_i2c.h"
<> 144:ef7eb2e8f9f7 31 #include "em_dma.h"
<> 144:ef7eb2e8f9f7 32 #include "em_cmu.h"
<> 144:ef7eb2e8f9f7 33 #include "dma_api_HAL.h"
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 36 extern "C" {
<> 144:ef7eb2e8f9f7 37 #endif
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 typedef struct {
<> 144:ef7eb2e8f9f7 40 PinName pin:8;
<> 144:ef7eb2e8f9f7 41 PinMode mode:6;
<> 144:ef7eb2e8f9f7 42 PinDirection dir:2;
<> 144:ef7eb2e8f9f7 43 } gpio_t;
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 #if DEVICE_ANALOGIN
<> 144:ef7eb2e8f9f7 46 struct analogin_s {
<> 144:ef7eb2e8f9f7 47 ADC_TypeDef *adc;
<> 144:ef7eb2e8f9f7 48 uint32_t channel;
<> 144:ef7eb2e8f9f7 49 };
<> 144:ef7eb2e8f9f7 50 #endif
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 #if DEVICE_ANALOGOUT
<> 144:ef7eb2e8f9f7 53 struct dac_s {
<> 144:ef7eb2e8f9f7 54 DAC_TypeDef *dac;
<> 144:ef7eb2e8f9f7 55 uint32_t channel;
<> 144:ef7eb2e8f9f7 56 };
<> 144:ef7eb2e8f9f7 57 #endif
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 #if DEVICE_I2C
<> 144:ef7eb2e8f9f7 60 struct i2c_s {
<> 144:ef7eb2e8f9f7 61 I2C_TypeDef *i2c;
<> 144:ef7eb2e8f9f7 62 #if DEVICE_I2C_ASYNCH
<> 144:ef7eb2e8f9f7 63 uint32_t events;
<> 144:ef7eb2e8f9f7 64 I2C_TransferSeq_TypeDef xfer;
<> 144:ef7eb2e8f9f7 65 #endif
<> 144:ef7eb2e8f9f7 66 };
<> 144:ef7eb2e8f9f7 67 #endif
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 #if DEVICE_PORTOUT
<> 144:ef7eb2e8f9f7 70 struct port_s {
<> 144:ef7eb2e8f9f7 71 PortName port;
<> 144:ef7eb2e8f9f7 72 uint32_t mask;
<> 144:ef7eb2e8f9f7 73 PinDirection dir;
<> 144:ef7eb2e8f9f7 74 };
<> 144:ef7eb2e8f9f7 75 #endif
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 #if DEVICE_PWMOUT
<> 144:ef7eb2e8f9f7 78 struct pwmout_s {
<> 144:ef7eb2e8f9f7 79 //Channel on TIMER
<> 144:ef7eb2e8f9f7 80 uint32_t channel;
<> 144:ef7eb2e8f9f7 81 PinName pin;
<> 144:ef7eb2e8f9f7 82 };
<> 144:ef7eb2e8f9f7 83 #endif
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 #if DEVICE_INTERRUPTIN
<> 144:ef7eb2e8f9f7 86 struct gpio_irq_s {
<> 144:ef7eb2e8f9f7 87 PinName pin:8; // Pin number 4 least significant bits, port number 4 most significant bits
<> 144:ef7eb2e8f9f7 88 uint32_t risingEdge:1;
<> 144:ef7eb2e8f9f7 89 uint32_t fallingEdge:1;
<> 144:ef7eb2e8f9f7 90 };
<> 144:ef7eb2e8f9f7 91 #endif
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 #if DEVICE_SERIAL
<> 144:ef7eb2e8f9f7 94 struct serial_s {
<> 144:ef7eb2e8f9f7 95 union {
<> 144:ef7eb2e8f9f7 96 USART_TypeDef *uart;
<> 144:ef7eb2e8f9f7 97 LEUART_TypeDef *leuart;
<> 144:ef7eb2e8f9f7 98 } periph;
<> 144:ef7eb2e8f9f7 99 #ifndef _SILICON_LABS_32B_PLATFORM_2
<> 144:ef7eb2e8f9f7 100 uint32_t location;
<> 144:ef7eb2e8f9f7 101 #else
<> 144:ef7eb2e8f9f7 102 uint32_t location_tx;
<> 144:ef7eb2e8f9f7 103 uint32_t location_rx;
<> 144:ef7eb2e8f9f7 104 #endif
<> 144:ef7eb2e8f9f7 105 PinName rx_pin;
<> 144:ef7eb2e8f9f7 106 PinName tx_pin;
<> 144:ef7eb2e8f9f7 107 #if DEVICE_SERIAL_ASYNCH
<> 144:ef7eb2e8f9f7 108 uint32_t events;
<> 144:ef7eb2e8f9f7 109 DMA_OPTIONS_t dmaOptionsTX;
<> 144:ef7eb2e8f9f7 110 DMA_OPTIONS_t dmaOptionsRX;
<> 144:ef7eb2e8f9f7 111 #endif
<> 144:ef7eb2e8f9f7 112 uint32_t sleep_blocked;
<> 144:ef7eb2e8f9f7 113 };
<> 144:ef7eb2e8f9f7 114 #endif
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 #if DEVICE_SPI
<> 144:ef7eb2e8f9f7 117 struct spi_s {
<> 144:ef7eb2e8f9f7 118 USART_TypeDef *spi;
<> 144:ef7eb2e8f9f7 119 int location;
<> 144:ef7eb2e8f9f7 120 uint8_t bits;
<> 144:ef7eb2e8f9f7 121 uint8_t master;
<> 144:ef7eb2e8f9f7 122 #if DEVICE_SPI_ASYNCH
<> 144:ef7eb2e8f9f7 123 uint32_t event;
<> 144:ef7eb2e8f9f7 124 DMA_OPTIONS_t dmaOptionsTX;
<> 144:ef7eb2e8f9f7 125 DMA_OPTIONS_t dmaOptionsRX;
<> 144:ef7eb2e8f9f7 126 #endif
<> 144:ef7eb2e8f9f7 127 };
<> 144:ef7eb2e8f9f7 128 #endif
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 #if DEVICE_RTC
<> 144:ef7eb2e8f9f7 131 struct lp_timer_s {
<> 144:ef7eb2e8f9f7 132 uint32_t start;
<> 144:ef7eb2e8f9f7 133 uint32_t stop;
<> 144:ef7eb2e8f9f7 134 };
<> 144:ef7eb2e8f9f7 135 #endif
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 #if DEVICE_SLEEP
<> 144:ef7eb2e8f9f7 138 #define NUM_SLEEP_MODES 5
<> 144:ef7eb2e8f9f7 139 typedef enum {
<> 144:ef7eb2e8f9f7 140 EM0 = 0,
<> 144:ef7eb2e8f9f7 141 EM1 = 1,
<> 144:ef7eb2e8f9f7 142 EM2 = 2,
<> 144:ef7eb2e8f9f7 143 EM3 = 3,
<> 144:ef7eb2e8f9f7 144 EM4 = 4
<> 144:ef7eb2e8f9f7 145 } sleepstate_enum;
<> 144:ef7eb2e8f9f7 146 #endif
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 150 }
<> 144:ef7eb2e8f9f7 151 #endif
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 #endif