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mbed/hal/gpio_irq_api.h@0:d6c9b09b4042, 2020-12-02 (annotated)

Committer:
annieluo2
Date:
Wed Dec 02 18:02:03 2020 +0000
Revision:
0:d6c9b09b4042
boo

Who changed what in which revision?

UserRevisionLine numberNew contents of line
annieluo2 0:d6c9b09b4042 1
annieluo2 0:d6c9b09b4042 2 /** \addtogroup hal */
annieluo2 0:d6c9b09b4042 3 /** @{*/
annieluo2 0:d6c9b09b4042 4 /* mbed Microcontroller Library
annieluo2 0:d6c9b09b4042 5 * Copyright (c) 2006-2013 ARM Limited
annieluo2 0:d6c9b09b4042 6 *
annieluo2 0:d6c9b09b4042 7 * Licensed under the Apache License, Version 2.0 (the "License");
annieluo2 0:d6c9b09b4042 8 * you may not use this file except in compliance with the License.
annieluo2 0:d6c9b09b4042 9 * You may obtain a copy of the License at
annieluo2 0:d6c9b09b4042 10 *
annieluo2 0:d6c9b09b4042 11 * http://www.apache.org/licenses/LICENSE-2.0
annieluo2 0:d6c9b09b4042 12 *
annieluo2 0:d6c9b09b4042 13 * Unless required by applicable law or agreed to in writing, software
annieluo2 0:d6c9b09b4042 14 * distributed under the License is distributed on an "AS IS" BASIS,
annieluo2 0:d6c9b09b4042 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
annieluo2 0:d6c9b09b4042 16 * See the License for the specific language governing permissions and
annieluo2 0:d6c9b09b4042 17 * limitations under the License.
annieluo2 0:d6c9b09b4042 18 */
annieluo2 0:d6c9b09b4042 19 #ifndef MBED_GPIO_IRQ_API_H
annieluo2 0:d6c9b09b4042 20 #define MBED_GPIO_IRQ_API_H
annieluo2 0:d6c9b09b4042 21
annieluo2 0:d6c9b09b4042 22 #include "device.h"
annieluo2 0:d6c9b09b4042 23
annieluo2 0:d6c9b09b4042 24 #if DEVICE_INTERRUPTIN
annieluo2 0:d6c9b09b4042 25
annieluo2 0:d6c9b09b4042 26 #ifdef __cplusplus
annieluo2 0:d6c9b09b4042 27 extern "C" {
annieluo2 0:d6c9b09b4042 28 #endif
annieluo2 0:d6c9b09b4042 29
annieluo2 0:d6c9b09b4042 30 /** GPIO IRQ events
annieluo2 0:d6c9b09b4042 31 */
annieluo2 0:d6c9b09b4042 32 typedef enum {
annieluo2 0:d6c9b09b4042 33 IRQ_NONE,
annieluo2 0:d6c9b09b4042 34 IRQ_RISE,
annieluo2 0:d6c9b09b4042 35 IRQ_FALL
annieluo2 0:d6c9b09b4042 36 } gpio_irq_event;
annieluo2 0:d6c9b09b4042 37
annieluo2 0:d6c9b09b4042 38 /** GPIO IRQ HAL structure. gpio_irq_s is declared in the target's HAL
annieluo2 0:d6c9b09b4042 39 */
annieluo2 0:d6c9b09b4042 40 typedef struct gpio_irq_s gpio_irq_t;
annieluo2 0:d6c9b09b4042 41
annieluo2 0:d6c9b09b4042 42 typedef void (*gpio_irq_handler)(uint32_t id, gpio_irq_event event);
annieluo2 0:d6c9b09b4042 43
annieluo2 0:d6c9b09b4042 44 /**
annieluo2 0:d6c9b09b4042 45 * \defgroup hal_gpioirq GPIO IRQ HAL functions
annieluo2 0:d6c9b09b4042 46 * @{
annieluo2 0:d6c9b09b4042 47 */
annieluo2 0:d6c9b09b4042 48
annieluo2 0:d6c9b09b4042 49 /** Initialize the GPIO IRQ pin
annieluo2 0:d6c9b09b4042 50 *
annieluo2 0:d6c9b09b4042 51 * @param obj The GPIO object to initialize
annieluo2 0:d6c9b09b4042 52 * @param pin The GPIO pin name
annieluo2 0:d6c9b09b4042 53 * @param handler The handler to be attached to GPIO IRQ
annieluo2 0:d6c9b09b4042 54 * @param id The object ID (id != 0, 0 is reserved)
annieluo2 0:d6c9b09b4042 55 * @return -1 if pin is NC, 0 otherwise
annieluo2 0:d6c9b09b4042 56 */
annieluo2 0:d6c9b09b4042 57 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id);
annieluo2 0:d6c9b09b4042 58
annieluo2 0:d6c9b09b4042 59 /** Release the GPIO IRQ PIN
annieluo2 0:d6c9b09b4042 60 *
annieluo2 0:d6c9b09b4042 61 * @param obj The gpio object
annieluo2 0:d6c9b09b4042 62 */
annieluo2 0:d6c9b09b4042 63 void gpio_irq_free(gpio_irq_t *obj);
annieluo2 0:d6c9b09b4042 64
annieluo2 0:d6c9b09b4042 65 /** Enable/disable pin IRQ event
annieluo2 0:d6c9b09b4042 66 *
annieluo2 0:d6c9b09b4042 67 * @param obj The GPIO object
annieluo2 0:d6c9b09b4042 68 * @param event The GPIO IRQ event
annieluo2 0:d6c9b09b4042 69 * @param enable The enable flag
annieluo2 0:d6c9b09b4042 70 */
annieluo2 0:d6c9b09b4042 71 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable);
annieluo2 0:d6c9b09b4042 72
annieluo2 0:d6c9b09b4042 73 /** Enable GPIO IRQ
annieluo2 0:d6c9b09b4042 74 *
annieluo2 0:d6c9b09b4042 75 * This is target dependent, as it might enable the entire port or just a pin
annieluo2 0:d6c9b09b4042 76 * @param obj The GPIO object
annieluo2 0:d6c9b09b4042 77 */
annieluo2 0:d6c9b09b4042 78 void gpio_irq_enable(gpio_irq_t *obj);
annieluo2 0:d6c9b09b4042 79
annieluo2 0:d6c9b09b4042 80 /** Disable GPIO IRQ
annieluo2 0:d6c9b09b4042 81 *
annieluo2 0:d6c9b09b4042 82 * This is target dependent, as it might disable the entire port or just a pin
annieluo2 0:d6c9b09b4042 83 * @param obj The GPIO object
annieluo2 0:d6c9b09b4042 84 */
annieluo2 0:d6c9b09b4042 85 void gpio_irq_disable(gpio_irq_t *obj);
annieluo2 0:d6c9b09b4042 86
annieluo2 0:d6c9b09b4042 87 /**@}*/
annieluo2 0:d6c9b09b4042 88
annieluo2 0:d6c9b09b4042 89 #ifdef __cplusplus
annieluo2 0:d6c9b09b4042 90 }
annieluo2 0:d6c9b09b4042 91 #endif
annieluo2 0:d6c9b09b4042 92
annieluo2 0:d6c9b09b4042 93 #endif
annieluo2 0:d6c9b09b4042 94
annieluo2 0:d6c9b09b4042 95 #endif
annieluo2 0:d6c9b09b4042 96
annieluo2 0:d6c9b09b4042 97 /** @}*/