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mbed/drivers/SPISlave.h@0:d6c9b09b4042, 2020-12-02 (annotated)

Committer:
annieluo2
Date:
Wed Dec 02 18:02:03 2020 +0000
Revision:
0:d6c9b09b4042
boo

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annieluo2 0:d6c9b09b4042 1 /* mbed Microcontroller Library
annieluo2 0:d6c9b09b4042 2 * Copyright (c) 2006-2013 ARM Limited
annieluo2 0:d6c9b09b4042 3 *
annieluo2 0:d6c9b09b4042 4 * Licensed under the Apache License, Version 2.0 (the "License");
annieluo2 0:d6c9b09b4042 5 * you may not use this file except in compliance with the License.
annieluo2 0:d6c9b09b4042 6 * You may obtain a copy of the License at
annieluo2 0:d6c9b09b4042 7 *
annieluo2 0:d6c9b09b4042 8 * http://www.apache.org/licenses/LICENSE-2.0
annieluo2 0:d6c9b09b4042 9 *
annieluo2 0:d6c9b09b4042 10 * Unless required by applicable law or agreed to in writing, software
annieluo2 0:d6c9b09b4042 11 * distributed under the License is distributed on an "AS IS" BASIS,
annieluo2 0:d6c9b09b4042 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
annieluo2 0:d6c9b09b4042 13 * See the License for the specific language governing permissions and
annieluo2 0:d6c9b09b4042 14 * limitations under the License.
annieluo2 0:d6c9b09b4042 15 */
annieluo2 0:d6c9b09b4042 16 #ifndef MBED_SPISLAVE_H
annieluo2 0:d6c9b09b4042 17 #define MBED_SPISLAVE_H
annieluo2 0:d6c9b09b4042 18
annieluo2 0:d6c9b09b4042 19 #include "platform/platform.h"
annieluo2 0:d6c9b09b4042 20
annieluo2 0:d6c9b09b4042 21 #if DEVICE_SPISLAVE
annieluo2 0:d6c9b09b4042 22
annieluo2 0:d6c9b09b4042 23 #include "hal/spi_api.h"
annieluo2 0:d6c9b09b4042 24
annieluo2 0:d6c9b09b4042 25 namespace mbed {
annieluo2 0:d6c9b09b4042 26 /** \addtogroup drivers */
annieluo2 0:d6c9b09b4042 27 /** @{*/
annieluo2 0:d6c9b09b4042 28
annieluo2 0:d6c9b09b4042 29 /** A SPI slave, used for communicating with a SPI Master device
annieluo2 0:d6c9b09b4042 30 *
annieluo2 0:d6c9b09b4042 31 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
annieluo2 0:d6c9b09b4042 32 *
annieluo2 0:d6c9b09b4042 33 * @Note Synchronization level: Not protected
annieluo2 0:d6c9b09b4042 34 *
annieluo2 0:d6c9b09b4042 35 * Example:
annieluo2 0:d6c9b09b4042 36 * @code
annieluo2 0:d6c9b09b4042 37 * // Reply to a SPI master as slave
annieluo2 0:d6c9b09b4042 38 *
annieluo2 0:d6c9b09b4042 39 * #include "mbed.h"
annieluo2 0:d6c9b09b4042 40 *
annieluo2 0:d6c9b09b4042 41 * SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
annieluo2 0:d6c9b09b4042 42 *
annieluo2 0:d6c9b09b4042 43 * int main() {
annieluo2 0:d6c9b09b4042 44 * device.reply(0x00); // Prime SPI with first reply
annieluo2 0:d6c9b09b4042 45 * while(1) {
annieluo2 0:d6c9b09b4042 46 * if(device.receive()) {
annieluo2 0:d6c9b09b4042 47 * int v = device.read(); // Read byte from master
annieluo2 0:d6c9b09b4042 48 * v = (v + 1) % 0x100; // Add one to it, modulo 256
annieluo2 0:d6c9b09b4042 49 * device.reply(v); // Make this the next reply
annieluo2 0:d6c9b09b4042 50 * }
annieluo2 0:d6c9b09b4042 51 * }
annieluo2 0:d6c9b09b4042 52 * }
annieluo2 0:d6c9b09b4042 53 * @endcode
annieluo2 0:d6c9b09b4042 54 */
annieluo2 0:d6c9b09b4042 55 class SPISlave {
annieluo2 0:d6c9b09b4042 56
annieluo2 0:d6c9b09b4042 57 public:
annieluo2 0:d6c9b09b4042 58
annieluo2 0:d6c9b09b4042 59 /** Create a SPI slave connected to the specified pins
annieluo2 0:d6c9b09b4042 60 *
annieluo2 0:d6c9b09b4042 61 * mosi or miso can be specfied as NC if not used
annieluo2 0:d6c9b09b4042 62 *
annieluo2 0:d6c9b09b4042 63 * @param mosi SPI Master Out, Slave In pin
annieluo2 0:d6c9b09b4042 64 * @param miso SPI Master In, Slave Out pin
annieluo2 0:d6c9b09b4042 65 * @param sclk SPI Clock pin
annieluo2 0:d6c9b09b4042 66 * @param ssel SPI chip select pin
annieluo2 0:d6c9b09b4042 67 */
annieluo2 0:d6c9b09b4042 68 SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel);
annieluo2 0:d6c9b09b4042 69
annieluo2 0:d6c9b09b4042 70 /** Configure the data transmission format
annieluo2 0:d6c9b09b4042 71 *
annieluo2 0:d6c9b09b4042 72 * @param bits Number of bits per SPI frame (4 - 16)
annieluo2 0:d6c9b09b4042 73 * @param mode Clock polarity and phase mode (0 - 3)
annieluo2 0:d6c9b09b4042 74 *
annieluo2 0:d6c9b09b4042 75 * @code
annieluo2 0:d6c9b09b4042 76 * mode | POL PHA
annieluo2 0:d6c9b09b4042 77 * -----+--------
annieluo2 0:d6c9b09b4042 78 * 0 | 0 0
annieluo2 0:d6c9b09b4042 79 * 1 | 0 1
annieluo2 0:d6c9b09b4042 80 * 2 | 1 0
annieluo2 0:d6c9b09b4042 81 * 3 | 1 1
annieluo2 0:d6c9b09b4042 82 * @endcode
annieluo2 0:d6c9b09b4042 83 */
annieluo2 0:d6c9b09b4042 84 void format(int bits, int mode = 0);
annieluo2 0:d6c9b09b4042 85
annieluo2 0:d6c9b09b4042 86 /** Set the spi bus clock frequency
annieluo2 0:d6c9b09b4042 87 *
annieluo2 0:d6c9b09b4042 88 * @param hz SCLK frequency in hz (default = 1MHz)
annieluo2 0:d6c9b09b4042 89 */
annieluo2 0:d6c9b09b4042 90 void frequency(int hz = 1000000);
annieluo2 0:d6c9b09b4042 91
annieluo2 0:d6c9b09b4042 92 /** Polls the SPI to see if data has been received
annieluo2 0:d6c9b09b4042 93 *
annieluo2 0:d6c9b09b4042 94 * @returns
annieluo2 0:d6c9b09b4042 95 * 0 if no data,
annieluo2 0:d6c9b09b4042 96 * 1 otherwise
annieluo2 0:d6c9b09b4042 97 */
annieluo2 0:d6c9b09b4042 98 int receive(void);
annieluo2 0:d6c9b09b4042 99
annieluo2 0:d6c9b09b4042 100 /** Retrieve data from receive buffer as slave
annieluo2 0:d6c9b09b4042 101 *
annieluo2 0:d6c9b09b4042 102 * @returns
annieluo2 0:d6c9b09b4042 103 * the data in the receive buffer
annieluo2 0:d6c9b09b4042 104 */
annieluo2 0:d6c9b09b4042 105 int read(void);
annieluo2 0:d6c9b09b4042 106
annieluo2 0:d6c9b09b4042 107 /** Fill the transmission buffer with the value to be written out
annieluo2 0:d6c9b09b4042 108 * as slave on the next received message from the master.
annieluo2 0:d6c9b09b4042 109 *
annieluo2 0:d6c9b09b4042 110 * @param value the data to be transmitted next
annieluo2 0:d6c9b09b4042 111 */
annieluo2 0:d6c9b09b4042 112 void reply(int value);
annieluo2 0:d6c9b09b4042 113
annieluo2 0:d6c9b09b4042 114 protected:
annieluo2 0:d6c9b09b4042 115 spi_t _spi;
annieluo2 0:d6c9b09b4042 116
annieluo2 0:d6c9b09b4042 117 int _bits;
annieluo2 0:d6c9b09b4042 118 int _mode;
annieluo2 0:d6c9b09b4042 119 int _hz;
annieluo2 0:d6c9b09b4042 120 };
annieluo2 0:d6c9b09b4042 121
annieluo2 0:d6c9b09b4042 122 } // namespace mbed
annieluo2 0:d6c9b09b4042 123
annieluo2 0:d6c9b09b4042 124 #endif
annieluo2 0:d6c9b09b4042 125
annieluo2 0:d6c9b09b4042 126 #endif
annieluo2 0:d6c9b09b4042 127
annieluo2 0:d6c9b09b4042 128 /** @}*/