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SDFileSystem/SDFileSystem.cpp@0:d6c9b09b4042, 2020-12-02 (annotated)

Committer:
annieluo2
Date:
Wed Dec 02 18:02:03 2020 +0000
Revision:
0:d6c9b09b4042
boo

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annieluo2 0:d6c9b09b4042 1 /* mbed Microcontroller Library
annieluo2 0:d6c9b09b4042 2 * Copyright (c) 2006-2012 ARM Limited
annieluo2 0:d6c9b09b4042 3 *
annieluo2 0:d6c9b09b4042 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
annieluo2 0:d6c9b09b4042 5 * of this software and associated documentation files (the "Software"), to deal
annieluo2 0:d6c9b09b4042 6 * in the Software without restriction, including without limitation the rights
annieluo2 0:d6c9b09b4042 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
annieluo2 0:d6c9b09b4042 8 * copies of the Software, and to permit persons to whom the Software is
annieluo2 0:d6c9b09b4042 9 * furnished to do so, subject to the following conditions:
annieluo2 0:d6c9b09b4042 10 *
annieluo2 0:d6c9b09b4042 11 * The above copyright notice and this permission notice shall be included in
annieluo2 0:d6c9b09b4042 12 * all copies or substantial portions of the Software.
annieluo2 0:d6c9b09b4042 13 *
annieluo2 0:d6c9b09b4042 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
annieluo2 0:d6c9b09b4042 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
annieluo2 0:d6c9b09b4042 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
annieluo2 0:d6c9b09b4042 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
annieluo2 0:d6c9b09b4042 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
annieluo2 0:d6c9b09b4042 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
annieluo2 0:d6c9b09b4042 20 * SOFTWARE.
annieluo2 0:d6c9b09b4042 21 */
annieluo2 0:d6c9b09b4042 22 /* Introduction
annieluo2 0:d6c9b09b4042 23 * ------------
annieluo2 0:d6c9b09b4042 24 * SD and MMC cards support a number of interfaces, but common to them all
annieluo2 0:d6c9b09b4042 25 * is one based on SPI. This is the one I'm implmenting because it means
annieluo2 0:d6c9b09b4042 26 * it is much more portable even though not so performant, and we already
annieluo2 0:d6c9b09b4042 27 * have the mbed SPI Interface!
annieluo2 0:d6c9b09b4042 28 *
annieluo2 0:d6c9b09b4042 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
annieluo2 0:d6c9b09b4042 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
annieluo2 0:d6c9b09b4042 31 *
annieluo2 0:d6c9b09b4042 32 * SPI Startup
annieluo2 0:d6c9b09b4042 33 * -----------
annieluo2 0:d6c9b09b4042 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
annieluo2 0:d6c9b09b4042 35 * asserting CS low and sending the reset command (CMD0). The card will
annieluo2 0:d6c9b09b4042 36 * respond with a (R1) response.
annieluo2 0:d6c9b09b4042 37 *
annieluo2 0:d6c9b09b4042 38 * CMD8 is optionally sent to determine the voltage range supported, and
annieluo2 0:d6c9b09b4042 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
annieluo2 0:d6c9b09b4042 40 * version 2.x. I'll just ignore this for now.
annieluo2 0:d6c9b09b4042 41 *
annieluo2 0:d6c9b09b4042 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
annieluo2 0:d6c9b09b4042 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
annieluo2 0:d6c9b09b4042 44 *
annieluo2 0:d6c9b09b4042 45 * You should also indicate whether the host supports High Capicity cards,
annieluo2 0:d6c9b09b4042 46 * and check whether the card is high capacity - i'll also ignore this
annieluo2 0:d6c9b09b4042 47 *
annieluo2 0:d6c9b09b4042 48 * SPI Protocol
annieluo2 0:d6c9b09b4042 49 * ------------
annieluo2 0:d6c9b09b4042 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
annieluo2 0:d6c9b09b4042 51 * the host starting every bus transaction by asserting the CS signal low. The
annieluo2 0:d6c9b09b4042 52 * card always responds to commands, data blocks and errors.
annieluo2 0:d6c9b09b4042 53 *
annieluo2 0:d6c9b09b4042 54 * The protocol supports a CRC, but by default it is off (except for the
annieluo2 0:d6c9b09b4042 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
annieluo2 0:d6c9b09b4042 56 * I'll leave the CRC off I think!
annieluo2 0:d6c9b09b4042 57 *
annieluo2 0:d6c9b09b4042 58 * Standard capacity cards have variable data block sizes, whereas High
annieluo2 0:d6c9b09b4042 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
annieluo2 0:d6c9b09b4042 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
annieluo2 0:d6c9b09b4042 61 * This is set with CMD16.
annieluo2 0:d6c9b09b4042 62 *
annieluo2 0:d6c9b09b4042 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
annieluo2 0:d6c9b09b4042 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
annieluo2 0:d6c9b09b4042 65 * the card gets a read command, it responds with a response token, and then
annieluo2 0:d6c9b09b4042 66 * a data token or an error.
annieluo2 0:d6c9b09b4042 67 *
annieluo2 0:d6c9b09b4042 68 * SPI Command Format
annieluo2 0:d6c9b09b4042 69 * ------------------
annieluo2 0:d6c9b09b4042 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
annieluo2 0:d6c9b09b4042 71 *
annieluo2 0:d6c9b09b4042 72 * +---------------+------------+------------+-----------+----------+--------------+
annieluo2 0:d6c9b09b4042 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
annieluo2 0:d6c9b09b4042 74 * +---------------+------------+------------+-----------+----------+--------------+
annieluo2 0:d6c9b09b4042 75 *
annieluo2 0:d6c9b09b4042 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
annieluo2 0:d6c9b09b4042 77 *
annieluo2 0:d6c9b09b4042 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
annieluo2 0:d6c9b09b4042 79 *
annieluo2 0:d6c9b09b4042 80 * SPI Response Format
annieluo2 0:d6c9b09b4042 81 * -------------------
annieluo2 0:d6c9b09b4042 82 * The main response format (R1) is a status byte (normally zero). Key flags:
annieluo2 0:d6c9b09b4042 83 * idle - 1 if the card is in an idle state/initialising
annieluo2 0:d6c9b09b4042 84 * cmd - 1 if an illegal command code was detected
annieluo2 0:d6c9b09b4042 85 *
annieluo2 0:d6c9b09b4042 86 * +-------------------------------------------------+
annieluo2 0:d6c9b09b4042 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
annieluo2 0:d6c9b09b4042 88 * +-------------------------------------------------+
annieluo2 0:d6c9b09b4042 89 *
annieluo2 0:d6c9b09b4042 90 * R1b is the same, except it is followed by a busy signal (zeros) until
annieluo2 0:d6c9b09b4042 91 * the first non-zero byte when it is ready again.
annieluo2 0:d6c9b09b4042 92 *
annieluo2 0:d6c9b09b4042 93 * Data Response Token
annieluo2 0:d6c9b09b4042 94 * -------------------
annieluo2 0:d6c9b09b4042 95 * Every data block written to the card is acknowledged by a byte
annieluo2 0:d6c9b09b4042 96 * response token
annieluo2 0:d6c9b09b4042 97 *
annieluo2 0:d6c9b09b4042 98 * +----------------------+
annieluo2 0:d6c9b09b4042 99 * | xxx | 0 | status | 1 |
annieluo2 0:d6c9b09b4042 100 * +----------------------+
annieluo2 0:d6c9b09b4042 101 * 010 - OK!
annieluo2 0:d6c9b09b4042 102 * 101 - CRC Error
annieluo2 0:d6c9b09b4042 103 * 110 - Write Error
annieluo2 0:d6c9b09b4042 104 *
annieluo2 0:d6c9b09b4042 105 * Single Block Read and Write
annieluo2 0:d6c9b09b4042 106 * ---------------------------
annieluo2 0:d6c9b09b4042 107 *
annieluo2 0:d6c9b09b4042 108 * Block transfers have a byte header, followed by the data, followed
annieluo2 0:d6c9b09b4042 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
annieluo2 0:d6c9b09b4042 110 *
annieluo2 0:d6c9b09b4042 111 * +------+---------+---------+- - - -+---------+-----------+----------+
annieluo2 0:d6c9b09b4042 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
annieluo2 0:d6c9b09b4042 113 * +------+---------+---------+- - - -+---------+-----------+----------+
annieluo2 0:d6c9b09b4042 114 */
annieluo2 0:d6c9b09b4042 115 #include "SDFileSystem.h"
annieluo2 0:d6c9b09b4042 116 #include "mbed_debug.h"
annieluo2 0:d6c9b09b4042 117
annieluo2 0:d6c9b09b4042 118 #define SD_COMMAND_TIMEOUT 5000
annieluo2 0:d6c9b09b4042 119
annieluo2 0:d6c9b09b4042 120 #define SD_DBG 0
annieluo2 0:d6c9b09b4042 121
annieluo2 0:d6c9b09b4042 122 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
annieluo2 0:d6c9b09b4042 123 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0) {
annieluo2 0:d6c9b09b4042 124 _cs = 1;
annieluo2 0:d6c9b09b4042 125
annieluo2 0:d6c9b09b4042 126 // Set default to 100kHz for initialisation and 1MHz for data transfer
annieluo2 0:d6c9b09b4042 127 _init_sck = 100000;
annieluo2 0:d6c9b09b4042 128 _transfer_sck = 10000000;
annieluo2 0:d6c9b09b4042 129
annieluo2 0:d6c9b09b4042 130 }
annieluo2 0:d6c9b09b4042 131
annieluo2 0:d6c9b09b4042 132 #define R1_IDLE_STATE (1 << 0)
annieluo2 0:d6c9b09b4042 133 #define R1_ERASE_RESET (1 << 1)
annieluo2 0:d6c9b09b4042 134 #define R1_ILLEGAL_COMMAND (1 << 2)
annieluo2 0:d6c9b09b4042 135 #define R1_COM_CRC_ERROR (1 << 3)
annieluo2 0:d6c9b09b4042 136 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
annieluo2 0:d6c9b09b4042 137 #define R1_ADDRESS_ERROR (1 << 5)
annieluo2 0:d6c9b09b4042 138 #define R1_PARAMETER_ERROR (1 << 6)
annieluo2 0:d6c9b09b4042 139
annieluo2 0:d6c9b09b4042 140 // Types
annieluo2 0:d6c9b09b4042 141 // - v1.x Standard Capacity
annieluo2 0:d6c9b09b4042 142 // - v2.x Standard Capacity
annieluo2 0:d6c9b09b4042 143 // - v2.x High Capacity
annieluo2 0:d6c9b09b4042 144 // - Not recognised as an SD Card
annieluo2 0:d6c9b09b4042 145 #define SDCARD_FAIL 0
annieluo2 0:d6c9b09b4042 146 #define SDCARD_V1 1
annieluo2 0:d6c9b09b4042 147 #define SDCARD_V2 2
annieluo2 0:d6c9b09b4042 148 #define SDCARD_V2HC 3
annieluo2 0:d6c9b09b4042 149
annieluo2 0:d6c9b09b4042 150 int SDFileSystem::initialise_card() {
annieluo2 0:d6c9b09b4042 151 // Set to SCK for initialisation, and clock card with cs = 1
annieluo2 0:d6c9b09b4042 152 _spi.frequency(_init_sck);
annieluo2 0:d6c9b09b4042 153 _cs = 1;
annieluo2 0:d6c9b09b4042 154 for (int i = 0; i < 16; i++) {
annieluo2 0:d6c9b09b4042 155 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 156 }
annieluo2 0:d6c9b09b4042 157
annieluo2 0:d6c9b09b4042 158 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
annieluo2 0:d6c9b09b4042 159 if (_cmd(0, 0) != R1_IDLE_STATE) {
annieluo2 0:d6c9b09b4042 160 debug("No disk, or could not put SD card in to SPI idle state\n");
annieluo2 0:d6c9b09b4042 161 return SDCARD_FAIL;
annieluo2 0:d6c9b09b4042 162 }
annieluo2 0:d6c9b09b4042 163
annieluo2 0:d6c9b09b4042 164 // send CMD8 to determine whther it is ver 2.x
annieluo2 0:d6c9b09b4042 165 int r = _cmd8();
annieluo2 0:d6c9b09b4042 166 if (r == R1_IDLE_STATE) {
annieluo2 0:d6c9b09b4042 167 return initialise_card_v2();
annieluo2 0:d6c9b09b4042 168 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
annieluo2 0:d6c9b09b4042 169 return initialise_card_v1();
annieluo2 0:d6c9b09b4042 170 } else {
annieluo2 0:d6c9b09b4042 171 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
annieluo2 0:d6c9b09b4042 172 return SDCARD_FAIL;
annieluo2 0:d6c9b09b4042 173 }
annieluo2 0:d6c9b09b4042 174 }
annieluo2 0:d6c9b09b4042 175
annieluo2 0:d6c9b09b4042 176 int SDFileSystem::initialise_card_v1() {
annieluo2 0:d6c9b09b4042 177 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
annieluo2 0:d6c9b09b4042 178 _cmd(55, 0);
annieluo2 0:d6c9b09b4042 179 if (_cmd(41, 0) == 0) {
annieluo2 0:d6c9b09b4042 180 cdv = 512;
annieluo2 0:d6c9b09b4042 181 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
annieluo2 0:d6c9b09b4042 182 return SDCARD_V1;
annieluo2 0:d6c9b09b4042 183 }
annieluo2 0:d6c9b09b4042 184 }
annieluo2 0:d6c9b09b4042 185
annieluo2 0:d6c9b09b4042 186 debug("Timeout waiting for v1.x card\n");
annieluo2 0:d6c9b09b4042 187 return SDCARD_FAIL;
annieluo2 0:d6c9b09b4042 188 }
annieluo2 0:d6c9b09b4042 189
annieluo2 0:d6c9b09b4042 190 int SDFileSystem::initialise_card_v2() {
annieluo2 0:d6c9b09b4042 191 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
annieluo2 0:d6c9b09b4042 192 wait_ms(50);
annieluo2 0:d6c9b09b4042 193 _cmd58();
annieluo2 0:d6c9b09b4042 194 _cmd(55, 0);
annieluo2 0:d6c9b09b4042 195 if (_cmd(41, 0x40000000) == 0) {
annieluo2 0:d6c9b09b4042 196 _cmd58();
annieluo2 0:d6c9b09b4042 197 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
annieluo2 0:d6c9b09b4042 198 cdv = 1;
annieluo2 0:d6c9b09b4042 199 return SDCARD_V2;
annieluo2 0:d6c9b09b4042 200 }
annieluo2 0:d6c9b09b4042 201 }
annieluo2 0:d6c9b09b4042 202
annieluo2 0:d6c9b09b4042 203 debug("Timeout waiting for v2.x card\n");
annieluo2 0:d6c9b09b4042 204 return SDCARD_FAIL;
annieluo2 0:d6c9b09b4042 205 }
annieluo2 0:d6c9b09b4042 206
annieluo2 0:d6c9b09b4042 207 int SDFileSystem::disk_initialize() {
annieluo2 0:d6c9b09b4042 208 _is_initialized = initialise_card();
annieluo2 0:d6c9b09b4042 209 if (_is_initialized == 0) {
annieluo2 0:d6c9b09b4042 210 debug("Fail to initialize card\n");
annieluo2 0:d6c9b09b4042 211 return 1;
annieluo2 0:d6c9b09b4042 212 }
annieluo2 0:d6c9b09b4042 213 debug_if(SD_DBG, "init card = %d\n", _is_initialized);
annieluo2 0:d6c9b09b4042 214 _sectors = _sd_sectors();
annieluo2 0:d6c9b09b4042 215
annieluo2 0:d6c9b09b4042 216 // Set block length to 512 (CMD16)
annieluo2 0:d6c9b09b4042 217 if (_cmd(16, 512) != 0) {
annieluo2 0:d6c9b09b4042 218 debug("Set 512-byte block timed out\n");
annieluo2 0:d6c9b09b4042 219 return 1;
annieluo2 0:d6c9b09b4042 220 }
annieluo2 0:d6c9b09b4042 221
annieluo2 0:d6c9b09b4042 222 // Set SCK for data transfer
annieluo2 0:d6c9b09b4042 223 _spi.frequency(_transfer_sck);
annieluo2 0:d6c9b09b4042 224 return 0;
annieluo2 0:d6c9b09b4042 225 }
annieluo2 0:d6c9b09b4042 226
annieluo2 0:d6c9b09b4042 227 int SDFileSystem::disk_write(const uint8_t* buffer, uint32_t block_number, uint32_t count) {
annieluo2 0:d6c9b09b4042 228 if (!_is_initialized) {
annieluo2 0:d6c9b09b4042 229 return -1;
annieluo2 0:d6c9b09b4042 230 }
annieluo2 0:d6c9b09b4042 231
annieluo2 0:d6c9b09b4042 232 for (uint32_t b = block_number; b < block_number + count; b++) {
annieluo2 0:d6c9b09b4042 233 // set write address for single block (CMD24)
annieluo2 0:d6c9b09b4042 234 if (_cmd(24, b * cdv) != 0) {
annieluo2 0:d6c9b09b4042 235 return 1;
annieluo2 0:d6c9b09b4042 236 }
annieluo2 0:d6c9b09b4042 237
annieluo2 0:d6c9b09b4042 238 // send the data block
annieluo2 0:d6c9b09b4042 239 _write(buffer, 512);
annieluo2 0:d6c9b09b4042 240 buffer += 512;
annieluo2 0:d6c9b09b4042 241 }
annieluo2 0:d6c9b09b4042 242
annieluo2 0:d6c9b09b4042 243 return 0;
annieluo2 0:d6c9b09b4042 244 }
annieluo2 0:d6c9b09b4042 245
annieluo2 0:d6c9b09b4042 246 int SDFileSystem::disk_read(uint8_t* buffer, uint32_t block_number, uint32_t count) {
annieluo2 0:d6c9b09b4042 247 if (!_is_initialized) {
annieluo2 0:d6c9b09b4042 248 return -1;
annieluo2 0:d6c9b09b4042 249 }
annieluo2 0:d6c9b09b4042 250
annieluo2 0:d6c9b09b4042 251 for (uint32_t b = block_number; b < block_number + count; b++) {
annieluo2 0:d6c9b09b4042 252 // set read address for single block (CMD17)
annieluo2 0:d6c9b09b4042 253 if (_cmd(17, b * cdv) != 0) {
annieluo2 0:d6c9b09b4042 254 return 1;
annieluo2 0:d6c9b09b4042 255 }
annieluo2 0:d6c9b09b4042 256
annieluo2 0:d6c9b09b4042 257 // receive the data
annieluo2 0:d6c9b09b4042 258 _read(buffer, 512);
annieluo2 0:d6c9b09b4042 259 buffer += 512;
annieluo2 0:d6c9b09b4042 260 }
annieluo2 0:d6c9b09b4042 261
annieluo2 0:d6c9b09b4042 262 return 0;
annieluo2 0:d6c9b09b4042 263 }
annieluo2 0:d6c9b09b4042 264
annieluo2 0:d6c9b09b4042 265 int SDFileSystem::disk_status() {
annieluo2 0:d6c9b09b4042 266 // FATFileSystem::disk_status() returns 0 when initialized
annieluo2 0:d6c9b09b4042 267 if (_is_initialized) {
annieluo2 0:d6c9b09b4042 268 return 0;
annieluo2 0:d6c9b09b4042 269 } else {
annieluo2 0:d6c9b09b4042 270 return 1;
annieluo2 0:d6c9b09b4042 271 }
annieluo2 0:d6c9b09b4042 272 }
annieluo2 0:d6c9b09b4042 273
annieluo2 0:d6c9b09b4042 274 int SDFileSystem::disk_sync() { return 0; }
annieluo2 0:d6c9b09b4042 275 uint32_t SDFileSystem::disk_sectors() { return _sectors; }
annieluo2 0:d6c9b09b4042 276
annieluo2 0:d6c9b09b4042 277
annieluo2 0:d6c9b09b4042 278 // PRIVATE FUNCTIONS
annieluo2 0:d6c9b09b4042 279 int SDFileSystem::_cmd(int cmd, int arg) {
annieluo2 0:d6c9b09b4042 280 _cs = 0;
annieluo2 0:d6c9b09b4042 281
annieluo2 0:d6c9b09b4042 282 // send a command
annieluo2 0:d6c9b09b4042 283 _spi.write(0x40 | cmd);
annieluo2 0:d6c9b09b4042 284 _spi.write(arg >> 24);
annieluo2 0:d6c9b09b4042 285 _spi.write(arg >> 16);
annieluo2 0:d6c9b09b4042 286 _spi.write(arg >> 8);
annieluo2 0:d6c9b09b4042 287 _spi.write(arg >> 0);
annieluo2 0:d6c9b09b4042 288 _spi.write(0x95);
annieluo2 0:d6c9b09b4042 289
annieluo2 0:d6c9b09b4042 290 // wait for the repsonse (response[7] == 0)
annieluo2 0:d6c9b09b4042 291 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
annieluo2 0:d6c9b09b4042 292 int response = _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 293 if (!(response & 0x80)) {
annieluo2 0:d6c9b09b4042 294 _cs = 1;
annieluo2 0:d6c9b09b4042 295 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 296 return response;
annieluo2 0:d6c9b09b4042 297 }
annieluo2 0:d6c9b09b4042 298 }
annieluo2 0:d6c9b09b4042 299 _cs = 1;
annieluo2 0:d6c9b09b4042 300 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 301 return -1; // timeout
annieluo2 0:d6c9b09b4042 302 }
annieluo2 0:d6c9b09b4042 303 int SDFileSystem::_cmdx(int cmd, int arg) {
annieluo2 0:d6c9b09b4042 304 _cs = 0;
annieluo2 0:d6c9b09b4042 305
annieluo2 0:d6c9b09b4042 306 // send a command
annieluo2 0:d6c9b09b4042 307 _spi.write(0x40 | cmd);
annieluo2 0:d6c9b09b4042 308 _spi.write(arg >> 24);
annieluo2 0:d6c9b09b4042 309 _spi.write(arg >> 16);
annieluo2 0:d6c9b09b4042 310 _spi.write(arg >> 8);
annieluo2 0:d6c9b09b4042 311 _spi.write(arg >> 0);
annieluo2 0:d6c9b09b4042 312 _spi.write(0x95);
annieluo2 0:d6c9b09b4042 313
annieluo2 0:d6c9b09b4042 314 // wait for the repsonse (response[7] == 0)
annieluo2 0:d6c9b09b4042 315 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
annieluo2 0:d6c9b09b4042 316 int response = _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 317 if (!(response & 0x80)) {
annieluo2 0:d6c9b09b4042 318 return response;
annieluo2 0:d6c9b09b4042 319 }
annieluo2 0:d6c9b09b4042 320 }
annieluo2 0:d6c9b09b4042 321 _cs = 1;
annieluo2 0:d6c9b09b4042 322 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 323 return -1; // timeout
annieluo2 0:d6c9b09b4042 324 }
annieluo2 0:d6c9b09b4042 325
annieluo2 0:d6c9b09b4042 326
annieluo2 0:d6c9b09b4042 327 int SDFileSystem::_cmd58() {
annieluo2 0:d6c9b09b4042 328 _cs = 0;
annieluo2 0:d6c9b09b4042 329 int arg = 0;
annieluo2 0:d6c9b09b4042 330
annieluo2 0:d6c9b09b4042 331 // send a command
annieluo2 0:d6c9b09b4042 332 _spi.write(0x40 | 58);
annieluo2 0:d6c9b09b4042 333 _spi.write(arg >> 24);
annieluo2 0:d6c9b09b4042 334 _spi.write(arg >> 16);
annieluo2 0:d6c9b09b4042 335 _spi.write(arg >> 8);
annieluo2 0:d6c9b09b4042 336 _spi.write(arg >> 0);
annieluo2 0:d6c9b09b4042 337 _spi.write(0x95);
annieluo2 0:d6c9b09b4042 338
annieluo2 0:d6c9b09b4042 339 // wait for the repsonse (response[7] == 0)
annieluo2 0:d6c9b09b4042 340 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
annieluo2 0:d6c9b09b4042 341 int response = _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 342 if (!(response & 0x80)) {
annieluo2 0:d6c9b09b4042 343 int ocr = _spi.write(0xFF) << 24;
annieluo2 0:d6c9b09b4042 344 ocr |= _spi.write(0xFF) << 16;
annieluo2 0:d6c9b09b4042 345 ocr |= _spi.write(0xFF) << 8;
annieluo2 0:d6c9b09b4042 346 ocr |= _spi.write(0xFF) << 0;
annieluo2 0:d6c9b09b4042 347 _cs = 1;
annieluo2 0:d6c9b09b4042 348 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 349 return response;
annieluo2 0:d6c9b09b4042 350 }
annieluo2 0:d6c9b09b4042 351 }
annieluo2 0:d6c9b09b4042 352 _cs = 1;
annieluo2 0:d6c9b09b4042 353 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 354 return -1; // timeout
annieluo2 0:d6c9b09b4042 355 }
annieluo2 0:d6c9b09b4042 356
annieluo2 0:d6c9b09b4042 357 int SDFileSystem::_cmd8() {
annieluo2 0:d6c9b09b4042 358 _cs = 0;
annieluo2 0:d6c9b09b4042 359
annieluo2 0:d6c9b09b4042 360 // send a command
annieluo2 0:d6c9b09b4042 361 _spi.write(0x40 | 8); // CMD8
annieluo2 0:d6c9b09b4042 362 _spi.write(0x00); // reserved
annieluo2 0:d6c9b09b4042 363 _spi.write(0x00); // reserved
annieluo2 0:d6c9b09b4042 364 _spi.write(0x01); // 3.3v
annieluo2 0:d6c9b09b4042 365 _spi.write(0xAA); // check pattern
annieluo2 0:d6c9b09b4042 366 _spi.write(0x87); // crc
annieluo2 0:d6c9b09b4042 367
annieluo2 0:d6c9b09b4042 368 // wait for the repsonse (response[7] == 0)
annieluo2 0:d6c9b09b4042 369 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
annieluo2 0:d6c9b09b4042 370 char response[5];
annieluo2 0:d6c9b09b4042 371 response[0] = _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 372 if (!(response[0] & 0x80)) {
annieluo2 0:d6c9b09b4042 373 for (int j = 1; j < 5; j++) {
annieluo2 0:d6c9b09b4042 374 response[i] = _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 375 }
annieluo2 0:d6c9b09b4042 376 _cs = 1;
annieluo2 0:d6c9b09b4042 377 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 378 return response[0];
annieluo2 0:d6c9b09b4042 379 }
annieluo2 0:d6c9b09b4042 380 }
annieluo2 0:d6c9b09b4042 381 _cs = 1;
annieluo2 0:d6c9b09b4042 382 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 383 return -1; // timeout
annieluo2 0:d6c9b09b4042 384 }
annieluo2 0:d6c9b09b4042 385
annieluo2 0:d6c9b09b4042 386 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
annieluo2 0:d6c9b09b4042 387 _cs = 0;
annieluo2 0:d6c9b09b4042 388
annieluo2 0:d6c9b09b4042 389 // read until start byte (0xFF)
annieluo2 0:d6c9b09b4042 390 while (_spi.write(0xFF) != 0xFE);
annieluo2 0:d6c9b09b4042 391
annieluo2 0:d6c9b09b4042 392 // read data
annieluo2 0:d6c9b09b4042 393 for (uint32_t i = 0; i < length; i++) {
annieluo2 0:d6c9b09b4042 394 buffer[i] = _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 395 }
annieluo2 0:d6c9b09b4042 396 _spi.write(0xFF); // checksum
annieluo2 0:d6c9b09b4042 397 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 398
annieluo2 0:d6c9b09b4042 399 _cs = 1;
annieluo2 0:d6c9b09b4042 400 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 401 return 0;
annieluo2 0:d6c9b09b4042 402 }
annieluo2 0:d6c9b09b4042 403
annieluo2 0:d6c9b09b4042 404 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
annieluo2 0:d6c9b09b4042 405 _cs = 0;
annieluo2 0:d6c9b09b4042 406
annieluo2 0:d6c9b09b4042 407 // indicate start of block
annieluo2 0:d6c9b09b4042 408 _spi.write(0xFE);
annieluo2 0:d6c9b09b4042 409
annieluo2 0:d6c9b09b4042 410 // write the data
annieluo2 0:d6c9b09b4042 411 for (uint32_t i = 0; i < length; i++) {
annieluo2 0:d6c9b09b4042 412 _spi.write(buffer[i]);
annieluo2 0:d6c9b09b4042 413 }
annieluo2 0:d6c9b09b4042 414
annieluo2 0:d6c9b09b4042 415 // write the checksum
annieluo2 0:d6c9b09b4042 416 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 417 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 418
annieluo2 0:d6c9b09b4042 419 // check the response token
annieluo2 0:d6c9b09b4042 420 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
annieluo2 0:d6c9b09b4042 421 _cs = 1;
annieluo2 0:d6c9b09b4042 422 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 423 return 1;
annieluo2 0:d6c9b09b4042 424 }
annieluo2 0:d6c9b09b4042 425
annieluo2 0:d6c9b09b4042 426 // wait for write to finish
annieluo2 0:d6c9b09b4042 427 while (_spi.write(0xFF) == 0);
annieluo2 0:d6c9b09b4042 428
annieluo2 0:d6c9b09b4042 429 _cs = 1;
annieluo2 0:d6c9b09b4042 430 _spi.write(0xFF);
annieluo2 0:d6c9b09b4042 431 return 0;
annieluo2 0:d6c9b09b4042 432 }
annieluo2 0:d6c9b09b4042 433
annieluo2 0:d6c9b09b4042 434 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
annieluo2 0:d6c9b09b4042 435 uint32_t bits = 0;
annieluo2 0:d6c9b09b4042 436 uint32_t size = 1 + msb - lsb;
annieluo2 0:d6c9b09b4042 437 for (uint32_t i = 0; i < size; i++) {
annieluo2 0:d6c9b09b4042 438 uint32_t position = lsb + i;
annieluo2 0:d6c9b09b4042 439 uint32_t byte = 15 - (position >> 3);
annieluo2 0:d6c9b09b4042 440 uint32_t bit = position & 0x7;
annieluo2 0:d6c9b09b4042 441 uint32_t value = (data[byte] >> bit) & 1;
annieluo2 0:d6c9b09b4042 442 bits |= value << i;
annieluo2 0:d6c9b09b4042 443 }
annieluo2 0:d6c9b09b4042 444 return bits;
annieluo2 0:d6c9b09b4042 445 }
annieluo2 0:d6c9b09b4042 446
annieluo2 0:d6c9b09b4042 447 uint32_t SDFileSystem::_sd_sectors() {
annieluo2 0:d6c9b09b4042 448 uint32_t c_size, c_size_mult, read_bl_len;
annieluo2 0:d6c9b09b4042 449 uint32_t block_len, mult, blocknr, capacity;
annieluo2 0:d6c9b09b4042 450 uint32_t hc_c_size;
annieluo2 0:d6c9b09b4042 451 uint32_t blocks;
annieluo2 0:d6c9b09b4042 452
annieluo2 0:d6c9b09b4042 453 // CMD9, Response R2 (R1 byte + 16-byte block read)
annieluo2 0:d6c9b09b4042 454 if (_cmdx(9, 0) != 0) {
annieluo2 0:d6c9b09b4042 455 debug("Didn't get a response from the disk\n");
annieluo2 0:d6c9b09b4042 456 return 0;
annieluo2 0:d6c9b09b4042 457 }
annieluo2 0:d6c9b09b4042 458
annieluo2 0:d6c9b09b4042 459 uint8_t csd[16];
annieluo2 0:d6c9b09b4042 460 if (_read(csd, 16) != 0) {
annieluo2 0:d6c9b09b4042 461 debug("Couldn't read csd response from disk\n");
annieluo2 0:d6c9b09b4042 462 return 0;
annieluo2 0:d6c9b09b4042 463 }
annieluo2 0:d6c9b09b4042 464
annieluo2 0:d6c9b09b4042 465 // csd_structure : csd[127:126]
annieluo2 0:d6c9b09b4042 466 // c_size : csd[73:62]
annieluo2 0:d6c9b09b4042 467 // c_size_mult : csd[49:47]
annieluo2 0:d6c9b09b4042 468 // read_bl_len : csd[83:80] - the *maximum* read block length
annieluo2 0:d6c9b09b4042 469
annieluo2 0:d6c9b09b4042 470 int csd_structure = ext_bits(csd, 127, 126);
annieluo2 0:d6c9b09b4042 471
annieluo2 0:d6c9b09b4042 472 switch (csd_structure) {
annieluo2 0:d6c9b09b4042 473 case 0:
annieluo2 0:d6c9b09b4042 474 cdv = 512;
annieluo2 0:d6c9b09b4042 475 c_size = ext_bits(csd, 73, 62);
annieluo2 0:d6c9b09b4042 476 c_size_mult = ext_bits(csd, 49, 47);
annieluo2 0:d6c9b09b4042 477 read_bl_len = ext_bits(csd, 83, 80);
annieluo2 0:d6c9b09b4042 478
annieluo2 0:d6c9b09b4042 479 block_len = 1 << read_bl_len;
annieluo2 0:d6c9b09b4042 480 mult = 1 << (c_size_mult + 2);
annieluo2 0:d6c9b09b4042 481 blocknr = (c_size + 1) * mult;
annieluo2 0:d6c9b09b4042 482 capacity = blocknr * block_len;
annieluo2 0:d6c9b09b4042 483 blocks = capacity / 512;
annieluo2 0:d6c9b09b4042 484 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
annieluo2 0:d6c9b09b4042 485 break;
annieluo2 0:d6c9b09b4042 486
annieluo2 0:d6c9b09b4042 487 case 1:
annieluo2 0:d6c9b09b4042 488 cdv = 1;
annieluo2 0:d6c9b09b4042 489 hc_c_size = ext_bits(csd, 63, 48);
annieluo2 0:d6c9b09b4042 490 blocks = (hc_c_size+1)*1024;
annieluo2 0:d6c9b09b4042 491 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
annieluo2 0:d6c9b09b4042 492 break;
annieluo2 0:d6c9b09b4042 493
annieluo2 0:d6c9b09b4042 494 default:
annieluo2 0:d6c9b09b4042 495 debug("CSD struct unsupported\r\n");
annieluo2 0:d6c9b09b4042 496 return 0;
annieluo2 0:d6c9b09b4042 497 };
annieluo2 0:d6c9b09b4042 498 return blocks;
annieluo2 0:d6c9b09b4042 499 }